Ðþí  :ü   8  5ä   (              5¬                             3    hisilicon,hi3798cv200-poplar hisilicon,hi3798cv200                                   +         #   7HiSilicon Poplar Development Board     psci              arm,psci-0.2             =smc       cpus                         +       cpu@0             arm,cortex-a53           Dcpu          P                 Tpsci             b  €          o   @         �   €         Ž  €          ›   @         ­            º         cpu@1             arm,cortex-a53           Dcpu          P                Tpsci             b  €          o   @         �   €         Ž  €          ›   @         ­            º         cpu@2             arm,cortex-a53           Dcpu          P                Tpsci             b  €          o   @         �   €         Ž  €          ›   @         ­            º         cpu@3             arm,cortex-a53           Dcpu          P                Tpsci             b  €          o   @         �   €         Ž  €          ›   @         ­            º            l2-cache              cache             Ë         d            q   @         ƒ            Ù            å         interrupt-controller@f1001000             arm,gic-400       @   P    ñ             ñ               ñ @             ñ `                  í      	                        ø            	         å         timer             arm,armv8-timer       0   í                              
        soc@f0000000              simple-bus                       +                   ð              %            @      clock-reset-controller@8a22000        ,    hisilicon,hi3798cv200-crg syscon simple-mfd          P¢             0           =            å      reset-controller              ti,syscon-reset         =         8  J   Ì      Ì                 Ì      Ì                       å            system-controller@8000000         %    hisilicon,hi3798cv200-sysctrl syscon             P              0           =            å         peripheral-controller@8a20000         1    hisilicon,hi3798cv200-perictrl syscon simple-mfd             P¢                          +               ¢        usb2_phy@120              hisilicon,hi3798cv200-usb2-phy           P              X      (        _      ¼                        +       phy@0            P            f            _      ¼            å         phy@1            P           f            _      ¼   	         usb2_phy@124              hisilicon,hi3798cv200-usb2-phy           P  $           X      )        _      ¼                        +       phy@0            P            f            _      ¼   
         phy@850           hisilicon,hi3798cv200-combphy            P  P           f           X      *        _     ˆ           q      *        �õá         –         phy@858           hisilicon,hi3798cv200-combphy            P  X           f           X      !        _     ˆ           q      !        �õá         «                  å            pinconf@8a21000           pinconf-single           P¢   €        Æ            ä        °                                  	                                                                                                   V            W                         "             %            &            )             .            6            @            G             H            N             O            P            F            X                å      gpio-range                      å         emmc-pins-1       H  <                                                    $           P                        m                      ˆ              ¡   °   ð         å         emmc-pins-2         <   (           P                        m                      ˆ              ¡   �   ð         å         emmc-pins-3         <   ,           P                        m                      ˆ              ¡   0   0         å   	      emmc-pins-4         <   0           P                        m                      ˆ              ¡   0   0         å   
         serial@8b00000            arm,pl011 arm,primecell          P°              í       1           X                    ¿uartclk apb_pclk            Ëokay          serial@8b02000            arm,pl011 arm,primecell          P°              í       3           X                    ¿uartclk apb_pclk            Ëokay          	  ÒLS-UART0          i2c@8b10000           hisilicon,hix5hd2-i2c            P±                          +             í       &           Ø €        X              Ëokay            ÒLS-I2C0       i2c@8b11000           hisilicon,hix5hd2-i2c            P±                         +             í       '           Ø €        X            	  Ëdisabled          i2c@8b12000           hisilicon,hix5hd2-i2c            P±                          +             í       (           Ø €        X              Ëokay            ÒLS-I2C1       i2c@8b13000           hisilicon,hix5hd2-i2c            P±0                         +             í       )           Ø €        X      	      	  Ëdisabled          i2c@8b14000           hisilicon,hix5hd2-i2c            P±@                         +             í       *           Ø €        X      
      	  Ëdisabled          spi@8b1a000           arm,pl022 arm,primecell          P±              í       -           è           ï                  X                    ¿sspclk apb_pclk                      +            Ëokay            ÒLS-SPI0       mmc@9820000           snps,dw-mshc             P	‚              í       "           X                    ¿biu ciu         _      œ           øreset           Ëokay                              mmc@9830000           hisilicon,hi3798cv200-dw-mshc            P	ƒ              í       #            X                                ¿ciu biu ciu-sample ciu-drive            _                  øreset           Ëokay            default         -         	   
        7           ØëÂ          B         T         a         p                 gpio@8b20000              arm,pl061 arm,primecell          P²              í       l            ~        Ž            	         ø           š                      X            	  ¿apb_pclk          	  Ëdisabled          gpio@8b21000              arm,pl061 arm,primecell          P²             í       m            ~        Ž            	         ø         P  š                      	                                               X            	  ¿apb_pclk            Ëokay            ¦GPIO-E     GPIO-F  GPIO-J         gpio@8b22000              arm,pl061 arm,primecell          P²              í       n            ~        Ž            	         ø            š                                 X            	  ¿apb_pclk            Ëokay          &  ¦GPIO-H GPIO-I GPIO-L GPIO-G GPIO-K            gpio@8b23000              arm,pl061 arm,primecell          P²0             í       o            ~        Ž            	         ø         @  š                                  V            W           X            	  ¿apb_pclk            Ëokay            ¦    GPIO-C   GPIO-B       gpio@8b24000              arm,pl061 arm,primecell          P²@             í       p            ~        Ž            	         ø         0  š                      "            %           X            	  ¿apb_pclk            Ëokay            ¦     GPIO-D              å         gpio@8004000              arm,pl061 arm,primecell          P @             í       q            ~        Ž            	         ø           X            	  ¿apb_pclk            Ëokay          "  ¦ USER-LED-1 USER-LED-2   GPIO-A              å         gpio@8b26000              arm,pl061 arm,primecell          P²`             í       r            ~        Ž            	         ø            š          &             )           X            	  ¿apb_pclk            Ëokay            ¦   USER-LED-0                å         gpio@8b27000              arm,pl061 arm,primecell          P²p             í       s            ~        Ž            	         ø           š          .           X            	  ¿apb_pclk          	  Ëdisabled             å         gpio@8b28000              arm,pl061 arm,primecell          P²€             í       t            ~        Ž            	         ø           š          6           X            	  ¿apb_pclk          	  Ëdisabled          gpio@8b29000              arm,pl061 arm,primecell          P²�             í       u            ~        Ž            	         ø           š          @         G           X            	  ¿apb_pclk          	  Ëdisabled          gpio@8b2a000              arm,pl061 arm,primecell          P²              í       v            ~        Ž            	         ø         0  š          H            N            O           X            	  ¿apb_pclk            Ëokay            ¦      USER-LED-3             å         gpio@8b2b000              arm,pl061 arm,primecell          P²°             í       w            ~        Ž            	         ø            š          P            F           X            	  ¿apb_pclk          	  Ëdisabled          gpio@8b2c000              arm,pl061 arm,primecell          P²À             í       x            ~        Ž            	         ø           š          X           X            	  ¿apb_pclk          	  Ëdisabled          ethernet@9840000          2    hisilicon,hi3798cv200-gmac hisilicon,hisi-gmac-v2            P	„     	„0            í       G           X                    ¿mac_core mac_ifc             _      Ì         Ì   
               ømac_core mac_ifc phy          	  Ëdisabled          ethernet@9841000          2    hisilicon,hi3798cv200-gmac hisilicon,hisi-gmac-v2            P	„    	„0            í       H           X                     ¿mac_core mac_ifc             _      Ì   	      Ì                 ømac_core mac_ifc phy            Ëokay                         +            ¶           Árgmii           Ê  '  '  u0   phy@3            P            å            ir@8001000            hisilicon,hix5hd2-ir             P              í       /           X              Ëokay            èrc-hisi-poplar        pcie@9860000              hisilicon,hi3798cv200-pcie           P	†                           úcontrol rc-dbi config                        +            Dpci                ÿ                 0  �           ð         ‚                 ð           í       €           msi          ø           (                         ;                          ƒ            X                                ¿aux pipe sys bus          $  _     Œ        Œ        Œ           øsoft sys bus            I              Nphy         Ëokay            X                 d         usb@9880000           generic-ohci             P	ˆ              í       C           X      "      %      &        ¿bus clk12 clk48         _      ¸           øbus         I           Nusb         Ëokay          usb@9890000           generic-ehci             P	‰              í       B           X      "      #      $        ¿bus phy utmi          $  _      ¸         ¸         ¸           øbus phy utmi            I           Nusb         Ëokay             aliases         q/soc@f0000000/serial@8b00000            y/soc@f0000000/serial@8b02000          chosen          �serial0:115200n8          memory@0             Dmemory           P            €         leds          
    gpio-leds      user-led0           Ògreen:user1         ò               
  �heartbeat           £off       user-led1           Ògreen:user2         ò                 �mmc0            £off       user-led2           Ògreen:user3         ò                 �mmc1            £off       user-led3           Ògreen:user4         ò                 �none             ±        £off          regulator-pcie            regulator-fixed       
  Á3V3_PCIE0           Ð 2Z         è 2Z                                      å            	compatible interrupt-parent #address-cells #size-cells model method device_type reg enable-method d-cache-size d-cache-line-size d-cache-sets i-cache-size i-cache-line-size i-cache-sets next-level-cache cache-unified cache-level phandle interrupts #interrupt-cells interrupt-controller ranges dma-ranges #clock-cells #reset-cells ti,reset-bits clocks resets #phy-cells assigned-clocks assigned-clock-rates hisilicon,fixed-mode hisilicon,mode-select-bits pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range #pinctrl-single,gpio-range-cells pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,slew-rate pinctrl-single,drive-strength clock-names status label clock-frequency num-cs cs-gpios reset-names bus-width cap-sd-highspeed pinctrl-names pinctrl-0 fifo-depth cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v non-removable gpio-controller #gpio-cells gpio-ranges gpio-line-names phy-handle phy-mode hisilicon,phy-reset-delays-us linux,rc-map-name reg-names bus-range num-lanes interrupt-names interrupt-map-mask interrupt-map phys phy-names reset-gpios vpcie-supply serial0 serial2 stdout-path linux,default-trigger default-state panic-indicator regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high 