Ðþí  *   8  &ü   (              &Ä                                  cudy,wr3000-v1 mediatek,mt7981b                                  +            7Cudy WR3000 V1     cpus                         +       cpu@0             arm,cortex-a53           =             Acpu          Mpsci          cpu@1             arm,cortex-a53           =            Acpu          Mpsci             oscillator-40m            fixed-clock          [bZ          kclkxtal          ~          psci              arm,psci-1.0             Tsmc       reserved-memory                      +             ‹   wo-boot@15194000             =    @                  ’         ™         wo-ilm@151e0000          =            €           ’         ™         wo-dlm@151e8000          =    €                   ’         ™         secmon@43000000          =    C                    ’      wmcpu-reserved@47c80000          =    GÈ                   ’         ™         wo-emi@47d80000          =    GØ                   ’         ™         wo-data@47dc0000             =    GÜ       $            ’         ™            soc           simple-bus            ‹                     +      interrupt-controller@c000000              arm,gic-v3            =                                                 ¡      	             ¬         Á            ™         clock-controller@10001000              mediatek,mt7981-infracfg syscon          =                      ~            ™         clock-controller@1001b000              mediatek,mt7981-topckgen syscon          =    °                 ~            ™         watchdog@1001c000             mediatek,mt7986-wdt          =    À                 ¡       n            Ò            ™         clock-controller@1001e000             mediatek,mt7981-apmixedsys           =    à                 ~            ™         pwm@10048000              mediatek,mt7981-pwm          =    €              (   ß                                       ætop main pwm1 pwm2 pwm3          ò         syscon@10060000       "    mediatek,mt7981-sgmiisys_0 syscon            =                      ~            ™         syscon@10070000       "    mediatek,mt7981-sgmiisys_1 syscon            =                      ~            ™         serial@11002000       *    mediatek,mt7981-uart mediatek,mt6577-uart            =                       ¡       {            ýuart wakeup          ß                  	   æbaud bus            default                  	  %disabled          serial@11003000       *    mediatek,mt7981-uart mediatek,mt6577-uart            =     0                 ¡       |            ýuart wakeup          ß                   	   æbaud bus          	  %disabled          serial@11004000       *    mediatek,mt7981-uart mediatek,mt6577-uart            =     @                 ¡       }            ýuart wakeup          ß            !      	   æbaud bus          	  %disabled          i2c@11007000              mediatek,mt7981-i2c           =     p            !p€       €         ¡       ˆ             ß                  3      4         æmain dma arb pmic                        +          	  %disabled          spi@11009000          )    mediatek,mt7981-spi-ipm mediatek,spi-ipm             =     �                 ¡       Ž             ß            N      "      #          æparent-clk sel-clk spi-clk hclk                      +          	  %disabled          spi@1100a000          )    mediatek,mt7981-spi-ipm mediatek,spi-ipm             =                       ¡       Œ             ß            N      '      )          æparent-clk sel-clk spi-clk hclk                      +          	  %disabled          spi@1100b000          )    mediatek,mt7981-spi-ipm mediatek,spi-ipm             =     °                 ¡       �             ß            N      (      *          æparent-clk sel-clk spi-clk hclk                      +          	  %disabled          thermal@1100c800          0    mediatek,mt7981-thermal mediatek,mt7986-thermal          =     È                 ¡       Š            ß            0         ætherm auxadc            ,           8calibration-data            I           _           o         adc@1100d000          .    mediatek,mt7981-auxadc mediatek,mt7986-auxadc            =     Ð                 ß      0         æmain            ƒ         	  %disabled             ™         usb@11200000          '    mediatek,mt7986-xhci mediatek,mtk-xhci            =             .      >              	  •mac ippc          (   ß      7      8      5      6      k      $   æsys_ck ref_ck mcu_ck dma_ck xhci_ck          ¡       ­           Ÿ         	         	  %disabled          pcie@11280000         *    mediatek,mt7981-pcie mediatek,mt8192-pcie            =    (        @       	  •pcie-mac             ‹‚                                  ¤       ÿ          ß      9      :      ;      <      !   æpl_250m tl_26m peri_26m top_133m             Apci         Ÿ   	         	  ®pcie-phy             ¡       ¨           ¸                     `  Ë                  
                      
                     
                     
                        Á            +         	  %disabled       interrupt-controller              ¬                      Á            ™   
         pinctrl@11d00000              mediatek,mt7981-pinctrl       �   =    Ð             À             Á             Ò             à             â             ð             ñ              °              I  •gpio iocfg_rt iocfg_rm iocfg_rb iocfg_lb iocfg_bl iocfg_tm iocfg_tl eint              ¬         ¡       á                       Ù              9         å        õ            Á            ™      uart0-pins           ™      mux         uart            
uart0               topmisc@11d10000              mediatek,mt7981-topmisc syscon           =    Ñ                  ~            ™         t-phy@11e10000        .    mediatek,mt7981-tphy mediatek,generic-tphy-v2            ‹        á                          +         	  %disabled       usb-phy@0            =                ß      l         æref                     ™         usb-phy@700          =     	          ß      d         æref                                      ™   	         efuse@11f20000        %    mediatek,mt7981-efuse mediatek,efuse             =    ò                              +      soc-uuid@140             =  @         thermal-calib@274            =  t            ™         phy-calib@8dc            =  Ü            ™            clock-controller@15000000             mediatek,mt7981-ethsys syscon            =                       ~            Ò            ™         wed@15010000              mediatek,mt7981-wed syscon           =                      ¡       Í           1                     %  ?wo-emi wo-ilm wo-dlm wo-data wo-boot            S            ™         ethernet@15100000             mediatek,mt7981-eth          =                     d      `      a        t            "      x   ß                               @                                                        ]      ^      ™   æfe gp2 gp1 wocpu0 sgmii_ck sgmii_tx250m sgmii_rx250m sgmii_cdr_ref sgmii_cdr_fb sgmii2_tx250m sgmii2_rx250m sgmii2_cdr_ref sgmii2_cdr_fb netsys0 netsys1          `   ¡       Ä          Å          Æ          Ç          ½          ¾          ¿          À         (   ýfe0 fe1 fe2 fe3 pdma0 pdma1 pdma2 pdma3         ‹           �                          ²           Ä         	  %disabled       mdio-bus                         +       ethernet-phy@0            ethernet-phy-ieee802.3-c22           =            Ñgmii             Ú        ,           8phy-cal-data                sram@15140000         
    mmio-sram            =                      ‹                                  +            ™         syscon@151a5000           mediatek,mt7986-wo-ccif syscon           =    P                 ¡       Ó            ™         wifi@18000000             mediatek,mt7981-wmac          0   =                   0            Ñ               0   ¡       Õ          Ö          ×          Ø            ß      _      \         æmcu ap2conn         1           ì              óconsys        	  %disabled             timer             arm,armv8-timer                   0   ¡                                 
         memory@40000000          =    @                   Amemory        keys          
    gpio-keys      key-wps         ÿWPS                                   key-reset           ÿRESET                              ˜         leds          
    gpio-leds      led-0                      wan                        led-1                    
  wlan-2ghz                          led-2                    
  wlan-5ghz                          led-3                      lan               	         led-4                      status                
         led-5                      wan-online                               	compatible interrupt-parent #address-cells #size-cells model reg device_type enable-method clock-frequency clock-output-names #clock-cells ranges no-map phandle interrupts interrupt-controller #interrupt-cells #reset-cells clocks clock-names #pwm-cells interrupt-names pinctrl-names pinctrl-0 status nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys #io-channel-cells reg-names phys bus-range phy-names interrupt-map-mask interrupt-map gpio-ranges gpio-controller #gpio-cells function groups #phy-cells mediatek,syscon-type memory-region memory-region-names mediatek,wo-ccif assigned-clocks assigned-clock-parents sram mediatek,ethsys mediatek,sgmiisys mediatek,infracfg mediatek,wed phy-mode phy-is-integrated resets reset-names label gpios linux,code color 