Ðþí S›   8 ET   (            G E                             =    ezurio,mt8390-tungsten-smarc mediatek,mt8390 mediatek,mt8188                                     +         "   7Ezurio Tungsten700 SMARC (MT8390)      aliases          =/soc/dp-intf@1c015000            F/soc/dp-intf@1c113000            O/soc/dpi@1c112000            T/soc/dsc@1c009000            Y/soc/ethdr@1c114000          `/soc/mailbox@10320000            e/soc/mailbox@10330000            j/soc/merge0@1c014000             q/soc/merge@1c10c000          x/soc/merge@1c10d000          /soc/merge@1c10e000          †/soc/merge@1c10f000          �/soc/merge@1c110000          ”/soc/mutex@1c016000          ›/soc/mutex@1c101000          ¢/soc/padding@1c11d000            «/soc/padding@1c11e000            ´/soc/padding@1c11f000            ½/soc/padding@1c120000            Æ/soc/padding@1c121000            Ï/soc/padding@1c122000            Ø/soc/padding@1c123000            á/soc/padding@1c124000            ê/soc/rdma@1c104000           õ/soc/rdma@1c105000           /soc/rdma@1c106000          /soc/rdma@1c107000          /soc/rdma@1c108000          !/soc/rdma@1c109000          ,/soc/rdma@1c10a000          7/soc/rdma@1c10b000          B/soc/dsi@1c008000           G/soc/ethernet@11021000          Q/soc/i2c@11280000           V/soc/i2c@11e00000           [/soc/i2c@11281000           `/soc/i2c@11282000           e/soc/i2c@11e01000           j/soc/i2c@11ec0000           o/soc/i2c@11ec1000           t/soc/mmc@11230000           y/soc/mmc@11240000           ~/soc/mmc@11250000         *  ƒ/soc/i2c@11280000/i2c-mux@73/i2c@0/rtc@52           ˆ/soc/pwrap@10024000/pmic/rtc            �/soc/serial@11001100          cpus                         +       cpu@0           •cpu           arm,cortex-a55          ¡            ¥psci            ³w5”         Ã          Ö              æ  €         ó   @           €          €            @        1   €        >           O               c           r           }         cpu@100         •cpu           arm,cortex-a55          ¡           ¥psci            ³w5”         Ã          Ö              æ  €         ó   @           €          €            @        1   €        >           O               c           r           }         cpu@200         •cpu           arm,cortex-a55          ¡           ¥psci            ³w5”         Ã          Ö              æ  €         ó   @           €          €            @        1   €        >           O               c           r           }         cpu@300         •cpu           arm,cortex-a55          ¡           ¥psci            ³w5”         Ã          Ö              æ  €         ó   @           €          €            @        1   €        >           O               c           r           }         cpu@400         •cpu           arm,cortex-a55          ¡           ¥psci            ³w5”         Ã          Ö              æ  €         ó   @           €          €            @        1   €        >           O               c           r           }         cpu@500         •cpu           arm,cortex-a55          ¡           ¥psci            ³w5”         Ã          Ö              æ  €         ó   @           €          €            @        1   €        >           O               c           r           }         cpu@600         •cpu           arm,cortex-a78          ¡           ¥psci            ³šøÚ         Ã           Ö              æ           ó   @                                 @        1           >   	        O              c           r   
        }         cpu@700         •cpu           arm,cortex-a78          ¡           ¥psci            ³šøÚ         Ã           Ö              æ           ó   @                                 @        1           >   	        O              c           r   
        }         cpu-map    cluster0       core0           …         core1           …         core2           …         core3           …         core4           …         core5           …         core6           …         core7           …               idle-states         ‰psci       cpu-off-l             arm,idle-state          –            ­        ¾   2        Ï   _        ß  D        }         cpu-off-b             arm,idle-state          –            ­        ¾   -        Ï   Œ        ß  ä        }         cluster-off-l             arm,idle-state          –          ­        ¾   7        Ï   ›        ß  H        }         cluster-off-b             arm,idle-state          –          ­        ¾   2        Ï   È        ß  è        }            l2-cache0             cache           ð           è           õ   @                   >            ü        }         l2-cache1             cache           ð           è           õ   @                   >            ü        }   	      l3-cache              cache           ð           è            õ   @                    ü        }            oscillator-13m            fixed-clock         
            ³ Æ]@        clk13m          }   8      oscillator-26m            fixed-clock         
            ³Œº€        clk26m          }   :      oscillator-32k            fixed-clock         
            ³  €         clk32k        opp-table-gpu             operating-points-v2          *        }   ‡   opp-390000000           5    >í€        < Æ        J   ÿ      opp-431000000           5    °‰À        < öì        J   ÿ      opp-473000000           5    1h@        < 	'À        J   ÿ      opp-515000000           5    ²FÀ        < 	X”        J   ÿ      opp-556000000           5    !#ã         < 	‰h        J   ÿ      opp-598000000           5    #¤Á€        < 	º<        J   ÿ      opp-640000000           5    &%          < 	ë        J   ÿ      opp-670000000           5    'ïc€        < 
ä        J   ÿ      opp-700000000           5    )¹'         < 
L¸        J   ÿ      opp-730000000           5    +‚ê€        < 
}Œ        J   ÿ      opp-760000000           5    -L®         < 
®`        J   ÿ      opp-790000000           5    /q€        < 
ß4        J   ÿ      opp-835000000           5    1ÅÀ        < (r        J   ÿ      opp-880000000           5    4s¼         < q°        J   ÿ      opp-915000000           5    6‰ÊÀ        < ÓX        J   �      opp-915000000-5         5    6‰ÊÀ        < ¢„        J   0      opp-915000000-6         5    6‰ÊÀ        < q°        J   p      opp-950000000           5    8ŸÙ€        < 5         J   �      opp-950000000-5         5    8ŸÙ€        < ÓX        J   0      opp-950000000-6         5    8ŸÙ€        < q°        J   p         pmu-a55           arm,cortex-a55-pmu                      [                  pmu-a78           arm,cortex-a78-pmu                      [                  psci              arm,psci-1.0            ¬smc       sound           f         	  xdisabled          thermal-zones      cpu-little0-thermal           è        �   –        £          trips      trip-alert0         ³ L        ¿  Ð        œpassive         }         trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê         H  Ï   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal           è        �   –        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive         }         trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê         H  Ï   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal           è        �   –        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive         }         trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê         H  Ï   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little3-thermal           è        �   –        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive         }         trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê         H  Ï   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big0-thermal              è        �   d        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive         }         trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê           Ï   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal              è        �   d        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive         }         trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê           Ï   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            apu-thermal           è        �   ú        £          trips      trip-alert0         ³ L        ¿  Ð        œpassive       trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical                gpu-thermal           è        �   ú        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive         }         trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê           Ï    ÿÿÿÿÿÿÿÿ            gpu1-thermal              è        �   ú        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive         }   !      trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical             cooling-maps       map0            Ê   !        Ï    ÿÿÿÿÿÿÿÿ            adsp-thermal              è        �   ú        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive       trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical                vdo-thermal           è        �   ú        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive       trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical                infra-thermal             è        �   ú        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive       trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical                cam1-thermal              è        �   ú        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive       trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical                cam2-thermal              è        �   ú        £         trips      trip-alert0         ³ L        ¿  Ð        œpassive       trip-alert1         ³ s        ¿  Ð        œhot       trip-crit           ³ †         ¿          	  œcritical                   timer             arm,armv8-timer                   @  [                                             
               ³ Æ]@      soc                      +             simple-bus          Þ                                â   performance-controller@11bc10             mediatek,cpufreq-hw          ¡     ¼            ½0               é           }         interrupt-controller@c000000              arm,gic-v3                                             +         ¡                                    [      	               }      ppi-partitions     interrupt-partition-0           @                          }         interrupt-partition-1           @              }               syscon@10000000            mediatek,mt8188-topckgen syscon         ¡                      
           }   %      syscon@10001000       #    mediatek,mt8188-infracfg-ao syscon          ¡                     
           I           }   &      syscon@10003000           mediatek,mt8188-pericfg syscon          ¡     0                
           }   K      pinctrl@10005000              mediatek,mt8188-pinctrl       `  ¡     P            À             á             â             ê              °              0  Viocfg0 iocfg_rm iocfg_lt iocfg_lm iocfg_rt eint          `        p           |   "           °         +        [       ë                          }   "   audio-pins     pins-aud-pmic           ˆ  e  f  g  h  i  j      pins-pcm-wifi           ˆ  y  z  {  |      pins-i2s            ˆ  w  p  x  q  n         disp-pwm0-pins          }   G   pins            ˆ           �         dsi0-sn65dsi84-pins         }   o   pins-irq            ˆ  €          �         ž      pins-enable         ˆ            �         eth-default-pins            }   S   pins-txd            ˆ  ƒ  „  …  †        «         pins-cc         ˆ  ‹  Ž  �        «         pins-rxd            ˆ  ‡  ˆ  ‰  Š  Œ        «           º   f      pins-mdio           ˆ  �  �        «            ž      pins-power          ˆ            Ç      pins-intr           ˆ  ”         º   f         ž         eth-sleep-pins          }   T   pins-txd            ˆ  ƒ   „   …   †       pins-cc         ˆ  ‹   Ž   �   Œ       pins-rxd            ˆ  ‡   ˆ   ‰   Š       pins-mdio           ˆ  �   �          Ó         á         gpio-keys-pins     pins-keys           ˆ  �   A   B          º         hd3ss3320-pins          }   g   pins-irq            ˆ  -         º   e         ž         hdmi-vreg-pins     pins-pwr            ˆ  2         á         hdmi-pins      pins-hotplug            ˆ  3         �      pins-cec            ˆ  4         á      pins-ddc            ˆ  5  6        «   
         i2c0-pins           }   d   pins-bus            ˆ  8  7        º   Ë        î  è         i2c0-mux-pins           }   e   pins-reset          ˆ            º         i2c1-pins           }   ‚   pins-bus            ˆ  :  9        º   Ë        î  è         i2c2-pins           }   m   pins-bus            ˆ  <  ;        º   Ë        î  è         i2c3-pins           }   s   pins-bus            ˆ  >  =        º   Ë        î  è         i2c4-pins           }   ƒ   pins-bus            ˆ  @  ?        º   Ë        î  è         i2c-mux-smarc-lcd-pins          }   n   pins-reset          ˆ            �         mmc0-default-pins           }   U   pins-cmd-dat          $  ˆ  ¡     Ÿ  ž  š  ™  ˜  —  œ         ž        «           º   e      pins-clk            ˆ  �        «           �   f      pins-rst            ˆ  ›        «           º   e         mmc0-uhs-pins           }   V   pins-cmd-dat          $  ˆ  ¡     Ÿ  ž  š  ™  ˜  —  œ         ž        «           º   e      pins-clk            ˆ  �        «           �   f      pins-ds         ˆ  ¢        «           �   f      pins-rst            ˆ  ›        «           º   e         mmc1-default-pins           }   Y   pins-cmd-dat            ˆ  £  ¥  ¦  §  ¨         ž        «           º   e      pins-pwr            ˆ  o          �      pins-pullup         ˆ            º      pins-clk            ˆ  ¤        «           �   f      pins-insert         ˆ            º         mmc1-uhs-pins           }   Z   pins-cmd-dat            ˆ  £  ¥  ¦  §  ¨         ž        «           º   e      pins-clk            ˆ  ¤        «           �   f         mmc2-default-pins           }   ]   pins-clk            ˆ  ª        «           �   f      pins-cmd-dat            ˆ  ©  «  ¬  ­  ®         ž        «           º   e         mmc2-uhs-pins           }   ^   pins-clk            ˆ  ª        «           �   f      pins-cmd-dat            ˆ  ©  «  ¬  ­  ®         ž        «           º   e         mmc2-eint-pins          }   _   pins-dat1           ˆ  ¬          ž        º   e         rv3028-pins         }   f   pins-irq            ˆ  *         º   e         ž         spi0-pins           }   E   pins-spi            ˆ  E  F  G  H         á         spi1-pins           }   H   pins-spi            ˆ  K  L  M  N         á         pcie-default-pins           }   €   pins            ˆ  /  0  1         º         ts-dsi0-goodix-pins         }   r   pins-irq            ˆ  ’         º   e         ž      pins-reset          ˆ            �         uart0-pins          }   B   pins            ˆ              º         uart1-pins          }   C   pins            ˆ  !  "         º         uart2-pins          }   D   pins            ˆ  #  $         º         usbotg-pins         }   w   pins-iddig          ˆ  S          ž         º      pins-valid          ˆ  U         ž      pins-vbus           ˆ  T         Ç         usb1-hub-pins           }   µ   pins            ˆ  “                   usb1-pins           }   M   pins            ˆ  X         ž         usb2-eth-pins           }   ¶   pins            ˆ  P                   wifi-pwrseq-pins            }   ·   pins            ˆ  Y                   watchdog-pins           }   7   pins            ˆ  d         º            syscon@10006000       )    mediatek,mt8188-scpsys syscon simple-mfd            ¡     `           power-controller          !    mediatek,mt8188-power-controller                         +                       }   ;   power-domain@0          ¡                         +                       %   #   power-domain@1          ¡           3   $      %           :mfg alt         F   &                     +                       %   '   power-domain@2          ¡                     power-domain@3          ¡                     power-domain@4          ¡                           power-domain@15         ¡         à  3   %      %      %      %   
   %   3   %   4   %   =   %   ¹   %   ¾   (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (          û  :top cam ccu img venc vdec wpe cfgck cfgxo ss-sram-cmn ss-sram-v0l0 ss-sram-v0l1 ss-sram-ve0 ss-sram-ve1 ss-sram-ifa ss-sram-cam ss-sram-v1l5 ss-sram-v1l6 ss-sram-rdr ss-iommu ss-imgcam ss-emi ss-subcmn-rdr ss-rsi ss-cmn-l4 ss-vdec1 ss-wpe ss-cvdo-ve1          F   &                     +                  power-domain@16         ¡         H  3   %   »   %   À   )      )      )      )      )      )      )         A  :cfgck cfgxo ss-gals ss-cmn ss-emi ss-iommu ss-larb ss-rsi ss-bus            F   &                     +                  power-domain@20         ¡         0  3   %   º   %   ¿   *      *      *      *         8  :cfgck cfgxo ss-vpp1-g5 ss-vpp1-g6 ss-vpp1-l5 ss-vpp1-l6         F   &                  power-domain@22         ¡           3   +            :ss-vdec1-soc-l1         F   &                     +                  power-domain@23         ¡           3   ,            :ss-vdec2-l1         F   &                     power-domain@29         ¡            3   %      %      %   	   %   ½        :cam ccu bus cfgck           F   &                     +                  power-domain@30         ¡         (  3   -       -      -      -      -         6  :ss-cam-l13 ss-cam-l14 ss-cam-mm0 ss-cam-mm1 ss-camsys           F   &                     +                  power-domain@32         ¡            3   -      .       /          $  :ss-camb-sub ss-camb-raw ss-camb-yuv                   power-domain@31         ¡           3   -      0       1          $  :ss-cama-sub ss-cama-raw ss-cama-yuv                         power-domain@17         ¡         (  3   %   ¼   %   Á   2       2      2         &  :cfgck cfgxo ss-larb2 ss-larb3 ss-gals           F   &                     +                  power-domain@9          ¡   	        3   %   @   %   ?      	  :bus hdcp            F   &                  power-domain@18         ¡           F   &                  power-domain@19         ¡           F   &                     power-domain@24         ¡            3   3       3      3      3         0  :ss-ve1-larb ss-ve1-core ss-ve1-gals ss-ve1-sram         F   &                  power-domain@21         ¡           3   4      4           :ss-wpe-l7 ss-wpe-l7pce          F   &                        power-domain@5          ¡           F   &        3   5           :ss-pextp-fmem                     power-domain@7          ¡           3   %   0   %   1        :seninf0 seninf1                   power-domain@6          ¡                     power-domain@10         ¡   
        3   %   E   %   D      	  :bus main            F   &                     +                  power-domain@11         ¡           F   &                     +                  power-domain@14         ¡           3   %   F        :asm         F   &                  power-domain@13         ¡           3   %   S   %      6            :a1sys intbus adspck         F   &                  power-domain@12         ¡           F   &                        power-domain@8          ¡           3   5         	  :ethermac            F   &                        watchdog@10007000             mediatek,mt8188-wdt         ¡     p                 X        I           pdefault         ~   7        }   <      syscon@1000c000       "    mediatek,mt8188-apmixedsys syscon           ¡     À                
           }   $      timer@10017000        ,    mediatek,mt8188-timer mediatek,mt6765-timer         ¡    p                [      	               3   8      pwrap@10024000        3    mediatek,mt8188-pwrap mediatek,mt8195-pwrap syscon          ¡    @                Vpwrap           [       ó               3   &      &          	  :spi wrap       pmic              mediatek,mt6359          +                   ˆ           ™   "   Þ      adc           mediatek,mt6359-auxadc          ­         audio-codec           mediatek,mt6359-codec           ¿           Ó         regulators            mediatek,mt6359-regulator      buck_vs1            çvs1         ö 5          !‘À        &             B      buck_vgpu11       
  çdvdd_core           ö €         7        V  ˆ        &   È        k                   B      buck_vmodem         çvmodem          ö €         Èà        V  *        &   È         B      buck_vpu          
  çdvdd_adsp           ö €         7        V  ˆ        &   È        k                   B      buck_vcore          çdvdd_proc_l         ö €         Ö         V  ˆ        &   È        k                   B        }         buck_vs2            çvs2         ö j          j         &             B         ƒ      buck_vpa            çvpa_pmu         ö ¡          7±Ð        &  ,         B      buck_vproc2         çvgpu            ö dp         5         V  L        &   È        k                  •   '        ¬ nè        }   #      buck_vproc1         çvproc1          ö €         7        V  L        &   È        k                buck_vcore_sshub            çvcore_sshub         ö €         7      buck_vgpu11_sshub           çvgpu11_sshub            ö €         7      ldo_vaud18          çvaud18          ö w@         w@        &   ð      ldo_vsim1         
  çvsim1_pmu           ö ð          w@        &  à        }   [      ldo_vibr            çvibr            ö O€         2Z       ldo_vrf12           çva12_abb2_pmu           ö Èà         Ö          B      ldo_vusb            çvusb            ö -ÆÀ         -ÆÀ        &  À         B        }   L      ldo_vsram_proc2         çvsram_proc2         ö ¡          ½¶        V  L        &   ð         B      ldo_vio18           çvio18           ö ð          ýà        &  À         B      ldo_vcamio          çvcamio          ö ð          ýà      ldo_vcn18         
  çvcn18_pmu           ö w@         w@        &   ð         B         ƒ        }   a      ldo_vfe28           çvfe28           ö *¹€         *¹€        &   x      ldo_vcn13           çvcn13           ö »          Ö       ldo_vcn33_1_bt          çvcn33_1_pmu         ö *¹€         5gà         B      ldo_vcn33_1_wifi            çvcn33_1_wifi            ö *¹€         5gà      ldo_vaux18          çvaux18          ö w@         w@        &   ð         B      ldo_vsram_others          
  çvsram_gpu           ö q°         5         V  ˆ        &   ð        •   #        ¬ nè        }   '      ldo_vefuse          çvefuse          ö ð          „€        }   ´      ldo_vxo22           çvxo22           ö w@         !‘À         B      ldo_vrfck           çvrfck           ö ã`         ð       ldo_vrfck_1         çvrfck           ö ëÀ         j       ldo_vbif28          çvbif28          ö *¹€         *¹€        &   ð      ldo_vio28           çvio28           ö *¹€         2Z          B      ldo_vemc            çvemc            ö ,@          2Z       ldo_vemc_1          çvemc            ö &%          2Z          B        }   W      ldo_vcn33_2_bt          çvcn33_2_pmu         ö 2Z          2Z          B         ƒ        }   `      ldo_vcn33_2_wifi            çvcn33_2_wifi            ö *¹€         5gà      ldo_va12            çva12            ö O€         Ö          B      ldo_va09            çva09            ö 5          O€      ldo_vrf18           çvrf18           ö ð          žP      ldo_vsram_md          	  çvsram_md            ö ¡          ½¶        V  *        &   ð         B      ldo_vufs            çvufs18_pmu          ö ð          ýà         B        }   X      ldo_vm18            çvm18            ö ð          ýà         B      ldo_vbbck           çvbbck           ö Èà         O€         B      ldo_vsram_proc1         çvsram_proc1         ö ¡          ½¶        V  L        &   ð         B      ldo_vsim2           çvsim2           ö ð          /M`      ldo_vsram_others_sshub          çvsram_others_sshub          ö ¡          ½¶         rtc           mediatek,mt6358-rtc       keys              mediatek,mt6359-keys            É           â       power-key           õ   t                        spmi@10027000         *    mediatek,mt8188-spmi mediatek,mt8195-spmi            ¡    p            �                Vpmif spmimst               %   8        "   %   ¬        3   &      &       %   8      (  :pmif_sys_ck pmif_tmr_ck spmimst_clk_mux                      +       pmic@6            mediatek,mt6315-regulator           ¡          regulators     vbuck1          çvbuck1          ö “à         7        &           k                   B        }   
      vbuck3          çvbuck3          ö “à         7        &           k                   B      vbuck4          çvbuck4          ö 7         7        &           k                   B   regulator-state-mem          9        Q 7                  iommu@10315000            mediatek,mt8188-iommu-infra         ¡    1P                [                     m           }   ~      mailbox@10320000              mediatek,mt8188-gce         ¡    2        @         [       â               z           3   &           }   ˆ      mailbox@10330000              mediatek,mt8188-gce         ¡    3        @         [       ä               z           3   &           }   Š      scp@10720000              mediatek,mt8188-scp-dual            ¡    r                 Vcfg                      +           â        P             xokay       scp@0             mediatek,scp-core           ¡               Vsram            [      Î               xokay            †   9        }   ‹      scp@d0000             mediatek,scp-core           ¡    ð         Vsram            [      Ï             	  xdisabled             audio-controller@10b10000             mediatek,mt8188-afe         ¡    ±                    %   S        "   %   „      ´  3   :   $   	   $   
   %   ³   %   ´   %   µ   %   ¶   %   ¸   %   S   %      %       %   E   %   Q   %   M   %   N   %   O   %   P   6       %   „   %   †   %   ·   %   T   %   R      ÿ  :clk26m apll1 apll2 apll12_div0 apll12_div1 apll12_div2 apll12_div3 apll12_div9 top_a1sys_hp top_aud_intbus top_audio_h top_audio_local_bus top_dptx top_i2so1 top_i2so2 top_i2si1 top_i2si2 adsp_audio_26m apll1_d4 apll2_d4 apll12_div4 top_a2sys top_aud_iec          [      6               ”   ;           ¢   <         	  ©audiosys            F   &        µ   %        xokay            †   =        }         adsp@10b80000             mediatek,mt8188-dsp       @  ¡    ¸              Ð             ¸°            ¸ð                Vcfg sram sec bus               %   D        3   %   D   %   E        :audiodsp adsp_bus           Ç   >   ?        Îrx tx           ”   ;           xokay            †   @   A      mailbox@10b86100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         ¡    ¸a                [      Þ               z            }   >      mailbox@10b87100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         ¡    ¸q                [      ß               z            }   ?      clock-controller@10b91100             mediatek,mt8188-adsp-audio26m           ¡    ¹                
           }   6      serial@11001100       *    mediatek,mt8188-uart mediatek,mt6577-uart           ¡                     [       �               3   :   &         	  :baud bus            xokay            ~   B        pdefault       serial@11001200       *    mediatek,mt8188-uart mediatek,mt6577-uart           ¡                     [       Ž               3   :   &         	  :baud bus            xokay            ~   C        pdefault       serial@11001300       *    mediatek,mt8188-uart mediatek,mt6577-uart           ¡                     [       �               3   :   &         	  :baud bus            xokay            ~   D        pdefault       serial@11001400       *    mediatek,mt8188-uart mediatek,mt6577-uart           ¡                     [      Ó               3   :   &         	  :baud bus          	  xdisabled          adc@11002000          .    mediatek,mt8188-auxadc mediatek,mt8173-auxadc           ¡                      3   &           :main            ­         	  xdisabled          syscon@11003000       "    mediatek,mt8188-pericfg-ao syscon           ¡     0                
           }   5      spi@1100a000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ¡                      [       ¿               3   %   y   %      &           :parent-clk sel-clk spi-clk          xokay            ~   E        pdefault         Ù          thermal-sensor@1100b000           mediatek,mt8188-lvts-ap         ¡     °                [       È               3   &           ¢   &           í   F        ùlvts-calib-data-1           
           }         pwm@1100e000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           ¡     à                3   %   '   &   /        :main mm         [       Ë                           xokay            pdefault         ~   G        }   ±      pwm@1100f000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           ¡     ð                3   %   (   &   F        :main mm         [                               	  xdisabled          spi@11010000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ¡                     [       À               3   %   y   %      &   2        :parent-clk sel-clk spi-clk          xokay            ~   H        pdefault         Ù          spi@11012000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ¡                     [       Á               3   %   y   %      &   3        :parent-clk sel-clk spi-clk        	  xdisabled          spi@11013000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ¡    0                [       Â               3   %   y   %      &   4        :parent-clk sel-clk spi-clk        	  xdisabled          spi@11018000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ¡    €                [       Ã               3   %   y   %      &   8        :parent-clk sel-clk spi-clk        	  xdisabled          spi@11019000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ¡    �                [       Ä               3   %   y   %      &   9        :parent-clk sel-clk spi-clk        	  xdisabled          usb@11201000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ¡            -ÿ     >              	  Vmac ippc            â                     ?                      +           [       €                  %   )        "   %   v        3   5   	   %   Å   5   
        :sys_ck ref_ck mcu_ck            +   I      J                    0   K  h           xokay            Ghost            O   L        ~   M        pdefault    usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ¡                       Vmac         [       �                  %   *        "   %   v        3   5   
        :sys_ck          xokay            ]   N        O   L         ethernet@11021000         ;    mediatek,mt8188-gmac mediatek,mt8195-gmac snps,dwmac-5.10a          ¡           @         [      Ì               imacirq        0  3   5       5      %   A   %   B   %   C   5         .  :axi apb mac_main ptp_ref rmii_internal mac_cg              %   A   %   B   %   C        "   %       %   ¢   %   £        ”   ;           y   &        Š   O        š   P        ­   Q        À           Ë           Ö            xokay          	  ãrgmii-id            ì   R        pdefault sleep           ~   S        ÷   T         	        	   "               	"        	8      *ø  è   mdio              snps,dwmac-mdio                      +       ethernet-phy@7            ethernet-phy-ieee802.3-c22          ¡           ™   "   ”           }   R         stmmac-axi-config           	M                                 	W           	g           }   O      rx-queues-config            	w            	�        }   P   queue0           	ž        	±          queue1           	ž        	±          queue2           	ž        	±          queue3           	ž        	±             tx-queues-config            	É            	ß        }   Q   queue0           	ž        	ñ            	ÿ         queue1           	ž        	ñ           	ÿ         queue2           	ž        	ñ           	ÿ         queue3           	ž        	ñ           	ÿ               mmc@11230000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ¡    #             õ                 ™          ƒ                3   %      &      &      &   M      !  :source hclk source_cg crypto_clk            xokay            
            
         
'        
8 H        
GëÂ          
U         
d         
s         
�         
‡         
�        pdefault state_uhs           ~   U        ÷   V        
œ   W        
¨   X      mmc@11240000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ¡    $             ë                 ™          ‡               3   %      &      &   $        :source hclk source_cg              %           "   %   �        xokay            
            
µ        
GëÂ          
Æ         
Ô        pdefault state_uhs           ~   Y        ÷   Z        
á   "              
¨   [        
œ   \      mmc@11250000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ¡    %             æ                  ™          ˆ          "   ¬           3   %      &      &   A        :source hclk source_cg              %           "   %   �        xokay            
            
µ         
ê         
÷        
GëÂ                   
s         
�         
Æ                 pdefault state_uhs state_eint            ~   ]        ÷   ^           _        imsdc sdio_wakeup            
œ   `        
¨   a           b      thermal-sensor@11278000           mediatek,mt8188-lvts-mcu            ¡    '€                [       Ê               3   &           ¢   &            í   F        ùlvts-calib-data-1           
           }         i2c@11280000              mediatek,mt8188-i2c          ¡    (             " €       €        [       —               )           3   c       &   7      	  :main dma                         +            xokay            pdefault         ~   d        ³ †    i2c-mux@73            nxp,pca9546         ¡   s        pdefault         ~   e        3   "                           +       i2c@0           ¡            ³ †                      +       rtc@52            microcrystal,rv3028         ¡   R        ™   "   *           pdefault         ~   f        
                      i2c@1           ¡           ³ †                      +       usb-typec@60              ti,hd3ss3220            ¡   `        ™   "   -           pdefault         ~   g   ports                        +       port@0          ¡       endpoint            ?   h        }   z         port@1          ¡      endpoint            ?   i        }   |                  i2c@2           ¡           ³ †                      +       codec@1a              wlf,wm8962          ¡           3   %   M        O   j        [   j        h   k        u   j        ‚   k        �   j        ž   l        ­   l        ¼                  €�  €•         i2c@3           ¡           ³ †                      +                i2c@11281000              mediatek,mt8188-i2c          ¡    (            "€       €        [       ’               )           3   c      &   7      	  :main dma                         +            xokay            pdefault         ~   m        ³ €   i2c-mux@73            nxp,pca9546         ¡   s        pdefault         ~   n        3   "                           +       i2c@0           ¡            ³ †                      +          i2c@1           ¡           ³ †                      +          i2c@2           ¡           ³ †                      +       bridge@2c             ti,sn65dsi84            ¡   ,        pdefault         ~   o        Å   "          ports                        +       port@0          ¡       endpoint            ?   p        Ò                    }   ¥         port@2          ¡      endpoint            ?   q        }   ³               touchscren@5d             goodix,gt911            ¡   ]        pdefault         ~   r        ™   "   ’           Ý   "   ’            3   "                i2c@3           ¡           ³ †                      +                i2c@11282000              mediatek,mt8188-i2c          ¡    (             "€       €        [       “               )           3   c      &   7      	  :main dma                         +            xokay            pdefault         ~   s        ³ €      clock-controller@11283000             mediatek,mt8188-imp-iic-wrap-c          ¡    (0                
           }   c      usb@112a1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ¡    *       -ÿ    *>              	  Vmac ippc            â            *        ?                      +           [                        %   -        "   %   v        3   5      %   Ë   5           :sys_ck ref_ck mcu_ck            +   t                    0   K  p           xokay            Ghost            çhigh-speed          O   L   usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ¡                       Vmac         [                        %   .        "   %   v        3   5           :sys_ck          xokay            ]   u        O   L                     +       ethernet@1            usb424,7850         ¡                        +       mdio                         +       ethernet-phy@1          ¡           õ                               usb@112b1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ¡    +       -ÿ    +>              	  Vmac ippc            â            +        ?                      +           [                        %   ,        "   %   v        3   5      %   É   5           :sys_ck ref_ck mcu_ck            +   v                    0   K  `           xokay            Gotg         çhigh-speed           	        O   L        ~   w        pdefault    usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ¡                       Vmac         [                        %   +        "   %   v        3   5           :sys_ck          xokay            ]   x        O   L      connector             usb-c-connector         USB-C           dual       ports                        +       port@0          ¡       endpoint            ?   y        }   {         port@1          ¡      endpoint            ?   z        }   h               ports                        +       port@0          ¡       endpoint            ?   {        }   y         port@1          ¡      endpoint            ?   |        }   i               pcie@112f0000         *    mediatek,mt8188-pcie mediatek,mt8192-pcie           ¡    /                	  Vpcie-mac            â‚                                  )       ÿ        •pci         3                         +         0  3   &   L   &   #   &   &   &   +   &   C   5         /  :pl_250m tl_26m tl_96m tl_32k peri_26m peri_mem                     [                   `  D                  }                      }                     }                     }           R                       e       ~      ÿÿ        o            +            	  ~pcie-phy            ”   ;           ¢   <           ©mac         xokay            pdefault         ~   €   interrupt-controller                                     +        }   }         spi@1132c000          (    mediatek,mt8188-nor mediatek,mt8186-nor         ¡    2À                3   %   X   5      5           :spi sf axi             %   X        [      9                            +          	  xdisabled          t-phy@11c20700        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3           â        Â                         +           ”   ;           xokay       pcie-phy@0          ¡               3   %   Ä        :ref         ˆ           }            hdmi-phy@11d5f000         2    mediatek,mt8188-hdmi-phy mediatek,mt8195-hdmi-phy           ¡    Õð                3   &           :pll_ref         hdmi_txpll          
            ˆ            “   
        ¢         	  xdisabled            }   ¯      dsi-phy@11c80000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         ¡    È                 3   :        mipi_tx0_pll            
            ˆ            xokay            }   £      dsi-phy@11c90000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         ¡    É                 3   :        mipi_tx0_pll            
            ˆ          	  xdisabled            }   ¦      i2c@11e00000              mediatek,mt8188-i2c          ¡    à             "        €        [       ˜               )           3   �       &   7      	  :main dma                         +            xokay            pdefault         ~   ‚        ³ €      i2c@11e01000              mediatek,mt8188-i2c          ¡    à            "€       €        [       ”               )           3   �      &   7      	  :main dma                         +            xokay            pdefault         ~   ƒ        ³ €      clock-controller@11e02000             mediatek,mt8188-imp-iic-wrap-w          ¡    à                 
           }   �      t-phy@11e30000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           â        ã             xokay       usb-phy@0           ¡               3   %   Ê   $           :ref da_ref          ˆ           xokay            }   v         t-phy@11e40000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           â        ä             xokay       usb-phy@0           ¡               3   %   Æ   $           :ref da_ref          ˆ           xokay            }   I      usb-phy@700         ¡              3   $      :        :ref da_ref          ˆ           xokay            }   J         t-phy@11e80000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           â        è             xokay       usb-phy@0           ¡               3   %   Ì   $           :ref da_ref          ˆ           xokay            }   t         i2c@11ec0000              mediatek,mt8188-i2c          ¡    ì             "€       €        [       •               )           3   „       &   7      	  :main dma                         +          	  xdisabled          i2c@11ec1000              mediatek,mt8188-i2c          ¡    ì            "        €        [       –               )           3   „      &   7      	  :main dma                         +          	  xdisabled          clock-controller@11ec2000              mediatek,mt8188-imp-iic-wrap-en         ¡    ì                 
           }   „      efuse@11f20000        ,    mediatek,mt8188-efuse mediatek,mt8186-efuse         ¡    ò                              +      dp-calib@1a0            ¡              }   °      lvts1-calib@1ac         ¡  ¬   @        }   F      gpu-speedbin@581            ¡  �           ´               }   †      socinfo-data1@7a0           ¡            socinfo-data2@7e0           ¡  à            gpu@13000000          )    mediatek,mt8188-mali arm,mali-valhall-jm            ¡             @         3   …          0  [                   ~             }               ijob mmu gpu         í   †      
  ùspeed-bin           ¹   ‡        ”   ;      ;      ;           Ícore0 core1 core2           c           xokay            à   #        }          clock-controller@13fbf000             mediatek,mt8188-mfgcfg          ¡    ûð                
           }   …      syscon@14000000           mediatek,mt8188-vppsys0 syscon          ¡                      
           }   (      dma-controller@14001000           mediatek,mt8188-mdp3-rdma           ¡                     ì           3   (         <  Ç   ˆ         ˆ         ˆ         ˆ         ˆ              ÷   ‰   €        ”   ;           þ   Š                                *   ‹      display@14002000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ¡                      3   (            þ   Š                 display@14004000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ¡     @                3   (   "        þ   Š      @          display@14005000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ¡     P                [      F               3   (   
        ”   ;           þ   Š      P          display@14006000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ¡     `                3   (           þ   Š      `                %      display@14007000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ¡     p                3   (   #        þ   Š      p          display@14008000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ¡     €                [      I               3   (   $        ”   ;           þ   Š      €          display@14009000          2    mediatek,mt8188-mdp3-ovl mediatek,mt8195-mdp3-ovl           ¡     �                [      J               3   (   %        ”   ;           þ   Š      �            ÷   ‰   ‚      display@1400a000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ¡                      3   (           ”   ;           þ   Š                 display@1400b000          2    mediatek,mt8188-mdp3-tcc mediatek,mt8195-mdp3-tcc           ¡     °                3   (           þ   Š      °          display@1400c000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ¡     À                ì           3   (           ÷   ‰   ƒ        ”   ;           þ   Š      À                +      mutex@1400f000            mediatek,mt8188-vpp-mutex           ¡     ð                [      P               3   (           ”   ;           þ   Š      ð          smi@14012000              mediatek,mt8188-smi-common-vpp          ¡                     3   (      (           :apb smi         ”   ;           }   Œ      smi@14013000              mediatek,mt8188-smi-larb            ¡    0                3   (      (           :apb smi         ”   ;           7           H   Œ        }   �      iommu@14018000            mediatek,mt8188-iommu-vpp           ¡    €       P         3   (           :bclk            [      R               ”   ;           m           U   �   Ž   �   �   ‘   ’        }   ‰      dma-controller@14f09000           mediatek,mt8188-mdp3-rdma           ¡    ð�                ì           3   *   
        ÷   “   ¤        ”   ;           þ   Š   	  �              …  ©      dma-controller@14f0a000           mediatek,mt8188-mdp3-rdma           ¡    ð                 ì           3   *           ÷   ‰   À        ”   ;           þ   Š   	                 †  ª      display@14f0c000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ¡    ðÀ                3   *           þ   Š   	  À          display@14f0d000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ¡    ðÐ                3   *           þ   Š   	  Ð          display@14f0f000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ¡    ðð                3   *   "        þ   Š   	  ð          display@14f10000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ¡    ñ                 3   *   $        þ   Š   
             display@14f12000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ¡    ñ                 [      j               3   *   #        ”   ;           þ   Š   
             display@14f13000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ¡    ñ0                [      k               3   *   %        ”   ;           þ   Š   
  0          display@14f15000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ¡    ñP                3   *           þ   Š   
  P              ‘  °      display@14f16000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ¡    ñ`                3   *           þ   Š   
  `              ’  ±      display@14f18000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ¡    ñ€                3   *           þ   Š   
  €          display@14f19000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ¡    ñ�                3   *           þ   Š   
  �          display@14f1a000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           ¡    ñ                 3   *           ”   ;           þ   Š   
             display@14f1b000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           ¡    ñ°                3   *           ”   ;           þ   Š   
  °          display@14f1d000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ¡    ñÐ                [      u               3   *           ”   ;           þ   Š   
  Ð          display@14f1e000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ¡    ñà                [      v               3   *           ”   ;           þ   Š   
  à          display@14f21000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ¡    ò                3   *           ”   ;           þ   Š               display@14f22000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ¡    ò                 3   *           ”   ;           þ   Š                display@14f24000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ¡    ò@                ì           3   *           ÷   “   ¦        ”   ;           þ   Š     @                 ¬      display@14f25000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ¡    òP                ì           3   *           ÷   ‰   Â        ”   ;           þ   Š     P              ¡  ­      clock-controller@14e00000             mediatek,mt8188-wpesys          ¡    à                 
           }   4      clock-controller@14e02000             mediatek,mt8188-wpesys-vpp0         ¡    à                 
         smi@14e04000              mediatek,mt8188-smi-larb            ¡    à@                3   4      4           :apb smi         ”   ;           7           H   Œ        }   ‘      syscon@14f00000           mediatek,mt8188-vppsys1 syscon          ¡    ð                 
           }   *      mutex@14f01000            mediatek,mt8188-vpp-mutex           ¡    ð                [      {               3   *   &        ”   ;           þ   Š   	            smi@14f02000              mediatek,mt8188-smi-larb            ¡    ð                 3   *      *           :apb smi         ”   ;           7           H   ”        }   ¬      smi@14f03000              mediatek,mt8188-smi-larb            ¡    ð0                3   *      *           :apb smi         ”   ;           7           H   Œ        }   �      clock-controller@15000000             mediatek,mt8188-imgsys          ¡                      
         clock-controller@15110000              mediatek,mt8188-imgsys1-dip-top         ¡                     
           I         clock-controller@15130000             mediatek,mt8188-imgsys1-dip-nr          ¡                     
           I         clock-controller@15220000             mediatek,mt8188-imgsys-wpe1         ¡    "                 
           I         clock-controller@15330000             mediatek,mt8188-ipesys          ¡    3                 
           I         clock-controller@15520000             mediatek,mt8188-imgsys-wpe2         ¡    R                 
           I         clock-controller@15620000             mediatek,mt8188-imgsys-wpe3         ¡    b                 
           I         clock-controller@16000000             mediatek,mt8188-camsys          ¡                      
           }   -      clock-controller@1604f000             mediatek,mt8188-camsys-rawa         ¡    ð                
           I           }   0      clock-controller@1606f000             mediatek,mt8188-camsys-yuva         ¡    ð                
           I           }   1      clock-controller@1608f000             mediatek,mt8188-camsys-rawb         ¡    ð                
           I           }   .      clock-controller@160af000             mediatek,mt8188-camsys-yuvb         ¡    
ð                
           I           }   /      clock-controller@17200000             mediatek,mt8188-ccusys          ¡                      
         video-decoder@18000000            mediatek,mt8188-vcodec-dec           ¡                   @                â                    `         ÷   ‰  æ                     +           *   ‹   video-codec@10000             mediatek,mtk-vcodec-lat         ¡                         %   4        "   %   x         3   %   4   +      +      %   x        :sel vdec lat top            [      Ä             H  ÷   ‰  à   ‰  á   ‰  â   ‰  ã   ‰  ä   ‰  å   ‰  æ   ‰  ç   ‰  è        ”   ;         video-codec@25000             mediatek,mtk-vcodec-core            ¡     P                   %   4        "   %   x         3   %   4   ,      ,      %   x        :sel vdec lat top            [      Ã             X  ÷   “  À   “  Á   “  Â   “  Ã   “  Ä   “  Å   “  Æ   “  Ç   “  È   “  É   “  Ê        ”   ;            smi@1800d000              mediatek,mt8188-smi-larb            ¡     Ð                3   +       +            :apb smi         ”   ;           7           H   Œ        }   ’      clock-controller@1800f000             mediatek,mt8188-vdecsys-soc         ¡     ð                
           }   +      smi@1802e000              mediatek,mt8188-smi-larb            ¡    à                3   ,       ,            :apb smi         ”   ;           7           H   ”        }   ®      clock-controller@1802f000             mediatek,mt8188-vdecsys         ¡    ð                
           }   ,      clock-controller@1a000000             mediatek,mt8188-vencsys         ¡                      
           }   3      smi@1a010000              mediatek,mt8188-smi-larb            ¡                     3   3      3           :apb smi         ”   ;           7           H   ”        }   ­      video-encoder@1a020000            mediatek,mt8188-vcodec-enc          ¡                                  +              %   3        "   %   p        3   3         	  :venc_sel            [      a             X  ÷   “      “  ¡   “  ¢   “  £   “  ¤   “  ¶   “  ·   “  ¸   “  ¹   “  ª   “  º        ”   ;           *   ‹      jpeg-encoder@1a030000         +    mediatek,mt8188-jpgenc mediatek,mtk-jpgenc          ¡                     3   3           :jpgenc          [      b                ÷   “  §   “  ¨   “  ©   “  ¬        ”   ;         jpeg-decoder@1a040000         .    mediatek,mt8188-jpgdec mediatek,mt2701-jpgdec           ¡                     3   3       3           :jpgdec-smi jpgdec           [      c             0  ÷   “  ­   “  ®   “  ²   “  ³   “  ´   “  µ        ”   ;         ovl@1c000000          2    mediatek,mt8188-disp-ovl mediatek,mt8195-disp-ovl           ¡                      3   )            [      |               ÷   “           ”   ;           þ   ˆ             ports                        +       port@0          ¡       endpoint            ?   •        }   ©         port@1          ¡      endpoint            ?   –        }   —               rdma@1c002000         4    mediatek,mt8188-disp-rdma mediatek,mt8195-disp-rdma         ¡                      3   )           [      ~               ÷   ‰            ”   ;           þ   ˆ             ports                        +       port@0          ¡       endpoint            ?   —        }   –         port@1          ¡      endpoint            ?   ˜        }   ™               color@1c003000        6    mediatek,mt8188-disp-color mediatek,mt8173-disp-color           ¡     0                3   )           [                     ”   ;           þ   ˆ     0       ports                        +       port@0          ¡       endpoint            ?   ™        }   ˜         port@1          ¡      endpoint            ?   š        }   ›               ccorr@1c004000        6    mediatek,mt8188-disp-ccorr mediatek,mt8192-disp-ccorr           ¡     @                3   )           [      €               ”   ;           þ   ˆ     @       ports                        +       port@0          ¡       endpoint            ?   ›        }   š         port@1          ¡      endpoint            ?   œ        }   �               aal@1c005000          2    mediatek,mt8188-disp-aal mediatek,mt8183-disp-aal           ¡     P                3   )           [      �               ”   ;           þ   ˆ     P       ports                        +       port@0          ¡       endpoint            ?   �        }   œ         port@1          ¡      endpoint            ?   ž        }   Ÿ               gamma@1c006000        6    mediatek,mt8188-disp-gamma mediatek,mt8195-disp-gamma           ¡     `                3   )           [      ‚               ”   ;           þ   ˆ     `       ports                        +       port@0          ¡       endpoint            ?   Ÿ        }   ž         port@1          ¡      endpoint            ?            }   §               dither@1c007000       8    mediatek,mt8188-disp-dither mediatek,mt8183-disp-dither         ¡     p                3   )           [      ƒ               ”   ;           þ   ˆ     p       ports                        +       port@0          ¡       endpoint            ?   ¡        }   ¨         port@1          ¡      endpoint            ?   ¢        }   ¤               dsi@1c008000              mediatek,mt8188-dsi         ¡     €                3   )      )      £        :engine digital hs           [      „               +   £        ~dphy            ”   ;           ¢   )           xokay                         +       ports                        +       port@0          ¡       endpoint            ?   ¤        }   ¢         port@1          ¡      endpoint            ?   ¥        }   p               dsc@1c009000          2    mediatek,mt8188-disp-dsc mediatek,mt8195-disp-dsc           ¡     �                3   )   
        [      …               ”   ;           þ   ˆ     �          dsi@1c012000              mediatek,mt8188-dsi         ¡                     3   )   	   )      ¦        :engine digital hs           [      Ž               +   ¦        ~dphy            ”   ;           ¢   )   	      	  xdisabled          merge0@1c014000       6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ¡    @                3   )      2           :merge merge_async           [      �               ”   ;           þ   ˆ     @          dp-intf@1c015000              mediatek,mt8188-dp-intf         ¡    P                3   )       )      $           :pixel engine pll            [      ‘               ”   ;         	  xdisabled          mutex@1c016000            mediatek,mt8188-disp-mutex          ¡    `                3   )           [      ’               ”   ;           þ   ˆ     `              >      postmask@1c01a000         <    mediatek,mt8188-disp-postmask mediatek,mt8192-disp-postmask         ¡                     3   )           [      •               ”   ;           þ   ˆ             ports                        +       port@0          ¡       endpoint            ?   §        }             port@1          ¡      endpoint            ?   ¨        }   ¡               syscon@1c01d000           mediatek,mt8188-vdosys0 syscon          ¡    Ð                
           I           Ç   ˆ               þ   ˆ     Ð            }   )   port                         +       endpoint@0          ¡            ?   ©        }   •            smi@1c022000              mediatek,mt8188-smi-larb            ¡                     3   )      )           :apb smi         ”   ;           7            H   ”        }   ª      smi@1c023000              mediatek,mt8188-smi-larb            ¡    0                3   )      )           :apb smi         ”   ;           7           H   Œ        }   �      smi@1c024000              mediatek,mt8188-smi-common-vdo          ¡    @                3   )      )           :apb smi         ”   ;           }   ”      iommu@1c028000            mediatek,mt8188-iommu-vdo           ¡    €       P         3   )           :bclk            [      ¡               ”   ;           m           U   ª   «   ¬   ­   ®        }   “      syscon@1c100000           mediatek,mt8188-vdosys1 syscon          ¡                     
           I           Ç   ˆ              þ   ˆ                  }   2      mutex@1c101000            mediatek,mt8188-disp-mutex          ¡                    3   2           [      î               ”   ;           þ   ˆ                   Å      smi@1c102000              mediatek,mt8188-smi-larb            ¡                     3   2       2            :apb smi         ”   ;           7           H   ”        }   «      smi@1c103000              mediatek,mt8188-smi-larb            ¡    0                3   2      2           :apb smi         ”   ;           7           H   Œ        }   Ž      rdma@1c104000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡    @                3   2           [      ï               ÷   “   @        ”   ;           ì           þ   ˆ     @          rdma@1c105000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡    P                3   2           [      ð               ÷   ‰   `        ”   ;           ì           þ   ˆ     P          rdma@1c106000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡    `                3   2           [      ñ               ÷   “   A        ”   ;           ì           þ   ˆ     `          rdma@1c107000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡    p                3   2           [      ò               ÷   ‰   a        ”   ;           ì           þ   ˆ     p          rdma@1c108000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡    €                3   2           [      ó               ÷   “   B        ”   ;           ì           þ   ˆ     €          rdma@1c109000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡    �                3   2           [      ô               ÷   ‰   b        ”   ;           ì           þ   ˆ     �          rdma@1c10a000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡                     3   2           [      õ               ÷   “   C        ”   ;           ì           þ   ˆ                rdma@1c10b000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ¡    °                3   2           [      ö               ÷   ‰   c        ”   ;           ì           þ   ˆ     °          merge@1c10c000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ¡    À                3   2   	   2           :merge merge_async           [      ÷               ”   ;           ¢   2           þ   ˆ     À             d      merge@1c10d000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ¡    Ð                3   2   
   2           :merge merge_async           [      ø               ”   ;           ¢   2           þ   ˆ     Ð             d      merge@1c10e000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ¡    à                3   2      2           :merge merge_async           [      ù               ”   ;           ¢   2           þ   ˆ     à             d      merge@1c10f000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ¡    ð                3   2      2           :merge merge_async           [      ú               ”   ;           ¢   2           þ   ˆ     ð             d      merge@1c110000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ¡                     3   2      2           :merge merge_async           [      û               ”   ;           ¢   2           þ   ˆ                   x      dpi@1c112000          (    mediatek,mt8188-dpi mediatek,mt8195-dpi         ¡                     3   2   8   2      2   =        :pixel engine pll            [                     ”   ;           ¢   2         	  xdisabled       ports                        +       port@0          ¡       endpoint             port@1          ¡      endpoint                   dp-intf@1c113000              mediatek,mt8188-dp-intf         ¡    0                3   2   :   2      $           :pixel engine pll            [                     ”   ;         	  xdisabled          ethdr@1c114000        6    mediatek,mt8188-disp-ethdr mediatek,mt8195-disp-ethdr         p  ¡    @            P            p            �                         °            À              4  Vmixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds       h  3   2   0   2   +   2   .   2   ,   2   /   2   -   2   <   2   1   2   2   2   3   2   4   2   5   %         ƒ  :mixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds vdo_fe0_async vdo_fe1_async gfx_fe0_async gfx_fe1_async vdo_be_async ethdr_top          [      6               ÷   ‰   d   ‰   e        ”   ;         (  ¢   2   1   2   2   2   3   2   4   2   5      p  þ   ˆ     @       ˆ     P       ˆ     p       ˆ     �       ˆ             ˆ     °       ˆ     À          padding@1c11d000              mediatek,mt8188-disp-padding            ¡    Ð                3   2           ”   ;           þ   ˆ     Ð          padding@1c11e000              mediatek,mt8188-disp-padding            ¡    à                3   2            ”   ;           þ   ˆ     à          padding@1c11f000              mediatek,mt8188-disp-padding            ¡    ð                3   2   !        ”   ;           þ   ˆ     ð          padding@1c120000              mediatek,mt8188-disp-padding            ¡                     3   2   "        ”   ;           þ   ˆ                padding@1c121000              mediatek,mt8188-disp-padding            ¡                    3   2   #        ”   ;           þ   ˆ               padding@1c122000              mediatek,mt8188-disp-padding            ¡                     3   2   $        ”   ;           þ   ˆ                padding@1c123000              mediatek,mt8188-disp-padding            ¡    0                3   2   %        ”   ;           þ   ˆ     0          padding@1c124000              mediatek,mt8188-disp-padding            ¡    @                3   2   &        ”   ;           þ   ˆ     @          hdmi@1c300000             mediatek,mt8188-hdmi-tx         ˆ           ¡    0                  3   %   @   %   >   %   ?   *   .        :bus hdcp hdcp24m hdmi-split            %   >        "   %   s        [      ®               ”   ;   	        +   ¯        ~hdmi          	  xdisabled       i2c       2    mediatek,mt8188-hdmi-ddc mediatek,mt8195-hdmi-ddc           3   :      ports                        +       port@0          ¡       endpoint             port@1          ¡      endpoint                   edp-tx@1c500000           mediatek,mt8188-edp-tx          ¡    P        €         [      ¤               í   °        ùdp_calibration_data         ”   ;           �  ¤      	  xdisabled          dp-tx@1c600000            mediatek,mt8188-dp-tx           ¡    `        €         [      Ê               í   °        ùdp_calibration_data         ”   ;           �        	  xdisabled             backlight-lcd0            pwm-backlight                  ÿ        ²           Ë  ÿ        Å   "               â   ±      u0        }   ²      chosen          çserial0:115200n8          firmware       optee             linaro,optee-tz         ¬smc          memory@40000000         •memory          ¡    @                panel-dsi0            tianma,tm070jdhg30          ó   ²        ý   l   port       endpoint            ?   ³        }   q            reserved-memory                      +            â   optee@43200000           
        ¡    C        À        memory@50000000           shared-dma-pool         ¡    P       �           
        }   9      memory@54600000          
        ¡    T`                memory@55000000           shared-dma-pool         ¡    U       @        memory@57000000           shared-dma-pool         ¡    W       @        memory@60000000           shared-dma-pool         ¡    `        ð           
        }   A      memory@60f00000           shared-dma-pool         ¡    `ð                  
        }   =      memory@61000000           shared-dma-pool         ¡    a                   
        }   @         regulator-efuse           regulator-output               ´      regulator-1v8             regulator-fixed         çreg_1v8         ö w@         w@         B        }   j      regulator-3v3             regulator-fixed         çreg_3v3         ö 2Z          2Z          B        }   k      regulator-5v              regulator-fixed         çreg_5v          ö LK@         LK@         B        }   l      regulator-sdcard-en           regulator-fixed          B        çsdcard_en_3v3           ö 2Z          2Z         	   "   o                     }   \      regulator-usb-p0-vbus             regulator-fixed         çvbus_p0         ö LK@         LK@        	   "   T                     }   x      regulator-usb-p1-vbus             regulator-fixed         pdefault         ~   µ        çvbus_p1         ö w@         w@        	   "   “                     }   N      regulator-usb-p2-vbus             regulator-fixed         pdefault         ~   ¶        çvbus_p2         ö w@         w@        	   "   P                     }   u      wifi-pwrseq           mmc-pwrseq-simple           pdefault         ~   ·        0   È        3   "   Y           }   b         	compatible interrupt-parent #address-cells #size-cells model dp-intf0 dp-intf1 dpi1 dsc0 ethdr0 gce0 gce1 merge0 merge1 merge2 merge3 merge4 merge5 mutex0 mutex1 padding0 padding1 padding2 padding3 padding4 padding5 padding6 padding7 vdo1-rdma0 vdo1-rdma1 vdo1-rdma2 vdo1-rdma3 vdo1-rdma4 vdo1-rdma5 vdo1-rdma6 vdo1-rdma7 dsi0 ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 mmc0 mmc1 mmc2 rtc0 rtc1 serial0 device_type reg enable-method clock-frequency capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache performance-domains #cooling-cells cpu-supply phandle cpu entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-output-names opp-shared opp-hz opp-microvolt opp-supported-hw interrupts mediatek,platform status polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device dma-ranges #performance-domain-cells #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-down input-enable drive-strength bias-pull-up output-high input-disable bias-disable drive-strength-microamp output-low #power-domain-cells domain-supply clocks clock-names mediatek,infracfg mediatek,disable-extrst pinctrl-names pinctrl-0 #sound-dai-cells interrupts-extended #io-channel-cells mediatek,mic-type-0 mediatek,mic-type-1 regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-always-on regulator-ramp-delay regulator-allowed-modes regulator-boot-on regulator-coupled-with regulator-coupled-max-spread mediatek,long-press-mode power-off-time-sec linux,keycodes wakeup-source assigned-clocks assigned-clock-parents regulator-on-in-suspend regulator-suspend-microvolt #iommu-cells #mbox-cells memory-region power-domains resets reset-names mediatek,topckgen mboxes mbox-names mediatek,pad-select nvmem-cells nvmem-cell-names #thermal-sensor-cells #pwm-cells phys mediatek,syscon-wakeup dr_mode vusb33-supply vbus-supply interrupt-names mediatek,pericfg snps,axi-config snps,mtl-rx-config snps,mtl-tx-config snps,txpbl snps,rxpbl snps,clk-csr phy-mode phy-handle pinctrl-1 mediatek,mac-wol snps,reset-gpio snps,reset-active-low snps,reset-delays-us snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,rx-sched-sp snps,dcb-algorithm snps,map-to-dma-channel snps,tx-queues-to-use snps,tx-sched-wrr snps,priority snps,weight bus-width cap-mmc-highspeed cap-mmc-hw-reset hs400-ds-delay max-frequency mmc-hs200-1_8v mmc-hs400-1_8v non-removable no-sd no-sdio supports-cqe vmmc-supply vqmmc-supply cap-sd-highspeed sd-uhs-sdr104 sd-uhs-sdr50 cd-gpios cap-sdio-irq keep-power-in-suspend no-mmc pinctrl-2 mmc-pwrseq clock-div reset-gpios remote-endpoint AVDD-supply CPVDD-supply DBVDD-supply DCVDD-supply MICVDD-supply PLLVDD-supply SPKVDD1-supply SPKVDD2-supply gpio-cfg enable-gpios data-lanes irq-gpios maximum-speed microchip,led-modes usb-role-switch label data-role bus-range linux,pci-domain interrupt-map interrupt-map-mask iommu-map iommu-map-mask phy-names #phy-cells mediatek,ibias mediatek,ibias_up bits operating-points-v2 power-domain-names mali-supply #dma-cells iommus mediatek,gce-client-reg mediatek,gce-events mediatek,scp mediatek,larb-id mediatek,smi mediatek,larbs mediatek,merge-mute mediatek,merge-fifo-en max-linkrate-mhz brightness-levels default-brightness-level num-interpolated-steps pwms stdout-path backlight power-supply no-map vout-supply enable-active-high post-power-on-delay-ms 