Ðþí ))   8 öˆ   (            2¡ öP                                                                   C   ,Qualcomm Technologies, Inc. X1E001DE Snapdragon Devkit for Windows        1   2qcom,x1e001de-devkit qcom,x1e001de qcom,x1e80100       chosen           =serial0:115200n8          clocks     xo-board             2fixed-clock          I“à          Y             f  ”      sleep-clk            2fixed-clock          I  ü         Y             f   3      bi-tcxo-div2-clk             2fixed-factor-clock           Y             n                u            €            f   2      bi-tcxo-ao-div2-clk          2fixed-factor-clock           Y             n               u            €            f           cpus                                 cpu@0            Šcpu          2qcom,oryon           –                 špsci             ¨            ¹                
   Çpsci perf            f      l2-cache             2cache            Ú             æ         f            cpu@100          Šcpu          2qcom,oryon           –                špsci             ¨            ¹                
   Çpsci perf            f         cpu@200          Šcpu          2qcom,oryon           –                špsci             ¨            ¹                
   Çpsci perf            f         cpu@300          Šcpu          2qcom,oryon           –                špsci             ¨            ¹                
   Çpsci perf            f         cpu@10000            Šcpu          2qcom,oryon           –                špsci             ¨   	         ¹   
            
   Çpsci perf            f      l2-cache             2cache            Ú             æ         f   	         cpu@10100            Šcpu          2qcom,oryon           –               špsci             ¨   	         ¹               
   Çpsci perf            f         cpu@10200            Šcpu          2qcom,oryon           –               špsci             ¨   	         ¹               
   Çpsci perf            f         cpu@10300            Šcpu          2qcom,oryon           –               špsci             ¨   	         ¹               
   Çpsci perf            f         cpu@20000            Šcpu          2qcom,oryon           –                špsci             ¨            ¹               
   Çpsci perf            f      l2-cache             2cache            Ú             æ         f            cpu@20100            Šcpu          2qcom,oryon           –               špsci             ¨            ¹               
   Çpsci perf            f         cpu@20200            Šcpu          2qcom,oryon           –               špsci             ¨            ¹               
   Çpsci perf            f         cpu@20300            Šcpu          2qcom,oryon           –               špsci             ¨            ¹               
   Çpsci perf            f         cpu-map    cluster0       core0            ô         core1            ô         core2            ô         core3            ô            cluster1       core0            ô         core1            ô         core2            ô         core3            ô            cluster2             f  Ö   core0            ô         core1            ô         core2            ô         core3            ô               idle-states          øpsci       cpu-sleep-0          2arm,idle-state          ret                    ,   ´        =  @        M  X         f   (         domain-idle-states     cluster-sleep-0          2domain-idle-state             D        ,  ^        =  ô        M  	Ä         f   +      cluster-sleep-1          2domain-idle-state             T        ,  ˜        =           M  X         f   ,            dummy-sink           2arm,coresight-dummy-sink       in-ports       port       endpoint            ^            f  P               firmware       scm          2qcom,scm-x1e80100 qcom,scm          n             !              |   " �          f  ×      scmi          	   2arm,scmi            Œ   #       #           “tx rx           ž   $   %                             protocol@13          –           ¤            f               interconnect-0           2qcom,x1e80100-clk-virt          ¸           Ì   &         f   >      interconnect-1           2qcom,x1e80100-mc-virt           ¸           Ì   &         f   !      memory@80000000          Šmemory           –    €                 pmu          2arm,armv8-pmuv3         Ü               psci             2arm,psci-1.0             ¡smc    power-domain-cpu0           ¤             ¹   '        ç   (         f         power-domain-cpu1           ¤             ¹   '        ç   (         f         power-domain-cpu2           ¤             ¹   '        ç   (         f         power-domain-cpu3           ¤             ¹   '        ç   (         f         power-domain-cpu4           ¤             ¹   )        ç   (         f   
      power-domain-cpu5           ¤             ¹   )        ç   (         f         power-domain-cpu6           ¤             ¹   )        ç   (         f         power-domain-cpu7           ¤             ¹   )        ç   (         f         power-domain-cpu8           ¤             ¹   *        ç   (         f         power-domain-cpu9           ¤             ¹   *        ç   (         f         power-domain-cpu10          ¤             ¹   *        ç   (         f         power-domain-cpu11          ¤             ¹   *        ç   (         f         power-domain-cpu-cluster0           ¤            ç   +   ,         ¹   -         f   '      power-domain-cpu-cluster1           ¤            ç   +   ,         ¹   -         f   )      power-domain-cpu-cluster2           ¤            ç   +   ,         ¹   -         f   *      power-domain-system         ¤             f   -         reserved-memory                                   ú   gunyah-hyp@80000000          –    €        €                    f  Ø      hyp-elf-package@80800000             –    €€                            f  Ù      ncc@80a00000             –    €        @                    f  Ú      cpucp-log@80e00000           –    €à                           f  Û      cpucp@80e40000           –    €ä       T                    f  Ü      reserved-region@81380000             –    �8                        tags-region@81400000             –    �@                           f  Ý      xbl-dtlog@81a00000           –    �                            f  Þ      xbl-ramdump@81a40000             –    �¤                           f  ß      aop-image@81c00000           –    �À                           f  à      aop-cmd-db@81c60000          2qcom,cmd-db          –    �Æ                           f  á      aop-config@81c80000          –    �È                           f  â      tme-crash-dump@81ca0000          –    �Ê                           f  ã      tme-log@81ce0000             –    �Î        @                   f  ä      uefi-log@81ce4000            –    �Î@                          f  å      secdata-apss@81cff000            –    �Ïð                          f  æ      pdp-ns-shared@81e00000           –    �à                           f  ç      gpu-prr@81f00000             –    �ð                           f  è      tpm-control@81f10000             –    �ñ                           f  é      usb-ucsi-shared@81f20000             –    �ò                           f  ê      pld-pep@81f30000             –    �ó        `                   f  ë      pld-gmu@81f36000             –    �ó`                          f  ì      pld-pdp@81f37000             –    �óp                          f  í      tz-stat@82700000             –    ‚p                           f  î      xbl-tmp-buffer@82800000          –    ‚€       À                    f  ï      adsp-rpc-remote-heap@84b00000            –    „°       €                    f  ð      spu-secure-shared-memory@85300000            –    …0                           f  ñ      adsp-boot-dtb@866c0000           –    †l                           f  ò      spss-region@86700000             –    †p       @                    f  ó      adsp-boot@86b00000           –    †°       À                    f  ô      video@87700000           –    ‡p       p                    f        adspslpi@87e00000            –    ‡à                           f   ×      q6-adsp-dtb@8b800000             –    ‹€                           f   Ø      cdsp@8b900000            –    ‹�                           f         q6-cdsp-dtb@8d900000             –    ��                           f  ¡      gpu-microcode@8d9fe000           –    �Ÿà                           f   Ñ      cvp@8da00000             –    �        p                    f  õ      camera@8e100000          –    Ž       €                    f  ö      av1-encoder@8e900000             –    Ž�       p                    f  ÷      reserved-region@8f000000             –    �                          wpss@8fa00000            –    �       �                    f  ø      q6-wpss-dtb@91300000             –    ‘0                           f  ù      xbl-sc@d8000000          –    Ø                            f  ú      reserved-region@d8040000             –    Ø       
                 qtee@d80e0000            –    Ø       R                    f  û      ta@d8600000          –    Ø`                           f  ü      tags@e1000000            –    á       j                    f  ý      llcc-lpi@ff800000            –    ÿ€       `                    f  þ      smem@ffe00000         
   2qcom,smem            –    ÿà                     .                     f  ÿ      linux,cma            2shared-dma-pool                                           opp-table-qup100mhz          2operating-points-v2          f   J   opp-75000000            0    xhÀ        7   /      opp-100000000           0    õá         7   0         opp-table-qup120mhz          2operating-points-v2          f   C   opp-75000000            0    xhÀ        7   /      opp-120000000           0    '         7   0         smp2p-adsp           2qcom,smp2p          E   1                 Œ   1              Y  »  ­        c            r      master-kernel           ‚master-kernel           ’            f   Ù      slave-kernel            ‚slave-kernel             ©        ¾            f   Õ         smp2p-cdsp           2qcom,smp2p          E   1                 Œ   1              Y   ^  °        c            r      master-kernel           ‚master-kernel           ’            f  ¢      slave-kernel            ‚slave-kernel             ©        ¾            f  ž         soc@0            2simple-bus                                   Ï                               ú                                f      clock-controller@100000          2qcom,x1e80100-gcc            –                     ¬   n   2   3   4   5   6   7       8       9       :                                                                                                                                     ¹   ;             Y           Ú           ¤            f   =      mailbox@408000           2qcom,x1e80100-ipcc qcom,ipcc             –     @€                Ü       å            ©        ¾           ç            f   1      dma-controller@800000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma            –     €               �  Ü                                                                                                                    ó               >                      <  6          	  #disabled             f   A      geniqup@8c0000           2qcom,geni-se-qup             –     Œ                   n   =   ä   =   å        *m-ahb s-ahb            <  #                                      ú        #okay             f     i2c@880000           2qcom,geni-i2c            –     ˆ        @         Ü      (            n   =   Î        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A              A                  Ntx rx           X   B        bdefault                                 	  #disabled             f        spi@880000           2qcom,geni-spi            –     ˆ        @         Ü      (            n   =   Î        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   C         I   A              A                  Ntx rx           X   D   E        bdefault                                 	  #disabled             f        i2c@884000           2qcom,geni-i2c            –     ˆ@       @         Ü      )            n   =   Ð        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A             A                 Ntx rx           X   F        bdefault                                 	  #disabled             f        spi@884000           2qcom,geni-spi            –     ˆ@       @         Ü      )            n   =   Ð        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   C         I   A             A                 Ntx rx           X   G   H        bdefault                                 	  #disabled             f        i2c@888000           2qcom,geni-i2c            –     ˆ€       @         Ü      *            n   =   Ò        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A             A                 Ntx rx           X   I        bdefault                                 	  #disabled             f        spi@888000           2qcom,geni-spi            –     ˆ€       @         Ü      *            n   =   Ò        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   A             A                 Ntx rx           X   K   L        bdefault                                 	  #disabled             f        i2c@88c000           2qcom,geni-i2c            –     ˆÀ       @         Ü      +            n   =   Õ        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A             A                 Ntx rx           X   M        bdefault                                 	  #disabled             f        spi@88c000           2qcom,geni-spi            –     ˆÀ       @         Ü      +            n   =   Õ        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   A             A                 Ntx rx           X   N   O        bdefault                                 	  #disabled             f  	      i2c@890000           2qcom,geni-i2c            –     ‰        @         Ü      ,            n   =   Ø        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A             A                 Ntx rx           X   P        bdefault                                 	  #disabled             f  
      spi@890000           2qcom,geni-spi            –     ‰        @         Ü      ,            n   =   Ø        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   A             A                 Ntx rx           X   Q   R        bdefault                                 	  #disabled             f        i2c@894000           2qcom,geni-i2c            –     ‰@       @         Ü      -            n   =   Ú        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A             A                 Ntx rx           X   S        bdefault                                 	  #disabled             f        spi@894000           2qcom,geni-spi            –     ‰@       @         Ü      -            n   =   Ú        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   A             A                 Ntx rx           X   T   U        bdefault                                 	  #disabled             f        serial@894000            2qcom,geni-debug-uart             –     ‰@       @         Ü      -            n   =   Ú        *se        0  n   >         >         ?         @              6qup-core qup-config          ¹   ;            p   J        X   V        bdefault         #okay             f        i2c@898000           2qcom,geni-i2c            –     ‰€       @         Ü      Í            n   =   Ü        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A             A                 Ntx rx           X   W        bdefault                                 	  #disabled             f        spi@898000           2qcom,geni-spi            –     ‰€       @         Ü      Í            n   =   Ü        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   A             A                 Ntx rx           X   X   Y        bdefault                                 	  #disabled             f        i2c@89c000           2qcom,geni-i2c            –     ‰À       @         Ü      Î            n   =   Þ        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   A             A                 Ntx rx           X   Z        bdefault                                 	  #disabled             f        spi@89c000           2qcom,geni-spi            –     ‰À       @         Ü      Î            n   =   Þ        *se        H  n   >         >         ?         @                   !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   A             A                 Ntx rx           X   [   \        bdefault                                 	  #disabled             f           dma-controller@a00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma            –                     �  Ü               	         
                                                                                            ó               >                      <  6          	  #disabled             f   ^      geniqup@ac0000           2qcom,geni-se-qup             –     ¬                   n   =   â   =   ã        *m-ahb s-ahb            <  #                                      ú        #okay             f     i2c@a80000           2qcom,geni-i2c            –     ¨        @         Ü                   n   =   ¸        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^              ^                  Ntx rx           X   _        bdefault                                 	  #disabled             f        spi@a80000           2qcom,geni-spi            –     ¨        @         Ü                   n   =   ¸        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   C         I   ^              ^                  Ntx rx           X   `   a        bdefault                                 	  #disabled             f        i2c@a84000           2qcom,geni-i2c            –     ¨@       @         Ü      !            n   =   º        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^             ^                 Ntx rx           X   b        bdefault                                 	  #disabled             f        spi@a84000           2qcom,geni-spi            –     ¨@       @         Ü      !            n   =   º        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   C         I   ^             ^                 Ntx rx           X   c   d        bdefault                                 	  #disabled             f        i2c@a88000           2qcom,geni-i2c            –     ¨€       @         Ü      "            n   =   ¼        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^             ^                 Ntx rx           X   e        bdefault                                 	  #disabled             f        spi@a88000           2qcom,geni-spi            –     ¨€       @         Ü      "            n   =   ¼        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   ^             ^                 Ntx rx           X   f   g        bdefault                                 	  #disabled             f        i2c@a8c000           2qcom,geni-i2c            –     ¨À       @         Ü      #            n   =   ¿        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^             ^                 Ntx rx           X   h        bdefault                                 	  #disabled             f        spi@a8c000           2qcom,geni-spi            –     ¨À       @         Ü      #            n   =   ¿        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   ^             ^                 Ntx rx           X   i   j        bdefault                                 	  #disabled             f        i2c@a90000           2qcom,geni-i2c            –     ©        @         Ü      $            n   =   Â        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^             ^                 Ntx rx           X   k        bdefault                                 	  #disabled             f        spi@a90000           2qcom,geni-spi            –     ©        @         Ü      $            n   =   Â        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   ^             ^                 Ntx rx           X   l   m        bdefault                                 	  #disabled             f        i2c@a94000           2qcom,geni-i2c            –     ©@       @         Ü      %            n   =   Ä        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^             ^                 Ntx rx           X   n        bdefault                                 	  #disabled             f        spi@a94000           2qcom,geni-spi            –     ©@       @         Ü      %            n   =   Ä        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   ^             ^                 Ntx rx           X   o   p        bdefault                                 	  #disabled             f        i2c@a98000           2qcom,geni-i2c            –     ©€       @         Ü      &            n   =   Æ        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^             ^                 Ntx rx           X   q        bdefault                                 	  #disabled             f         spi@a98000           2qcom,geni-spi            –     ©€       @         Ü      &            n   =   Æ        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   ^             ^                 Ntx rx           X   r   s        bdefault                                 	  #disabled             f  !      serial@a98000            2qcom,geni-uart           –     ©€       @         Ü      &            n   =   Æ        *se        0  n   >         >         ?         @              6qup-core qup-config          ¹   ;            p   J        X   t        bdefault       	  #disabled             f  "      i2c@a9c000           2qcom,geni-i2c            –     ©À       @         Ü      '            n   =   È        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   ^             ^                 Ntx rx           X   u        bdefault                                 	  #disabled             f  #      spi@a9c000           2qcom,geni-spi            –     ©À       @         Ü      '            n   =   È        *se        H  n   >         >         ?         @         ]         !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   ^             ^                 Ntx rx           X   v   w        bdefault                                 	  #disabled             f  $         dma-controller@b00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma            –     °               �  Ü      L         M         N         O         P         Q         R         S         T         U         V         W           ó               >                      <  V          	  #disabled             f   x      geniqup@bc0000           2qcom,geni-se-qup             –     ¼                   n   =   à   =   á        *m-ahb s-ahb            <  C                                      ú        #okay             f  %   i2c@b80000           2qcom,geni-i2c            –     ¸        @         Ü      u            n   =   ¢        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x              x                  Ntx rx           X   y        bdefault                                 	  #disabled             f  &      spi@b80000           2qcom,geni-spi            –     ¸        @         Ü      u            n   =   ¢        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   C         I   x              x                  Ntx rx           X   z   {        bdefault                                 	  #disabled             f  '      i2c@b84000           2qcom,geni-i2c            –     ¸@       @         Ü      G            n   =   ¤        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x             x                 Ntx rx           X   |        bdefault                                   #okay             I €         f  (   typec-mux@8          2parade,ps8830            –            n              „   }        �   ~        œ   ~        ­   }        º   }        Ç           Ô   €   ¹           X   �        bdefault          à         ó   ports                                port@0           –       endpoint            ^   ‚         f  Ä         port@1           –      endpoint            ^   ƒ         f   »         port@2           –      endpoint            ^   „         f  Å                  spi@b84000           2qcom,geni-spi            –     ¸@       @         Ü      G            n   =   ¤        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   C         I   x             x                 Ntx rx           X   …   †        bdefault                                 	  #disabled             f  )      i2c@b88000           2qcom,geni-i2c            –     ¸€       @         Ü      H            n   =   ¦        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x             x                 Ntx rx           X   ‡        bdefault                                 	  #disabled             f  *      serial@b88000            2qcom,geni-uart           –     ¸€       @         Ü      H            n   =   ¦        *se        0  n   >         >         ?         @              6qup-core qup-config          ¹   ;            p   J        X   ˆ        bdefault       	  #disabled             f  +      spi@b88000           2qcom,geni-spi            –     ¸€       @         Ü      H            n   =   ¦        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   x             x                 Ntx rx           X   ‰   Š        bdefault                                 	  #disabled             f  ,      i2c@b8c000           2qcom,geni-i2c            –     ¸À       @         Ü      I            n   =   ©        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x             x                 Ntx rx           X   ‹        bdefault                                   #okay             I €         f  -   typec-mux@8          2parade,ps8830            –            n      
        „   Œ        �   �        œ   �        ­   Œ        º   Œ        Ç   Ž        Ô   �   
           X   �        bdefault          ó         à   ports                                port@0           –       endpoint            ^   ‘         f  ¾         port@1           –      endpoint            ^   ’         f   ²         port@2           –      endpoint            ^   “         f  ¿                  spi@b8c000           2qcom,geni-spi            –     ¸À       @         Ü      I            n   =   ©        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   x             x                 Ntx rx           X   ”   •        bdefault                                 	  #disabled             f  .      i2c@b90000           2qcom,geni-i2c            –     ¹        @         Ü      J            n   =   ¬        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x             x                 Ntx rx           X   –        bdefault                                 	  #disabled             f  /      spi@b90000           2qcom,geni-spi            –     ¹        @         Ü      J            n   =   ¬        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   x             x                 Ntx rx           X   —   ˜        bdefault                                 	  #disabled             f  0      i2c@b94000           2qcom,geni-i2c            –     ¹@       @         Ü      K            n   =   ®        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x             x                 Ntx rx           X   ™        bdefault                                   #okay             I €         f  1   redriver@47          2nxp,ptn3222          –   G                       š           ›        Ô   €              X   œ        bdefault          f   ñ      redriver@4f          2nxp,ptn3222          –   O                       š           ›        Ô   €   ¸           X   �        bdefault          f   ò         spi@b94000           2qcom,geni-spi            –     ¹@       @         Ü      K            n   =   ®        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   x             x                 Ntx rx           X   ž   Ÿ        bdefault                                 	  #disabled             f  2      i2c@b98000           2qcom,geni-i2c            –     ¹€       @         Ü      Í            n   =   °        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x             x                 Ntx rx           X            bdefault                                 	  #disabled             f  3      spi@b98000           2qcom,geni-spi            –     ¹€       @         Ü      Í            n   =   °        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   x             x                 Ntx rx           X   ¡   ¢        bdefault                                 	  #disabled             f  4      i2c@b9c000           2qcom,geni-i2c            –     ¹À       @         Ü      Î            n   =   ²        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            7   /         I   x             x                 Ntx rx           X   £        bdefault                                   #okay             I €         f  5   typec-mux@8          2parade,ps8830            –            n              „   ¤        �   ¥        œ   ¥        ­   ¤        º   ¤        Ç   ¦        Ô   €   °           X   §        bdefault          ó         à   ports                                port@0           –       endpoint            ^   ¨         f  Á         port@1           –      endpoint            ^   ©         f   ·         port@2           –      endpoint            ^   ª         f  Â                  spi@b9c000           2qcom,geni-spi            –     ¹À       @         Ü      Î            n   =   ²        *se        H  n   >         >         ?         @                    !              6qup-core qup-config qup-memory           ¹   ;            p   J         I   x             x                 Ntx rx           X   «   ¬        bdefault                                 	  #disabled             f  6         thermal-sensor@c271000        "   2qcom,x1e80100-tsens qcom,tsens-v2             –    '            "                 E   ­               �           )uplow critical          9           G            f  £      thermal-sensor@c272000        "   2qcom,x1e80100-tsens qcom,tsens-v2             –    '             "0                E   ­               ‚           )uplow critical          9           G            f  ¤      thermal-sensor@c273000        "   2qcom,x1e80100-tsens qcom,tsens-v2             –    '0            "@                E   ­               ƒ           )uplow critical          9           G            f  ¥      thermal-sensor@c274000        "   2qcom,x1e80100-tsens qcom,tsens-v2             –    '@            "P                E   ­                          )uplow critical          9           G            f  ¦      phy@fd3000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy          –     ý0       T                     n   "           *ref         ]   =   6        #okay            „   ®        d   ¯        r   °         f   þ      phy@fd5000           2qcom,x1e80100-qmp-usb3-dp-phy            –     ýP       @           n   =            =     =          *aux ref com_aux usb3_pipe            ¹   =           ]   =   D   =   O        wphy common           Y                       ƒ         à        #okay            �   ¯        Ÿ   ±         f   8   ports                                port@0           –       endpoint            ^   ²         f   ’         port@1           –      endpoint            ^   ³         f            port@2           –      endpoint            ^   ´         f                 phy@fd9000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy          –     ý�       T                     n   "           *ref         ]   =   7        #okay            „   ®        d   ¯        r   µ         f        phy@fda000           2qcom,x1e80100-qmp-usb3-dp-phy            –     ý        @           n   =      "      =  "   =  #        *aux ref com_aux usb3_pipe            ¹   =           ]   =   E   =   P        wphy common           Y                       ƒ         à        #okay            �   ¯        Ÿ   ¶         f   9   ports                                port@0           –       endpoint            ^   ·         f   ©         port@1           –      endpoint            ^   ¸         f           port@2           –      endpoint            ^   ¹         f                 phy@fde000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy          –     ýà       T                     n   "           *ref         ]   =   8        #okay            „   ®        d   ¯        r   º         f   õ      phy@fdf000           2qcom,x1e80100-qmp-usb3-dp-phy            –     ýð       @           n   =  $   "      =  &   =  '        *aux ref com_aux usb3_pipe            ¹   =           ]   =   F   =   Q        wphy common           Y                       ƒ         à        #okay            �   ¯        Ÿ   ¶         f   :   ports                                port@0           –       endpoint            ^   »         f   ƒ         port@1           –      endpoint            ^   ¼         f   ÷         port@2           –      endpoint            ^   ½         f                 rng@10c3000          2qcom,x1e80100-trng qcom,trng             –    0                 f  7      interconnect@1500000             2qcom,x1e80100-cnoc-main          –    P       D         Ì   &        ¸            f   ¿      interconnect@1600000             2qcom,x1e80100-cnoc-cfg           –    `        f         Ì   &        ¸            f   @      interconnect@1680000             2qcom,x1e80100-system-noc             –    h       À€        Ì   &        ¸            f  8      interconnect@16c0000             2qcom,x1e80100-pcie-south-anoc            –    l        Ð€        Ì   &        ¸            f   Â      interconnect@16d0000             2qcom,x1e80100-pcie-center-anoc           –    m        p         Ì   &        ¸            f  9      interconnect@16e0000             2qcom,x1e80100-aggre1-noc             –    n       D         Ì   &        ¸            f   ]      interconnect@1700000             2qcom,x1e80100-aggre2-noc             –    p       Ä         Ì   &        ¸            f          interconnect@1740000             2qcom,x1e80100-pcie-north-anoc            –    t        �€        Ì   &        ¸            f   ¾      interconnect@1750000             2qcom,x1e80100-usb-center-anoc            –    u        ˆ         Ì   &        ¸            f  :      interconnect@1760000             2qcom,x1e80100-usb-north-anoc             –    v        p€        Ì   &        ¸            f   ø      interconnect@1770000             2qcom,x1e80100-usb-south-anoc             –    w        ð€        Ì   &        ¸            f   ô      interconnect@1780000             2qcom,x1e80100-mmss-noc           –    x       ¸         Ì   &        ¸            f        pcie@1bd0000             Špci          2qcom,pcie-x1e80100        `   –    ½        0     x              x @       ¨    x             x             ½0                ¯parf dbi elbi atu config mhi                                   T  ú               x                 x0      x0      Ð        @      @       @           ¹       ÿ         Ã        Ð           á         l  Ü       ž          ¦                  D         Ÿ          È          Ú          Û          y         /  )msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global          ¾           ë                        þ                                 Ü                                    Ý                                    í                                    î         8   n   =   T   =   V   =   W   =   ^   =   _   =      =   !      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   T        $ø       0  n   ¾          !         ?         ¿              6pcie-mem cpu-pcie           ]   =      =           wpci link_down            ¹   =           1UUUUUUUUUUUUUUUU        AUUUUUUUU        p   À      	  #disabled             f  ;   opp-table            2operating-points-v2          f   À   opp-2500000-1           0     &%         7   /        R Ð�           `         opp-5000000-1           0     LK@        7   /        R ¡            `         opp-10000000-1          0     ˜–€        7   /        R B@           `         opp-20000000-1          0    1-         7   /        R „€           `         opp-5000000-2           0     LK@        7   /        R ¡            `         opp-10000000-2          0     ˜–€        7   /        R B@           `         opp-20000000-2          0    1-         7   /        R „€           `         opp-40000000-2          0    bZ         7   /        R =	            `         opp-8000000-3           0     z         7   0        R ´           `         opp-16000000-3          0     ô$         7   0        R h           `         opp-32000000-3          0    èH         7   0        R <Ð           `         opp-64000000-3          0    Ð�         7   0        R x-            `         opp-16000000-4          0     ô$         7   0        R h           `         opp-32000000-4          0    èH         7   0        R <Ð           `         opp-64000000-4          0    Ð�         7   0        R x-            `         opp-128000000-4         0    ¡          7   0        R ð_(           `            pcie@0           Špci          2pciclass,0604            –                            ¹      ÿ        r   4                                  ú         f  <         phy@1be0000       "   2qcom,x1e80100-qmp-gen4x8-pcie-phy            –    ¾               0   n   =   X   =   V   "      =   Y   =   [   =   ]      $  *aux cfg_ahb ref rchng pipe pipediv2         ]   =      =           wphy phy_nocsr              =   Y        õá          ¹   =            Y            jpcie3_pipe_clk                    	  #disabled             f   4      pci@1bf8000          Špci          2qcom,pcie-x1e80100        `   –    ¿€       0     p              p @       ¨    p             p             ¿°                ¯parf dbi elbi atu config mhi                                   8  ú               p                 p0      p0      Ð          ¹       ÿ         Ã        Ð           á           }       Á            l  Ü                        E         F         G         H         I         J                   /  )msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global          ¾           ë                        þ                                K                                   L                                   M                                            8   n   =   v   =   x   =   y   =   €   =   �   =      =   "      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   v        $ø       0  n   Â         !         ?         ¿              6pcie-mem cpu-pcie           ]   =   "   =   #        wpci link_down            ¹   =   
        7   Ã        1UUUUUUUU        AUUUU        #okay            …   Ä        bdefault         X   Å         f  =   pcie@0           Špci          –                            ¹      ÿ        r   7                                  ú        Ô   €   ˜           –   €   š            f  >         phy@1bfc000       "   2qcom,x1e80100-qmp-gen4x4-pcie-phy             –    ¿À             ¿à               0   n   =   z   =   x   "   
   =   {   =   }   =         $  *aux cfg_ahb ref rchng pipe pipediv2         ]   =   %   =   $        wphy phy_nocsr              =   {        õá          ¹   =   	        ¡   "                Y            jpcie6a_pipe_clk                     #okay            �   Æ        Ÿ   ¯         f   7      pci@1c00000          Špci          2qcom,pcie-x1e80100        `   –    À        0     ~             ~ @       ¨    ~             ~             À0                ¯parf dbi elbi atu config mhi                                   8  ú               ~                 ~0      ~0      Ð          ¹       ÿ         Ã        Ð           á         l  Ü       ^          _          `          Y          V          R          M          N          �         /  )msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global          ¾           ë                        þ                                 F                                    G                                    H                                    I         8   n   =   k   =   m   =   n   =   t   =   u   =      =   !      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   k        $ø       0  n   ¾         !         ?         ¿              6pcie-mem cpu-pcie           ]   =      =           wpci link_down            ¹   =           7   Ã        1UUUU        #okay            …   Ç        X   È        bdefault          f  ?   pcie@0           Špci          –                            ¹      ÿ        r   6                                  ú        Ô   €   •           –   €   —            f  @         phy@1c06000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy            –    À`               0   n   =   k   =   m   "      =   o   =   q   =   s      $  *aux cfg_ahb ref rchng pipe pipediv2         ]   =       =           wphy phy_nocsr              =   o        õá          ¹   =            Y            jpcie5_pipe_clk                      #okay            �   É        Ÿ   Ê         f   6      pci@1c08000          Špci          2qcom,pcie-x1e80100        `   –    À€       0     |             | @       ¨    |             |             À°                ¯parf dbi elbi atu config mhi                                   8  ú               |                 |0      |0      Ð          ¹       ÿ         Ã        Ð           á           }       Á            l  Ü       �          Ž          �          �          ‘          ’          “          ”          œ         /  )msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global          ¾           ë                        þ                                 •                                    –                                    —                                    ˜         8   n   =   `   =   b   =   c   =   i   =   j   =      =   !      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   `        $ø       0  n   ¾         !         ?         ¿              6pcie-mem cpu-pcie           ]   =      =           wpci link_down            ¹   =           7   Ã        1UUUU        #okay            X   Ë        bdefault          f  A   pcie@0           Špci          –                            ¹      ÿ        r   5                                  ú        Ô   €   ’           –   €   ”            f  B         phy@1c0e000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy            –    Àà               0   n   =   `   =   b   "       =   d   =   f   =   h      $  *aux cfg_ahb ref rchng pipe pipediv2         ]   =      =           wphy phy_nocsr              =   d        õá          ¹   =            Y            jpcie4_pipe_clk                      #okay            �   É        Ÿ   Ê         f   5      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0          –    Ü@      €         Ü                               <  €       <  �            µ             ½        Ö           ã            f   Ì      crypto@1dfa000        +   2qcom,x1e80100-qce qcom,sm8150-qce qcom,qce           –    ß        `         I   Ì      Ì           Nrx tx              <  €       <  �            n             !              6memory           f  C      hwlock@1f40000           2qcom,tcsr-mutex          –    ô                 ð            f   .      clock-controller@1fc0000             2qcom,x1e80100-tcsr syscon            –    ü                  n                Y           Ú            f   "      gpu@3d00000       !   2qcom,adreno-43050c01 qcom,adreno          0   –    Ð             Ùà            Ö              #  ¯kgsl_3d0_reg_memory cx_mem cx_dbgc          Ü      ,              Í           Í               p   Î        þ   Ï                      Ð      
  "speed_bin           n   ?          !               6gfx-mem         #okay             f  ¨   zap-shader          3   Ñ      3  Aqcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn           f  D      opp-table         /   2operating-points-v2-adreno operating-points-v2           f   Î   opp-1500000000          0    Yh/         `  È        R ûÅ         O¨*_ý        b         opp-1375000000          0    QôÕÀ        `  Ä        R ûÅ         O¨*_ý        b         opp-1250000000          0    J�|€        `  À        R ûÅ         O¨*_ý        b         opp-1175000000          0    F	À        `  °        R Û³æ        O¨*_ý        b         opp-1100000000-0            0    A�«         `           R Û³æ        O¨*_ý        b         opp-1100000000-1            0    A�«         `           R ûÅ         O¨*_ý        b         opp-1000000000          0    ;šÊ         `  €        R Û³æ        O¨+_ý        b         opp-925000000           0    7"a@        `  @        R Û³æ        O¨+_ý        b         opp-800000000           0    /¯         `           R ½õÃ        O¨,_ý        b         opp-744000000           0    ,XŠ         `   à        R £        Oˆ._ý        b         opp-687000000-0         0    (òÉÀ        `   À        R |±c        Oˆ._ý        b         opp-687000000-1         0    (òÉÀ        `   À        R ûÅ         Oˆ._ý        b         opp-550000000           0     ÈU€        `   €        R \¯k        OÀ(_ý        b         opp-390000000           0    >í€        `   @        R -ÆÀ        OÀ(_ý        b         opp-300000000           0    á£         `   8        R  š�        OÀ+_ý        b               gmu@3d6a000       '   2qcom,adreno-gmu-x185.1 qcom,adreno-gmu        0   –    Ö       P     Õ             (                 ¯gmu rscc gmu_pdc            Ü      0         1           )hfi gmu       8   n   Ò       Ò      Ò      =   $   =   7   Ò      Ò         !  *ahb gmu cxo axi memnoc hub demet             ¹   Ò       Ò            Çcx gx              Í               s   Ó        p   Ô         f   Ï   opp-table            2operating-points-v2          f   Ô   opp-550000000           0     ÈU€        `   €      opp-220000000           0    ï         `   @            clock-controller@3d90000             2qcom,x1e80100-gpucc          –    Ù                   n   2   =   5   =   6         Y           Ú           ¤            f   Ò      iommu@3da0000         B   2qcom,x1e80100-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500            –    Ú                 |           ‰        8  Ü      ¢         ¦         §         ¨         ©         ª         «         ¬         ­         ®         ¯         °         ¦         Ü         >         ?         @         A         ”         –         ™         š         ›         �         ž         ¼             n   Ò      =   7   =   8   Ò            *hlos bus iface ahb           ¹   Ò             Ã         f   Í      interconnect@26400000            2qcom,x1e80100-gem-noc            –    &@       1         Ì   &        ¸            f   ?      interconnect@320c0000            2qcom,x1e80100-nsp-noc            –    2        à€        Ì   &        ¸            f  Ÿ      remoteproc@6800000           2qcom,x1e80100-adsp-pas           –    €               <  E   ­         Õ          Õ         Õ         Õ            #  )wdog fatal ready handover stop-ack           n               *xo           ¹   ;      ;            Çlcx lmx         n   Ö          !              3   ×   Ø        s   Ó        œ   Ù            ­stop            #okay          _  Aqcom/x1e80100/Thundercomm/DEVKIT/qcadsp8380.mbn qcom/x1e80100/Thundercomm/DEVKIT/adsp_dtbs.elf           f  E   glink-edge          E   1                  Œ   1               Ãlpass           r      fastrpc          2qcom,fastrpc            Éfastrpcglink-apps-dsp           Ãadsp             Ý                             compute-cb@3             2qcom,fastrpc-compute-cb          –              <     €   <  c             Ã      compute-cb@4             2qcom,fastrpc-compute-cb          –              <     €   <  d             Ã      compute-cb@5             2qcom,fastrpc-compute-cb          –              <     €   <  e             Ã      compute-cb@6             2qcom,fastrpc-compute-cb          –              <     €   <  f             Ã      compute-cb@7             2qcom,fastrpc-compute-cb          –              <     €   <  g             Ã         gpr       	   2qcom,gpr          
  Éadsp_apps           ô                                               service@1            2qcom,q6apm           –                       avs/audio msm/adsp/audio_pd          f  É   bedais           2qcom,q6apm-lpass-dais                       f  Æ      dais             2qcom,q6apm-dais            <     €   <  a             f  F         service@2            2qcom,q6prm           –           avs/audio msm/adsp/audio_pd          f  G   clock-controller             2qcom,q6prm-lpass-clocks          Y            f   Ú                  codec@6aa0000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro            –    ª               (   n   Ú   D      Ú   f      Ú   g      Û        *mclk macro dcodec fsgen          Y          
  jwsa2-mclk                      5WSA2             f   Ü      soundwire@6ab0000            2qcom,soundwire-v2.0.0            –    «                  n   Ü        *iface           Ü       «           ÃWSA2            X   Ý        bdefault         ]   Þ           wswr_audio_cgcr          G           V   	        f   ?   ? È ÿ ÿ   ÿ          { ÿÿÿ            Žÿÿÿÿÿÿÿÿÿ           ¡ÿÿÿÿÿÿÿÿÿÿÿ           ³ÿÿÿÿÿÿÿÿÿÿÿ           Äÿÿÿÿÿÿÿÿÿÿÿ           Û                  öÿÿÿÿÿÿÿÿÿÿÿÿÿ           ÿÿÿÿÿÿÿÿÿÿÿÿÿ                                              	  #disabled             f  H      codec@6ac0000         8   2qcom,x1e80100-lpass-rx-macro qcom,sm8550-lpass-rx-macro          –    ¬               (   n   Ú   @      Ú   f      Ú   g      Û        *mclk macro dcodec fsgen          Y            jmclk                        f   ß      soundwire@6ad0000            2qcom,soundwire-v2.0.0            –    ­                  n   ß        *iface           Ü       ›           ÃRX          X   à        bdefault         ]   Þ            wswr_audio_cgcr          G           V           f       ÿ ÿ ÿ ÿ ÿ ÿ ÿ        {   ÿÿÿÿÿÿÿ        Ž    ÿÿÿÿÿÿÿ        ¡ÿ ÿÿÿÿÿÿÿÿÿ        ³ÿÿÿÿÿÿÿÿÿÿ        Äÿÿÿÿÿÿÿÿÿ        Ûÿÿÿÿÿÿÿÿÿÿÿ        öÿÿÿÿÿÿÿÿÿÿÿÿ            ÿÿÿÿÿÿÿ                                             #okay             f  È   codec@0,4            2sdw20217010d00           –               +                        f  º         codec@6ae0000         8   2qcom,x1e80100-lpass-tx-macro qcom,sm8550-lpass-tx-macro          –    ®               (   n   Ú   9      Ú   f      Ú   g      Û        *mclk macro dcodec fsgen          Y            jmclk                        f   ã      codec@6b00000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro            –    °               (   n   Ú   B      Ú   f      Ú   g      Û        *mclk macro dcodec fsgen          Y            jmclk                       5WSA          f   á      soundwire@6b10000            2qcom,soundwire-v2.0.0            –    ±                  n   á        *iface           Ü       ª           ÃWSA         X   â        bdefault         ]   Þ           wswr_audio_cgcr          G           V   	        f   ?   ? È ÿ ÿ   ÿ          { ÿÿÿ            Žÿÿÿÿÿÿÿÿÿ           ¡ÿÿÿÿÿÿÿÿÿÿÿ           ³ÿÿÿÿÿÿÿÿÿÿÿ           Äÿÿÿÿÿÿÿÿÿÿÿ           Û                  öÿÿÿÿÿÿÿÿÿÿÿÿÿ           ÿÿÿÿÿÿÿÿÿÿÿÿÿ                                              	  #disabled             f  I      clock-controller@6b6c000          6   2qcom,x1e80100-lpassaudiocc qcom,sc8280xp-lpassaudiocc            –    ¶À                 Y           Ú            f   Þ      soundwire@6d30000            2qcom,soundwire-v2.0.0            –    Ó                  n   ã        *iface           Ü      ð                    )core wakeup         ÃTX          ]   ä            wswr_audio_cgcr          X   å        bdefault         G           V           @             {              Ž    ÿ           ¡ÿÿÿÿÿ           ³ÿÿÿÿÿ           Äÿÿÿÿÿ           Ûÿÿÿÿÿ           öÿÿÿÿÿ           ÿ  ÿ                                                #okay             f  Ê   codec@0,3            2sdw20217010d00           –               Y                     f  »         codec@6d44000         8   2qcom,x1e80100-lpass-va-macro qcom,sm8550-lpass-va-macro          –    Ô@              $   n   Ú   9      Ú   f      Ú   g           *mclk macro dcodec            Y            jfsgen                       f   Û      pinctrl@6e80000       >   2qcom,x1e80100-lpass-lpi-pinctrl qcom,sm8550-lpass-lpi-pinctrl             –    è             %                  n   Ú   f      Ú   g           *core audio           n        ~           Š   æ                    f   æ   tx-swr-active-state          f   å   clk-pins            –gpio0           ›swr_tx_clk          ¤           ³            ½      data-pins           –gpio1 gpio2         ›swr_tx_data         ¤           ³            Ê         rx-swr-active-state          f   à   clk-pins            –gpio3           ›swr_rx_clk          ¤           ³            ½      data-pins           –gpio4 gpio5         ›swr_rx_data         ¤           ³            Ê         dmic01-default-state             f  J   clk-pins            –gpio6         
  ›dmic1_clk           ¤            Ø      data-pins           –gpio7           ›dmic1_data          ¤            ä         dmic23-default-state             f  K   clk-pins            –gpio8         
  ›dmic2_clk           ¤            Ø      data-pins           –gpio9           ›dmic2_data          ¤            ä         wsa-swr-active-state             f   â   clk-pins            –gpio10          ›wsa_swr_clk         ¤           ³            ½      data-pins           –gpio11          ›wsa_swr_data            ¤           ³            Ê         wsa2-swr-active-state            f   Ý   clk-pins            –gpio15          ›wsa2_swr_clk            ¤           ³            ½      data-pins           –gpio16          ›wsa2_swr_data           ¤           ³            Ê            clock-controller@6ea0000          ,   2qcom,x1e80100-lpasscc qcom,sc8280xp-lpasscc          –    ê                  Y           Ú            f   ä      interconnect@7e40000             2qcom,x1e80100-lpass-ag-noc           –    ä        à€        Ì   &        ¸            f  L      interconnect@7400000             2qcom,x1e80100-lpass-lpiaon-noc           –    @       �€        Ì   &        ¸            f  M      interconnect@7430000             2qcom,x1e80100-lpass-lpicx-noc            –    C       ¢         Ì   &        ¸            f   Ö      mmc@8804000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5            –    €@                Ü       Ï          ß           )hc_irq pwr_irq           n   =   æ   =   ç   2        *iface core xo              <               ñ d,        	€h         ¹   ;            p   ç      0  n             !         ?         @              6sdhc-ddr cpu-sdhc           	            Ã        #okay            	   €   G           X   è   é        	$   ê   é        bdefault sleep           	.   ë        	:   ì         	G         	O         f  N   opp-table            2operating-points-v2          f   ç   opp-19200000            0    $ø         7   í      opp-50000000            0    úð€        7   /      opp-100000000           0    õá         7   0      opp-202000000           0    
F€        7   î            mmc@8844000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5            –    „@                Ü                ã           )hc_irq pwr_irq           n   =   é   =   ê   2        *iface core xo              <  `            ñ d,        	€h         ¹   ;            p   ï      0  n             !         ?         @              6sdhc-ddr cpu-sdhc           	            Ã      	  #disabled             f  O   opp-table            2operating-points-v2          f   ï   opp-19200000            0    $ø         7   í      opp-50000000            0    úð€        7   /      opp-100000000           0    õá         7   0      opp-202000000           0    
F€        7   î            phy@88e0000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy          –    Ž        T                     n   "   	        *ref         ]   =   9      	  #disabled             f   ù      phy@88e1000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy          –    Ž       T                     n   "           *ref         ]   =   4        #okay            „   ð        d   Ê        r   ñ         f   ú      phy@88e2000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy          –    Ž        T                     n   "           *ref         ]   =   5        #okay            „   ð        d   Ê        r   ò         f   ü      phy@88e3000          2qcom,x1e80100-qmp-usb3-uni-phy           –    Ž0                   n   =            =     =          *aux ref com_aux pipe            ]   =   G   =   L        wphy phy_phy          ¹   =            Y            jusb_mp_phy0_pipe_clk                        #okay            �   Ê        Ÿ   ó         f   û      phy@88e5000          2qcom,x1e80100-qmp-usb3-uni-phy           –    ŽP                   n   =            =     =          *aux ref com_aux pipe            ]   =   H   =   M        wphy phy_phy          ¹   =            Y            jusb_mp_phy1_pipe_clk                        #okay            �   Ê        Ÿ   ó         f   ý      usb@a0f8800          2qcom,x1e80100-dwc3 qcom,dwc3             –    
ˆ              H   n   =      =     =      =     =     =      =       =      =   ì      R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $ø ëÂ       4  E         r      ­   :      ­   9      ­   
         1  )pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             ¹   =           7   Ã        ]   =   A      0  n   ô         !         ?         @   %           6usb-ddr apps-usb             	V                                  ú        #okay             f  P   usb@a000000       
   2snps,dwc3            –    
         Í         Ü      a              <               r   õ   :            	dusb2-phy usb3-phy            	n         	‡         	Ÿ         	µ         	Í         Ã        	åhost             f  Q   ports                                port@0           –       endpoint            ^   ö         f  Ã         port@1           –      endpoint            ^   ÷         f   ¼                  usb@a2f8800          2qcom,x1e80100-dwc3 qcom,dwc3             –    
/ˆ                                          ú      H   n   =      =   ù   =      =   þ   =   û   =      =       =      =   ì      R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =   û   =   ù        $ø ëÂ       (  E          õ      ­   2      ­   1         &  )pwr_event dp_hs_phy_irq dm_hs_phy_irq            ¹   =           7   Ã        ]   =   =      0  n   ø          !         ?         @   "           6usb-ddr apps-usb             	í         	V      	  #disabled             f  R   usb@a200000       
   2snps,dwc3            –    
         Í         Ü       ð              <  à            r   ù      	  	dusb2-phy            

high-speed           	µ         	Í         Ã         f  S   port       endpoint             f  T               usb@a4f8800           2qcom,x1e80100-dwc3-mp qcom,dwc3          –    
Oˆ              H   n   =      =   ÿ   =      =     =     =      =       =      =   ì      R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =   ÿ        $ø ëÂ       ˆ  E         9            :            5            8      ­   4      ­   3      ­   6      ­   5      ­   7      ­   8         l  )pwr_event_1 pwr_event_2 hs_phy_1 hs_phy_2 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 ss_phy_1 ss_phy_2          ¹   =           7   Ã        ]   =   >      0  n   ø         !         ?         @   &           6usb-ddr apps-usb             	V                                  ú        #okay             f  U   usb@a400000       
   2snps,dwc3            –    
@        Í         Ü      3              <               r   ú   û   ü   ý        	dusb2-0 usb3-0 usb2-1 usb3-1         	åhost             	n         	‡         	Ÿ         	µ         	Í         Ã         f  V         usb@a6f8800          2qcom,x1e80100-dwc3 qcom,dwc3             –    
oˆ              H   n   =      =     =      =  
   =     =      =      =      =   ì      R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $ø ëÂ       4  E         s      ­   =      ­         ­            1  )pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             ¹   =           7   Ã        ]   =   ?         	V                                  ú        #okay             f  W   usb@a600000       
   2snps,dwc3            –    
`        Í         Ü      c              <               r   þ   8            	dusb2-phy usb3-phy            	n         	‡         	Ÿ         	µ         	Í         Ã        	åotg          
         f  X   ports                                port@0           –       endpoint            ^   ÿ         f  ½         port@1           –      endpoint            ^            f   ³                  usb@a8f8800          2qcom,x1e80100-dwc3 qcom,dwc3             –    
�ˆ              H   n   =      =     =      =     =     =      =       =      =   ì      R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $ø ëÂ       4  E         t      ­   <      ­         ­   /         1  )pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             ¹   =           7   Ã        ]   =   @      0  n   ô         !         ?         @   $           6usb-ddr apps-usb             	V                                  ú        #okay             f  Y   usb@a800000       
   2snps,dwc3            –    
€        Í         Ü      e              <  `            r     9            	dusb2-phy usb3-phy            	n         	‡         	Ÿ         	µ         	Í         Ã        	åhost             f  Z   ports                                port@0           –       endpoint            ^           f  À         port@1           –      endpoint            ^           f   ¸                  video-codec@aa00000       $   2qcom,x1e80100-iris qcom,sm8550-iris          –    
                  Ü       ®             ¹              ;   
   ;            Çvenus vcodec0 mxc mmcx          p           n   =  Y                   *iface core vcodec0_core       0  n   ?         @   *              !              6cpu-cfg video-mem           3          ]   =   X        wbus            <  @       <  G             Ã      	  #disabled             f  [   opp-table            2operating-points-v2          f     opp-192000000           0    q°         7          opp-240000000           0    N         7   0   /      opp-338000000           0    %x€        7   0   0      opp-366000000           0    Ð·€        7   0   î      opp-444000000           0    vç         7   î   Ã      opp-481000000           0    «z@        7   î  	            clock-controller@aaf0000             2qcom,x1e80100-videocc            –    
¯                  n   2   =  X         ¹   ;      ;   
        7   /   /         Y           Ú           ¤            f        display-subsystem@ae00000            2qcom,x1e80100-mdss           –    
à                 ¯mdss            Ü       S            n  
      =   &  
   :        ]  
          H  n           ?         !          !         ?         @              6mdp0-mem mdp1-mem cpu-cfg            ¹  
               <               ©        ¾                                     ú        #okay             f     display-controller@ae01000           2qcom,x1e80100-dpu             –    
à      ð     
ë               	  ¯mdp vbif            E            (   n   =   &  
     
   =  
   :  
   F        *nrt_bus iface lut core vsync            p           ¹   ;            f  \   ports                                port@0           –       endpoint            ^           f           port@4           –      endpoint            ^           f           port@5           –      endpoint            ^           f           port@6           –      endpoint            ^           f              opp-table            2operating-points-v2          f     opp-200000000           0    ëÂ         7   /      opp-325000000           0    _@        7   0      opp-375000000           0    ZÀ        7   î      opp-514000000           0    £€        7   Ã      opp-575000000           0    "EÍÀ        7              displayport-controller@ae90000           2qcom,x1e80100-dp          P   –    
é             
é            
é            
é            
é                E           0   n  
     
     
     
     
     
         J  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel             
     
     
           
(   8      8      8           p           ¹   ;           r   8           	ddp                      5DisplayPort0            #okay             f  ]   ports                                port@0           –       endpoint            ^           f           port@1           –      endpoint            
?                     ^           
J    `�=      î»    AÝv    âÌ1          f   ´            opp-table            2operating-points-v2          f     opp-160000000           0    	‰h         7   /      opp-270000000           0    ß€        7   0      opp-540000000           0     /¿         7   î      opp-810000000           0    0Gž€        7   Ã            displayport-controller@ae98000           2qcom,x1e80100-dp          P   –    
é€            
é‚            
é„            
é�            
é”                E           0   n  
     
     
     
     
     
         J  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel             
     
     
            
(   9      9      9           p           ¹   ;           r   9           	ddp                      5DisplayPort1            #okay             f  ^   ports                                port@0           –       endpoint            ^           f           port@1           –      endpoint            
?                     ^           
J    `�=      î»    AÝv    âÌ1          f   ¹            opp-table            2operating-points-v2          f     opp-160000000           0    	‰h         7   /      opp-270000000           0    ß€        7   0      opp-540000000           0     /¿         7   î      opp-810000000           0    0Gž€        7   Ã            displayport-controller@ae9a000           2qcom,x1e80100-dp          P   –    
é             
é¢            
é¤            
é°            
é´                E           0   n  
     
   "  
   $  
   '  
   (  
   *      J  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel             
   %  
   )  
   +        
(   :      :      :           p           ¹   ;           r   :           	ddp                      5DisplayPort2            #okay             f  _   ports                                port@0           –       endpoint            ^           f           port@1           –      endpoint            
?                     ^           
J    `�=      î»    AÝv    âÌ1          f   ½            opp-table            2operating-points-v2          f     opp-160000000           0    	‰h         7   /      opp-270000000           0    ß€        7   0      opp-540000000           0     /¿         7   î      opp-810000000           0    0Gž€        7   Ã            displayport-controller@aea0000           2qcom,x1e80100-dp          P   –    
ê             
ê            
ê            
ê            
ê                E           (   n  
     
   -  
   /  
   2  
   3      ;  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel            
   0  
   4        
(                   p           ¹   ;           r          	ddp                      5DisplayPort3          	  #disabled             f  `   ports                                port@0           –       endpoint            ^           f           port@1           –      endpoint             f  a            opp-table            2operating-points-v2          f     opp-160000000           0    	‰h         7   /      opp-270000000           0    ß€        7   0      opp-540000000           0     /¿         7   î      opp-810000000           0    0Gž€        7   Ã               phy@aec2a00          2qcom,x1e80100-dp-phy          @   –    
ì*       œ    
ì"        ì    
ì&        ì    
ì        È         n  
   "  
      "           *aux cfg_ahb ref          ¹   ;            Y                     	  #disabled             f  b      phy@aec5a00          2qcom,x1e80100-dp-phy          @   –    
ìZ       œ    
ìR        ì    
ìV        ì    
ìP       È         n  
   -  
      "           *aux cfg_ahb ref          ¹   ;            Y                     	  #disabled             f        clock-controller@af00000             2qcom,x1e80100-dispcc             –    
ð               d   n   2     =   %   3                   8      8      9      9      :      :                       ¹   ;           7   /         Y           Ú           ¤            f  
      interrupt-controller@b220000             2qcom,x1e80100-pdc qcom,pdc            –    "             @ ð       d      H  
[      à   *   *   û      /  
   4   c  a       ƒ  Í      �  0           ¾                         ©         f   ­      power-management@c300000          %   2qcom,x1e80100-aoss-qmp qcom,aoss-qmp             –    0                      1        E   1                   Œ   1                 Y             f   Ó      sram@c3f0000             2qcom,rpmh-stats          –    ?               arbiter@c400000          2qcom,x1e80100-spmi-pmic-arb       0   –    @        0     P       @      D                 ¯core chnls obsrvr           µ            
k                                      ú         f  c   spmi@c42d000              –    BÐ       @     L               
  ¯cnfg intr           )periph_irq          E   ­               ©        ¾                                      f  d   pmic@0           2qcom,pm8550 qcom,spmi-pmic           –                                           f  e   pon@1300             2qcom,pmk8350-pon             –            	  ¯hlos pbs             f  f   pwrkey           2qcom,pmk8350-pwrkey         Ü                     
x   t         f  g      resin            2qcom,pmk8350-resin          Ü                   	  #disabled             f  h         rtc@6100             2qcom,pmk8350-rtc             –  a   b       
  ¯rtc alarm           Ü       b               
ƒ         
‘         f  i      nvram@7100           2qcom,spmi-sdam           –  q                                  ú      q             f  j   reboot-reason@48             –   H           
¤               f  k         nvram@7e00           2qcom,spmi-sdam           –  ~                                  ú      ~             f  l   charge-limit-en@73           –   s            f  m      charge-limit-end@75          –   u            f  n      charge-limit-delta@76            –   v            f  o         gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio             –  ¸          n        Š                     ~            ©        ¾            f        pwm          2qcom,pmk8550-pwm            
©         	  #disabled             f  p         pmic@1           2qcom,pm8550 qcom,spmi-pmic           –                                          f  q   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü      
               G             f  °      gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio          –  ˆ          n        Š   �                   ~            ©        ¾            f   �   rtmr0-reset-n-active-state          –gpio10          ›normal          
´            ½         
Á         
Ï         f   �      usb0-3p3-reg-en-state           –gpio11          ›normal          
´            ½         
Á         
Ï         f  Î         led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led            –  î       	  #disabled             f  r      pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            
©         	  #disabled             f  s         pmic@2           2qcom,pm8550 qcom,spmi-pmic           –                                          f  t   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü      
               G             f  ±      gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio            –  ˆ          n        Š                      ~            ©        ¾            f            pmic@3           2qcom,pmc8380 qcom,spmi-pmic          –                                          f  u   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü      
               G             f  ²      gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio             –  ˆ          n        Š  !           
        ~            ©        ¾            f  !         pmic@4           2qcom,pmc8380 qcom,spmi-pmic          –                                          f  v   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü      
               G             f  ³      gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio             –  ˆ          n        Š  "           
        ~            ©        ¾            f  "         pmic@5           2qcom,pmc8380 qcom,spmi-pmic          –                                          f  w   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü      
               G             f  ´      gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio             –  ˆ          n        Š  #           
        ~            ©        ¾            f  #   usb0-pwr-1p15-en-state          –gpio8           ›normal          
´            ½         
Á         
Ï         f  Ì            pmic@6           2qcom,pmc8380 qcom,spmi-pmic          –                                          f  x   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü      
               G             f  µ      gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio             –  ˆ          n        Š  $           
        ~            ©        ¾            f  $         pmic@8           2qcom,pm8550 qcom,spmi-pmic           –                                          f  y   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü      
               G             f  ¶      gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio            –  ˆ          n        Š  %                   ~            ©        ¾            f  %         pmic@9           2qcom,pm8550 qcom,spmi-pmic           –   	                                       f  z   temp-alarm@a00           2qcom,spmi-temp-alarm             –  
         Ü   	   
               G             f  ·      gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio            –  ˆ          n        Š  &                   ~            ©        ¾            f  &   usb0-1p8-reg-en-state           –gpio8           ›normal          
´            ½         
Á         
Ï         f  Í            pmic@c           2qcom,pm8010 qcom,spmi-pmic           –                                       	  #disabled             f  {   temp-alarm@2400          2qcom,spmi-temp-alarm             –  $         Ü      $               G             f  ¸            spmi@c432000              –    C        @     M               
  ¯cnfg intr           )periph_irq          E   ­               ©        ¾                                      f  |   pmic@7           2qcom,smb2360 qcom,spmi-pmic          –                                         #okay             f  }   phy@fd00             2qcom,smb2360-eusb2-repeater          –  ý                     
Ý  '        
ê  (         f   °         pmic@a           2qcom,smb2360 qcom,spmi-pmic          –   
                                      #okay             f  ~   phy@fd00             2qcom,smb2360-eusb2-repeater          –  ý                     
Ý  '        
ê  )         f   µ         pmic@b           2qcom,smb2360 qcom,spmi-pmic          –                                         #okay             f     phy@fd00             2qcom,smb2360-eusb2-repeater          –  ý                     
Ý  '        
ê  *         f   º         pmic@c           2qcom,smb2360 qcom,spmi-pmic          –                                       	  #disabled             f  €   phy@fd00             2qcom,smb2360-eusb2-repeater          –  ý                      f  �               pinctrl@f100000          2qcom,x1e80100-tlmm           –           ð          Ü       Ð            n        ~            ©        ¾           Š   €           ï        
ö   ­           ,            f   €   edp0-hpd-default-state          –gpio119       	  ›edp0_hot             ½         f  ‚      qup-i2c0-data-clk-state         –gpio0 gpio1       	  ›qup0_se0            ¤             ˜         f   y      qup-i2c1-data-clk-state         –gpio4 gpio5       	  ›qup0_se1            ¤             ˜         f   |      qup-i2c2-data-clk-state         –gpio8 gpio9       	  ›qup0_se2            ¤             ˜         f   ‡      qup-i2c3-data-clk-state         –gpio12 gpio13         	  ›qup0_se3            ¤             ˜         f   ‹      qup-i2c4-data-clk-state         –gpio16 gpio17         	  ›qup0_se4            ¤             ˜         f   –      qup-i2c5-data-clk-state         –gpio20 gpio21         	  ›qup0_se5            ¤             ˜         f   ™      qup-i2c6-data-clk-state         –gpio24 gpio25         	  ›qup0_se6            ¤             ˜         f          qup-i2c7-data-clk-state         –gpio14 gpio15         	  ›qup0_se7            ¤             ˜         f   £      qup-i2c8-data-clk-state         –gpio32 gpio33         	  ›qup1_se0            ¤             ˜         f   _      qup-i2c9-data-clk-state         –gpio36 gpio37         	  ›qup1_se1            ¤             ˜         f   b      qup-i2c10-data-clk-state            –gpio40 gpio41         	  ›qup1_se2            ¤             ˜         f   e      qup-i2c11-data-clk-state            –gpio44 gpio45         	  ›qup1_se3            ¤             ˜         f   h      qup-i2c12-data-clk-state            –gpio48 gpio49         	  ›qup1_se4            ¤             ˜         f   k      qup-i2c13-data-clk-state            –gpio52 gpio53         	  ›qup1_se5            ¤             ˜         f   n      qup-i2c14-data-clk-state            –gpio56 gpio57         	  ›qup1_se6            ¤             ˜         f   q      qup-i2c15-data-clk-state            –gpio54 gpio55         	  ›qup1_se7            ¤             ˜         f   u      qup-i2c16-data-clk-state            –gpio64 gpio65         	  ›qup2_se0            ¤             ˜         f   B      qup-i2c17-data-clk-state            –gpio68 gpio69         	  ›qup2_se1            ¤             ˜         f   F      qup-i2c18-data-clk-state            –gpio72 gpio73         	  ›qup2_se2            ¤             ˜         f   I      qup-i2c19-data-clk-state            –gpio76 gpio77         	  ›qup2_se3            ¤             ˜         f   M      qup-i2c20-data-clk-state            –gpio80 gpio81         	  ›qup2_se4            ¤             ˜         f   P      qup-i2c21-data-clk-state            –gpio84 gpio85         	  ›qup2_se5            ¤             ˜         f   S      qup-i2c22-data-clk-state            –gpio88 gpio89         	  ›qup2_se6            ¤             ˜         f   W      qup-i2c23-data-clk-state            –gpio86 gpio87         	  ›qup2_se7            ¤             ˜         f   Z      qup-spi0-cs-state           –gpio3         	  ›qup0_se0            ¤            ½         f   {      qup-spi0-data-clk-state         –gpio0 gpio1 gpio2         	  ›qup0_se0            ¤            ½         f   z      qup-spi1-cs-state           –gpio7         	  ›qup0_se1            ¤            ½         f   †      qup-spi1-data-clk-state         –gpio4 gpio5 gpio6         	  ›qup0_se1            ¤            ½         f   …      qup-spi2-cs-state           –gpio11        	  ›qup0_se2            ¤            ½         f   Š      qup-spi2-data-clk-state         –gpio8 gpio9 gpio10        	  ›qup0_se2            ¤            ½         f   ‰      qup-spi3-cs-state           –gpio15        	  ›qup0_se3            ¤            ½         f   •      qup-spi3-data-clk-state         –gpio12 gpio13 gpio14          	  ›qup0_se3            ¤            ½         f   ”      qup-spi4-cs-state           –gpio19        	  ›qup0_se4            ¤            ½         f   ˜      qup-spi4-data-clk-state         –gpio16 gpio17 gpio18          	  ›qup0_se4            ¤            ½         f   —      qup-spi5-cs-state           –gpio23        	  ›qup0_se5            ¤            ½         f   Ÿ      qup-spi5-data-clk-state         –gpio20 gpio21 gpio22          	  ›qup0_se5            ¤            ½         f   ž      qup-spi6-cs-state           –gpio27        	  ›qup0_se6            ¤            ½         f   ¢      qup-spi6-data-clk-state         –gpio24 gpio25 gpio26          	  ›qup0_se6            ¤            ½         f   ¡      qup-spi7-cs-state           –gpio13        	  ›qup0_se7            ¤            ½         f   ¬      qup-spi7-data-clk-state         –gpio14 gpio15 gpio12          	  ›qup0_se7            ¤            ½         f   «      qup-spi8-cs-state           –gpio35        	  ›qup1_se0            ¤            ½         f   a      qup-spi8-data-clk-state         –gpio32 gpio33 gpio34          	  ›qup1_se0            ¤            ½         f   `      qup-spi9-cs-state           –gpio39        	  ›qup1_se1            ¤            ½         f   d      qup-spi9-data-clk-state         –gpio36 gpio37 gpio38          	  ›qup1_se1            ¤            ½         f   c      qup-spi10-cs-state          –gpio43        	  ›qup1_se2            ¤            ½         f   g      qup-spi10-data-clk-state            –gpio40 gpio41 gpio42          	  ›qup1_se2            ¤            ½         f   f      qup-spi11-cs-state          –gpio47        	  ›qup1_se3            ¤            ½         f   j      qup-spi11-data-clk-state            –gpio44 gpio45 gpio46          	  ›qup1_se3            ¤            ½         f   i      qup-spi12-cs-state          –gpio51        	  ›qup1_se4            ¤            ½         f   m      qup-spi12-data-clk-state            –gpio48 gpio49 gpio50          	  ›qup1_se4            ¤            ½         f   l      qup-spi13-cs-state          –gpio55        	  ›qup1_se5            ¤            ½         f   p      qup-spi13-data-clk-state            –gpio52 gpio53 gpio54          	  ›qup1_se5            ¤            ½         f   o      qup-spi14-cs-state          –gpio59        	  ›qup1_se6            ¤            ½         f   s      qup-spi14-data-clk-state            –gpio56 gpio57 gpio58          	  ›qup1_se6            ¤            ½         f   r      qup-spi15-cs-state          –gpio53        	  ›qup1_se7            ¤            ½         f   w      qup-spi15-data-clk-state            –gpio54 gpio55 gpio52          	  ›qup1_se7            ¤            ½         f   v      qup-spi16-cs-state          –gpio67        	  ›qup2_se0            ¤            ½         f   E      qup-spi16-data-clk-state            –gpio64 gpio65 gpio66          	  ›qup2_se0            ¤            ½         f   D      qup-spi17-cs-state          –gpio71        	  ›qup2_se1            ¤            ½         f   H      qup-spi17-data-clk-state            –gpio68 gpio69 gpio70          	  ›qup2_se1            ¤            ½         f   G      qup-spi18-cs-state          –gpio75        	  ›qup2_se2            ¤            ½         f   L      qup-spi18-data-clk-state            –gpio72 gpio73 gpio74          	  ›qup2_se2            ¤            ½         f   K      qup-spi19-cs-state          –gpio79        	  ›qup2_se3            ¤            ½         f   O      qup-spi19-data-clk-state            –gpio76 gpio77 gpio78          	  ›qup2_se3            ¤            ½         f   N      qup-spi20-cs-state          –gpio83        	  ›qup2_se4            ¤            ½         f   R      qup-spi20-data-clk-state            –gpio80 gpio81 gpio82          	  ›qup2_se4            ¤            ½         f   Q      qup-spi21-cs-state          –gpio87        	  ›qup2_se5            ¤            ½         f   U      qup-spi21-data-clk-state            –gpio84 gpio85 gpio86          	  ›qup2_se5            ¤            ½         f   T      qup-spi22-cs-state          –gpio91        	  ›qup2_se6            ¤            ½         f   Y      qup-spi22-data-clk-state            –gpio88 gpio89 gpio90          	  ›qup2_se6            ¤            ½         f   X      qup-spi23-cs-state          –gpio85        	  ›qup2_se7            ¤            ½         f   \      qup-spi23-data-clk-state            –gpio86 gpio87 gpio84          	  ›qup2_se7            ¤            ½         f   [      qup-uart2-default-state          f   ˆ   cts-pins            –gpio8         	  ›qup0_se2            ¤            ½      rts-pins            –gpio9         	  ›qup0_se2            ¤            ½      tx-pins         –gpio10        	  ›qup0_se2            ¤            ½      rx-pins         –gpio11        	  ›qup0_se2            ¤            ½         qup-uart14-default-state             f   t   cts-pins            –gpio56        	  ›qup1_se6             Ê      rts-pins            –gpio57        	  ›qup1_se6            ¤            ½      tx-pins         –gpio58        	  ›qup1_se6            ¤            ½      rx-pins         –gpio59        	  ›qup1_se6                      qup-uart21-default-state             f   V   tx-pins         –gpio86        	  ›qup2_se5            ¤            ½      rx-pins         –gpio87        	  ›qup2_se5            ¤            ½         sdc2-default-state           f   è   clk-pins          	  –sdc2_clk            ¤            ½      cmd-pins          	  –sdc2_cmd            ¤   
               data-pins         
  –sdc2_data           ¤   
                  sdc2-sleep-state             f   ê   clk-pins          	  –sdc2_clk            ¤            ½      cmd-pins          	  –sdc2_cmd            ¤                  data-pins         
  –sdc2_data           ¤                     eusb3-reset-n-state         –gpio6           ›gpio            ¤            ½         &         f   œ      eusb6-reset-n-state         –gpio184         ›gpio            ¤            ½         &         f   �      nvme-reg-en-state           –gpio18          ›gpio            ¤            ½         f  Ë      pcie4-default-state          f   Ë   clkreq-n-pins           –gpio147       
  ›pcie4_clk           ¤                  perst-n-pins            –gpio146         ›gpio            ¤            ½      wake-n-pins         –gpio148         ›gpio            ¤                     pcie5-default-state          f   È   clkreq-n-pins           –gpio150       
  ›pcie5_clk           ¤                  perst-n-pins            –gpio149         ›gpio            ¤            ½      wake-n-pins         –gpio151         ›gpio            ¤                     pcie6a-default-state             f   Å   clkreq-n-pins           –gpio153         ›pcie6a_clk          ¤                  perst-n-pins            –gpio152         ›gpio            ¤            ½      wake-n-pins         –gpio154         ›gpio            ¤                     rtmr1-reset-n-active-state          –gpio176         ›gpio            ¤            ½         f   §      rtmr2-reset-n-active-state          –gpio185         ›gpio            ¤            ½         f   �      rtmr1-1p15-reg-en-state         –gpio188         ›gpio            ¤            ½         f  Ï      rtmr1-1p8-reg-en-state          –gpio175         ›gpio            ¤            ½         f  Ð      rtmr1-3p3-reg-en-state          –gpio186         ›gpio            ¤            ½         f  Ñ      rtmr2-1p15-reg-en-state         –gpio189         ›gpio            ¤            ½         f  Ò      rtmr2-1p8-reg-en-state          –gpio126         ›gpio            ¤            ½         f  Ó      rtmr2-3p3-reg-en-state          –gpio187         ›gpio            ¤            ½         f  Ô      sdc2-card-det-state         –gpio71          ›gpio            ¤                     f   é      wcd-reset-n-active-state            –gpio191         ›gpio            ¤            ½         &         f  ¹      wwan-sw-en-state            –gpio221         ›gpio            ¤            ½         f  Õ         stm@10002000              2arm,coresight-stm arm,primecell           –                  (                 ¯stm-base stm-stimulus-base           n   Ó      	  *apb_pclk       out-ports      port       endpoint            ^  +         f  2               tpdm@10003000         "   2qcom,coresight-tpdm arm,primecell            –     0                 n   Ó      	  *apb_pclk            1            G          	  #disabled       out-ports      port       endpoint            ^  ,         f  -               tpda@10004000         "   2qcom,coresight-tpda arm,primecell            –     @                 n   Ó      	  *apb_pclk       in-ports                                 port@0           –       endpoint            ^  -         f  ,         port@1           –      endpoint            ^  .         f  0            out-ports      port       endpoint            ^  /         f  1               tpdm@1000f000         "   2qcom,coresight-tpdm arm,primecell            –     ð                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  0         f  .               funnel@10041000       +   2arm,coresight-dynamic-funnel arm,primecell           –                     n   Ó      	  *apb_pclk       in-ports                                 port@6           –      endpoint            ^  1         f  /         port@7           –      endpoint            ^  2         f  +            out-ports      port       endpoint            ^  3         f  8               funnel@10042000       +   2arm,coresight-dynamic-funnel arm,primecell           –                      n   Ó      	  *apb_pclk       in-ports                                 port@2           –      endpoint            ^  4         f  ~         port@5           –      endpoint            ^  5         f  H         port@6           –      endpoint            ^  6         f  p            out-ports      port       endpoint            ^  7         f  9               funnel@10045000       +   2arm,coresight-dynamic-funnel arm,primecell           –    P                 n   Ó      	  *apb_pclk       in-ports                                 port@0           –       endpoint            ^  8         f  3         port@1           –      endpoint            ^  9         f  7            out-ports      port       endpoint            ^  :         f  K               tpdm@10800000         "   2qcom,coresight-tpdm arm,primecell            –    €                  n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  ;         f  t               tpdm@1082c000         "   2qcom,coresight-tpdm arm,primecell            –    ‚À                 n   Ó      	  *apb_pclk            Y            o       out-ports      port       endpoint            ^  <         f  i               tpdm@10841000         "   2qcom,coresight-tpdm arm,primecell            –    „                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  =         f  g               tpdm@10844000         "   2qcom,coresight-tpdm arm,primecell            –    „@                 n   Ó      	  *apb_pclk            Y            o       out-ports      port       endpoint            ^  >         f  ?               funnel@10846000       +   2arm,coresight-dynamic-funnel arm,primecell           –    „`                 n   Ó      	  *apb_pclk       in-ports       port       endpoint            ^  ?         f  >            out-ports      port       endpoint            ^  @         f  f               cti@1098b000              2arm,coresight-cti arm,primecell          –    ˜°                 n   Ó      	  *apb_pclk          tpdm@109d0000         "   2qcom,coresight-tpdm arm,primecell            –    �                  n   Ó      	  *apb_pclk            Y            o          	  #disabled       out-ports      port       endpoint            ^  A         f  h               tpdm@10ac0000         "   2qcom,coresight-tpdm arm,primecell            –    ¬                  n   Ó      	  *apb_pclk            Y            o          	  #disabled       out-ports      port       endpoint            ^  B         f  D               tpdm@10ac1000         "   2qcom,coresight-tpdm arm,primecell            –    ¬                 n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  C         f  E               tpda@10ac4000         "   2qcom,coresight-tpda arm,primecell            –    ¬@                 n   Ó      	  *apb_pclk       in-ports                                 port@8           –      endpoint            ^  D         f  B         port@9           –   	   endpoint            ^  E         f  C            out-ports      port       endpoint            ^  F         f  G               funnel@10ac5000       +   2arm,coresight-dynamic-funnel arm,primecell           –    ¬P                 n   Ó      	  *apb_pclk       in-ports       port       endpoint            ^  G         f  F            out-ports      port       endpoint            ^  H         f  5               funnel@10b04000       +   2arm,coresight-dynamic-funnel arm,primecell           –    °@                 n   Ó      	  *apb_pclk       in-ports                                 port@3           –      endpoint            ^  I         f  `         port@6           –      endpoint            ^  J         f  V         port@7           –      endpoint            ^  K         f  :            out-ports      port       endpoint            ^  L         f  M               tmc@10b05000              2arm,coresight-tmc arm,primecell          –    °P                 n   Ó      	  *apb_pclk             f  ƒ   in-ports       port       endpoint            ^  M         f  L            out-ports      port       endpoint            ^  N         f  O               replicator@10b06000       /   2arm,coresight-dynamic-replicator arm,primecell           –    °`                 n   Ó      	  *apb_pclk       in-ports       port       endpoint            ^  O         f  N            out-ports      port       endpoint            ^  P         f                  tpda@10b08000         "   2qcom,coresight-tpda arm,primecell            –    °€                 n   Ó      	  *apb_pclk       in-ports                                 port@0           –       endpoint            ^  Q         f  W         port@1           –      endpoint            ^  R         f  X         port@2           –      endpoint            ^  S         f  Y         port@3           –      endpoint            ^  T         f  Z         port@4           –      endpoint            ^  U         f  [            out-ports      port       endpoint            ^  V         f  J               tpdm@10b09000         "   2qcom,coresight-tpdm arm,primecell            –    °�                 n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  W         f  Q               tpdm@10b0a000         "   2qcom,coresight-tpdm arm,primecell            –    °                  n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  X         f  R               tpdm@10b0b000         "   2qcom,coresight-tpdm arm,primecell            –    °°                 n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  Y         f  S               tpdm@10b0c000         "   2qcom,coresight-tpdm arm,primecell            –    °À                 n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  Z         f  T               tpdm@10b0d000         "   2qcom,coresight-tpdm arm,primecell            –    °Ð                 n   Ó      	  *apb_pclk            Y            o       out-ports      port       endpoint            ^  [         f  U               tpdm@10b20000         "   2qcom,coresight-tpdm arm,primecell            –    ²                  n   Ó      	  *apb_pclk            Y            o          	  #disabled       out-ports      port       endpoint            ^  \         f  ]               tpda@10b23000         "   2qcom,coresight-tpda arm,primecell            –    ²0                 n   Ó      	  *apb_pclk          	  #disabled       in-ports       port       endpoint            ^  ]         f  \            out-ports      port       endpoint            ^  ^         f  _               funnel@10b24000       +   2arm,coresight-dynamic-funnel arm,primecell           –    ²@                 n   Ó      	  *apb_pclk          	  #disabled       in-ports       port       endpoint            ^  _         f  ^            out-ports      port       endpoint            ^  `         f  I               tpdm@10c08000         "   2qcom,coresight-tpdm arm,primecell            –    À€                 n   Ó      	  *apb_pclk            Y            o       out-ports      port       endpoint            ^  a         f  b               funnel@10c0b000       +   2arm,coresight-dynamic-funnel arm,primecell           –    À°                 n   Ó      	  *apb_pclk       in-ports                                 port@4           –      endpoint            ^  b         f  a            out-ports      port       endpoint            ^  c         f  s               tpdm@10c28000         "   2qcom,coresight-tpdm arm,primecell            –    Â€                 n   Ó      	  *apb_pclk            Y            o       out-ports      port       endpoint            ^  d         f  j               tpdm@10c29000         "   2qcom,coresight-tpdm arm,primecell            –    Â�                 n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  e         f  k               tpda@10c2b000         "   2qcom,coresight-tpda arm,primecell            –    Â°                 n   Ó      	  *apb_pclk       in-ports                                 port@4           –      endpoint            ^  f         f  @         port@13          –      endpoint            ^  g         f  =         port@14          –      endpoint            ^  h         f  A         port@15          –      endpoint            ^  i         f  <         port@1a          –      endpoint            ^  j         f  d         port@1b          –      endpoint            ^  k         f  e            out-ports      port       endpoint            ^  l         f  m               funnel@10c2c000       +   2arm,coresight-dynamic-funnel arm,primecell           –    ÂÀ                 n   Ó      	  *apb_pclk       in-ports                                 port@0           –       endpoint            ^  m         f  l         port@4           –      endpoint            ^  n         f  y         port@5           –      endpoint            ^  o         f  €            out-ports      port       endpoint            ^  p         f  6               tpdm@10c38000         "   2qcom,coresight-tpdm arm,primecell            –    Ã€                 n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  q         f  u               tpdm@10c39000         "   2qcom,coresight-tpdm arm,primecell            –    Ã�                 n   Ó      	  *apb_pclk            1   @        G       out-ports      port       endpoint            ^  r         f  v               tpda@10c3c000         "   2qcom,coresight-tpda arm,primecell            –    ÃÀ                 n   Ó      	  *apb_pclk       in-ports                                 port@4           –      endpoint            ^  s         f  c         port@f           –      endpoint            ^  t         f  ;         port@10          –      endpoint            ^  u         f  q         port@11          –      endpoint            ^  v         f  r            out-ports      port       endpoint            ^  w         f  x               funnel@10c3d000       +   2arm,coresight-dynamic-funnel arm,primecell           –    ÃÐ                 n   Ó      	  *apb_pclk       in-ports       port       endpoint            ^  x         f  w            out-ports      port       endpoint            ^  y         f  n               tpdm@10cc1000         "   2qcom,coresight-tpdm arm,primecell            –    Ì                 n   Ó      	  *apb_pclk            1   @        G            Y            o          	  #disabled       out-ports      port       endpoint            ^  z         f  {               tpda@10cc4000         "   2qcom,coresight-tpda arm,primecell            –    Ì@                 n   Ó      	  *apb_pclk       in-ports                                 port@2           –      endpoint            ^  {         f  z            out-ports      port       endpoint            ^  |         f  }               funnel@10cc5000       +   2arm,coresight-dynamic-funnel arm,primecell           –    ÌP                 n   Ó      	  *apb_pclk       in-ports       port       endpoint            ^  }         f  |            out-ports      port       endpoint            ^  ~         f  4               funnel@10d04000       +   2arm,coresight-dynamic-funnel arm,primecell           –    Ð@                 n   Ó      	  *apb_pclk       in-ports                                 port@6           –      endpoint            ^           f  “            out-ports      port       endpoint            ^  €         f  o               tpdm@10d08000         "   2qcom,coresight-tpdm arm,primecell            –    Ð€                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  �         f  ‰               tpdm@10d09000         "   2qcom,coresight-tpdm arm,primecell            –    Ð�                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  ‚         f  Š               tpdm@10d0a000         "   2qcom,coresight-tpdm arm,primecell            –    Ð                  n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  ƒ         f  ‹               tpdm@10d0b000         "   2qcom,coresight-tpdm arm,primecell            –    Ð°                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  „         f  Œ               tpdm@10d0c000         "   2qcom,coresight-tpdm arm,primecell            –    ÐÀ                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  …         f  �               tpdm@10d0d000         "   2qcom,coresight-tpdm arm,primecell            –    ÐÐ                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  †         f  Ž               tpdm@10d0e000         "   2qcom,coresight-tpdm arm,primecell            –    Ðà                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  ‡         f  �               tpdm@10d0f000         "   2qcom,coresight-tpdm arm,primecell            –    Ðð                 n   Ó      	  *apb_pclk            1            G       out-ports      port       endpoint            ^  ˆ         f  �               tpda@10d12000         "   2qcom,coresight-tpda arm,primecell            –    Ñ                  n   Ó      	  *apb_pclk       in-ports                                 port@0           –       endpoint            ^  ‰         f  �         port@1           –      endpoint            ^  Š         f  ‚         port@2           –      endpoint            ^  ‹         f  ƒ         port@3           –      endpoint            ^  Œ         f  „         port@4           –      endpoint            ^  �         f  …         port@5           –      endpoint            ^  Ž         f  †         port@6           –      endpoint            ^  �         f  ‡         port@7           –      endpoint            ^  �         f  ˆ            out-ports      port       endpoint            ^  ‘         f  ’               funnel@10d13000       +   2arm,coresight-dynamic-funnel arm,primecell           –    Ñ0                 n   Ó      	  *apb_pclk       in-ports       port       endpoint            ^  ’         f  ‘            out-ports      port       endpoint            ^  “         f                 iommu@15000000        1   2qcom,x1e80100-smmu-500 qcom,smmu-500 arm,mmu-500             –                   Œ  Ü       A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v          µ          ¶          ·          ¸          ¹          º          »          ¼          ½          ¾          ¿          À         ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y         ‹         Œ         �         Ž         �         �         ‘         ’         “         ”         •         –         —         ˜         ™         ¢         £         œ         ¥         Ã         §         ¨         ©         ²         ³         ´         µ         ¶         ·         ¸         ¹           |           ‰            Ã         f   <      iommu@15400000           2arm,smmu-v3          –    @                 |         $  Ü       Š          †          ˆ           )eventq gerror cmdq-sync          Ã      	  #reserved             f  „      interrupt-controller@17000000            2arm,gic-v3            –                         0          Ü      	           ¾            ©        �           ˜                                         ú         f      msi-controller@17040000          2arm,gic-v3-its           –                      ­        ¼            f   Á         watchdog@17410000         %   2qcom,apss-wdt-x1e80100 qcom,kpss-wdt             –    A                  n   3        Ü                 	  #reserved             f  …      mailbox@17430000             2qcom,x1e80100-cpucp-mbox              –    C             ƒ                 Ü                  ç            f   #      rsc@17500000             2qcom,rpmh-rsc         0   –    P             Q             R                 ¯drv-0 drv-1 drv-2         $  Ü                                      Ç           ×            ã                                	  Ãapps_rsc             ¹   -         f  †   bcm-voter            2qcom,bcm-voter           f   &      clock-controller             2qcom,x1e80100-rpmh-clk           n  ”        *xo           Y            f         power-controller             2qcom,x1e80100-rpmhpd            p  •        ¤            f   ;   opp-table            2operating-points-v2          f  •   opp-16          `            f  ‡      opp-48          `   0         f   í      opp-52          `   4         f  ˆ      opp-56          `   8         f        opp-60          `   <         f  ‰      opp-64          `   @         f   /      opp-80          `   P         f  Š      opp-128         `   €         f   0      opp-144         `   �         f  ‹      opp-192         `   À         f   î      opp-256         `            f   Ã      opp-320         `  @         f        opp-336         `  P         f  Œ      opp-384         `  €         f  	      opp-416         `            f  �            regulators-0             2qcom,pm8550-rpmh-regulators         ób              –          –           —        5  ˜        K  ˜        ]  ™        n  ˜          š        Ž  —        �  ™   bob1          
  ¬vreg_bob1           » -æ         Ó <lÀ        ë            f  ˜      bob2          
  ¬vreg_bob2           » &5@        Ó -æ         ë            f  ™      ldo1            ¬vreg_l1b_1p8            » w@        Ó w@        ë            f  Ž      ldo2            ¬vreg_l2b_3p0            » .à         Ó /M`        ë            f  (      ldo4            ¬vreg_l4b_1p8            » w@        Ó w@        ë            f   ›      ldo5            ¬vreg_l5b_3p0            » -ÆÀ        Ó -ÆÀ        ë            f  �      ldo6            ¬vreg_l6b_1p8            » w@        Ó -*€        ë            f   ì      ldo7            ¬vreg_l7b_2p8            » *¹€        Ó *¹€        ë            f  �      ldo8            ¬vreg_l8b_3p0            » .à         Ó .à         ë            f  *      ldo9            ¬vreg_l9b_2p9            » -*€        Ó -*€        ë            f   ë      ldo10           ¬vreg_l10b_1p8           » w@        Ó w@        ë            f  ‘      ldo12           ¬vreg_l12b_1p2           » O€        Ó O€        ë                     f  ’      ldo13           ¬vreg_l13b_3p0           » .à         Ó /M`        ë            f   š      ldo14           ¬vreg_l14b_3p0           » .à         Ó .à         ë            f  )      ldo15           ¬vreg_l15b_1p8           » w@        Ó w@        ë                     f  ¼      ldo16           ¬vreg_l16b_2p9           » ,o         Ó ,o         ë            f  “      ldo17           ¬vreg_l17b_2p5           » &5@        Ó &5@        ë            f  ”         regulators-1             2qcom,pm8550ve-rpmh-regulators           óc             š        $  ›        2  ›        @  –   smps4           ¬vreg_s4c_1p8            » R         Ó „€        ë            f  —      ldo1            ¬vreg_l1c_1p2            » O€        Ó O€        ë            f  •      ldo2            ¬vreg_l2c_0p8            » m€        Ó 	À        ë            f  –      ldo3            ¬vreg_l3c_0p8            » m€        Ó 	À        ë            f   ó         regulators-2             2qcom,pmc8380-rpmh-regulators            ód             ›        $  ›        2  —        N  –   ldo1            ¬vreg_l1d_0p8            » m€        Ó 	À        ë            f   Æ      ldo2            ¬vreg_l2d_0p9            » ê€        Ó 	À        ë            f   ¶      ldo3            ¬vreg_l3d_1p8            » w@        Ó w@        ë            f  '         regulators-3             2qcom,pmc8380-rpmh-regulators            óe           $  ›        2  š   ldo2            ¬vreg_l2e_0p8            » m€        Ó 	À        ë            f   ð      ldo3            ¬vreg_l3e_1p2            » O€        Ó O€        ë            f   Ê         regulators-4             2qcom,pmc8380-rpmh-regulators            óf             š        $  š        2  š        N  –   smps1           ¬vreg_s1f_0p7            » 
®`        Ó Èà        ë            f  ›      ldo1            ¬vreg_l1f_1p0            »           Ó           ë            f  —      ldo2            ¬vreg_l2f_1p0            »           Ó           ë            f  ˜      ldo3            ¬vreg_l3f_1p0            »           Ó           ë            f  ™         regulators-6             2qcom,pm8550ve-rpmh-regulators           ói             —        $  š        2  ›        N  –        \  –   smps1           ¬vreg_s1i_0p9            » »         Ó 	À        ë            f  š      smps2           ¬vreg_s2i_1p0            » B@        Ó Èà        ë            f  ›      ldo1            ¬vreg_l1i_1p8            » w@        Ó w@        ë            f  œ      ldo2            ¬vreg_l2i_1p2            » O€        Ó O€        ë            f  �      ldo3            ¬vreg_l3i_0p8            » m€        Ó 	À        ë            f   É         regulators-7             2qcom,pm8550ve-rpmh-regulators           ój             ›        $  š        2  ›        j  –   smps5           ¬vreg_s5j_1p2            » *@        Ó åÀ        ë            f  š      ldo1            ¬vreg_l1j_0p8            » m€        Ó 	À        ë            f   ±      ldo2            ¬vreg_l2j_1p2            » *@        Ó *@        ë            f   ¯      ldo3            ¬vreg_l3j_0p8            » m€        Ó 	À        ë            f   ®            timer@17800000           2arm,armv7-timer-mem          –    €                                          ú                       frame@17801000           –    €        €             Ü                            x          frame@17803000           –    €0            Ü       	           x         	  #disabled          frame@17805000           –    €P            Ü       
           x         	  #disabled          frame@17807000           –    €p            Ü                  x         	  #disabled          frame@17809000           –    €�            Ü                  x         	  #disabled          frame@1780b000           –    €°            Ü                  x         	  #disabled          frame@1780d000           –    €Ð            Ü                  x         	  #disabled             sram@18b4e000         
   2mmio-sram            –    ´à                                         ú        ´à             f  ž   scp-sram-section@0           2arm,scmi-shmem           –                f   $      scp-sram-section@200             2arm,scmi-shmem           –               f   %         watchdog@1c840000            2arm,sbsa-gwdt             –    „             …                 Ü                    f  Ÿ      efuse@221c8000        !   2qcom,x1e80100-qfprom qcom,qfprom             –    "€                                          f      gpu-speed-bin@119            –             
¤               f   Ð         pmu@24091000          0   2qcom,x1e80100-llcc-bwmon qcom,sc7280-llcc-bwmon          –    $	                Ü       Q           n   !          !              p  œ   opp-table            2operating-points-v2          f  œ   opp-0           R 5       opp-1           R !bà      opp-2           R .à       opp-3           R ^ì       opp-4           R hL       opp-5           R ¼       opp-6           R ¦þ       opp-7           R Âˆ       opp-8           R á        opp-9           RÐ             pmu@240b3400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon            –    $4                Ü      E           n   ?         ?              p  �         f  ¡      pmu@240b5400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon            –    $T                Ü      E           n   ?         ?              p  �         f  ¢   opp-table            2operating-points-v2          f  �   opp-0           R I>       opp-1           R qä@      opp-2           R ’|       opp-3           R ÄÇ       opp-4           R ãÈ€      opp-5           R`@            pmu@240b6400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon            –    $d                Ü      E           n   ?         ?              p  �      system-cache-controller@25000000             2qcom,x1e80100-llcc            –    %               %               %@              %`              %€              %               %À              %à              &               &                 „  ¯llcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base llcc_broadcast_and_base         Ü      
         remoteproc@32300000          2qcom,x1e80100-cdsp-pas           –    20               @  E         B     ž         ž        ž        ž            #  )wdog fatal ready handover stop-ack           n               *xo           ¹   ;       ;   
   ;            Çcx mxc nsp          n  Ÿ          !              3     ¡        s   Ó        œ  ¢            ­stop            #okay          _  Aqcom/x1e80100/Thundercomm/DEVKIT/qccdsp8380.mbn qcom/x1e80100/Thundercomm/DEVKIT/cdsp_dtbs.elf           f  £   glink-edge          E   1                  Œ   1               Ãcdsp            r      fastrpc          2qcom,fastrpc            Éfastrpcglink-apps-dsp           Ãcdsp             Ý                             compute-cb@1             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@2             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@3             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@4             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@5             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@6             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@7             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@8             2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@10            2qcom,fastrpc-compute-cb          –   
           <               Ã      compute-cb@11            2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@12            2qcom,fastrpc-compute-cb          –              <               Ã      compute-cb@13            2qcom,fastrpc-compute-cb          –              <               Ã                  timer            2arm,armv8-timer       0  Ü                                 
         thermal-zones            f  ¤   aoss0-thermal           …  £       trips      trip-point0         • _�        ¡  Ð         ‘hot       aoss0-critical          • Á8        ¡  è      	   ‘critical                cpu0-0-top-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu0-0-btm-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu0-1-top-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu0-1-btm-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu0-2-top-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu0-2-btm-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu0-3-top-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu0-3-btm-thermal          …  £      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpuss0-top-thermal          …  £   	   trips      cpuss2-critical         • Á8        ¡  è      	   ‘critical                cpuss0-btm-thermal          …  £   
   trips      cpuss2-critical         • Á8        ¡  è      	   ‘critical                mem-thermal         …  £      trips      trip-point0         • _�        ¡  Ð         ‘hot       mem-critical            • Á8        ¡          	   ‘critical                video-thermal           …  £      trips      trip-point0         • _�        ¡  Ð         ‘hot       video-critical          • Á8        ¡  è      	   ‘critical                aoss1-thermal           …  ¤       trips      trip-point0         • _�        ¡  Ð         ‘hot       aoss0-critical          • Á8        ¡  è      	   ‘critical                cpu1-0-top-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu1-0-btm-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu1-1-top-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu1-1-btm-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu1-2-top-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu1-2-btm-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu1-3-top-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu1-3-btm-thermal          …  ¤      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpuss1-top-thermal          …  ¤   	   trips      cpuss2-critical         • Á8        ¡  è      	   ‘critical                cpuss1-btm-thermal          …  ¤   
   trips      cpuss2-critical         • Á8        ¡  è      	   ‘critical                aoss2-thermal           …  ¥       trips      trip-point0         • _�        ¡  Ð         ‘hot       aoss0-critical          • Á8        ¡  è      	   ‘critical                cpu2-0-top-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu2-0-btm-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu2-1-top-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu2-1-btm-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu2-2-top-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu2-2-btm-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu2-3-top-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpu2-3-btm-thermal          …  ¥      trips      cpu-critical            • Á8        ¡  è      	   ‘critical                cpuss2-top-thermal          …  ¥   	   trips      cpuss2-critical         • Á8        ¡  è      	   ‘critical                cpuss2-btm-thermal          …  ¥   
   trips      cpuss2-critical         • Á8        ¡  è      	   ‘critical                aoss3-thermal           …  ¦       trips      trip-point0         • _�        ¡  Ð         ‘hot       aoss0-critical          • Á8        ¡  è      	   ‘critical                nsp0-thermal            …  ¦      trips      trip-point0         • _�        ¡  Ð         ‘hot       nsp0-critical           • Á8        ¡  è      	   ‘critical                nsp1-thermal            …  ¦      trips      trip-point0         • _�        ¡  Ð         ‘hot       nsp1-critical           • Á8        ¡  è      	   ‘critical                nsp2-thermal            …  ¦      trips      trip-point0         • _�        ¡  Ð         ‘hot       nsp2-critical           • Á8        ¡  è      	   ‘critical                nsp3-thermal            …  ¦      trips      trip-point0         • _�        ¡  Ð         ‘hot       nsp3-critical           • Á8        ¡  è      	   ‘critical                gpuss-0-thermal         ¬   È        …  ¦      cooling-maps       map0            Â  §        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  §      gpu-critical            • Á8        ¡  è      	   ‘critical                gpuss-1-thermal         ¬   È        …  ¦      cooling-maps       map0            Â  ©        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  ©      gpu-critical            • Á8        ¡  è      	   ‘critical                gpuss-2-thermal         ¬   È        …  ¦      cooling-maps       map0            Â  ª        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  ª      gpu-critical            • Á8        ¡  è      	   ‘critical                gpuss-3-thermal         ¬   È        …  ¦      cooling-maps       map0            Â  «        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  «      gpu-critical            • Á8        ¡  è      	   ‘critical                gpuss-4-thermal         ¬   È        …  ¦   	   cooling-maps       map0            Â  ¬        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  ¬      gpu-critical            • Á8        ¡  è      	   ‘critical                gpuss-5-thermal         ¬   È        …  ¦   
   cooling-maps       map0            Â  ­        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  ­      gpu-critical            • Á8        ¡  è      	   ‘critical                gpuss-6-thermal         ¬   È        …  ¦      cooling-maps       map0            Â  ®        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  ®      gpu-critical            • Á8        ¡  è      	   ‘critical                gpuss-7-thermal         ¬   È        …  ¦      cooling-maps       map0            Â  ¯        Ç  ¨ÿÿÿÿÿÿÿÿ         trips      trip-point0         • s        ¡  è         ‘passive          f  ¯      gpu-critical            • Á8        ¡  è      	   ‘critical                camera0-thermal         …  ¦      trips      trip-point0         • _�        ¡  Ð         ‘hot       camera0-critical            • Á8        ¡  è      	   ‘critical                camera1-thermal         …  ¦      trips      trip-point0         • _�        ¡  Ð         ‘hot       camera0-critical            • Á8        ¡  è      	   ‘critical                pm8550-thermal          ¬   d        …  °   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pm8550ve-2-thermal          ¬   d        …  ±   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pmc8380-3-thermal           ¬   d        …  ²   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pmc8380-4-thermal           ¬   d        …  ³   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pmc8380-5-thermal           ¬   d        …  ´   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pmc8380-6-thermal           ¬   d        …  µ         f  ¥   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pm8550ve-8-thermal          ¬   d        …  ¶   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pm8550ve-9-thermal          ¬   d        …  ·   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot             pm8010-thermal          ¬   d        …  ¸   trips      trip0           • s        ¡             ‘passive       trip1           • Á8        ¡             ‘hot                aliases       $  Ö/soc@0/geniqup@8c0000/serial@894000       audio-codec          2qcom,wcd9385-codec          bdefault         X  ¹        Þ w@        ö w@         w@        & w@         > $ø Ið �È ¡  ¡  ¡  ¡  ¡         e ð         Œ  ÃP        µ  º        Ä  »        Ô   €   ¿           Ó  ¼        ã  ¼        ó  ¼          ˜                    f  Ç      pmic-glink        @   2qcom,x1e80100-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink                                 $     €   y       €   {       €   }       connector@0          2usb-c-connector          –            'dual            2dual       ports                                port@0           –       endpoint            ^  ½         f   ÿ         port@1           –      endpoint            ^  ¾         f   ‘         port@2           –      endpoint            ^  ¿         f   “               connector@1          2usb-c-connector          –           'dual            2host       ports                                port@0           –       endpoint            ^  À         f           port@1           –      endpoint            ^  Á         f   ¨         port@2           –      endpoint            ^  Â         f   ª               connector@2          2usb-c-connector          –           'dual            2host       ports                                port@0           –       endpoint            ^  Ã         f   ö         port@1           –      endpoint            ^  Ä         f   ‚         port@2           –      endpoint            ^  Å         f   „                  sound            2qcom,x1e80100-sndcard            ,X1E001DE-DEVKIT       N  <IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC2 MIC BIAS2 TX SWR_INPUT1 ADC2_OUTPUT      wcd-playback-dai-link           JWCD Playback       cpu         T  Æ   q      codec           T  Ç      È       ß          platform            T  É         wcd-capture-dai-link            JWCD Capture    cpu         T  Æ   x      codec           T  Ç     Ê      ã          platform            T  É            regulator-nvme           2regulator-fixed         ¬VREG_NVME_3P3           » 2Z         Ó 2Z         ^   €                c        bdefault         X  Ë         v         f   Ä      regulator-rtmr0-1p15             2regulator-fixed         ¬VREG_RTMR0_1P15         » Œ0        Ó Œ0        ^  #                c        X  Ì        bdefault          v         f   Œ      regulator-rtmr0-1p8          2regulator-fixed         ¬VREG_RTMR0_1P8          » w@        Ó w@        ^  &                c        X  Í        bdefault          v         f   Ž      regulator-rtmr0-3p3          2regulator-fixed         ¬VREG_RTMR0_3P3          » 2Z         Ó 2Z         ^   �                c        X  Î        bdefault          v         f   �      regulator-rtmr1-1p15             2regulator-fixed         ¬VREG_RTMR1_1P15         » Œ0        Ó Œ0        ^   €   ¼             c        X  Ï        bdefault          v         f   ¤      regulator-rtmr1-1p8          2regulator-fixed         ¬VREG_RTMR1_1P8          » w@        Ó w@        ^   €   ¯             c        X  Ð        bdefault          v         f   ¦      regulator-rtmr1-3p3          2regulator-fixed         ¬VREG_RTMR1_3P3          » 2Z         Ó 2Z         ^   €   º             c        X  Ñ        bdefault          v         f   ¥      regulator-rtmr2-1p15             2regulator-fixed         ¬VREG_RTMR2_1P15         » Œ0        Ó Œ0        ^   €   ½             c        X  Ò        bdefault          v         f   }      regulator-rtmr2-1p8          2regulator-fixed         ¬VREG_RTMR2_1P8          » w@        Ó w@        ^   €   ~             c        X  Ó        bdefault          v         f         regulator-rtmr2-3p3          2regulator-fixed         ¬VREG_RTMR2_3P3          » 2Z         Ó 2Z         ^   €   »             c        X  Ô        bdefault          v         f   ~      regulator-vph-pwr            2regulator-fixed         ¬vph_pwr         » 8u         Ó 8u                   v         f  –      regulator-wwan           2regulator-fixed         ¬SDX_VPH_PWR         » 2Z         Ó 2Z         ^   €   Ý             c        X  Õ        bdefault          v         f   Ç      __symbols__         ˆ/clocks/xo-board            ‘/clocks/sleep-clk           ›/clocks/bi-tcxo-div2-clk            ¨/clocks/bi-tcxo-ao-div2-clk         ¸/cpus/cpu@0         ½/cpus/cpu@0/l2-cache            Â/cpus/cpu@100           Ç/cpus/cpu@200           Ì/cpus/cpu@300           Ñ/cpus/cpu@10000         Ö/cpus/cpu@10000/l2-cache            Û/cpus/cpu@10100         à/cpus/cpu@10200         å/cpus/cpu@10300         ê/cpus/cpu@20000         ï/cpus/cpu@20000/l2-cache            ô/cpus/cpu@20100         ù/cpus/cpu@20200         ÿ/cpus/cpu@20300         /cpus/cpu-map/cluster2          /cpus/idle-states/cpu-sleep-0         )  !/cpus/domain-idle-states/cluster-sleep-0          )  -/cpus/domain-idle-states/cluster-sleep-1          #  9/dummy-sink/in-ports/port/endpoint          @/firmware/scm           D/firmware/scmi/protocol@13          N/interconnect-0         W/interconnect-1         _/psci/power-domain-cpu0         g/psci/power-domain-cpu1         o/psci/power-domain-cpu2         w/psci/power-domain-cpu3         /psci/power-domain-cpu4         ‡/psci/power-domain-cpu5         �/psci/power-domain-cpu6         —/psci/power-domain-cpu7         Ÿ/psci/power-domain-cpu8         §/psci/power-domain-cpu9         ¯/psci/power-domain-cpu10            ¸/psci/power-domain-cpu11             Á/psci/power-domain-cpu-cluster0          Í/psci/power-domain-cpu-cluster1          Ù/psci/power-domain-cpu-cluster2         å/psci/power-domain-system         %  ï/reserved-memory/gunyah-hyp@80000000          *  þ/reserved-memory/hyp-elf-package@80800000           /reserved-memory/ncc@80a00000         $  /reserved-memory/cpucp-log@80e00000          (/reserved-memory/cpucp@80e40000       &  2/reserved-memory/tags-region@81400000         $  ;/reserved-memory/xbl-dtlog@81a00000       &  I/reserved-memory/xbl-ramdump@81a40000         $  Y/reserved-memory/aop-image@81c00000       %  g/reserved-memory/aop-cmd-db@81c60000          %  v/reserved-memory/aop-config@81c80000          )  …/reserved-memory/tme-crash-dump@81ca0000          "  ˜/reserved-memory/tme-log@81ce0000         #  ¤/reserved-memory/uefi-log@81ce4000        '  ±/reserved-memory/secdata-apss@81cff000        (  Â/reserved-memory/pdp-ns-shared@81e00000       "  Ô/reserved-memory/gpu-prr@81f00000         &  à/reserved-memory/tpm-control@81f10000         *  ð/reserved-memory/usb-ucsi-shared@81f20000         "  /reserved-memory/pld-pep@81f30000         "  /reserved-memory/pld-gmu@81f36000         "  /reserved-memory/pld-pdp@81f37000         "  (/reserved-memory/tz-stat@82700000         )  4/reserved-memory/xbl-tmp-buffer@82800000          /  G/reserved-memory/adsp-rpc-remote-heap@84b00000        3  `/reserved-memory/spu-secure-shared-memory@85300000        (  }/reserved-memory/adsp-boot-dtb@866c0000       &  �/reserved-memory/spss-region@86700000         $  Ÿ/reserved-memory/adsp-boot@86b00000          ­/reserved-memory/video@87700000       #  ·/reserved-memory/adspslpi@87e00000        &  Ä/reserved-memory/q6-adsp-dtb@8b800000           Ô/reserved-memory/cdsp@8b900000        &  Ý/reserved-memory/q6-cdsp-dtb@8d900000         (  í/reserved-memory/gpu-microcode@8d9fe000         ÿ/reserved-memory/cvp@8da00000         !  /reserved-memory/camera@8e100000          &  /reserved-memory/av1-encoder@8e900000           "/reserved-memory/wpss@8fa00000        &  +/reserved-memory/q6-wpss-dtb@91300000         !  ;/reserved-memory/xbl-sc@d8000000            F/reserved-memory/qtee@d80e0000          O/reserved-memory/ta@d8600000            V/reserved-memory/tags@e1000000        #  `/reserved-memory/llcc-lpi@ff800000          m/reserved-memory/smem@ffe00000          v/opp-table-qup100mhz            ‹/opp-table-qup120mhz             /smp2p-adsp/master-kernel           ¯/smp2p-adsp/slave-kernel            ½/smp2p-cdsp/master-kernel           Ì/smp2p-cdsp/slave-kernel            Ú/soc@0          Þ/soc@0/clock-controller@100000          â/soc@0/mailbox@408000           ç/soc@0/dma-controller@800000            ð/soc@0/geniqup@8c0000         !  ø/soc@0/geniqup@8c0000/i2c@880000          !  þ/soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  
/soc@0/geniqup@8c0000/spi@884000          !  /soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  "/soc@0/geniqup@8c0000/spi@88c000          !  (/soc@0/geniqup@8c0000/i2c@890000          !  ./soc@0/geniqup@8c0000/spi@890000          !  4/soc@0/geniqup@8c0000/i2c@894000          !  :/soc@0/geniqup@8c0000/spi@894000          $  @/soc@0/geniqup@8c0000/serial@894000       !  G/soc@0/geniqup@8c0000/i2c@898000          !  M/soc@0/geniqup@8c0000/spi@898000          !  S/soc@0/geniqup@8c0000/i2c@89c000          !  Y/soc@0/geniqup@8c0000/spi@89c000            _/soc@0/dma-controller@a00000            h/soc@0/geniqup@ac0000         !  p/soc@0/geniqup@ac0000/i2c@a80000          !  u/soc@0/geniqup@ac0000/spi@a80000          !  z/soc@0/geniqup@ac0000/i2c@a84000          !  /soc@0/geniqup@ac0000/spi@a84000          !  „/soc@0/geniqup@ac0000/i2c@a88000          !  Š/soc@0/geniqup@ac0000/spi@a88000          !  �/soc@0/geniqup@ac0000/i2c@a8c000          !  –/soc@0/geniqup@ac0000/spi@a8c000          !  œ/soc@0/geniqup@ac0000/i2c@a90000          !  ¢/soc@0/geniqup@ac0000/spi@a90000          !  ¨/soc@0/geniqup@ac0000/i2c@a94000          !  ®/soc@0/geniqup@ac0000/spi@a94000          !  ´/soc@0/geniqup@ac0000/i2c@a98000          !  º/soc@0/geniqup@ac0000/spi@a98000          $  À/soc@0/geniqup@ac0000/serial@a98000       !  Ç/soc@0/geniqup@ac0000/i2c@a9c000          !  Í/soc@0/geniqup@ac0000/spi@a9c000            Ó/soc@0/dma-controller@b00000            Ü/soc@0/geniqup@bc0000         !  ä/soc@0/geniqup@bc0000/i2c@b80000          !  é/soc@0/geniqup@bc0000/spi@b80000          !  î/soc@0/geniqup@bc0000/i2c@b84000          C  ó/soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@2/endpoint        !  0/soc@0/geniqup@bc0000/spi@b84000          !  5/soc@0/geniqup@bc0000/i2c@b88000          $  :/soc@0/geniqup@bc0000/serial@b88000       !  @/soc@0/geniqup@bc0000/spi@b88000          !  E/soc@0/geniqup@bc0000/i2c@b8c000          C  J/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@0/endpoint        C  ]/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@1/endpoint        C  o/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@2/endpoint        !  ‡/soc@0/geniqup@bc0000/spi@b8c000          !  Œ/soc@0/geniqup@bc0000/i2c@b90000          !  ‘/soc@0/geniqup@bc0000/spi@b90000          !  –/soc@0/geniqup@bc0000/i2c@b94000          -  ›/soc@0/geniqup@bc0000/i2c@b94000/redriver@47          -  ª/soc@0/geniqup@bc0000/i2c@b94000/redriver@4f          !  ¹/soc@0/geniqup@bc0000/spi@b94000          !  ¾/soc@0/geniqup@bc0000/i2c@b98000          !  Ã/soc@0/geniqup@bc0000/spi@b98000          !  È/soc@0/geniqup@bc0000/i2c@b9c000          C  Í/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@0/endpoint        C  à/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@1/endpoint        C  ò/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@2/endpoint        !  
/soc@0/geniqup@bc0000/spi@b9c000            /soc@0/thermal-sensor@c271000           /soc@0/thermal-sensor@c272000           /soc@0/thermal-sensor@c273000           $/soc@0/thermal-sensor@c274000           +/soc@0/phy@fd3000           ;/soc@0/phy@fd5000         (  L/soc@0/phy@fd5000/ports/port@0/endpoint       (  a/soc@0/phy@fd5000/ports/port@1/endpoint       (  |/soc@0/phy@fd5000/ports/port@2/endpoint         “/soc@0/phy@fd9000           £/soc@0/phy@fda000         (  ´/soc@0/phy@fda000/ports/port@0/endpoint       (  É/soc@0/phy@fda000/ports/port@1/endpoint       (  ä/soc@0/phy@fda000/ports/port@2/endpoint         û/soc@0/phy@fde000           /soc@0/phy@fdf000         (  /soc@0/phy@fdf000/ports/port@0/endpoint       (  1/soc@0/phy@fdf000/ports/port@1/endpoint       (  L/soc@0/phy@fdf000/ports/port@2/endpoint         c/soc@0/rng@10c3000          g/soc@0/interconnect@1500000         q/soc@0/interconnect@1600000         |/soc@0/interconnect@1680000         ‡/soc@0/interconnect@16c0000         —/soc@0/interconnect@16d0000         ¨/soc@0/interconnect@16e0000         ³/soc@0/interconnect@1700000         ¾/soc@0/interconnect@1740000         Î/soc@0/interconnect@1750000         Þ/soc@0/interconnect@1760000         í/soc@0/interconnect@1770000         ü/soc@0/interconnect@1780000         /soc@0/pcie@1bd0000         /soc@0/pcie@1bd0000/opp-table           /soc@0/pcie@1bd0000/pcie@0          '/soc@0/phy@1be0000          1/soc@0/pci@1bf8000          8/soc@0/pci@1bf8000/pcie@0           E/soc@0/phy@1bfc000          P/soc@0/pci@1c00000          V/soc@0/pci@1c00000/pcie@0           b/soc@0/phy@1c06000          l/soc@0/pci@1c08000          r/soc@0/pci@1c08000/pcie@0           ~/soc@0/phy@1c0e000          ˆ/soc@0/dma-controller@1dc4000           ’/soc@0/crypto@1dfa000           ™/soc@0/hwlock@1f40000            ¤/soc@0/clock-controller@1fc0000         ©/soc@0/gpu@3d00000          ­/soc@0/gpu@3d00000/zap-shader           ¼/soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          Ê/soc@0/gmu@3d6a000/opp-table             Ø/soc@0/clock-controller@3d90000         Þ/soc@0/iommu@3da0000            ê/soc@0/interconnect@26400000            ò/soc@0/interconnect@320c0000            ú/soc@0/remoteproc@6800000         3  
/soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  $/soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  */soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         2/soc@0/codec@6aa0000            B/soc@0/soundwire@6ab0000            G/soc@0/codec@6ac0000            U/soc@0/soundwire@6ad0000          #  Z/soc@0/soundwire@6ad0000/codec@0,4          a/soc@0/codec@6ae0000            o/soc@0/codec@6b00000            ~/soc@0/soundwire@6b10000             ƒ/soc@0/clock-controller@6b6c000         ‘/soc@0/soundwire@6d30000          #  –/soc@0/soundwire@6d30000/codec@0,3          �/soc@0/codec@6d44000            «/soc@0/pinctrl@6e80000        +  ¶/soc@0/pinctrl@6e80000/tx-swr-active-state        +  Ä/soc@0/pinctrl@6e80000/rx-swr-active-state        ,  Ò/soc@0/pinctrl@6e80000/dmic01-default-state       ,  á/soc@0/pinctrl@6e80000/dmic23-default-state       ,  ð/soc@0/pinctrl@6e80000/wsa-swr-active-state       -  ÿ/soc@0/pinctrl@6e80000/wsa2-swr-active-state             /soc@0/clock-controller@6ea0000         /soc@0/interconnect@7e40000         $/soc@0/interconnect@7400000         5/soc@0/interconnect@7430000         E/soc@0/mmc@8804000          L/soc@0/mmc@8804000/opp-table            \/soc@0/mmc@8844000          c/soc@0/mmc@8844000/opp-table            s/soc@0/phy@88e0000          /soc@0/phy@88e1000          �/soc@0/phy@88e2000          ›/soc@0/phy@88e3000          ª/soc@0/phy@88e5000          ¹/soc@0/usb@a0f8800          Ã/soc@0/usb@a0f8800/usb@a000000        5  Ò/soc@0/usb@a0f8800/usb@a000000/ports/port@0/endpoint          5  ä/soc@0/usb@a0f8800/usb@a000000/ports/port@1/endpoint            ö/soc@0/usb@a2f8800          ü/soc@0/usb@a2f8800/usb@a200000        -  /soc@0/usb@a2f8800/usb@a200000/port/endpoint            /soc@0/usb@a4f8800          /soc@0/usb@a4f8800/usb@a400000          (/soc@0/usb@a6f8800          2/soc@0/usb@a6f8800/usb@a600000        5  A/soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  S/soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint            e/soc@0/usb@a8f8800          o/soc@0/usb@a8f8800/usb@a800000        5  ~/soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint          5  �/soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint            ¢/soc@0/video-codec@aa00000        %  §/soc@0/video-codec@aa00000/opp-table             ¶/soc@0/clock-controller@aaf0000       !  ¾/soc@0/display-subsystem@ae00000          <  Ã/soc@0/display-subsystem@ae00000/display-controller@ae01000       R  Ì/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  Û/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpoint         R  ê/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpoint         R  ù/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpoint         F  /soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  +/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  8/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         @  K/soc@0/display-subsystem@ae00000/displayport-controller@ae98000       V  T/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpoint         V  `/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpoint         J  m/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table         @  €/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000       V  ‰/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpoint         V  •/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpoint         J  ¢/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table         @  µ/soc@0/display-subsystem@ae00000/displayport-controller@aea0000       V  ¾/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpoint         V  Ê/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@1/endpoint         J  ×/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table           ê/soc@0/phy@aec2a00          ÷/soc@0/phy@aec5a00           /soc@0/clock-controller@af00000       $  /soc@0/interrupt-controller@b220000          /soc@0/power-management@c300000         /soc@0/arbiter@c400000        $  /soc@0/arbiter@c400000/spmi@c42d000       +  '/soc@0/arbiter@c400000/spmi@c42d000/pmic@0        4  //soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300       ;  ;/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey        :  F/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin         4  P/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@6100       6  \/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100         G  k/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@48        6  y/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00         I  ‰/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-en@73          J  ™/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-end@75         L  ª/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-delta@76       5  ½/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800          /  Ë/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm        +  ×/soc@0/arbiter@c400000/spmi@c42d000/pmic@1        :  Þ/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a00         5  ð/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800          P  ý/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-state       K  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/usb0-3p3-reg-en-state        ?  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00        /  (/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm        +  3/soc@0/arbiter@c400000/spmi@c42d000/pmic@2        :  >/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a00         5  T/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800          +  e/soc@0/arbiter@c400000/spmi@c42d000/pmic@3        :  o/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a00         5  „/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800          +  ”/soc@0/arbiter@c400000/spmi@c42d000/pmic@4        :  ž/soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a00         5  ³/soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800          +  Ã/soc@0/arbiter@c400000/spmi@c42d000/pmic@5        :  Í/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a00         5  â/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800          L  ò/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/usb0-pwr-1p15-en-state       +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@6        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@6/temp-alarm@a00         5  "/soc@0/arbiter@c400000/spmi@c42d000/pmic@6/gpio@8800          +  2/soc@0/arbiter@c400000/spmi@c42d000/pmic@8        :  =/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a00         5  S/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800          +  d/soc@0/arbiter@c400000/spmi@c42d000/pmic@9        :  o/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a00         5  …/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800          K  –/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/usb0-1p8-reg-en-state        +  ¦/soc@0/arbiter@c400000/spmi@c42d000/pmic@c        ;  ­/soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400        $  ¿/soc@0/arbiter@c400000/spmi@c432000       +  É/soc@0/arbiter@c400000/spmi@c432000/pmic@7        4  Ó/soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00       +  ì/soc@0/arbiter@c400000/spmi@c432000/pmic@a        4  ö/soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00       +   /soc@0/arbiter@c400000/spmi@c432000/pmic@b        4   /soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00       +   2/soc@0/arbiter@c400000/spmi@c432000/pmic@c        4   </soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00         ±/soc@0/pinctrl@f100000        .   U/soc@0/pinctrl@f100000/edp0-hpd-default-state         /   f/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /   x/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /   Š/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /   œ/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /   ®/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /   À/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /   Ò/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /   ä/soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /   ö/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  !/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  !-/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  !@/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  !S/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  !f/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       0  !y/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       0  !Œ/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state       0  !Ÿ/soc@0/pinctrl@f100000/qup-i2c17-data-clk-state       0  !²/soc@0/pinctrl@f100000/qup-i2c18-data-clk-state       0  !Å/soc@0/pinctrl@f100000/qup-i2c19-data-clk-state       0  !Ø/soc@0/pinctrl@f100000/qup-i2c20-data-clk-state       0  !ë/soc@0/pinctrl@f100000/qup-i2c21-data-clk-state       0  !þ/soc@0/pinctrl@f100000/qup-i2c22-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c23-data-clk-state       )  "$/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  "0/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  "B/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  "N/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  "`/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  "l/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  "~/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  "Š/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  "œ/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  "¨/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  "º/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  "Æ/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  "Ø/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  "ä/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  "ö/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  # /soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  #2/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  #>/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  #P/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  #]/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  #p/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  #}/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  #�/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  #�/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  #°/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  #½/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  #Ð/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  #Ý/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       *  #ð/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  #ý/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi16-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi16-data-clk-state       *  $0/soc@0/pinctrl@f100000/qup-spi17-cs-state         0  $=/soc@0/pinctrl@f100000/qup-spi17-data-clk-state       *  $P/soc@0/pinctrl@f100000/qup-spi18-cs-state         0  $]/soc@0/pinctrl@f100000/qup-spi18-data-clk-state       *  $p/soc@0/pinctrl@f100000/qup-spi19-cs-state         0  $}/soc@0/pinctrl@f100000/qup-spi19-data-clk-state       *  $�/soc@0/pinctrl@f100000/qup-spi20-cs-state         0  $�/soc@0/pinctrl@f100000/qup-spi20-data-clk-state       *  $°/soc@0/pinctrl@f100000/qup-spi21-cs-state         0  $½/soc@0/pinctrl@f100000/qup-spi21-data-clk-state       *  $Ð/soc@0/pinctrl@f100000/qup-spi22-cs-state         0  $Ý/soc@0/pinctrl@f100000/qup-spi22-data-clk-state       *  $ð/soc@0/pinctrl@f100000/qup-spi23-cs-state         0  $ý/soc@0/pinctrl@f100000/qup-spi23-data-clk-state       /  %/soc@0/pinctrl@f100000/qup-uart2-default-state        0  %"/soc@0/pinctrl@f100000/qup-uart14-default-state       0  %5/soc@0/pinctrl@f100000/qup-uart21-default-state       *  %H/soc@0/pinctrl@f100000/sdc2-default-state         (  %U/soc@0/pinctrl@f100000/sdc2-sleep-state       +  %`/soc@0/pinctrl@f100000/eusb3-reset-n-state        +  %n/soc@0/pinctrl@f100000/eusb6-reset-n-state        )  %|/soc@0/pinctrl@f100000/nvme-reg-en-state          +  %ˆ/soc@0/pinctrl@f100000/pcie4-default-state        +  %–/soc@0/pinctrl@f100000/pcie5-default-state        ,  %¤/soc@0/pinctrl@f100000/pcie6a-default-state       2  %³/soc@0/pinctrl@f100000/rtmr1-reset-n-active-state         2  %Á/soc@0/pinctrl@f100000/rtmr2-reset-n-active-state         /  %Ï/soc@0/pinctrl@f100000/rtmr1-1p15-reg-en-state        .  %á/soc@0/pinctrl@f100000/rtmr1-1p8-reg-en-state         .  %ò/soc@0/pinctrl@f100000/rtmr1-3p3-reg-en-state         /  &/soc@0/pinctrl@f100000/rtmr2-1p15-reg-en-state        .  &/soc@0/pinctrl@f100000/rtmr2-1p8-reg-en-state         .  &&/soc@0/pinctrl@f100000/rtmr2-3p3-reg-en-state         +  &7/soc@0/pinctrl@f100000/sdc2-card-det-state        0  &G/soc@0/pinctrl@f100000/wcd-reset-n-active-state       (  &S/soc@0/pinctrl@f100000/wwan-sw-en-state       ,  &^/soc@0/stm@10002000/out-ports/port/endpoint       -  &f/soc@0/tpdm@10003000/out-ports/port/endpoint          .  &s/soc@0/tpda@10004000/in-ports/port@0/endpoint         .  &�/soc@0/tpda@10004000/in-ports/port@1/endpoint         -  &�/soc@0/tpda@10004000/out-ports/port/endpoint          -  &�/soc@0/tpdm@1000f000/out-ports/port/endpoint          0  &«/soc@0/funnel@10041000/in-ports/port@6/endpoint       0  &·/soc@0/funnel@10041000/in-ports/port@7/endpoint       /  &Ã/soc@0/funnel@10041000/out-ports/port/endpoint        0  &Ï/soc@0/funnel@10042000/in-ports/port@2/endpoint       0  &Û/soc@0/funnel@10042000/in-ports/port@5/endpoint       0  &ç/soc@0/funnel@10042000/in-ports/port@6/endpoint       /  &ó/soc@0/funnel@10042000/out-ports/port/endpoint        0  &ÿ/soc@0/funnel@10045000/in-ports/port@0/endpoint       0  '/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  '/soc@0/funnel@10045000/out-ports/port/endpoint        -  '//soc@0/tpdm@10800000/out-ports/port/endpoint          -  '</soc@0/tpdm@1082c000/out-ports/port/endpoint          -  'I/soc@0/tpdm@10841000/out-ports/port/endpoint          -  'W/soc@0/tpdm@10844000/out-ports/port/endpoint          .  'i/soc@0/funnel@10846000/in-ports/port/endpoint         /  '}/soc@0/funnel@10846000/out-ports/port/endpoint        -  '‘/soc@0/tpdm@109d0000/out-ports/port/endpoint          -  '�/soc@0/tpdm@10ac0000/out-ports/port/endpoint          -  '¬/soc@0/tpdm@10ac1000/out-ports/port/endpoint          .  '»/soc@0/tpda@10ac4000/in-ports/port@8/endpoint         .  'É/soc@0/tpda@10ac4000/in-ports/port@9/endpoint         -  '×/soc@0/tpda@10ac4000/out-ports/port/endpoint          .  'å/soc@0/funnel@10ac5000/in-ports/port/endpoint         /  'õ/soc@0/funnel@10ac5000/out-ports/port/endpoint        0  (/soc@0/funnel@10b04000/in-ports/port@3/endpoint       0  (/soc@0/funnel@10b04000/in-ports/port@6/endpoint       0  (%/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  (5/soc@0/funnel@10b04000/out-ports/port/endpoint          (E/soc@0/tmc@10b05000       +  (J/soc@0/tmc@10b05000/in-ports/port/endpoint        ,  (R/soc@0/tmc@10b05000/out-ports/port/endpoint       2  ([/soc@0/replicator@10b06000/in-ports/port/endpoint         3  (g/soc@0/replicator@10b06000/out-ports/port/endpoint        .  (u/soc@0/tpda@10b08000/in-ports/port@0/endpoint         .  (ƒ/soc@0/tpda@10b08000/in-ports/port@1/endpoint         .  (‘/soc@0/tpda@10b08000/in-ports/port@2/endpoint         .  (Ÿ/soc@0/tpda@10b08000/in-ports/port@3/endpoint         .  (­/soc@0/tpda@10b08000/in-ports/port@4/endpoint         -  (»/soc@0/tpda@10b08000/out-ports/port/endpoint          -  (É/soc@0/tpdm@10b09000/out-ports/port/endpoint          -  (Ø/soc@0/tpdm@10b0a000/out-ports/port/endpoint          -  (ç/soc@0/tpdm@10b0b000/out-ports/port/endpoint          -  (ö/soc@0/tpdm@10b0c000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0d000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b20000/out-ports/port/endpoint          ,  )#/soc@0/tpda@10b23000/in-ports/port/endpoint       -  )3/soc@0/tpda@10b23000/out-ports/port/endpoint          .  )D/soc@0/funnel@10b24000/in-ports/port/endpoint         /  )W/soc@0/funnel@10b24000/out-ports/port/endpoint        -  )j/soc@0/tpdm@10c08000/out-ports/port/endpoint          0  )v/soc@0/funnel@10c0b000/in-ports/port@4/endpoint       /  )„/soc@0/funnel@10c0b000/out-ports/port/endpoint        -  )’/soc@0/tpdm@10c28000/out-ports/port/endpoint          -  )¡/soc@0/tpdm@10c29000/out-ports/port/endpoint          .  )¯/soc@0/tpda@10c2b000/in-ports/port@4/endpoint         /  )¾/soc@0/tpda@10c2b000/in-ports/port@13/endpoint        /  )Î/soc@0/tpda@10c2b000/in-ports/port@14/endpoint        /  )Þ/soc@0/tpda@10c2b000/in-ports/port@15/endpoint        /  )î/soc@0/tpda@10c2b000/in-ports/port@1a/endpoint        /  )þ/soc@0/tpda@10c2b000/in-ports/port@1b/endpoint        -  */soc@0/tpda@10c2b000/out-ports/port/endpoint          0  */soc@0/funnel@10c2c000/in-ports/port@0/endpoint       0  *./soc@0/funnel@10c2c000/in-ports/port@4/endpoint       0  *?/soc@0/funnel@10c2c000/in-ports/port@5/endpoint       /  *P/soc@0/funnel@10c2c000/out-ports/port/endpoint        -  *a/soc@0/tpdm@10c38000/out-ports/port/endpoint          -  *q/soc@0/tpdm@10c39000/out-ports/port/endpoint          .  *�/soc@0/tpda@10c3c000/in-ports/port@4/endpoint         .  *�/soc@0/tpda@10c3c000/in-ports/port@f/endpoint         /  * /soc@0/tpda@10c3c000/in-ports/port@10/endpoint        /  *°/soc@0/tpda@10c3c000/in-ports/port@11/endpoint        -  *À/soc@0/tpda@10c3c000/out-ports/port/endpoint          .  *Ï/soc@0/funnel@10c3d000/in-ports/port/endpoint         /  *à/soc@0/funnel@10c3d000/out-ports/port/endpoint        -  *ñ/soc@0/tpdm@10cc1000/out-ports/port/endpoint          .  +/soc@0/tpda@10cc4000/in-ports/port@2/endpoint         -  +/soc@0/tpda@10cc4000/out-ports/port/endpoint          .  +/soc@0/funnel@10cc5000/in-ports/port/endpoint         /  +0/soc@0/funnel@10cc5000/out-ports/port/endpoint        0  +A/soc@0/funnel@10d04000/in-ports/port@6/endpoint       /  +Q/soc@0/funnel@10d04000/out-ports/port/endpoint        -  +a/soc@0/tpdm@10d08000/out-ports/port/endpoint          -  +p/soc@0/tpdm@10d09000/out-ports/port/endpoint          -  +/soc@0/tpdm@10d0a000/out-ports/port/endpoint          -  +Ž/soc@0/tpdm@10d0b000/out-ports/port/endpoint          -  +�/soc@0/tpdm@10d0c000/out-ports/port/endpoint          -  +¬/soc@0/tpdm@10d0d000/out-ports/port/endpoint          -  +»/soc@0/tpdm@10d0e000/out-ports/port/endpoint          -  +Ê/soc@0/tpdm@10d0f000/out-ports/port/endpoint          .  +Ù/soc@0/tpda@10d12000/in-ports/port@0/endpoint         .  +ç/soc@0/tpda@10d12000/in-ports/port@1/endpoint         .  +õ/soc@0/tpda@10d12000/in-ports/port@2/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@3/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@4/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@5/endpoint         .  ,-/soc@0/tpda@10d12000/in-ports/port@6/endpoint         .  ,;/soc@0/tpda@10d12000/in-ports/port@7/endpoint         -  ,I/soc@0/tpda@10d12000/out-ports/port/endpoint          .  ,W/soc@0/funnel@10d13000/in-ports/port/endpoint         /  ,g/soc@0/funnel@10d13000/out-ports/port/endpoint          ,w/soc@0/iommu@15000000           ,�/soc@0/iommu@15400000         %  ,‹/soc@0/interrupt-controller@17000000          =  ,�/soc@0/interrupt-controller@17000000/msi-controller@17040000            ,˜/soc@0/watchdog@17410000            ,¦/soc@0/mailbox@17430000         ,±/soc@0/rsc@17500000         ,º/soc@0/rsc@17500000/bcm-voter         %  ,É/soc@0/rsc@17500000/clock-controller          %  ,Ð/soc@0/rsc@17500000/power-controller          /  ,×/soc@0/rsc@17500000/power-controller/opp-table        6  ,è/soc@0/rsc@17500000/power-controller/opp-table/opp-16         6  ,÷/soc@0/rsc@17500000/power-controller/opp-table/opp-48         6  -
/soc@0/rsc@17500000/power-controller/opp-table/opp-52         6  - /soc@0/rsc@17500000/power-controller/opp-table/opp-56         6  -6/soc@0/rsc@17500000/power-controller/opp-table/opp-60         6  -L/soc@0/rsc@17500000/power-controller/opp-table/opp-64         6  -_/soc@0/rsc@17500000/power-controller/opp-table/opp-80         7  -u/soc@0/rsc@17500000/power-controller/opp-table/opp-128        7  -„/soc@0/rsc@17500000/power-controller/opp-table/opp-144        7  -–/soc@0/rsc@17500000/power-controller/opp-table/opp-192        7  -¨/soc@0/rsc@17500000/power-controller/opp-table/opp-256        7  -·/soc@0/rsc@17500000/power-controller/opp-table/opp-320        7  -É/soc@0/rsc@17500000/power-controller/opp-table/opp-336        7  -Û/soc@0/rsc@17500000/power-controller/opp-table/opp-384        7  -ì/soc@0/rsc@17500000/power-controller/opp-table/opp-416        &  . /soc@0/rsc@17500000/regulators-0/bob1         &  .
/soc@0/rsc@17500000/regulators-0/bob2         &  ./soc@0/rsc@17500000/regulators-0/ldo1         &  .!/soc@0/rsc@17500000/regulators-0/ldo2         &  ../soc@0/rsc@17500000/regulators-0/ldo4         &  .;/soc@0/rsc@17500000/regulators-0/ldo5         &  .H/soc@0/rsc@17500000/regulators-0/ldo6         &  .U/soc@0/rsc@17500000/regulators-0/ldo7         &  .b/soc@0/rsc@17500000/regulators-0/ldo8         &  .o/soc@0/rsc@17500000/regulators-0/ldo9         '  .|/soc@0/rsc@17500000/regulators-0/ldo10        '  .Š/soc@0/rsc@17500000/regulators-0/ldo12        '  .˜/soc@0/rsc@17500000/regulators-0/ldo13        '  .¦/soc@0/rsc@17500000/regulators-0/ldo14        '  .´/soc@0/rsc@17500000/regulators-0/ldo15        '  .Â/soc@0/rsc@17500000/regulators-0/ldo16        '  .Ð/soc@0/rsc@17500000/regulators-0/ldo17        '  .Þ/soc@0/rsc@17500000/regulators-1/smps4        &  .ë/soc@0/rsc@17500000/regulators-1/ldo1         &  .ø/soc@0/rsc@17500000/regulators-1/ldo2         &  //soc@0/rsc@17500000/regulators-1/ldo3         &  //soc@0/rsc@17500000/regulators-2/ldo1         &  //soc@0/rsc@17500000/regulators-2/ldo2         &  /,/soc@0/rsc@17500000/regulators-2/ldo3         &  /9/soc@0/rsc@17500000/regulators-3/ldo2         &  /F/soc@0/rsc@17500000/regulators-3/ldo3         '  /S/soc@0/rsc@17500000/regulators-4/smps1        &  /`/soc@0/rsc@17500000/regulators-4/ldo1         &  /m/soc@0/rsc@17500000/regulators-4/ldo2         &  /z/soc@0/rsc@17500000/regulators-4/ldo3         '  /‡/soc@0/rsc@17500000/regulators-6/smps1        '  /”/soc@0/rsc@17500000/regulators-6/smps2        &  /¡/soc@0/rsc@17500000/regulators-6/ldo1         &  /®/soc@0/rsc@17500000/regulators-6/ldo2         &  /»/soc@0/rsc@17500000/regulators-6/ldo3         '  /È/soc@0/rsc@17500000/regulators-7/smps5        &  /Õ/soc@0/rsc@17500000/regulators-7/ldo1         &  /â/soc@0/rsc@17500000/regulators-7/ldo2         &  /ï/soc@0/rsc@17500000/regulators-7/ldo3           /ü/soc@0/sram@18b4e000          (  0/soc@0/sram@18b4e000/scp-sram-section@0       *  0/soc@0/sram@18b4e000/scp-sram-section@200           0/soc@0/watchdog@1c840000            0+/soc@0/efuse@221c8000         (  02/soc@0/efuse@221c8000/gpu-speed-bin@119         0@/soc@0/pmu@24091000/opp-table           0U/soc@0/pmu@240b3400         0d/soc@0/pmu@240b5400         0s/soc@0/pmu@240b5400/opp-table           0‡/soc@0/remoteproc@32300000          0—/thermal-zones        1  0¥/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  0³/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  0Á/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  0Ï/thermal-zones/gpuss-3-thermal/trips/trip-point0          1  0Ý/thermal-zones/gpuss-4-thermal/trips/trip-point0          1  0ë/thermal-zones/gpuss-5-thermal/trips/trip-point0          1  0ù/thermal-zones/gpuss-6-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-7-thermal/trips/trip-point0          !  1/thermal-zones/pmc8380-6-thermal            1'/audio-codec          .  1//pmic-glink/connector@0/ports/port@0/endpoint         .  1D/pmic-glink/connector@0/ports/port@1/endpoint         .  1Y/pmic-glink/connector@0/ports/port@2/endpoint         .  1s/pmic-glink/connector@1/ports/port@0/endpoint         .  1ˆ/pmic-glink/connector@1/ports/port@1/endpoint         .  1�/pmic-glink/connector@1/ports/port@2/endpoint         .  1·/pmic-glink/connector@2/ports/port@0/endpoint         .  1Ì/pmic-glink/connector@2/ports/port@1/endpoint         .  1á/pmic-glink/connector@2/ports/port@2/endpoint           1û/regulator-nvme         2/regulator-rtmr0-1p15           2/regulator-rtmr0-1p8            2$/regulator-rtmr0-3p3            23/regulator-rtmr1-1p15           2C/regulator-rtmr1-1p8            2R/regulator-rtmr1-3p3            2a/regulator-rtmr2-1p15           2q/regulator-rtmr2-1p8            2€/regulator-rtmr2-3p3            2�/regulator-vph-pwr          2—/regulator-wwan          	interrupt-parent #address-cells #size-cells model compatible stdout-path clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us remote-endpoint interconnects qcom,dload-mode mboxes mbox-names shmem #power-domain-cells #interconnect-cells qcom,bcm-voters interrupts domain-idle-states ranges no-map hwlocks size reusable linux,cma-default opp-hz required-opps interrupts-extended qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names operating-points-v2 vdd-supply vdd33-supply vdd33-cap-supply vddar-supply vddat-supply vddio-supply reset-gpios orientation-switch retimer-switch #phy-cells vdd3v3-supply vdd1v8-supply interrupt-names #qcom,sensors #thermal-sensor-cells resets vdda12-supply phys reset-names mode-switch vdda-phy-supply vdda-pll-supply reg-names bus-range dma-coherent linux,pci-domain num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates eq-presets-8gts eq-presets-16gts opp-peak-kBps opp-level clock-output-names msi-map vddpe-3v3-supply wake-gpios qcom,4ln-config-sel qcom,ee qcom,controlled-remotely num-channels qcom,num-ees #hwlock-cells qcom,gmu #cooling-cells nvmem-cells nvmem-cell-names memory-region firmware-name qcom,opp-acd-level opp-supported-hw qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain sound-name-prefix qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable qcom,dll-config qcom,ddr-config bus-width cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc wakeup-source phy-names snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,usb3_lpm_capable snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk dr_mode qcom,select-utmi-as-pipe-clk maximum-speed usb-role-switch assigned-clock-parents data-lanes link-frequencies qcom,pdc-ranges qcom,channel linux,code qcom,no-alarm qcom,uefi-rtc-info bits #pwm-cells power-source input-disable output-enable vdd18-supply vdd3-supply wakeup-parent gpio-reserved-ranges bias-pull-up output-low qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num #redistributor-regions redistributor-stride msi-controller #msi-cells qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-always-on vdd-l1-supply vdd-l2-supply vdd-l3-supply vdd-s4-supply vdd-s1-supply vdd-s2-supply vdd-s5-supply frame-number thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device serial0 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-io-supply vdd-mic-bias-supply orientation-gpios power-role data-role audio-routing link-name sound-dai gpio enable-active-high regulator-boot-on xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 cpu1 cpu2 cpu3 cpu4 l2_1 cpu5 cpu6 cpu7 cpu8 l2_2 cpu9 cpu10 cpu11 cpu_map_cluster2 cluster_c4 cluster_cl4 cluster_cl5 eud_in scm scmi_dvfs clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cpu_pd8 cpu_pd9 cpu_pd10 cpu_pd11 cluster_pd0 cluster_pd1 cluster_pd2 system_pd gunyah_hyp_mem hyp_elf_package_mem ncc_mem cpucp_log_mem cpucp_mem tags_mem xbl_dtlog_mem xbl_ramdump_mem aop_image_mem aop_cmd_db_mem aop_config_mem tme_crash_dump_mem tme_log_mem uefi_log_mem secdata_apss_mem pdp_ns_shared_mem gpu_prr_mem tpm_control_mem usb_ucsi_shared_mem pld_pep_mem pld_gmu_mem pld_pdp_mem tz_stat_mem xbl_tmp_buffer_mem adsp_rpc_remote_heap_mem spu_secure_shared_memory_mem adsp_boot_dtb_mem spss_region_mem adsp_boot_mem video_mem adspslpi_mem q6_adsp_dtb_mem cdsp_mem q6_cdsp_dtb_mem gpu_microcode_mem cvp_mem camera_mem av1_encoder_mem wpss_mem q6_wpss_dtb_mem xbl_sc_mem qtee_mem ta_mem tags_mem1 llcc_lpi_mem smem_mem qup_opp_table_100mhz qup_opp_table_120mhz smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in soc gcc ipcc gpi_dma2 qupv3_2 i2c16 spi16 i2c17 spi17 i2c18 spi18 i2c19 spi19 i2c20 spi20 i2c21 spi21 uart21 i2c22 spi22 i2c23 spi23 gpi_dma1 qupv3_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 i2c14 spi14 uart14 i2c15 spi15 gpi_dma0 qupv3_0 i2c0 spi0 i2c1 retimer_ss2_ss_out retimer_ss2_ss_in retimer_ss2_con_sbu_out spi1 i2c2 uart2 spi2 i2c3 retimer_ss0_ss_out retimer_ss0_ss_in retimer_ss0_con_sbu_out spi3 i2c4 spi4 i2c5 eusb3_repeater eusb6_repeater spi5 i2c6 spi6 i2c7 retimer_ss1_ss_out retimer_ss1_ss_in retimer_ss1_con_sbu_out spi7 tsens0 tsens1 tsens2 tsens3 usb_1_ss0_hsphy usb_1_ss0_qmpphy usb_1_ss0_qmpphy_out usb_1_ss0_qmpphy_usb_ss_in usb_1_ss0_qmpphy_dp_in usb_1_ss1_hsphy usb_1_ss1_qmpphy usb_1_ss1_qmpphy_out usb_1_ss1_qmpphy_usb_ss_in usb_1_ss1_qmpphy_dp_in usb_1_ss2_hsphy usb_1_ss2_qmpphy usb_1_ss2_qmpphy_out usb_1_ss2_qmpphy_usb_ss_in usb_1_ss2_qmpphy_dp_in rng cnoc_main config_noc system_noc pcie_south_anoc pcie_center_anoc aggre1_noc aggre2_noc pcie_north_anoc usb_center_anoc usb_north_anoc usb_south_anoc mmss_noc pcie3 pcie3_opp_table pcie3_port0 pcie3_phy pcie6a pcie6a_port0 pcie6a_phy pcie5 pcie5_port0 pcie5_phy pcie4 pcie4_port0 pcie4_phy cryptobam crypto tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu gem_noc nsp_noc remoteproc_adsp q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 lpass_audiocc swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active lpasscc lpass_ag_noc lpass_lpiaon_noc lpass_lpicx_noc sdhc_2 sdhc2_opp_table sdhc_4 sdhc4_opp_table usb_2_hsphy usb_mp_hsphy0 usb_mp_hsphy1 usb_mp_qmpphy0 usb_mp_qmpphy1 usb_1_ss2 usb_1_ss2_dwc3 usb_1_ss2_dwc3_hs usb_1_ss2_dwc3_ss usb_2 usb_2_dwc3 usb_2_dwc3_hs usb_mp usb_mp_dwc3 usb_1_ss0 usb_1_ss0_dwc3 usb_1_ss0_dwc3_hs usb_1_ss0_dwc3_ss usb_1_ss1 usb_1_ss1_dwc3 usb_1_ss1_dwc3_hs usb_1_ss1_dwc3_ss iris iris_opp_table videocc mdss mdss_mdp mdss_intf0_out mdss_intf4_out mdss_intf5_out mdss_intf6_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dp0_opp_table mdss_dp1 mdss_dp1_in mdss_dp1_out mdss_dp1_opp_table mdss_dp2 mdss_dp2_in mdss_dp2_out mdss_dp2_opp_table mdss_dp3 mdss_dp3_in mdss_dp3_out mdss_dp3_opp_table mdss_dp2_phy mdss_dp3_phy dispcc pdc aoss_qmp spmi spmi_bus0 pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_sdam_15 charge_limit_en charge_limit_end charge_limit_delta pmk8550_gpios pmk8550_pwm pm8550 pm8550_temp_alarm pm8550_gpios rtmr0_default usb0_3p3_reg_en pm8550_flash pm8550_pwm pm8550ve_2 pm8550ve_2_temp_alarm pm8550ve_2_gpios pmc8380_3 pmc8380_3_temp_alarm pmc8380_3_gpios pmc8380_4 pmc8380_4_temp_alarm pmc8380_4_gpios pmc8380_5 pmc8380_5_temp_alarm pmc8380_5_gpios usb0_pwr_1p15_en pmc8380_6 pmc8380_6_temp_alarm pmc8380_6_gpios pm8550ve_8 pm8550ve_8_temp_alarm pm8550ve_8_gpios pm8550ve_9 pm8550ve_9_temp_alarm pm8550ve_9_gpios usb0_1p8_reg_en pm8010 pm8010_temp_alarm spmi_bus1 smb2360_0 smb2360_0_eusb2_repeater smb2360_1 smb2360_1_eusb2_repeater smb2360_2 smb2360_2_eusb2_repeater smb2360_3 smb2360_3_eusb2_repeater edp0_hpd_default qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_i2c15_data_clk qup_i2c16_data_clk qup_i2c17_data_clk qup_i2c18_data_clk qup_i2c19_data_clk qup_i2c20_data_clk qup_i2c21_data_clk qup_i2c22_data_clk qup_i2c23_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_spi15_cs qup_spi15_data_clk qup_spi16_cs qup_spi16_data_clk qup_spi17_cs qup_spi17_data_clk qup_spi18_cs qup_spi18_data_clk qup_spi19_cs qup_spi19_data_clk qup_spi20_cs qup_spi20_data_clk qup_spi21_cs qup_spi21_data_clk qup_spi22_cs qup_spi22_data_clk qup_spi23_cs qup_spi23_data_clk qup_uart2_default qup_uart14_default qup_uart21_default sdc2_default sdc2_sleep eusb3_reset_n eusb6_reset_n nvme_reg_en pcie4_default pcie5_default pcie6a_default rtmr1_default rtmr2_default rtmr1_1p15_reg_en rtmr1_1p8_reg_en rtmr1_3p3_reg_en rtmr2_1p15_reg_en rtmr2_1p8_reg_en rtmr2_3p3_reg_en sdc2_card_det_n wcd_default wwan_sw_en stm_out dcc_tpdm_out qdss_tpda_in0 qdss_tpda_in1 qdss_tpda_out qdss_tpdm_out funnel0_in6 funnel0_in7 funnel0_out funnel1_in2 funnel1_in5 funnel1_in6 funnel1_out qdss_funnel_in0 qdss_funnel_in1 qdss_funnel_out mxa_tpdm_out gcc_tpdm_out prng_tpdm_out lpass_cx_tpdm_out lpass_cx_funnel_in0 lpass_cx_funnel_out qm_tpdm_out dlst_tpdm0_out dlst_tpdm1_out dlst_tpda_in8 dlst_tpda_in9 dlst_tpda_out dlst_funnel_in0 dlst_funnel_out aoss_funnel_in3 aoss_funnel_in6 aoss_funnel_in7 aoss_funnel_out etf0 etf0_in etf0_out swao_rep_in swao_rep_out1 aoss_tpda_in0 aoss_tpda_in1 aoss_tpda_in2 aoss_tpda_in3 aoss_tpda_in4 aoss_tpda_out aoss_tpdm0_out aoss_tpdm1_out aoss_tpdm2_out aoss_tpdm3_out aoss_tpdm4_out lpicc_tpdm_out ddr_lpi_tpda_in ddr_lpi_tpda_out ddr_lpi_funnel_in0 ddr_lpi_funnel_out mm_tpdm_out mm_funnel_in4 mm_funnel_out dlct1_tpdm_out ipcc_tpdm_out dlct1_tpda_in4 dlct1_tpda_in19 dlct1_tpda_in20 dlct1_tpda_in21 dlct1_tpda_in26 dlct1_tpda_in27 dlct1_tpda_out dlct1_funnel_in0 dlct1_funnel_in4 dlct1_funnel_in5 dlct1_funnel_out dlct2_tpdm0_out dlct2_tpdm1_out dlct2_tpda_in4 dlct2_tpda_in15 dlct2_tpda_in16 dlct2_tpda_in17 dlct2_tpda_out dlct2_funnel_in0 dlct2_funnel_out tmess_tpdm1_out tmess_tpda_in2 tmess_tpda_out tmess_funnel_in0 tmess_funnel_out ddr_funnel0_in6 ddr_funnel0_out llcc0_tpdm_out llcc1_tpdm_out llcc2_tpdm_out llcc3_tpdm_out llcc4_tpdm_out llcc5_tpdm_out llcc6_tpdm_out llcc7_tpdm_out llcc_tpda_in0 llcc_tpda_in1 llcc_tpda_in2 llcc_tpda_in3 llcc_tpda_in4 llcc_tpda_in5 llcc_tpda_in6 llcc_tpda_in7 llcc_tpda_out ddr_funnel1_in0 ddr_funnel1_out apps_smmu pcie_smmu intc gic_its apss_watchdog cpucp_mbox apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b_1p8 vreg_l2b_3p0 vreg_l4b_1p8 vreg_l5b_3p0 vreg_l6b_1p8 vreg_l7b_2p8 vreg_l8b_3p0 vreg_l9b_2p9 vreg_l10b_1p8 vreg_l12b_1p2 vreg_l13b_3p0 vreg_l14b_3p0 vreg_l15b_1p8 vreg_l16b_2p9 vreg_l17b_2p5 vreg_s4c_1p8 vreg_l1c_1p2 vreg_l2c_0p8 vreg_l3c_0p8 vreg_l1d_0p8 vreg_l2d_0p9 vreg_l3d_1p8 vreg_l2e_0p8 vreg_l3e_1p2 vreg_s1f_0p7 vreg_l1f_1p0 vreg_l2f_1p0 vreg_l3f_1p0 vreg_s1i_0p9 vreg_s2i_1p0 vreg_l1i_1p8 vreg_l2i_1p2 vreg_l3i_0p8 vreg_s5j_1p2 vreg_l1j_0p8 vreg_l2j_1p2 vreg_l3j_0p8 sram cpu_scp_lpri0 cpu_scp_lpri1 sbsa_watchdog qfprom gpu_speed_bin llcc_bwmon_opp_table bwmon_cluster0 bwmon_cluster2 cpu_bwmon_opp_table remoteproc_cdsp thermal_zones gpuss0_alert0 gpuss1_alert0 gpuss2_alert0 gpuss3_alert0 gpuss4_alert0 gpuss5_alert0 gpuss6_alert0 gpuss7_alert0 pmc8380_6_thermal wcd938x pmic_glink_ss0_hs_in pmic_glink_ss0_ss_in pmic_glink_ss0_con_sbu_in pmic_glink_ss1_hs_in pmic_glink_ss1_ss_in pmic_glink_ss1_con_sbu_in pmic_glink_ss2_hs_in pmic_glink_ss2_ss_in pmic_glink_ss2_con_sbu_in vreg_nvme vreg_rtmr0_1p15 vreg_rtmr0_1p8 vreg_rtmr0_3p3 vreg_rtmr1_1p15 vreg_rtmr1_1p8 vreg_rtmr1_3p3 vreg_rtmr2_1p15 vreg_rtmr2_1p8 vreg_rtmr2_3p3 vph_pwr vreg_wwan 