<8(3 ),Qualcomm Technologies, Inc. X1E80100 CRD 2qcom,x1e80100-crdqcom,x1e80100chosen=serial0:115200n8clocksxo-board 2fixed-clockIYfsleep-clk 2fixed-clockIYf3bi-tcxo-div2-clk2fixed-factor-clockYnuf2bi-tcxo-ao-div2-clk2fixed-factor-clockYnuf(cpus cpu@0cpu 2qcom,oryonpsci  psciperffl2-cache2cachefcpu@100cpu 2qcom,oryonpsci  psciperffcpu@200cpu 2qcom,oryonpsci  psciperffcpu@300cpu 2qcom,oryonpsci  psciperffcpu@10000cpu 2qcom,oryonpsci   psciperffl2-cache2cachef cpu@10100cpu 2qcom,oryonpsci   psciperffcpu@10200cpu 2qcom,oryonpsci   psciperffcpu@10300cpu 2qcom,oryonpsci   psciperffcpu@20000cpu 2qcom,oryonpsci  psciperffl2-cache2cachefcpu@20100cpu 2qcom,oryonpsci  psciperffcpu@20200cpu 2qcom,oryonpsci  psciperffcpu@20300cpu 2qcom,oryonpsci  psciperffcpu-mapcluster0core0core1core2core3cluster1core0core1core2core3cluster2fcore0core1core2core3idle-statespscicpu-sleep-02arm,idle-stateret,=@MXf(domain-idle-statescluster-sleep-02domain-idle-stateD,^=M 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2qcom,cmd-dbfaop-config@81c80000ftme-crash-dump@81ca0000ftme-log@81ce0000@fuefi-log@81ce4000@fsecdata-apss@81cff000fpdp-ns-shared@81e00000fgpu-prr@81f00000ftpm-control@81f10000fusb-ucsi-shared@81f20000fpld-pep@81f30000`fpld-gmu@81f36000`fpld-pdp@81f37000pftz-stat@82700000pfxbl-tmp-buffer@82800000fadsp-rpc-remote-heap@84b00000fspu-secure-shared-memory@853000000fadsp-boot-dtb@866c0000lfspss-region@86700000p@fadsp-boot@86b00000f video@87700000ppf adspslpi@87e00000fq6-adsp-dtb@8b800000fcdsp@8b900000fq6-cdsp-dtb@8d900000fgpu-microcode@8d9fe000 fcvp@8da00000pf camera@8e100000f av1-encoder@8e900000pf reserved-region@8f000000wpss@8fa00000f q6-wpss-dtb@913000000fxbl-sc@d8000000freserved-region@d8040000 qtee@d80e0000Rfta@d8600000`ftags@e1000000jfllcc-lpi@ff800000`fsmem@ffe00000 2qcom,smem .flinux,cma2shared-dma-poolopp-table-qup100mhz2operating-points-v2fJopp-750000000xh7/opp-100000000070opp-table-qup120mhz2operating-points-v2fCopp-750000000xh7/opp-1200000000'70smp2p-adsp 2qcom,smp2pE1 1Ycrmaster-kernelmaster-kernelfslave-kernel slave-kernelfsmp2p-cdsp 2qcom,smp2pE1 1Y^crmaster-kernelmaster-kernelfslave-kernel slave-kernelfsoc@0 2simple-bus fclock-controller@1000002qcom,x1e80100-gcc n23456789:;Yf=mailbox@4080002qcom,x1e80100-ipccqcom,ipcc@ f1dma-controller@800000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dma > <6 #disabledfAgeniqup@8c00002qcom,geni-se-qup n== *m-ahbs-ahb <# #okayfi2c@8800002qcom,geni-i2c@ (n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXBbdefault  #disabledfspi@8800002qcom,geni-spi@ (n=*seHn>>?@ !6qup-corequp-configqup-memory;pC IAANtxrxXDEbdefault  #disabledfi2c@8840002qcom,geni-i2c@@ )n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXFbdefault  #disabledfspi@8840002qcom,geni-spi@@ )n=*seHn>>?@ !6qup-corequp-configqup-memory;pC IAANtxrxXGHbdefault  #disabledfi2c@8880002qcom,geni-i2c@ *n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXIbdefault  #disabledfspi@8880002qcom,geni-spi@ *n=*seHn>>?@ !6qup-corequp-configqup-memory;pJ IAANtxrxXKLbdefault  #disabledfi2c@88c0002qcom,geni-i2c@ +n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXMbdefault  #disabledfspi@88c0002qcom,geni-spi@ +n=*seHn>>?@ !6qup-corequp-configqup-memory;pJ IAANtxrxXNObdefault  #disabledfi2c@8900002qcom,geni-i2c@ ,n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXPbdefault  #disabledfspi@8900002qcom,geni-spi@ ,n=*seHn>>?@ !6qup-corequp-configqup-memory;pJ IAANtxrxXQRbdefault  #disabledf i2c@8940002qcom,geni-i2c@@ -n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXSbdefault  #disabledf!spi@8940002qcom,geni-spi@@ -n=*seHn>>?@ !6qup-corequp-configqup-memory;pJ IAANtxrxXTUbdefault  #disabledf"serial@8940002qcom,geni-debug-uart@@ -n=*se0n>>?@6qup-corequp-config;pJXVbdefault#okayf#i2c@8980002qcom,geni-i2c@ n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXWbdefault  #disabledf$spi@8980002qcom,geni-spi@ n=*seHn>>?@ !6qup-corequp-configqup-memory;pJ IAANtxrxXXYbdefault  #disabledf%i2c@89c0002qcom,geni-i2c@ n=*seHn>>?@ !6qup-corequp-configqup-memory;7/ IAANtxrxXZbdefault  #disabledf&spi@89c0002qcom,geni-spi@ n=*seHn>>?@ !6qup-corequp-configqup-memory;pJ IAANtxrxX[\bdefault  #disabledf'dma-controller@a00000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dma      > <6 #disabledf^geniqup@ac00002qcom,geni-se-qup n== *m-ahbs-ahb <# #okayf(i2c@a800002qcom,geni-i2c@  n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxX_bdefault #okayIf)touchscreen@10 2hid-over-i2c E`3abXcbdefaultspi@a800002qcom,geni-spi@  n=*seHn>>?@]!6qup-corequp-configqup-memory;pC I^^NtxrxXdebdefault  #disabledf*i2c@a840002qcom,geni-i2c@@ !n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxXfbdefault  #disabledf+spi@a840002qcom,geni-spi@@ !n=*seHn>>?@]!6qup-corequp-configqup-memory;pC I^^NtxrxXghbdefault  #disabledf,i2c@a880002qcom,geni-i2c@ "n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxXibdefault  #disabledf-spi@a880002qcom,geni-spi@ "n=*seHn>>?@]!6qup-corequp-configqup-memory;pJ I^^NtxrxXjkbdefault  #disabledf.i2c@a8c0002qcom,geni-i2c@ #n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxXlbdefault  #disabledf/spi@a8c0002qcom,geni-spi@ #n=*seHn>>?@]!6qup-corequp-configqup-memory;pJ I^^NtxrxXmnbdefault  #disabledf0i2c@a900002qcom,geni-i2c@ $n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxXobdefault  #disabledf1spi@a900002qcom,geni-spi@ $n=*seHn>>?@]!6qup-corequp-configqup-memory;pJ I^^NtxrxXpqbdefault  #disabledf2i2c@a940002qcom,geni-i2c@@ %n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxXrbdefault  #disabledf3spi@a940002qcom,geni-spi@@ %n=*seHn>>?@]!6qup-corequp-configqup-memory;pJ I^^NtxrxXstbdefault  #disabledf4i2c@a980002qcom,geni-i2c@ &n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxXubdefault  #disabledf5spi@a980002qcom,geni-spi@ &n=*seHn>>?@]!6qup-corequp-configqup-memory;pJ I^^NtxrxXvwbdefault  #disabledf6serial@a980002qcom,geni-uart@ &n=*se0n>>?@6qup-corequp-config;pJXxbdefault #disabledf7i2c@a9c0002qcom,geni-i2c@ 'n=*seHn>>?@]!6qup-corequp-configqup-memory;7/ I^^NtxrxXybdefault  #disabledf8spi@a9c0002qcom,geni-spi@ 'n=*seHn>>?@]!6qup-corequp-configqup-memory;pJ I^^NtxrxXz{bdefault  #disabledf9dma-controller@b00000*2qcom,x1e80100-gpi-dmaqcom,sm6350-gpi-dmaLMNOPQRSTUVW > <V #disabledf|geniqup@bc00002qcom,geni-se-qup n== *m-ahbs-ahb <C #okayf:i2c@b800002qcom,geni-i2c@ un=*seHn>>?@ !6qup-corequp-configqup-memory;7/ I||NtxrxX}bdefault #okayIf;touchpad@15 2hid-over-i2c E`a~Xbdefaultkeyboard@3a 2hid-over-i2c: E`Ca~Xbdefaultspi@b800002qcom,geni-spi@ un=*seHn>>?@ !6qup-corequp-configqup-memory;pC I||NtxrxXbdefault  #disabledf<i2c@b840002qcom,geni-i2c@@ Gn=*seHn>>?@ !6qup-corequp-configqup-memory;7/ I||NtxrxXbdefault #okayIf=typec-mux@82parade,ps8830n `Xbdefault ports port@0endpoint^fport@1endpoint^fport@2endpoint^fspi@b840002qcom,geni-spi@@ Gn=*seHn>>?@ !6qup-corequp-configqup-memory;pC I||NtxrxXbdefault  #disabledf>i2c@b880002qcom,geni-i2c@ Hn=*seHn>>?@ !6qup-corequp-configqup-memory;7/ I||NtxrxXbdefault  #disabledf?serial@b880002qcom,geni-uart@ Hn=*se0n>>?@6qup-corequp-config;pJXbdefault #disabledf@spi@b880002qcom,geni-spi@ Hn=*seHn>>?@ !6qup-corequp-configqup-memory;pJ I||NtxrxXbdefault  #disabledfAi2c@b8c0002qcom,geni-i2c@ In=*seHn>>?@ !6qup-corequp-configqup-memory;7/ I||NtxrxXbdefault #okayIfBtypec-mux@82parade,ps8830n   Xbdefault ports port@0endpoint^fport@1endpoint^fport@2endpoint^fspi@b8c0002qcom,geni-spi@ In=*seHn>>?@ !6qup-corequp-configqup-memory;pJ I||NtxrxXbdefault  #disabledfCi2c@b900002qcom,geni-i2c@ Jn=*seHn>>?@ !6qup-corequp-configqup-memory;7/ I||NtxrxXbdefault  #disabledfDspi@b900002qcom,geni-spi@ Jn=*seHn>>?@ !6qup-corequp-configqup-memory;pJ I||NtxrxXbdefault  #disabledfEi2c@b940002qcom,geni-i2c@@ Kn=*seHn>>?@ !6qup-corequp-configqup-memory;7/ I||NtxrxXbdefault #okayIfFredriver@4f 2nxp,ptn3222O+9 `XbdefaultGfspi@b940002qcom,geni-spi@@ Kn=*seHn>>?@ !6qup-corequp-configqup-memory;pJ I||NtxrxXbdefault  #disabledfGi2c@b980002qcom,geni-i2c@ n=*seHn>>?@ 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&fremoteproc@68000002qcom,x1e80100-adsp-pas<E#Rwdogfatalreadyhandoverstop-ackn*xo;;lcxlmxn!\stop#okay2jqcom/x1e80100/adsp.mbnqcom/x1e80100/adsp_dtb.mbnfZglink-edgeE1 1lpassrfastrpc 2qcom,fastrpcfastrpcglink-apps-dspadsp compute-cb@32qcom,fastrpc-compute-cb<<ccompute-cb@42qcom,fastrpc-compute-cb<<dcompute-cb@52qcom,fastrpc-compute-cb<<ecompute-cb@62qcom,fastrpc-compute-cb<<fcompute-cb@72qcom,fastrpc-compute-cb<<ggpr 2qcom,gpr adsp_apps) service@1 2qcom,q6apm6Gavs/audiomsm/adsp/audio_pdfbedais2qcom,q6apm-lpass-dais6fdais2qcom,q6apm-dais<<af[service@2 2qcom,q6prmGavs/audiomsm/adsp/audio_pdf\clock-controller2qcom,q6prm-lpass-clocksYfcodec@6aa0000:2qcom,x1e80100-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro(nDfg*mclkmacrodcodecfsgenY wsa2-mclk6^WSA2fsoundwire@6ab00002qcom,soundwire-v2.0.0n*iface WSA2Xbdefaultswr_audio_cgcrp ??         < 6#okayfspeaker@0,02sdw20217020400  6 ^WooferRightTbc~q fspeaker@0,12sdw20217020400  6 ^TweeterRightTbc~q fcodec@6ac000082qcom,x1e80100-lpass-rx-macroqcom,sm8550-lpass-rx-macro(n@fg*mclkmacrodcodecfsgenYmclk6fsoundwire@6ad00002qcom,soundwire-v2.0.0n*iface RXXbdefaultswr_audio_cgcrp           < 6#okayfcodec@0,42sdw20217010d00fcodec@6ae000082qcom,x1e80100-lpass-tx-macroqcom,sm8550-lpass-tx-macro(n9fg*mclkmacrodcodecfsgenYmclk6fcodec@6b00000:2qcom,x1e80100-lpass-wsa-macroqcom,sm8550-lpass-wsa-macro(nBfg*mclkmacrodcodecfsgenYmclk6^WSAfsoundwire@6b100002qcom,soundwire-v2.0.0n*iface WSAXbdefaultswr_audio_cgcrp ??         < 6#okayfspeaker@0,02sdw20217020400  6 ^WooferLeftTbc~q fspeaker@0,12sdw20217020400  6 ^TweeterLeftTbc~q fclock-controller@6b6c00062qcom,x1e80100-lpassaudioccqcom,sc8280xp-lpassaudioccYfsoundwire@6d300002qcom,soundwire-v2.0.0n*iface RcorewakeupTXswr_audio_cgcrXbdefaultp< 6#okayfcodec@0,32sdw20217010d00fcodec@6d4400082qcom,x1e80100-lpass-va-macroqcom,sm8550-lpass-va-macro@$n9fg*mclkmacrodcodecYfsgen6XbdefaultI>fpinctrl@6e80000>2qcom,x1e80100-lpass-lpi-pinctrlqcom,sm8550-lpass-lpi-pinctrl %nfg *coreaudio ftx-swr-active-statefclk-pins gpio0 swr_tx_clk " 1 ;data-pins gpio1gpio2 swr_tx_data " 1 Hrx-swr-active-statefclk-pins gpio3 swr_rx_clk " 1 ;data-pins gpio4gpio5 swr_rx_data " 1 Hdmic01-default-statefclk-pins gpio6 dmic1_clk " Vdata-pins gpio7 dmic1_data " bdmic23-default-statefclk-pins gpio8 dmic2_clk " Vdata-pins gpio9 dmic2_data " bwsa-swr-active-statefclk-pins gpio10 wsa_swr_clk " 1 ;data-pins gpio11 wsa_swr_data " 1 Hwsa2-swr-active-statefclk-pins gpio15 wsa2_swr_clk " 1 ;data-pins gpio16 wsa2_swr_data " 1 Hspkr-01-sd-n-active-state gpio12 gpio " ; ofspkr-23-sd-n-active-state gpio13 gpio " ; ofclock-controller@6ea0000,2qcom,x1e80100-lpassccqcom,sc8280xp-lpasscc Yfinterconnect@7e400002qcom,x1e80100-lpass-ag-noc&f]interconnect@74000002qcom,x1e80100-lpass-lpiaon-noc@&f^interconnect@74300002qcom,x1e80100-lpass-lpicx-nocC&fmmc@8804000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@Rhc_irqpwr_irqn==2*ifacecorexo <  zd, h;p0n !?@6sdhc-ddrcpu-sdhc  #disabledf_opp-table2operating-points-v2fopp-192000000$7opp-5000000007/opp-100000000070opp-2020000000 F7mmc@8844000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@Rhc_irqpwr_irqn==2*ifacecorexo <` zd, h;p0n !?@6sdhc-ddrcpu-sdhc  #disabledf`opp-table2operating-points-v2fopp-192000000$7opp-5000000007/opp-100000000070opp-2020000000 F7phy@88e000082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTGn" *ref=9 #disabledfphy@88e100082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTGn"*ref=4#okayfphy@88e200082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy TGn"*ref=5#okayfphy@88e30002qcom,x1e80100-qmp-usb3-uni-phy0  n===*auxrefcom_auxpipe=G=L phyphy_phy=Yusb_mp_phy0_pipe_clkG#okayfphy@88e50002qcom,x1e80100-qmp-usb3-uni-phyP  n===*auxrefcom_auxpipe=H=M phyphy_phy=Yusb_mp_phy1_pipe_clkG#okayfusb@a0f88002qcom,x1e80100-dwc3qcom,dwc3 Hn====== ===R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys5==E$ 4Er:9 1Rpwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq=7=A0n!?@%6usb-ddrapps-usb #okayfausb@a000000 2snps,dwc3  a < : usb2-phyusb3-phy      %hostfbports port@0endpoint^fport@1endpoint^fusb@a2f88002qcom,x1e80100-dwc3qcom,dwc3 / Hn====== ===R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys5==E$ (E21&Rpwr_eventdp_hs_phy_irqdm_hs_phy_irq=7==0n!?@"6usb-ddrapps-usb - #disabledfcusb@a200000 2snps,dwc3   < usb2-phy Jhigh-speed  fdportendpointfeusb@a4f8800 2qcom,x1e80100-dwc3-mpqcom,dwc3 OHn====== ===R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys5==E$ E9:58436578lRpwr_event_1pwr_event_2hs_phy_1hs_phy_2dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2ss_phy_1ss_phy_2=7=>0n!?@&6usb-ddrapps-usb #okayffusb@a400000 2snps,dwc3 @ 3 < usb2-0usb3-0usb2-1usb3-1 %host     fgusb@a6f88002qcom,x1e80100-dwc3qcom,dwc3 oHn==== == ===R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys5==E$ 4Es=1Rpwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq=7=? #okayfhusb@a600000 2snps,dwc3 ` c <  8 usb2-phyusb3-phy      %hostfiports port@0endpoint^fport@1endpoint^fusb@a8f88002qcom,x1e80100-dwc3qcom,dwc3 Hn== === = ===R*cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys5= = E$ 4Et< /1Rpwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq=7=@0n!?@$6usb-ddrapps-usb #okayfjusb@a800000 2snps,dwc3  e <` 9 usb2-phyusb3-phy      %hostfkports port@0endpoint^fport@1endpoint^fvideo-codec@aa00000$2qcom,x1e80100-irisqcom,sm8550-iris   ; ;venusvcodec0mxcmmcxp n=Y*ifacecorevcodec0_core0n?@* !6cpu-cfgvideo-mem\ =Xbus<@<G#okayflopp-table2operating-points-v2f opp-1920000000 q7  opp-2400000000N70/opp-3380000000%x700opp-3660000000з70opp-4440000000v7opp-4810000000z@7 clock-controller@aaf00002qcom,x1e80100-videocc  n2=X;; 7//Yfdisplay-subsystem@ae000002qcom,x1e80100-mdss mdss Sn=&:Hn ? !!?@6mdp0-memmdp1-memcpu-cfg < #okayfdisplay-controller@ae010002qcom,x1e80100-dpu   mdpvbifE(n=&=:F*nrt_busifacelutcorevsyncp;fmports port@0endpoint^fport@4endpoint^fport@5endpoint^f"port@6endpoint^fopp-table2operating-points-v2fopp-2000000000 7/opp-3250000000_@70opp-3750000000Z 7opp-51400000007opp-5750000000"E7displayport-controller@ae900002qcom,x1e80100-dpP     E 0n J*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel5 X888p;8 dp6 ^DisplayPort0#okayfnports port@0endpoint^fport@1endpoint o^ z`=Av1fopp-table2operating-points-v2fopp-1600000000 h7/opp-2700000000߀70opp-5400000000 /7opp-81000000000G7displayport-controller@ae980002qcom,x1e80100-dpP    E 0nJ*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel5  X999p;9 dp6 ^DisplayPort1#okayfoports port@0endpoint^fport@1endpoint o^ z`=Av1fopp-table2operating-points-v2fopp-1600000000 h7/opp-2700000000߀70opp-5400000000 /7opp-81000000000G7displayport-controller@ae9a0002qcom,x1e80100-dpP    E0n"$'(*J*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel5%)+ X:::p;: dp6 ^DisplayPort2#okayfpports port@0endpoint^fport@1endpoint o^ z`=Av1fopp-table2operating-points-v2fopp-1600000000 h7/opp-2700000000߀70opp-5400000000 /7opp-81000000000G7displayport-controller@aea00002qcom,x1e80100-dpP     E(n-/23;*core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel504 Xp ; dp ^DisplayPort3#okayX!bdefaultfqports port@0endpoint^"fport@1endpoint o z`=Av1^#f'opp-table2operating-points-v2f opp-1600000000 h7/opp-2700000000߀70opp-5400000000 /7opp-81000000000G7aux-buspanel&2samsung,atna45af01samsung,atna33xc20 $ %X&bdefaultportendpoint^'f#phy@aec2a002qcom,x1e80100-dp-phy@ * " & n"" *auxcfg_ahbref;YG #disabledfrphy@aec5a002qcom,x1e80100-dp-phy@ Z R V Pn-" *auxcfg_ahbref;YG#okayfclock-controller@af000002qcom,x1e80100-dispcc dn2(=%38899::;7/Yfinterrupt-controller@b2200002qcom,x1e80100-pdcqcom,pdc "@dH **/ 4ca  0fpower-management@c300000%2qcom,x1e80100-aoss-qmpqcom,aoss-qmp 01E1 1Yfsram@c3f00002qcom,rpmh-stats ?arbiter@c4000002qcom,x1e80100-spmi-pmic-arb0 @0 P@ Dcorechnlsobsrvr  fsspmi@c42d000 B@ L cnfgintr Rperiph_irq E ftpmic@02qcom,pm8550qcom,spmi-pmic fupon@13002qcom,pmk8350-pon hlospbsfvpwrkey2qcom,pmk8350-pwrkey tfwresin2qcom,pmk8350-resin #disabledfxrtc@61002qcom,pmk8350-rtcab rtcalarmb  fynvram@71002qcom,spmi-sdamq  qfzreboot-reason@48H f{nvram@7e002qcom,spmi-sdam~  ~f|charge-limit-en@73sfcharge-limit-end@75ufcharge-limit-delta@76vfgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio )f)pwm2qcom,pmk8550-pwm  #disabledf}pmic@12qcom,pm8550qcom,spmi-pmic f~temp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio  fkypd-vol-up-n-state gpio6 normal   bfrtmr0-reset-n-active-state gpio10 normal  ;  &fusb0-3p3-reg-en-state gpio11 normal  ;  &fled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led #disabledfpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm  #disabledfpmic@22qcom,pm8550qcom,spmi-pmic ftemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio *f*pmic@32qcom,pmc8380qcom,spmi-pmic ftemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio $ f$edp-bl-en-state gpio4 normal   &f&pmic@42qcom,pmc8380qcom,spmi-pmic ftemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio + f+pmic@52qcom,pmc8380qcom,spmi-pmic ftemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio , f,usb0-pwr-1p15-reg-en-state gpio8 normal  ;  &fpmic@62qcom,pmc8380qcom,spmi-pmic ftemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio - f-pmic@82qcom,pm8550qcom,spmi-pmic ftemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio .f.misc-3p3-reg-en-state gpio6 normal ;  & 4  Dfpmic@92qcom,pm8550qcom,spmi-pmic  ftemp-alarm@a002qcom,spmi-temp-alarm  pfgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio /f/usb0-1p8-reg-en-state gpio8 normal  ;  &fpmic@c2qcom,pm8010qcom,spmi-pmic   #disabledftemp-alarm@24002qcom,spmi-temp-alarm$ $pfspmi@c432000 C @ M cnfgintr Rperiph_irq E fpmic@72qcom,smb2360qcom,spmi-pmic #okayfphy@fd002qcom,smb2360-eusb2-repeaterG X0 e1fpmic@a2qcom,smb2360qcom,spmi-pmic  #okayfphy@fd002qcom,smb2360-eusb2-repeaterG X0 e2fpmic@b2qcom,smb2360qcom,spmi-pmic  #okayfphy@fd002qcom,smb2360-eusb2-repeaterG X0 e3fpmic@c2qcom,smb2360qcom,spmi-pmic   #disabledfphy@fd002qcom,smb2360-eusb2-repeaterGfpinctrl@f1000002qcom,x1e80100-tlmm  ` q ",f`edp0-hpd-default-state gpio119 edp0_hot ;f!qup-i2c0-data-clk-state gpio0gpio1 qup0_se0 " f}qup-i2c1-data-clk-state gpio4gpio5 qup0_se1 " fqup-i2c2-data-clk-state gpio8gpio9 qup0_se2 " fqup-i2c3-data-clk-state gpio12gpio13 qup0_se3 " fqup-i2c4-data-clk-state gpio16gpio17 qup0_se4 " fqup-i2c5-data-clk-state gpio20gpio21 qup0_se5 " fqup-i2c6-data-clk-state gpio24gpio25 qup0_se6 " fqup-i2c7-data-clk-state gpio14gpio15 qup0_se7 " fqup-i2c8-data-clk-state gpio32gpio33 qup1_se0 " f_qup-i2c9-data-clk-state gpio36gpio37 qup1_se1 " ffqup-i2c10-data-clk-state gpio40gpio41 qup1_se2 " fiqup-i2c11-data-clk-state gpio44gpio45 qup1_se3 " flqup-i2c12-data-clk-state gpio48gpio49 qup1_se4 " foqup-i2c13-data-clk-state gpio52gpio53 qup1_se5 " frqup-i2c14-data-clk-state gpio56gpio57 qup1_se6 " fuqup-i2c15-data-clk-state gpio54gpio55 qup1_se7 " fyqup-i2c16-data-clk-state gpio64gpio65 qup2_se0 " fBqup-i2c17-data-clk-state gpio68gpio69 qup2_se1 " fFqup-i2c18-data-clk-state gpio72gpio73 qup2_se2 " fIqup-i2c19-data-clk-state gpio76gpio77 qup2_se3 " fMqup-i2c20-data-clk-state gpio80gpio81 qup2_se4 " fPqup-i2c21-data-clk-state gpio84gpio85 qup2_se5 " fSqup-i2c22-data-clk-state gpio88gpio89 qup2_se6 " fWqup-i2c23-data-clk-state gpio86gpio87 qup2_se7 " fZqup-spi0-cs-state gpio3 qup0_se0 " ;fqup-spi0-data-clk-state gpio0gpio1gpio2 qup0_se0 " ;fqup-spi1-cs-state gpio7 qup0_se1 " ;fqup-spi1-data-clk-state gpio4gpio5gpio6 qup0_se1 " ;fqup-spi2-cs-state gpio11 qup0_se2 " ;fqup-spi2-data-clk-state gpio8gpio9gpio10 qup0_se2 " ;fqup-spi3-cs-state gpio15 qup0_se3 " ;fqup-spi3-data-clk-state gpio12gpio13gpio14 qup0_se3 " ;fqup-spi4-cs-state gpio19 qup0_se4 " ;fqup-spi4-data-clk-state gpio16gpio17gpio18 qup0_se4 " ;fqup-spi5-cs-state gpio23 qup0_se5 " ;fqup-spi5-data-clk-state gpio20gpio21gpio22 qup0_se5 " ;fqup-spi6-cs-state gpio27 qup0_se6 " ;fqup-spi6-data-clk-state gpio24gpio25gpio26 qup0_se6 " ;fqup-spi7-cs-state gpio13 qup0_se7 " ;fqup-spi7-data-clk-state gpio14gpio15gpio12 qup0_se7 " ;fqup-spi8-cs-state gpio35 qup1_se0 " ;fequp-spi8-data-clk-state gpio32gpio33gpio34 qup1_se0 " ;fdqup-spi9-cs-state gpio39 qup1_se1 " ;fhqup-spi9-data-clk-state gpio36gpio37gpio38 qup1_se1 " ;fgqup-spi10-cs-state gpio43 qup1_se2 " ;fkqup-spi10-data-clk-state gpio40gpio41gpio42 qup1_se2 " ;fjqup-spi11-cs-state gpio47 qup1_se3 " ;fnqup-spi11-data-clk-state gpio44gpio45gpio46 qup1_se3 " ;fmqup-spi12-cs-state gpio51 qup1_se4 " ;fqqup-spi12-data-clk-state gpio48gpio49gpio50 qup1_se4 " ;fpqup-spi13-cs-state gpio55 qup1_se5 " ;ftqup-spi13-data-clk-state gpio52gpio53gpio54 qup1_se5 " ;fsqup-spi14-cs-state gpio59 qup1_se6 " ;fwqup-spi14-data-clk-state gpio56gpio57gpio58 qup1_se6 " ;fvqup-spi15-cs-state gpio53 qup1_se7 " ;f{qup-spi15-data-clk-state gpio54gpio55gpio52 qup1_se7 " ;fzqup-spi16-cs-state gpio67 qup2_se0 " ;fEqup-spi16-data-clk-state gpio64gpio65gpio66 qup2_se0 " ;fDqup-spi17-cs-state gpio71 qup2_se1 " ;fHqup-spi17-data-clk-state gpio68gpio69gpio70 qup2_se1 " ;fGqup-spi18-cs-state gpio75 qup2_se2 " ;fLqup-spi18-data-clk-state gpio72gpio73gpio74 qup2_se2 " ;fKqup-spi19-cs-state gpio79 qup2_se3 " ;fOqup-spi19-data-clk-state gpio76gpio77gpio78 qup2_se3 " ;fNqup-spi20-cs-state gpio83 qup2_se4 " ;fRqup-spi20-data-clk-state gpio80gpio81gpio82 qup2_se4 " ;fQqup-spi21-cs-state gpio87 qup2_se5 " ;fUqup-spi21-data-clk-state gpio84gpio85gpio86 qup2_se5 " ;fTqup-spi22-cs-state gpio91 qup2_se6 " ;fYqup-spi22-data-clk-state gpio88gpio89gpio90 qup2_se6 " ;fXqup-spi23-cs-state gpio85 qup2_se7 " ;f\qup-spi23-data-clk-state gpio86gpio87gpio84 qup2_se7 " ;f[qup-uart2-default-statefcts-pins gpio8 qup0_se2 " ;rts-pins gpio9 qup0_se2 " ;tx-pins gpio10 qup0_se2 " ;rx-pins gpio11 qup0_se2 " ;qup-uart14-default-statefxcts-pins gpio56 qup1_se6 Hrts-pins gpio57 qup1_se6 " ;tx-pins gpio58 qup1_se6 " ;rx-pins gpio59 qup1_se6 qup-uart21-default-statefVtx-pins gpio86 qup2_se5 " ;rx-pins gpio87 qup2_se5 " ;sdc2-default-statefclk-pins sdc2_clk " ;cmd-pins sdc2_cmd "  data-pins sdc2_data "  sdc2-sleep-statefclk-pins sdc2_clk " ;cmd-pins sdc2_cmd " data-pins sdc2_data " edp-reg-en-state gpio70 gpio " ;feusb6-reset-n-state gpio184 gpio " ; ofhall-int-n-state gpio92 gpio ;fkybd-default-state gpio67 gpio ;fnvme-reg-en-state gpio18 gpio " ;fpcie4-default-statefclkreq-n-pins gpio147 pcie4_clk " perst-n-pins gpio146 gpio " ;wake-n-pins gpio148 gpio " pcie5-default-statefclkreq-n-pins gpio150 pcie5_clk " perst-n-pins gpio149 gpio " ;wake-n-pins gpio151 gpio " pcie6a-default-statefclkreq-n-pins gpio153 pcie6a_clk " perst-n-pins gpio152 gpio " ;wake-n-pins gpio154 gpio " rtmr1-reset-n-active-state gpio176 gpio " ;frtmr2-reset-n-active-state gpio185 gpio " ;ftpad-default-state gpio3 gpio ;fts0-default-statefcint-n-pins gpio51 gpio ;reset-n-pins gpio48 gpio V "usb1-pwr-1p15-reg-en-state gpio188 gpio " ;fusb1-pwr-1p8-reg-en-state gpio175 gpio " ;fusb1-pwr-3p3-reg-en-state gpio186 gpio " ;fusb2-pwr-1p15-reg-en-state gpio189 gpio " ;fusb2-pwr-1p8-reg-en-state gpio126 gpio " ;fusb2-pwr-3p3-reg-en-state gpio187 gpio " ;fwcd-reset-n-active-state gpio191 gpio " ; ofwwan-sw-en-state gpio221 gpio " ;fstm@10002000 2arm,coresight-stmarm,primecell  (stm-basestm-stimulus-basen *apb_pclkout-portsportendpoint^4f;tpdm@10003000"2qcom,coresight-tpdmarm,primecell0n *apb_pclk   #disabledout-portsportendpoint^5f6tpda@10004000"2qcom,coresight-tpdaarm,primecell@n *apb_pclkin-ports port@0endpoint^6f5port@1endpoint^7f9out-portsportendpoint^8f:tpdm@1000f000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^9f7funnel@10041000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-ports port@6endpoint^:f8port@7endpoint^;f4out-portsportendpoint^<fAfunnel@10042000+2arm,coresight-dynamic-funnelarm,primecell n *apb_pclkin-ports port@2endpoint^=fport@5endpoint^>fQport@6endpoint^?fyout-portsportendpoint^@fBfunnel@10045000+2arm,coresight-dynamic-funnelarm,primecellPn *apb_pclkin-ports port@0endpoint^Af<port@1endpoint^Bf@out-portsportendpoint^CfTtpdm@10800000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^Df}tpdm@1082c000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^Efrtpdm@10841000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^Ffptpdm@10844000"2qcom,coresight-tpdmarm,primecell@n *apb_pclk  out-portsportendpoint^GfHfunnel@10846000+2arm,coresight-dynamic-funnelarm,primecell`n *apb_pclkin-portsportendpoint^HfGout-portsportendpoint^Ifocti@1098b000 2arm,coresight-ctiarm,primecelln *apb_pclktpdm@109d0000"2qcom,coresight-tpdmarm,primecelln *apb_pclk   #disabledout-portsportendpoint^Jfqtpdm@10ac0000"2qcom,coresight-tpdmarm,primecelln *apb_pclk   #disabledout-portsportendpoint^KfMtpdm@10ac1000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^LfNtpda@10ac4000"2qcom,coresight-tpdaarm,primecell@n *apb_pclkin-ports port@8endpoint^MfKport@9 endpoint^NfLout-portsportendpoint^OfPfunnel@10ac5000+2arm,coresight-dynamic-funnelarm,primecellPn *apb_pclkin-portsportendpoint^PfOout-portsportendpoint^Qf>funnel@10b04000+2arm,coresight-dynamic-funnelarm,primecell@n *apb_pclkin-ports port@3endpoint^Rfiport@6endpoint^Sf_port@7endpoint^TfCout-portsportendpoint^UfVtmc@10b05000 2arm,coresight-tmcarm,primecellPn *apb_pclkfin-portsportendpoint^VfUout-portsportendpoint^WfXreplicator@10b06000/2arm,coresight-dynamic-replicatorarm,primecell`n *apb_pclkin-portsportendpoint^XfWout-portsportendpoint^Yftpda@10b08000"2qcom,coresight-tpdaarm,primecelln *apb_pclkin-ports port@0endpoint^Zf`port@1endpoint^[faport@2endpoint^\fbport@3endpoint^]fcport@4endpoint^^fdout-portsportendpoint^_fStpdm@10b09000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^`fZtpdm@10b0a000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^af[tpdm@10b0b000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^bf\tpdm@10b0c000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^cf]tpdm@10b0d000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^df^tpdm@10b20000"2qcom,coresight-tpdmarm,primecelln *apb_pclk   #disabledout-portsportendpoint^efftpda@10b23000"2qcom,coresight-tpdaarm,primecell0n *apb_pclk #disabledin-portsportendpoint^ffeout-portsportendpoint^gfhfunnel@10b24000+2arm,coresight-dynamic-funnelarm,primecell@n *apb_pclk #disabledin-portsportendpoint^hfgout-portsportendpoint^ifRtpdm@10c08000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^jfkfunnel@10c0b000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-ports port@4endpoint^kfjout-portsportendpoint^lf|tpdm@10c28000"2qcom,coresight-tpdmarm,primecell€n *apb_pclk  out-portsportendpoint^mfstpdm@10c29000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @ out-portsportendpoint^nfttpda@10c2b000"2qcom,coresight-tpdaarm,primecell°n *apb_pclkin-ports port@4endpoint^ofIport@13endpoint^pfFport@14endpoint^qfJport@15endpoint^rfEport@1aendpoint^sfmport@1bendpoint^tfnout-portsportendpoint^ufvfunnel@10c2c000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-ports port@0endpoint^vfuport@4endpoint^wfport@5endpoint^xfout-portsportendpoint^yf?tpdm@10c38000"2qcom,coresight-tpdmarm,primecellÀn *apb_pclk @ out-portsportendpoint^zf~tpdm@10c39000"2qcom,coresight-tpdmarm,primecellÐn *apb_pclk @ out-portsportendpoint^{ftpda@10c3c000"2qcom,coresight-tpdaarm,primecelln *apb_pclkin-ports port@4endpoint^|flport@fendpoint^}fDport@10endpoint^~fzport@11endpoint^f{out-portsportendpoint^ffunnel@10c3d000+2arm,coresight-dynamic-funnelarm,primecelln *apb_pclkin-portsportendpoint^fout-portsportendpoint^fwtpdm@10cc1000"2qcom,coresight-tpdmarm,primecelln *apb_pclk @    #disabledout-portsportendpoint^ftpda@10cc4000"2qcom,coresight-tpdaarm,primecell@n *apb_pclkin-ports port@2endpoint^fout-portsportendpoint^ffunnel@10cc5000+2arm,coresight-dynamic-funnelarm,primecellPn *apb_pclkin-portsportendpoint^fout-portsportendpoint^f=funnel@10d04000+2arm,coresight-dynamic-funnelarm,primecell@n *apb_pclkin-ports port@6endpoint^fout-portsportendpoint^fxtpdm@10d08000"2qcom,coresight-tpdmarm,primecellЀn *apb_pclk  out-portsportendpoint^ftpdm@10d09000"2qcom,coresight-tpdmarm,primecellАn *apb_pclk  out-portsportendpoint^ftpdm@10d0a000"2qcom,coresight-tpdmarm,primecellРn *apb_pclk  out-portsportendpoint^ftpdm@10d0b000"2qcom,coresight-tpdmarm,primecellаn *apb_pclk  out-portsportendpoint^ftpdm@10d0c000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpdm@10d0d000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpdm@10d0e000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpdm@10d0f000"2qcom,coresight-tpdmarm,primecelln *apb_pclk  out-portsportendpoint^ftpda@10d12000"2qcom,coresight-tpdaarm,primecell n *apb_pclkin-ports port@0endpoint^fport@1endpoint^fport@2endpoint^fport@3endpoint^fport@4endpoint^fport@5endpoint^fport@6endpoint^fport@7endpoint^fout-portsportendpoint^ffunnel@10d13000+2arm,coresight-dynamic-funnelarm,primecell0n *apb_pclkin-portsportendpoint^fout-portsportendpoint^fiommu@1500000012qcom,x1e80100-smmu-500qcom,smmu-500arm,mmu-500Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYf<iommu@15400000 2arm,smmu-v3@$Reventqgerrorcmdq-sync #reservedfinterrupt-controller@17000000 2arm,gic-v3 0     fmsi-controller@170400002arm,gic-v3-its  fwatchdog@17410000%2qcom,apss-wdt-x1e80100qcom,kpss-wdtAn3  #reservedfmailbox@174300002qcom,x1e80100-cpucp-mbox C f#rsc@175000002qcom,rpmh-rsc0PQRdrv-0drv-1drv-2$ *  : F apps_rsc-fbcm-voter2qcom,bcm-voterf&clock-controller2qcom,x1e80100-rpmh-clkn*xoYfpower-controller2qcom,x1e80100-rpmhpdpf;opp-table2operating-points-v2fopp-16fopp-480fopp-524fopp-568f opp-60<fopp-64@f/opp-80Pfopp-128f0opp-144fopp-192fopp-256fopp-320@fopp-336Pfopp-384f opp-416fregulators-02qcom,pm8550-rpmh-regulators Vb c s        bob1 vreg_bob1 - 6opp-1{q@opp-2{|opp-3{opp-4{Ȁopp-5{`@pmu@240b6400*2qcom,x1e80100-cpu-bwmonqcom,sdm845-bwmon$ d En?? psystem-cache-controller@250000002qcom,x1e80100-llcc% % %@ %` % % % % & & llcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_basellcc_broadcast_and_base  remoteproc@323000002qcom,x1e80100-cdsp-pas20@EB#Rwdogfatalreadyhandoverstop-ackn*xo;; ;  cxmxcnspn!\stop#okay2jqcom/x1e80100/cdsp.mbnqcom/x1e80100/cdsp_dtb.mbnfglink-edgeE1 1cdsprfastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@12qcom,fastrpc-compute-cb <  compute-cb@22qcom,fastrpc-compute-cb <  compute-cb@32qcom,fastrpc-compute-cb <  compute-cb@42qcom,fastrpc-compute-cb <  compute-cb@52qcom,fastrpc-compute-cb <  compute-cb@62qcom,fastrpc-compute-cb <  compute-cb@72qcom,fastrpc-compute-cb <  compute-cb@82qcom,fastrpc-compute-cb <  compute-cb@102qcom,fastrpc-compute-cb  < compute-cb@112qcom,fastrpc-compute-cb  < compute-cb@122qcom,fastrpc-compute-cb  <  compute-cb@132qcom,fastrpc-compute-cb  <  timer2arm,armv8-timer0   thermal-zonesfaoss0-thermal tripstrip-point0 _hotaoss0-critical 8 criticalcpu0-0-top-thermal tripscpu-critical 8 criticalcpu0-0-btm-thermal tripscpu-critical 8 criticalcpu0-1-top-thermal tripscpu-critical 8 criticalcpu0-1-btm-thermal tripscpu-critical 8 criticalcpu0-2-top-thermal tripscpu-critical 8 criticalcpu0-2-btm-thermal tripscpu-critical 8 criticalcpu0-3-top-thermal tripscpu-critical 8 criticalcpu0-3-btm-thermal tripscpu-critical 8 criticalcpuss0-top-thermal  tripscpuss2-critical 8 criticalcpuss0-btm-thermal  tripscpuss2-critical 8 criticalmem-thermal  tripstrip-point0 _hotmem-critical 8 criticalvideo-thermal  tripstrip-point0 _hotvideo-critical 8 criticalaoss1-thermal tripstrip-point0 _hotaoss0-critical 8 criticalcpu1-0-top-thermal tripscpu-critical 8 criticalcpu1-0-btm-thermal tripscpu-critical 8 criticalcpu1-1-top-thermal tripscpu-critical 8 criticalcpu1-1-btm-thermal tripscpu-critical 8 criticalcpu1-2-top-thermal tripscpu-critical 8 criticalcpu1-2-btm-thermal tripscpu-critical 8 criticalcpu1-3-top-thermal tripscpu-critical 8 criticalcpu1-3-btm-thermal tripscpu-critical 8 criticalcpuss1-top-thermal  tripscpuss2-critical 8 criticalcpuss1-btm-thermal  tripscpuss2-critical 8 criticalaoss2-thermal tripstrip-point0 _hotaoss0-critical 8 criticalcpu2-0-top-thermal tripscpu-critical 8 criticalcpu2-0-btm-thermal tripscpu-critical 8 criticalcpu2-1-top-thermal tripscpu-critical 8 criticalcpu2-1-btm-thermal tripscpu-critical 8 criticalcpu2-2-top-thermal tripscpu-critical 8 criticalcpu2-2-btm-thermal tripscpu-critical 8 criticalcpu2-3-top-thermal tripscpu-critical 8 criticalcpu2-3-btm-thermal tripscpu-critical 8 criticalcpuss2-top-thermal  tripscpuss2-critical 8 criticalcpuss2-btm-thermal  tripscpuss2-critical 8 criticalaoss3-thermal tripstrip-point0 _hotaoss0-critical 8 criticalnsp0-thermal tripstrip-point0 _hotnsp0-critical 8 criticalnsp1-thermal tripstrip-point0 _hotnsp1-critical 8 criticalnsp2-thermal tripstrip-point0 _hotnsp2-critical 8 criticalnsp3-thermal tripstrip-point0 _hotnsp3-critical 8 criticalgpuss-0-thermal cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalgpuss-1-thermal cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalgpuss-2-thermal cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalgpuss-3-thermal cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalgpuss-4-thermal  cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalgpuss-5-thermal  cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalgpuss-6-thermal  cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalgpuss-7-thermal  cooling-mapsmap0% *tripstrip-point0 spassivefgpu-critical 8 criticalcamera0-thermal  tripstrip-point0 _hotcamera0-critical 8 criticalcamera1-thermal tripstrip-point0 _hotcamera0-critical 8 criticalpm8550-thermald tripstrip0 spassivetrip1 8hotpm8550ve-2-thermald tripstrip0 spassivetrip1 8hotpmc8380-3-thermald tripstrip0 spassivetrip1 8hotpmc8380-4-thermald tripstrip0 spassivetrip1 8hotpmc8380-5-thermald tripstrip0 spassivetrip1 8hotpmc8380-6-thermald ftripstrip0 spassivetrip1 8hotpm8550ve-8-thermald tripstrip0 spassivetrip1 8hotpm8550ve-9-thermald tripstrip0 spassivetrip1 8hotpm8010-thermald tripstrip0 spassivetrip1 8hotaliases$9/soc@0/geniqup@8c0000/serial@894000audio-codec2qcom,wcd9385-codecbdefaultXAw@Yw@qw@w@ $I     P' `6bFbcbV6fgpio-keys 2gpio-keysXbdefaultkey-vol-up volume_up  sswitch-lidlid `\j {pmic-glink@2qcom,x1e80100-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink $`y`{`} ?4Kcharge_limit_encharge_limit_endcharge_limit_deltaconnector@02usb-c-connectordualdualports port@0endpoint^fport@1endpoint^fport@2endpoint^fconnector@12usb-c-connectordualdualports port@0endpoint^fport@1endpoint^fport@2endpoint^fconnector@22usb-c-connectordualdualports port@0endpoint^fport@1endpoint^fport@2endpoint^fsound2qcom,x1e80100-sndcard ,X1E80100-CRDWooferLeft INWSA WSA_SPK1 OUTTweeterLeft INWSA WSA_SPK2 OUTWooferRight INWSA2 WSA_SPK2 OUTTweeterRight INWSA2 WSA_SPK2 OUTIN1_HPHLHPHL_OUTIN2_HPHRHPHR_OUTAMIC2MIC BIAS2VA DMIC0MIC BIAS3VA DMIC1MIC BIAS3VA DMIC2MIC BIAS1VA DMIC3MIC BIAS1TX SWR_INPUT1ADC2_OUTPUTwcd-playback-dai-link WCD Playbackcpuqcodecplatformwcd-capture-dai-link WCD Capturecpuxcodecplatformwsa-dai-link WSA Playbackcpuicodec0platformva-dai-link VA Capturecpuncodecplatformregulator-edp-3p32regulator-fixed VREG_EDP_3P3 2Z 62Z `FXbdefaultf%regulator-misc-3p32regulator-fixed VREG_MISC_3P3 2Z 62Z .bdefaultX efaregulator-nvme2regulator-fixed VREG_NVME_3P3 2Z 62Z `bdefaultXfregulator-rtmr0-1p152regulator-fixed VREG_RTMR0_1P15 0 60 ,Xbdefaultfregulator-rtmr0-1p82regulator-fixed VREG_RTMR0_1P8 w@ 6w@ /Xbdefaultfregulator-rtmr0-3p32regulator-fixed VREG_RTMR0_3P3 2Z 62Z  Xbdefaultfregulator-rtmr1-1p152regulator-fixed VREG_RTMR1_1P15 0 60 `Xbdefaultfregulator-rtmr1-1p82regulator-fixed VREG_RTMR1_1P8 w@ 6w@ `Xbdefaultfregulator-rtmr1-3p32regulator-fixed VREG_RTMR1_3P3 2Z 62Z `Xbdefaultfregulator-rtmr2-1p152regulator-fixed VREG_RTMR2_1P15 0 60 `Xbdefaultfregulator-rtmr2-1p82regulator-fixed VREG_RTMR2_1P8 w@ 6w@ `~Xbdefaultfregulator-rtmr2-3p32regulator-fixed VREG_RTMR2_3P3 2Z 62Z `Xbdefaultfregulator-vph-pwr2regulator-fixed vph_pwr 8u  68u  efregulator-wwan2regulator-fixed SDX_VPH_PWR 2Z 62Z `Xbdefaultf__symbols__/clocks/xo-board /clocks/sleep-clk/clocks/bi-tcxo-div2-clk"/clocks/bi-tcxo-ao-div2-clk 2/cpus/cpu@07/cpus/cpu@0/l2-cache/reserved-memory/q6-adsp-dtb@8b800000N/reserved-memory/cdsp@8b900000&W/reserved-memory/q6-cdsp-dtb@8d900000(g/reserved-memory/gpu-microcode@8d9fe000y/reserved-memory/cvp@8da00000!/reserved-memory/camera@8e100000&/reserved-memory/av1-encoder@8e900000/reserved-memory/wpss@8fa00000&/reserved-memory/q6-wpss-dtb@91300000!/reserved-memory/xbl-sc@d8000000/reserved-memory/qtee@d80e0000/reserved-memory/ta@d8600000/reserved-memory/tags@e1000000#/reserved-memory/llcc-lpi@ff800000/reserved-memory/smem@ffe00000/opp-table-qup100mhz/opp-table-qup120mhz/smp2p-adsp/master-kernel)/smp2p-adsp/slave-kernel7/smp2p-cdsp/master-kernelF/smp2p-cdsp/slave-kernelT/soc@0X/soc@0/clock-controller@100000\/soc@0/mailbox@408000a/soc@0/dma-controller@800000j/soc@0/geniqup@8c0000!r/soc@0/geniqup@8c0000/i2c@880000!x/soc@0/geniqup@8c0000/spi@880000!~/soc@0/geniqup@8c0000/i2c@884000!/soc@0/geniqup@8c0000/spi@884000!/soc@0/geniqup@8c0000/i2c@888000!/soc@0/geniqup@8c0000/spi@888000!/soc@0/geniqup@8c0000/i2c@88c000!/soc@0/geniqup@8c0000/spi@88c000!/soc@0/geniqup@8c0000/i2c@890000!/soc@0/geniqup@8c0000/spi@890000!/soc@0/geniqup@8c0000/i2c@894000!/soc@0/geniqup@8c0000/spi@894000$/soc@0/geniqup@8c0000/serial@894000!/soc@0/geniqup@8c0000/i2c@898000!/soc@0/geniqup@8c0000/spi@898000!/soc@0/geniqup@8c0000/i2c@89c000!/soc@0/geniqup@8c0000/spi@89c000/soc@0/dma-controller@a00000/soc@0/geniqup@ac0000!/soc@0/geniqup@ac0000/i2c@a80000!/soc@0/geniqup@ac0000/spi@a80000!/soc@0/geniqup@ac0000/i2c@a84000!/soc@0/geniqup@ac0000/spi@a84000!/soc@0/geniqup@ac0000/i2c@a88000!/soc@0/geniqup@ac0000/spi@a88000! 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/soc@0/rsc@17500000/regulators-7/ldo1&1/soc@0/rsc@17500000/regulators-7/ldo2&1'/soc@0/rsc@17500000/regulators-7/ldo314/soc@0/sram@18b4e000(19/soc@0/sram@18b4e000/scp-sram-section@0*1G/soc@0/sram@18b4e000/scp-sram-section@2001U/soc@0/watchdog@1c8400001c/soc@0/efuse@221c8000(1j/soc@0/efuse@221c8000/gpu-speed-bin@1191x/soc@0/pmu@24091000/opp-table1/soc@0/pmu@240b34001/soc@0/pmu@240b54001/soc@0/pmu@240b5400/opp-table1/soc@0/remoteproc@323000001/thermal-zones11/thermal-zones/gpuss-0-thermal/trips/trip-point011/thermal-zones/gpuss-1-thermal/trips/trip-point011/thermal-zones/gpuss-2-thermal/trips/trip-point012/thermal-zones/gpuss-3-thermal/trips/trip-point012/thermal-zones/gpuss-4-thermal/trips/trip-point012#/thermal-zones/gpuss-5-thermal/trips/trip-point0121/thermal-zones/gpuss-6-thermal/trips/trip-point012?/thermal-zones/gpuss-7-thermal/trips/trip-point0!2M/thermal-zones/pmc8380-6-thermal 2_/audio-codec.2g/pmic-glink/connector@0/ports/port@0/endpoint.2|/pmic-glink/connector@0/ports/port@1/endpoint.2/pmic-glink/connector@0/ports/port@2/endpoint.2/pmic-glink/connector@1/ports/port@0/endpoint.2/pmic-glink/connector@1/ports/port@1/endpoint.2/pmic-glink/connector@1/ports/port@2/endpoint.2/pmic-glink/connector@2/ports/port@0/endpoint.3/pmic-glink/connector@2/ports/port@1/endpoint.3/pmic-glink/connector@2/ports/port@2/endpoint33/regulator-edp-3p33@/regulator-misc-3p33N/regulator-nvme3X/regulator-rtmr0-1p153h/regulator-rtmr0-1p83w/regulator-rtmr0-3p33/regulator-rtmr1-1p153/regulator-rtmr1-1p83/regulator-rtmr1-3p33/regulator-rtmr2-1p153/regulator-rtmr2-1p83/regulator-rtmr2-3p33/regulator-vph-pwr3/regulator-wwan interrupt-parent#address-cells#size-cellsmodelcompatiblestdout-pathclock-frequency#clock-cellsphandleclocksclock-multclock-divdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-namescache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usremote-endpointinterconnectsqcom,dload-modemboxesmbox-namesshmem#power-domain-cells#interconnect-cellsqcom,bcm-votersinterruptsdomain-idle-statesrangesno-maphwlockssizereusablelinux,cma-defaultopp-hzrequired-oppsinterrupts-extendedqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesoperating-points-v2hid-descr-addrvdd-supplyvddl-supplywakeup-sourcevdd33-supplyvdd33-cap-supplyvddar-supplyvddat-supplyvddio-supplyreset-gpiosorientation-switchretimer-switchvdd1v8-supplyvdd3v3-supply#phy-cellsinterrupt-names#qcom,sensors#thermal-sensor-cellsresetsvdda12-supplyphysreset-namesmode-switchvdda-phy-supplyvdda-pll-supplyreg-namesbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-rateseq-presets-8gtseq-presets-16gtsopp-peak-kBpsopp-levelclock-output-namesmsi-mapvddpe-3v3-supplywake-gpiosqcom,4ln-config-selqcom,eeqcom,controlled-remotelynum-channelsqcom,num-ees#hwlock-cellsqcom,gmu#cooling-cellsnvmem-cellsnvmem-cell-namesmemory-regionfirmware-nameqcom,opp-acd-levelopp-supported-hwqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainsound-name-prefixqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,rx-port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappingvdd-micb-supplyqcom,dmic-sample-rategpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowqcom,dll-configqcom,ddr-configbus-widthphy-namessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,usb3_lpm_capablesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkdr_modeqcom,select-utmi-as-pipe-clkmaximum-speedassigned-clock-parentsdata-laneslink-frequenciesenable-gpiospower-supplyqcom,pdc-rangesqcom,channellinux,codeqcom,no-alarmqcom,uefi-rtc-infobits#pwm-cellspower-sourcebias-pull-upinput-disableoutput-enabledrive-push-pullqcom,drive-strengthvdd18-supplyvdd3-supplywakeup-parentgpio-reserved-rangesqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-num#redistributor-regionsredistributor-stridemsi-controller#msi-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-l1-supplyvdd-l2-supplyvdd-l3-supplyvdd-s4-supplyvdd-s1-supplyvdd-s2-supplyvdd-s5-supplyframe-numberthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-deviceserial0qcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplylinux,input-typewakeup-event-actionorientation-gpiospower-roledata-roleaudio-routinglink-namesound-daigpioenable-active-highregulator-boot-onxo_boardsleep_clkbi_tcxo_div2bi_tcxo_ao_div2cpu0l2_0cpu1cpu2cpu3cpu4l2_1cpu5cpu6cpu7cpu8l2_2cpu9cpu10cpu11cpu_map_cluster2cluster_c4cluster_cl4cluster_cl5eud_inscmscmi_dvfsclk_virtmc_virtcpu_pd0cpu_pd1cpu_pd2cpu_pd3cpu_pd4cpu_pd5cpu_pd6cpu_pd7cpu_pd8cpu_pd9cpu_pd10cpu_pd11cluster_pd0cluster_pd1cluster_pd2system_pdgunyah_hyp_memhyp_elf_package_memncc_memcpucp_log_memcpucp_memtags_memxbl_dtlog_memxbl_ramdump_memaop_image_memaop_cmd_db_memaop_config_memtme_crash_dump_memtme_log_memuefi_log_memsecdata_apss_mempdp_ns_shared_memgpu_prr_memtpm_control_memusb_ucsi_shared_mempld_pep_mempld_gmu_mempld_pdp_memtz_stat_memxbl_tmp_buffer_memadsp_rpc_remote_heap_memspu_secure_shared_memory_memadsp_boot_dtb_memspss_region_memadsp_boot_memvideo_memadspslpi_memq6_adsp_dtb_memcdsp_memq6_cdsp_dtb_memgpu_microcode_memcvp_memcamera_memav1_encoder_memwpss_memq6_wpss_dtb_memxbl_sc_memqtee_memta_memtags_mem1llcc_lpi_memsmem_memqup_opp_table_100mhzqup_opp_table_120mhzsmp2p_adsp_outsmp2p_adsp_insmp2p_cdsp_outsmp2p_cdsp_insocgccipccgpi_dma2qupv3_2i2c16spi16i2c17spi17i2c18spi18i2c19spi19i2c20spi20i2c21spi21uart21i2c22spi22i2c23spi23gpi_dma1qupv3_1i2c8spi8i2c9spi9i2c10spi10i2c11spi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