Ðþí  Q»   8  Nd   (            W  N,                             &    samsung,jackpotlte samsung,exynos7885                                    &            7Samsung Galaxy A8 (2018)             =handset    aliases          J/soc@0/pinctrl@11cb0000          S/soc@0/pinctrl@148f0000          \/soc@0/pinctrl@13430000          e/soc@0/pinctrl@139b0000          n/soc@0/mmc@13500000          s/soc@0/serial@13800000           {/soc@0/serial@13810000           ƒ/soc@0/serial@13820000        arm-a53-pmu           arm,cortex-a53-pmu        H   ‹       `          a          b          c          Ú          Û            –                        arm-a73-pmu           arm,cortex-a73-pmu           ‹       R          S            –      	      cpus                                cpu-map    cluster0       core0            ©         core1            ©         core2            ©         core3            ©         core4            ©         core5            ©            cluster1       core0            ©         core1            ©   	            cpu@100          ­cpu           arm,cortex-a53           ¹            ½psci             Ë         cpu@101          ­cpu           arm,cortex-a53           ¹           ½psci             Ë         cpu@102          ­cpu           arm,cortex-a53           ¹           ½psci             Ë         cpu@103          ­cpu           arm,cortex-a53           ¹           ½psci             Ë         cpu@200          ­cpu           arm,cortex-a53           ¹            ½psci             Ë         cpu@201          ­cpu           arm,cortex-a53           ¹           ½psci             Ë         cpu@0            ­cpu           arm,cortex-a73           ¹             ½psci             Ë         cpu@1            ­cpu           arm,cortex-a73           ¹            ½psci             Ë   	         psci          	    arm,psci             Äsmc          ÓÄ           ß„           çÄ        timer             arm,armv8-timer       0   ‹        ÿ        ÿ        ÿ      
  ÿ      fixed-rate-clocks      osc-clock             fixed-clock          î             ûoscclk          Œº€         Ë   
         soc@0             simple-bus                                                     chipid@10000000       3    samsung,exynos7885-chipid samsung,exynos850-chipid           ¹      $      interrupt-controller@12301000             arm,gic-400         %                         6          ¹0    0      0@     0`              ‹      	  ÿ         Ë         clock-controller@10010000             samsung,exynos7885-cmu-peri          ¹    €          î         L  K   
                                     !      "      #      $      �  Roscclk dout_peri_bus dout_peri_spi0 dout_peri_spi1 dout_peri_uart0 dout_peri_uart1 dout_peri_uart2 dout_peri_usi0 dout_peri_usi1 dout_peri_usi2          Ë         clock-controller@12000000             samsung,exynos7885-cmu-core          ¹     €          î           K   
                        1  Roscclk dout_core_bus dout_core_cci dout_core_g3d          clock-controller@12060000             samsung,exynos7885-cmu-top           ¹    €          î           K   
        Roscclk           Ë         clock-controller@13400000             samsung,exynos7885-cmu-fsys          ¹@    €          î         ,  K   
      3      4      5      6      7      a  Roscclk dout_fsys_bus dout_fsys_mmc_card dout_fsys_mmc_embd dout_fsys_mmc_sdio dout_fsys_usb30drd             Ë         pinctrl@11cb0000              samsung,exynos7885-pinctrl           ¹Ë        wakeup-interrupt-controller       ;    samsung,exynos7885-wakeup-eint samsung,exynos7-wakeup-eint           &            ‹       ‚         etc0-gpio-bank           ^        n            6        %         etc1-gpio-bank           ^        n            6        %         gpa0-gpio-bank           ^        n            6        %            &         `   ‹                                                                                       gpa1-gpio-bank           ^        n            6        %            &         `   ‹                 	          
                                                              Ë   #      gpa2-gpio-bank           ^        n            6        %         gpq0-gpio-bank           ^        n            6        %         sim1-det-gpio-pins          zgpa2-5          ‡           œ          sim0-det-gpio-pins          zgpa2-6          ‡           œ          speedy-bus-pins         zgpq0-2          ‡           ¬           œ           À          uart2-bus-pins          zgpq0-4 gpq0-3           ‡           œ             Ë         key-volup-pins          zgpa1-5          ‡           œ            À             Ë          key-voldown-pins            zgpa1-6          ‡           œ            À             Ë   !      key-power-pins          zgpa1-7          ‡           œ            À             Ë   "         pinctrl@13430000              samsung,exynos7885-pinctrl           ¹C              ‹       –      gpf0-gpio-bank           ^        n            6        %         gpf2-gpio-bank           ^        n            6        %         gpf3-gpio-bank           ^        n            6        %         gpf4-gpio-bank           ^        n            6        %         sd0-clk-pins            zgpf0-0          ‡           œ            À         sd0-clk-fast-slew-rate-1x-pins          zgpf0-0          ‡           œ            À          sd0-clk-fast-slew-rate-2x-pins          zgpf0-0          ‡           œ            À         sd0-clk-fast-slew-rate-3x-pins          zgpf0-0          ‡           œ            À            Ë         sd0-clk-fast-slew-rate-4x-pins          zgpf0-0          ‡           œ            À         sd0-cmd-pins            zgpf0-1          ‡           œ           À            Ë         sd0-rdqs-pins           zgpf0-2          ‡           œ           À            Ë         sd0-bus-width1-pins         zgpf2-0          ‡           œ           À            Ë         sd0-bus-width4-pins         zgpf2-1 gpf2-2 gpf2-3            ‡           œ           À            Ë         sd0-bus-width8-pins         zgpf2-4 gpf2-5 gpf2-6 gpf2-7         ‡           œ           À            Ë         sd1-clk-pins            zgpf3-0          ‡           œ            À         sd1-clk-fast-slew-rate-1x-pins          zgpf3-0          ‡           œ            À          sd1-clk-fast-slew-rate-2x-pins          zgpf3-0          ‡           œ            À         sd1-clk-fast-slew-rate-3x-pins          zgpf3-0          ‡           œ            À         sd1-clk-fast-slew-rate-4x-pins          zgpf3-0          ‡           œ            À         sd1-cmd-pins            zgpf3-1          ‡           œ           À         sd1-bus-width1-pins         zgpf3-2          ‡           œ           À         sd1-bus-width4-pins         zgpf3-3 gpf3-5           ‡           œ           À         sd2-clk-pins            zgpf4-0          ‡           œ            À         sd2-clk-fast-slew-rate-1x-pins          zgpf4-0          ‡           œ            À          sd2-clk-fast-slew-rate-2x-pins          zgpf4-0          ‡           œ            À         sd2-clk-fast-slew-rate-3x-pins          zgpf4-0          ‡           œ            À         sd2-clk-fast-slew-rate-4x-pins          zgpf4-0          ‡           œ            À         sd2-cmd-pins            zgpf4-1          ‡           œ           À         sd2-bus-width1-pins         zgpf4-2          ‡           œ           À         sd2-bus-width4-pins         zgpf4-3 gpf4-4 gpf4-5            ‡           œ           À            pinctrl@139b0000              samsung,exynos7885-pinctrl           ¹›              ‹      
      gpc0-gpio-bank           ^        n            6        %         gpc1-gpio-bank           ^        n            6        %         gpc2-gpio-bank           ^        n            6        %         gpg0-gpio-bank           ^        n            6        %         gpg1-gpio-bank           ^        n            6        %         gpg2-gpio-bank           ^        n            6        %         gpg3-gpio-bank           ^        n            6        %         gpg4-gpio-bank           ^        n            6        %         gpp0-gpio-bank           ^        n            6        %         gpp1-gpio-bank           ^        n            6        %         gpp2-gpio-bank           ^        n            6        %         gpp3-gpio-bank           ^        n            6        %         gpp4-gpio-bank           ^        n            6        %         gpp5-gpio-bank           ^        n            6        %         gpp6-gpio-bank           ^        n            6        %         gpp7-gpio-bank           ^        n            6        %         gpp8-gpio-bank           ^        n            6        %         hs-i2c0-bus-pins            zgpc1-1 gpc1-0           ‡           ¬           Ð           œ            À          hs-i2c1-bus-pins            zgpc1-3 gpc1-2           ‡           œ            À            ¬           Ð         hs-i2c2-bus-pins            zgpc1-5 gpc1-4           ‡           œ            À            ¬           Ð         hs-i2c3-bus-pins            zgpc1-7 gpc1-6           ‡           œ            À            ¬           Ð         uart3-bus-single-pins           zgpc2-3 gpc2-2 gpc2-1 gpc2-0         ‡           œ          uart3-bus-dual-pins         zgpc2-1 gpc2-0           ‡           œ          hs-i2c4-bus-pins            zgpc2-1 gpc2-0           ‡           œ            À            ¬           Ð         hs-i2c5-bus-pins            zgpc2-3 gpc2-2           ‡           œ            À            ¬           Ð         spi2-bus-pins           zgpc2-1 gpc2-0 gpc2-3            ‡           œ           À          spi2-cs-pins            zgpc2-2          ‡           œ           À          uart4-bus-single-pins           zgpc2-7 gpc2-6 gpc2-5 gpc2-4         ‡           œ          uart4-bus-dual-pins         zgpc2-5 gpc2-4           ‡           œ          hs-i2c6-bus-pins            zgpc2-5 gpc2-4           ‡           œ            À            ¬           Ð         hs-i2c7-bus-pins            zgpc2-7 gpc2-6           ‡           œ            À            ¬           Ð         spi3-bus-pins           zgpc2-5 gpc2-4 gpc2-7            ‡           œ           À          spi3-cs-pins            zgpc2-6          ‡           œ           À          fm-lna-en-pins          zgpg0-2          ‡           œ           ¬           Ð           ä         uart1-bus-pins          zgpg1-3 gpg1-2 gpg1-1 gpg1-0         ‡           œ             Ë         i2c7-bus-pins           zgpg1-5 gpg1-4           ‡           œ           À             Ë         aud-dmic-on-pins            zgpg2-1          ‡           ¬           ä         aud-dmic-off-pins           zgpg2-1          ‡           ¬           ä          uart0-bus-pins          zgpp0-3 gpp0-2 gpp0-1 gpp0-0         ‡           œ             Ë         i2c0-bus-pins           zgpp1-1 gpp1-0           ‡           ¬           œ           À             Ë         i2c1-bus-pins           zgpp1-3 gpp1-2           ‡           ¬           œ           À             Ë         i2c2-bus-pins           zgpp2-1 gpp2-0           ‡           œ           À             Ë         i2c3-bus-pins           zgpp3-1 gpp3-0           ‡           œ           À             Ë         i2c4-bus-pins           zgpp4-1 gpp4-0           ‡           œ           À             Ë         i2c5-bus-pins           zgpp4-3 gpp4-2           ‡           œ           À             Ë         i2c6-bus-pins           zgpp4-5 gpp4-4           ‡           œ           À             Ë         spi0-bus-pins           zgpp5-3 gpp5-2 gpp5-0            ‡           œ           À          spi0-cs-pins            zgpp5-1          ‡           œ           À          spi1-bus-pins           zgpp6-3 gpp6-2 gpp6-0            ‡           œ           À          spi1-cs-pins            zgpp6-1          ‡           œ           À          uart5-bus-single-pins           zgpp8-1 gpp8-0 gpp7-1 gpp7-0         ‡           œ          uart5-bus-dual-pins         zgpp7-1 gpp7-0           ‡           œ          hs-i2c8-bus-pins            zgpp7-1 gpp7-0           ‡           œ            À            ¬           Ð         hs-i2c9-bus-pins            zgpp8-1 gpp8-0           ‡           œ            À            ¬           Ð         spi4-bus-pins           zgpp7-1 gpp7-0 gpp8-1            ‡           œ           À          spi4-cs-pins            zgpp8-0          ‡           œ           À             pinctrl@148f0000              samsung,exynos7885-pinctrl           ¹�              ‹       ‚      gpb0-gpio-bank           ^        n            6        %         gpb1-gpio-bank           ^        n            6        %         gpb2-gpio-bank           ^        n            6        %         aud-codec-mclk-pins         zgpb0-0          ‡           œ         aud-codec-mclk-idle-pins            zgpb0-0          ‡            œ         aud-codec-bus-pins          zgpb0-1 gpb0-2 gpb0-3 gpb0-4         ‡           œ         aud-codec-bus-idle-pins         zgpb0-1 gpb0-2 gpb0-3 gpb0-4         ‡            œ         aud-loopback-bus-pins           zgpb1-0          ‡           œ         aud-loopback-bus-idle-pins          zgpb1-0          ‡            œ         aud-fm-bus-pins         zgpb1-1 gpb1-2 gpb1-3            ‡           œ         aud-fm-bus-idle-pins            zgpb1-1 gpb1-2 gpb1-3            ‡            œ         aud-spk-bus-pins            zgpb2-0 gpb2-1 gpb2-2 gpb2-3         ‡           œ         aud-spk-bus-idle-pins           zgpb2-0 gpb2-1 gpb2-2 gpb2-3         ‡            œ            system-controller@11c80000        2    samsung,exynos7885-pmu samsung,exynos7-pmu syscon            ¹È              Ë      syscon-poweroff           syscon-poweroff         ô           û  3          R       syscon-reboot             syscon-reboot           ô           û                       mmc@13500000          ;    samsung,exynos7885-dw-mshc-smu samsung,exynos7-dw-mshc-smu           ¹P               ‹       ’                                    K                    Rbiu ciu            @        okay                      (         7         I         W        q   È        /¯         ƒ           �           ¥               À              Û               ødefault                                 serial@13800000       0    samsung,exynos7885-uart samsung,exynos5433-uart          ¹€              ‹       ö           ødefault                    K                    Ruart clk_uart_baud0            @      	  disabled          serial@13810000       0    samsung,exynos7885-uart samsung,exynos5433-uart          ¹�              ‹       ÷           ødefault                    K                    Ruart clk_uart_baud0                  	  disabled          serial@13820000       0    samsung,exynos7885-uart samsung,exynos5433-uart          ¹‚              ‹                 ødefault                    K      !               Ruart clk_uart_baud0                    okay          i2c@13830000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹ƒ              ‹       ø                                    ødefault                    K              Ri2c       	  disabled          i2c@13840000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹„              ‹       ù                                    ødefault                    K              Ri2c       	  disabled          i2c@13850000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹…              ‹       ú                                    ødefault                    K              Ri2c       	  disabled          i2c@13860000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹†              ‹       û                                    ødefault                    K              Ri2c       	  disabled          i2c@13870000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹‡              ‹       ü                                    ødefault                    K              Ri2c       	  disabled          i2c@13880000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹ˆ              ‹       ý                                    ødefault                    K              Ri2c       	  disabled          i2c@13890000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹‰              ‹       þ                                    ødefault                    K              Ri2c       	  disabled          i2c@11cd0000          +    samsung,exynos7885-i2c samsung,s3c2440-i2c           ¹Í              ‹       ÿ                                    ødefault                    K              Ri2c       	  disabled             chosen          &/soc@0/serial@13820000        memory@80000000          ­memory        $   ¹    €   =       À   @      €   €         gpio-keys         
    gpio-keys           ødefault                !   "   volup-key         
  2Volume Up           8   s        C   #            voldown-key         2Volume Down         8   r        C   #            power-key           2Power           8   t        C   #               I            	compatible #address-cells #size-cells interrupt-parent model chassis-type pinctrl0 pinctrl1 pinctrl2 pinctrl3 mmc0 serial0 serial1 serial2 interrupts interrupt-affinity cpu device_type reg enable-method phandle cpu_suspend cpu_off cpu_on #clock-cells clock-output-names clock-frequency ranges #interrupt-cells interrupt-controller clocks clock-names gpio-controller #gpio-cells samsung,pins samsung,pin-function samsung,pin-pud samsung,pin-con-pdn samsung,pin-drv samsung,pin-pud-pdn samsung,pin-val regmap offset mask fifo-depth status mmc-hs200-1_8v mmc-hs400-1_8v cap-mmc-highspeed non-removable mmc-hs400-enhanced-strobe card-detect-delay bus-width samsung,dw-mshc-ciu-div samsung,dw-mshc-sdr-timing samsung,dw-mshc-ddr-timing samsung,dw-mshc-hs400-timing pinctrl-names pinctrl-0 samsung,uart-fifosize stdout-path label linux,code gpios wakeup-source 