Ðþí  Ÿ¿   8  —h   (            W  —0                             (    hisilicon,hi6220-hikey hisilicon,hi6220                                  +            7HiKey Development Board    psci              arm,psci-0.2             =smc       cpus                         +       cpu-map    cluster0       core0            D         core1            D         core2            D         core3            D            cluster1       core0            D         core1            D         core2            D         core3            D   	            idle-states          Hpsci       cpu-sleep             arm,idle-state            U         f            }  ¼         Ž   ú         ž  è         ¯         cluster-sleep             arm,idle-state            U         f           }  è         Ž  ¼         ž  
Œ         ·  Ü         ¯            cpu@0             arm,cortex-a53           Écpu          Õ                 Ùpsci             ç   
         ø                ÿ                         #           2  7         ¯         cpu@1             arm,cortex-a53           Écpu          Õ                Ùpsci             ç   
         ø                ÿ                         #           2  7         ¯         cpu@2             arm,cortex-a53           Écpu          Õ                Ùpsci             ç   
         ø                ÿ                         #           2  7         ¯         cpu@3             arm,cortex-a53           Écpu          Õ                Ùpsci             ç   
         ø                ÿ                         #           2  7         ¯         cpu@100           arm,cortex-a53           Écpu          Õ                Ùpsci             ç            ø                ÿ                         #           2  7         ¯         cpu@101           arm,cortex-a53           Écpu          Õ               Ùpsci             ç            ø                ÿ                         #           2  7         ¯         cpu@102           arm,cortex-a53           Écpu          Õ               Ùpsci             ç            ø                ÿ                         #           2  7         ¯         cpu@103           arm,cortex-a53           Écpu          Õ               Ùpsci             ç            ø                ÿ                         #           2  7         ¯   	      l2-cache0             cache           L            X         ¯   
      l2-cache1             cache           L            X         ¯            opp-table-0           operating-points-v2          f         ¯      opp00           q    eÔ         x Þ€        † ¡       opp01           q    ¿Ì         x Þ€        † ¡       opp02           q    +s¨@        x ¡Ð        † ¡       opp03           q    98p         x `        † ¡       opp04           q    G†Œ         x KP        † ¡          interrupt-controller@f6801000             arm,gic-400       @   Õ    ö€            ö€              ö€@             ö€`                              —            ¨        ½      	  ÿ         ¯         timer             arm,armv8-timer                   0  ½        ÿ        ÿ        ÿ      
  ÿ      soc           simple-bus                       +            È   sram@fff80000         !    hisilicon,hi6220-sramctrl syscon             Õ    ÿø                  ¯         ao_ctrl@f7800000              hisilicon,hi6220-aoctrl syscon           Õ    ÷€                  Ï           Ü            ¯         sys_ctrl@f7030000              hisilicon,hi6220-sysctrl syscon          Õ    ÷                  Ï           Ü            ¯         media_ctrl@f4410000       "    hisilicon,hi6220-mediactrl syscon            Õ    ôA                 Ï           Ü            ¯   T      pm_ctrl@f7032000              hisilicon,hi6220-pmctrl syscon           Õ    ÷                 Ï         acpu_sctrl@f6504000       #    hisilicon,hi6220-acpu-sctrl syscon           Õ    öP@                Ï            ¯   X      medianoc_ade@f4520000             syscon           Õ    ôR        @          ¯   S      stub_clock            hisilicon,hi6220-stub-clk           é           Ï           mbox-tx                               ¯         serial@f8015000           arm,pl011 arm,primecell          Õ    øP                ½       $            ø      $      $        uartclk apb_pclk          serial@f7111000           arm,pl011 arm,primecell          Õ    ÷                ½       %            ø                    uartclk apb_pclk            !default         /                 9            	        >rx tx           Hokay            O      )        _ðÑ€   bluetooth             ti,wl1835-st            t                   ø         
  ext_clock            serial@f7112000           arm,pl011 arm,primecell          Õ    ÷                 ½       &            ø                    uartclk apb_pclk            !default         /              Hokay          	  �LS-UART0          serial@f7113000           arm,pl011 arm,primecell          Õ    ÷0                ½       '            ø                    uartclk apb_pclk            !default         /              Hokay          	  �LS-UART1          serial@f7114000           arm,pl011 arm,primecell          Õ    ÷@                ½       (            ø                    uartclk apb_pclk            !default         /            	  Hdisabled          dma@f7370000              hisilicon,k3-dma-1.0             Õ    ÷7                 ‡           ’           Ÿ            ½       T            ø               ¬        ·hi6220_dma          Hokay             ¯         timer@f8008000            arm,sp804 arm,primecell          Õ    ø €                ½                             ø                          timer1 timer2 apb_pclk        rtc@f8003000              arm,pl031 arm,primecell          Õ    ø 0                ½                   ø      %      	  apb_pclk          rtc@f8004000              arm,pl031 arm,primecell          Õ    ø @                ½                   ø      &      	  apb_pclk          pinmux@f7010000           pinctrl-single           Õ    ÷        |                     +            À           Ï           á            ÿ        p         P              X              `              h              p              x                                                                                             !             +             0             8             J             z             ~                          ‡             �             —              !default         /   !   "   #   $   %         ¯   ,   gpio-range          6            ¯          boot-sel-pins           W                 ¯   !      emmc-pins         P  W                                                          $             ¯   ;      sd-pins       0  W                                                    ¯   @      sd-idle-pins          0  W                                              ¯   C      sdio-pins         0  W  (      ,      0      4      8      <             ¯   H      sdio-idle-pins        0  W  (     ,     0     4     8     <            ¯   K      isp-pins          €  W   $       (       ,       0      4      8      <       @       D       H       L      P      T       X       \       `          hkadc-ssi-pins          W   h             ¯   "      codec-clk-pins          W   l             ¯   #      codec-pins           W   p      t       x       |          fm-pins          W   €      „      ˆ      Œ         bt-pins          W   �       ”       ˜       œ          pwm-in-pins         W   ¸            ¯   $      bl-pwm-pins         W   ¼            ¯   %      uart0-pins          W   À       Ä          uart1-pins           W   È       Ì       Ð       Ô             ¯         uart2-pins           W   Ø       Ü       à       ä             ¯         uart3-pins           W  €     „     ˆ     Œ            ¯         uart4-pins           W  Ð     Ô     Ø     Ü            ¯         uart5-pins          W  È     Ì         i2c0-pins           W   è       ì             ¯   0      i2c1-pins           W   ð       ô             ¯   2      i2c2-pins           W   ø       ü             ¯   4      spi0-pins            W        ¤     ¨     ¬            ¯   -         pinmux@f7010800           pinconf-single           Õ    ÷       Œ                     +            À           á            !default         /   &   '   (   )   *   boot-sel-cfg-pins           W                k                      ˆ                     £       p         ¯   &      hkadc-ssi-cfg-pins          W   l            k                      ˆ                      £       p         ¯   '      emmc-clk-cfg-pins           W              k                      ˆ                      £       p         ¯   <      emmc-cfg-pins         H  W                                             $      (            k                      ˆ                     £      p         ¯   =      emmc-rst-cfg-pins           W  ,            k                      ˆ                      £      p         ¯   >      sd-clk-cfg-pins         W               k                      ˆ                      £   0   p         ¯   A      sd-clk-cfg-idle-pins            W               k                     ˆ                      £       p         ¯   D      sd-cfg-pins       (  W                                            k                      ˆ                      £       p         ¯   B      sd-cfg-idle-pins          (  W                                            k                     ˆ                      £       p         ¯   E      sdio-clk-cfg-pins           W  4            k                      ˆ                      £       p         ¯   I      sdio-clk-cfg-idle-pins          W  4            k                     ˆ                      £       p         ¯   L      sdio-cfg-pins         (  W  8      <      @      D      H            k                      ˆ                     £      p         ¯   J      sdio-cfg-idle-pins        (  W  8      <      @      D      H            k                      ˆ                     £       p         ¯   M      isp-cfg-func1-pins        x  W   (       ,       0       4       8       <       @       D       H       L       P       X       \       `       d            k                      ˆ                      £       p      isp-cfg-idle1-pins          W   4       8            k                     ˆ                      £       p      isp-cfg-func2-pins          W   T            k                     ˆ                      £       p      codec-clk-cfg-pins          W   p            k                      ˆ                      £      p         ¯   (      codec-clk-cfg-idle-pins         W   p            k                      ˆ                      £       p      codec-cfg-func1-pins            W   t            k                     ˆ                      £       p      codec-cfg-func2-pins            W   x       |       €            k                      ˆ                      £      p      codec-cfg-idle2-pins            W   x       |       €            k                      ˆ                      £       p      fm-cfg-pins          W   „       ˆ       Œ       �            k                     ˆ                      £       p      bt-cfg-pins          W   ”       ˜       œ                    k                      ˆ                      £       p      bt-cfg-idle-pins             W   ”       ˜       œ                    k                     ˆ                      £       p      pwm-in-cfg-pins         W   ¼            k                     ˆ                      £       p         ¯   )      bl-pwm-cfg-pins         W   À            k                     ˆ                      £       p         ¯   *      uart0-cfg-func1-pins            W   Ä            k                      ˆ                     £       p      uart0-cfg-func2-pins            W   È            k                      ˆ                      £      p      uart1-cfg-func1-pins            W   Ì       Ô            k                      ˆ                     £       p         ¯         uart1-cfg-func2-pins            W   Ð       Ø            k                      ˆ                      £       p         ¯         uart2-cfg-pins           W   Ü       à       ä       è            k                      ˆ                      £       p         ¯         uart3-cfg-pins           W  �      ”      ˜      œ            k                     ˆ                      £       p         ¯         uart4-cfg-pins           W  à      ä      è      ì            k                     ˆ                      £       p         ¯         uart5-cfg-pins          W  Ø      Ü            k                     ˆ                      £       p      i2c0-cfg-pins           W   ì       ð            k                      ˆ                      £       p         ¯   1      i2c1-cfg-pins           W   ô       ø            k                      ˆ                      £       p         ¯   3      i2c2-cfg-pins           W   ü                   k                      ˆ                      £       p         ¯   5      spi0-cfg-pins            W  °      ´      ¸      ¼            k                      ˆ                      £       p         ¯   .         pinmux@f8001800           pinconf-single           Õ    ø         x                     +            À           á            !default         /   +   rstout-n-cfg-pins           W                k                      ˆ                      £       p         ¯   +      pmu-peri-en-cfg-pins            W               k                      ˆ                      £       p      sysclk0-en-cfg-pins         W               k                      ˆ                      £       p      jtag-tdo-cfg-pins           W               k                      ˆ                      £       p      rf-reset-cfg-pins           W   p       t            k                      ˆ                      £       p         gpio@f8011000             arm,pl061 arm,primecell          Õ    ø                ½       4            Á        Ñ            ¨        —            ø            	  apb_pclk          O  ÝPWR_HOLD DSI_SEL USB_HUB_RESET_N USB_SEL HDMI_PD WL_REG_ON PWRON_DET 5V_HUB_EN           ¯   6      gpio@f8012000             arm,pl061 arm,primecell          Õ    ø                 ½       5            Á        Ñ            ¨        —            ø            	  apb_pclk          :  ÝSD_DET HDMI_INT PMU_IRQ_N WL_HOST_WAKE NC NC NC BT_REG_ON            ¯         gpio@f8013000             arm,pl061 arm,primecell          Õ    ø0                ½       6            Á        Ñ            ¨        —            ø            	  apb_pclk          B  ÝGPIO-A GPIO-B GPIO-C GPIO-D GPIO-E USB_ID_DET USB_VBUS_DET GPIO-H         gpio@f8014000             arm,pl061 arm,primecell          Õ    ø@                ½       7            Á        Ñ           í   ,       P            ¨        —            ø            	  apb_pclk          %  ÝGPIO3_0 NC NC  NC  WLAN_ACTIVE NC NC             ¯   }      gpio@f7020000             arm,pl061 arm,primecell          Õ    ÷                 ½       8            Á        Ñ           í   ,       X            ¨        —            ø            	  apb_pclk          ?  ÝUSER_LED1 USER_LED2 USER_LED3 USER_LED4 SD_SEL NC NC BT_ACTIVE           ¯   |      gpio@f7021000             arm,pl061 arm,primecell          Õ    ÷                ½       9            Á        Ñ           í   ,       `            ¨        —            ø            	  apb_pclk          ?  ÝNC NC [UART1_RxD] [UART1_TxD] [AUX_SSI1] NC [PCM_CLK] [PCM_FS]        gpio@f7022000             arm,pl061 arm,primecell          Õ    ÷                 ½       :            Á        Ñ           í   ,       h            ¨        —            ø            	  apb_pclk          =  Ý[SPI0_DIN] [SPI0_DOUT] [SPI0_CS] [SPI0_SCLK] NC NC NC GPIO-G             ¯   /      gpio@f7023000             arm,pl061 arm,primecell          Õ    ÷0                ½       ;            Á        Ñ           í   ,       p            ¨        —            ø            	  apb_pclk          $  ÝNC NC NC NC [PCM_DI] [PCM_DO] NC NC       gpio@f7024000             arm,pl061 arm,primecell          Õ    ÷@                ½       <            Á        Ñ            í   ,       x      ,                  ¨        —            ø            	  apb_pclk            ÝNC [CEC_CLK_19_2MHZ] NC               gpio@f7025000             arm,pl061 arm,primecell          Õ    ÷P                ½       =            Á        Ñ           í   ,                   ¨        —            ø            	  apb_pclk          '  Ý GPIO-J GPIO-L NC NC NC NC [ISP_CCLK0]        gpio@f7026000             arm,pl061 arm,primecell          Õ    ÷`                ½       >            Á        Ñ            í   ,              ,                  ¨        —            ø            	  apb_pclk          ?  ÝBOOT_SEL [ISP_CCLK1] GPIO-I GPIO-K NC NC [I2C2_SDA] [I2C2_SCL]        gpio@f7027000             arm,pl061 arm,primecell          Õ    ÷p                ½       ?            Á        Ñ            í   ,             ,                  ¨        —            ø            	  apb_pclk          "  Ý[I2C3_SDA] [I2C3_SCL]  NC NC NC           gpio@f7028000             arm,pl061 arm,primecell          Õ    ÷€                ½       @            Á        Ñ            í   ,       !      ,      +            ¨        —            ø            	  apb_pclk          8  Ý[BT_PCM_XFS] [BT_PCM_DI] [BT_PCM_DO] NC NC NC NC GPIO-F       gpio@f7029000             arm,pl061 arm,primecell          Õ    ÷�                ½       A            Á        Ñ           í   ,       0            ¨        —            ø            	  apb_pclk          h  Ý[UART0_RX] [UART0_TX] [BT_UART1_CTS] [BT_UART1_RTS] [BT_UART1_RX] [BT_UART1_TX] [UART0_CTS] [UART0_RTS]       gpio@f702a000             arm,pl061 arm,primecell          Õ    ÷                 ½       B            Á        Ñ           í   ,       8            ¨        —            ø            	  apb_pclk          Z  Ý[UART0_RxD] [UART0_TxD] [I2C0_SCL] [I2C0_SDA] [I2C1_SCL] [I2C1_SDA] [I2C2_SCL] [I2C2_SDA]         gpio@f702b000             arm,pl061 arm,primecell          Õ    ÷°                ½       C            Á        Ñ         0  í   ,       J      ,      z      ,      ~            ¨        —            ø            	  apb_pclk          
  Ý      NC          gpio@f702c000             arm,pl061 arm,primecell          Õ    ÷À                ½       D            Á        Ñ           í   ,                   ¨        —            ø            	  apb_pclk          gpio@f702d000             arm,pl061 arm,primecell          Õ    ÷Ð                ½       E            Á        Ñ           í   ,       ‡            ¨        —            ø            	  apb_pclk          gpio@f702e000             arm,pl061 arm,primecell          Õ    ÷à                ½       F            Á        Ñ           í   ,       �            ¨        —            ø            	  apb_pclk          gpio@f702f000             arm,pl061 arm,primecell          Õ    ÷ð                ½       G            Á        Ñ           í   ,       —            ¨        —            ø            	  apb_pclk          spi@f7106000              arm,pl022 arm,primecell          Õ    ÷`                ½       2            ø                    sspclk apb_pclk         !default         /   -   .        ù               /               Hokay          i2c@f7100000              snps,designware-i2c          Õ    ÷                 ½       ,            ø              	  ,        !default         /   0   1        Hokay          i2c@f7101000              snps,designware-i2c          Õ    ÷                 ø              ½       -           	  ,        !default         /   2   3        Hokay          i2c@f7102000              snps,designware-i2c          Õ    ÷                  ø              ½       .           	  ,        !default         /   4   5        Hokay                         +       adv7533@39            adi,adv7533          Õ   9                    ½                 6               '           5       ports                        +       port@0           Õ       endpoint            F   7         ¯   W         port@2           Õ      endpoint            F   8         ¯   P                  usbphy            hisilicon,hi6220-usb-phy            V            a   9        l            ¯   :      usb@f72c0000              hisilicon,hi6220-usb             Õ    ÷,                 ˆ   :      	  �usb2-phy             ø              otg         —otg         Ÿ           ®   €      <  À   €   €   €   €   €   €   €   €                             ½       M         mailbox@f7510000              hisilicon,hi6220-mbox             Õ    ÷Q             ßø                ½       ^           Ï            ¯         mmc@f723d000              hisilicon,hi6220-dw-mshc             Õ    ÷#Ð                ½       H            ø                    ciu biu         Û               âreset           !default         /   ;   <   =   >         î                                ?      mmc@f723e000              hisilicon,hi6220-dw-mshc            l            Õ    ÷#à                ½       I                        +             ø                    ciu biu         Û              âreset           !default idle            /   @   A   B        $   C   D   E        .   È         @         Q         ^         k        x   F           G                    …        �                mmc@f723f000              hisilicon,hi6220-dw-mshc             Õ    ÷#ð                ½       J            ø                    ciu biu         Û              âreset           !default idle            /   H   I   J        $   K   L   M                              ™           N        ¬   O                     +       wlcore@2          
    ti,wl1835            Õ                       ½               watchdog@f8005000             arm,sp805 arm,primecell          Õ    ø P                ½                   ø                    wdog_clk apb_pclk         tsensor@f7030700              hisilicon,tsensor            Õ    ÷                ½                   ø              thermal_clk         ·            ¯   Q      i2s@f7118000              hisilicon,hi6210-i2s             Õ    ÷€       €         ½       {            ø      
      8        dacodec i2s-base            9                    >rx tx           Í           5      ports      port@0           ¯   ~   endpoint            F   P        æi2s          ¯   8               thermal-zones      cls0-thermal            ñ  è        ÿ   d          þ        '   Q      trips      trip-point0         7  ýè        C             Ðpassive       trip-point1         7 $ø        C             Ðpassive          ¯   R         cooling-maps       map0            N   R      `  S   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ               ade@f4100000              hisilicon,hi6220-ade             Õ    ô        x       	  bade_base            l   S        Û   T           ½       s            ø   T      T      T         (  clk_ade_core clk_codec_jpeg clk_ade_pix         O   T      T           _u* *ˆ          �        Hokay       port       endpoint            F   U         ¯   V            dsi@f4107800              hisilicon,hi6220-dsi             Õ    ôx                 ø   T           pclk            Hokay       ports                        +       port@0           Õ       endpoint            F   V         ¯   U         port@1           Õ      endpoint@0          F   W         ¯   7               debug@f6590000        &    arm,coresight-cpu-debug arm,primecell            Õ    öY                  ø      ;      	  apb_pclk             D         debug@f6592000        &    arm,coresight-cpu-debug arm,primecell            Õ    öY                  ø      ;      	  apb_pclk             D         debug@f6594000        &    arm,coresight-cpu-debug arm,primecell            Õ    öY@                 ø      ;      	  apb_pclk             D         debug@f6596000        &    arm,coresight-cpu-debug arm,primecell            Õ    öY`                 ø      ;      	  apb_pclk             D         debug@f65d0000        &    arm,coresight-cpu-debug arm,primecell            Õ    ö]                  ø      ;      	  apb_pclk             D         debug@f65d2000        &    arm,coresight-cpu-debug arm,primecell            Õ    ö]                  ø      ;      	  apb_pclk             D         debug@f65d4000        &    arm,coresight-cpu-debug arm,primecell            Õ    ö]@                 ø      ;      	  apb_pclk             D         debug@f65d6000        &    arm,coresight-cpu-debug arm,primecell            Õ    ö]`                 ø      ;      	  apb_pclk             D   	      gpu@f4080000          #    hisilicon,hi6220-mali arm,mali-450           Õ    ô                           „  ½      ~         ~         ~         ~         ~         ~         ~         ~         ~         ~         ~         8  Žgp gpmmu pp pp0 ppmmu0 pp1 ppmmu1 pp2 ppmmu2 pp3 ppmmu3          ø   T      T         	  bus core            O   T      T           _Íe •D         âao_g3d media_g3d            Û         T          funnel@f6401000       +    arm,coresight-dynamic-funnel arm,primecell           Õ    ö@                 ø   X          	  apb_pclk       out-ports      port       endpoint            F   Y         ¯   [            in-ports       port       endpoint            F   Z         ¯   b               etf@f6402000               arm,coresight-tmc arm,primecell          Õ    ö@                  ø   X          	  apb_pclk       in-ports       port       endpoint            F   [         ¯   Y            out-ports      port       endpoint            F   \         ¯   ]               replicator             arm,coresight-static-replicator          ø   X          	  apb_pclk       in-ports       port       endpoint            F   ]         ¯   \            out-ports                        +       port@0           Õ       endpoint            F   ^         ¯   `         port@1           Õ      endpoint            F   _         ¯   a               etr@f6404000               arm,coresight-tmc arm,primecell          Õ    ö@@                 ø   X          	  apb_pclk       in-ports       port       endpoint            F   `         ¯   ^               tpiu@f6405000         !    arm,coresight-tpiu arm,primecell             Õ    ö@P                 ø   X          	  apb_pclk       in-ports       port       endpoint            F   a         ¯   _               funnel@f6501000       +    arm,coresight-dynamic-funnel arm,primecell           Õ    öP                 ø   X          	  apb_pclk       out-ports      port       endpoint            F   b         ¯   Z            in-ports                         +       port@0           Õ       endpoint            F   c         ¯   k         port@1           Õ      endpoint            F   d         ¯   l         port@2           Õ      endpoint            F   e         ¯   m         port@3           Õ      endpoint            F   f         ¯   n         port@4           Õ      endpoint            F   g         ¯   o         port@5           Õ      endpoint            F   h         ¯   p         port@6           Õ      endpoint            F   i         ¯   q         port@7           Õ      endpoint            F   j         ¯   r               etm@f659c000          "    arm,coresight-etm4x arm,primecell            Õ    öYÀ                 ø   X          	  apb_pclk             D            ¯   s   out-ports      port       endpoint            F   k         ¯   c               etm@f659d000          "    arm,coresight-etm4x arm,primecell            Õ    öYÐ                 ø   X          	  apb_pclk             D            ¯   t   out-ports      port       endpoint            F   l         ¯   d               etm@f659e000          "    arm,coresight-etm4x arm,primecell            Õ    öYà                 ø   X          	  apb_pclk             D            ¯   u   out-ports      port       endpoint            F   m         ¯   e               etm@f659f000          "    arm,coresight-etm4x arm,primecell            Õ    öYð                 ø   X          	  apb_pclk             D            ¯   v   out-ports      port       endpoint            F   n         ¯   f               etm@f65dc000          "    arm,coresight-etm4x arm,primecell            Õ    ö]À                 ø   X          	  apb_pclk             D            ¯   w   out-ports      port       endpoint            F   o         ¯   g               etm@f65dd000          "    arm,coresight-etm4x arm,primecell            Õ    ö]Ð                 ø   X          	  apb_pclk             D            ¯   x   out-ports      port       endpoint            F   p         ¯   h               etm@f65de000          "    arm,coresight-etm4x arm,primecell            Õ    ö]à                 ø   X          	  apb_pclk             D            ¯   y   out-ports      port       endpoint            F   q         ¯   i               etm@f65df000          "    arm,coresight-etm4x arm,primecell            Õ    ö]ð                 ø   X          	  apb_pclk             D   	         ¯   z   out-ports      port       endpoint            F   r         ¯   j               cti@f6403000               arm,coresight-cti arm,primecell          Õ    ö@0                 ø   X          	  apb_pclk          cti@f6598000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    öY€                 ø   X          	  apb_pclk             D           ž   s      cti@f6599000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    öY�                 ø   X          	  apb_pclk             D           ž   t      cti@f659a000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    öY                  ø   X          	  apb_pclk             D           ž   u      cti@f659b000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    öY°                 ø   X          	  apb_pclk             D           ž   v      cti@f65d8000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    ö]€                 ø   X          	  apb_pclk             D           ž   w      cti@f65d9000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    ö]�                 ø   X          	  apb_pclk             D           ž   x      cti@f65da000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    ö]                  ø   X          	  apb_pclk             D           ž   y      cti@f65db000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell            Õ    ö]°                 ø   X          	  apb_pclk             D   	        ž   z         aliases         ¯/soc/serial@f8015000            ·/soc/serial@f7111000            ¿/soc/serial@f7112000            Ç/soc/serial@f7113000          chosen          Ïserial3:115200n8          memory@0             Émemory        `   Õ            à      ð             ð       ïÐ     à       `ð     A      ¯      "                reserved-memory                      +            È   ramoops@21f00000              ramoops          Õ    !ð                 Û           ç           ô         linux,cma             shared-dma-pool                   ©                	         reboot-mode-syscon@5f01000            syscon simple-mfd            Õ    ð           reboot-mode           syscon-reboot-mode                      "wfU        .wfU         >wfU         regulator-0           regulator-fixed         LSYS_5V          [ LK@        s LK@         ‹         �         ¯   {      regulator-1           regulator-fixed         LVDD_3V3         [ 2Z         s 2Z          ‹         �        ±   {         ¯   N      regulator-2           regulator-fixed         L5V_HUB          [ LK@        s LK@         ‹        ¼   6                �        ±   {         ¯   9      wl1835-pwrseq             mmc-pwrseq-simple           Á   6               ø         
  ext_clock           Í   
        ä   
         ¯   O      leds          
    gpio-leds      led-user-1          �green:user1         {   |              
  ÷heartbeat         led-user-2          �green:user2         {   |               ÷mmc0          led-user-3          �green:user3         {   |               ÷mmc1          led-user-4          �green:user4         {   |                        ÷none          led-wlan            �yellow:wlan         {   }               ÷phy0tx          off       led-bt          �blue:bt         {   |               ÷hci0-power          off          pmic@f8000000             hisilicon,hi655x-pmic            Õ    ø                  Ï             ¨        —           +                   ¯      regulators     LDO2          	  LLDO2_2V8            [ &%         s 0Ô         6   x      LDO7          
  LLDO7_SDIO           [ w@        s 2Z         6   x         ¯   F      LDO10           LLDO10_2V85          [ w@        s -ÆÀ        6  h         ¯   G      LDO13         
  LLDO13_1V8           [ j         s Á0        6   x      LDO14         
  LLDO14_2V8           [ &%         s 0Ô         6   x      LDO15         
  LLDO15_1V8           [ j         s Á0         ‹         �        6   x      LDO17         
  LLDO17_2V5           [ &%         s 0Ô         6   x      LDO19         
  LLDO19_3V0           [ w@        s -ÆÀ        6  h         ¯   ?      LDO21         
  LLDO21_1V8           [ -P        s „€         �        6   x      LDO22         
  LLDO22_1V2           [ »         s O€         ‹         �        6   x            firmware       optee             linaro,optee-tz          =smc          sound_card            audio-graph-card            R   ~         	compatible interrupt-parent #address-cells #size-cells model method cpu entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us phandle wakeup-latency-us device_type reg enable-method next-level-cache clocks operating-points-v2 cpu-idle-states #cooling-cells dynamic-power-coefficient cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns #interrupt-cells interrupt-controller interrupts ranges #clock-cells #reset-cells hisilicon,hi6220-clk-sram mbox-names mboxes clock-names pinctrl-names pinctrl-0 dmas dma-names status assigned-clocks assigned-clock-rates enable-gpios label #dma-cells dma-channels dma-requests dma-no-cci dma-type #pinctrl-cells #gpio-range-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range #pinctrl-single,gpio-range-cells pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,drive-strength gpio-controller #gpio-cells gpio-line-names gpio-ranges num-cs cs-gpios i2c-sda-hold-time-ns pd-gpios adi,dsi-lanes #sound-dai-cells remote-endpoint #phy-cells phy-supply hisilicon,peripheral-syscon phys phy-names dr_mode g-rx-fifo-size g-np-tx-fifo-size g-tx-fifo-size #mbox-cells resets reset-names cap-mmc-highspeed non-removable bus-width vmmc-supply pinctrl-1 card-detect-delay cap-sd-highspeed sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 vqmmc-supply disable-wp cd-gpios cap-power-off-card mmc-pwrseq #thermal-sensor-cells hisilicon,sysctrl-syscon dai-format polling-delay polling-delay-passive sustainable-power thermal-sensors temperature hysteresis trip cooling-device reg-names hisilicon,noc-syscon dma-coherent interrupt-names arm,cs-dev-assoc serial0 serial1 serial2 serial3 stdout-path record-size console-size ftrace-size reusable linux,cma-default offset mode-normal mode-bootloader mode-recovery regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on vin-supply gpio reset-gpios post-power-on-delay-ms power-off-delay-us linux,default-trigger panic-indicator default-state pmic-gpios regulator-enable-ramp-delay dais 