Ðþí  ”V   8  ‰Ä   (            
’  ‰Œ                                 pine64,rock64 rockchip,rk3328                                    +            7Pine64 Rock64      aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            �/ethernet@ff540000           ‹/mmc@ff500000            �/mmc@ff520000         cpus                         +       cpu@0            •cpu           arm,cortex-a53           ¡                 ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {   	      cpu@1            •cpu           arm,cortex-a53           ¡                ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {   
      cpu@2            •cpu           arm,cortex-a53           ¡                ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {         cpu@3            •cpu           arm,cortex-a53           ¡                ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {         idle-states         ƒpsci       cpu-sleep             arm,idle-state           �        ¡           ¸   x        É   ú        Ù  „        {            l2-cache              cache           ê            ö        	              @        (           {            opp-table-0           operating-points-v2                  {      opp-408000000               Q–          ~ð        $  œ@         5      opp-600000000               #ÃF          ~ð        $  œ@      opp-816000000               0£,          B@        $  œ@      opp-1008000000              <Ü          Èà        $  œ@      opp-1200000000              G†Œ          ±(        $  œ@      opp-1296000000              M?d          Ö         $  œ@         analog-sound              simple-audio-card           Ai2s         Z           tAnalog          ‹okay       simple-audio-card,cpu           ’         simple-audio-card,codec         ’            arm-pmu           arm,cortex-a53-pmu        0  œ       d          e          f          g           §   	   
            display-subsystem             rockchip,display-subsystem          º         hdmi-sound            simple-audio-card           Ai2s         Z   €        tHDMI            ‹okay       simple-audio-card,cpu           ’         simple-audio-card,codec         ’            psci              arm,psci-1.0 arm,psci-0.2            ìsmc       timer             arm,armv8-timer       0  œ                              
        xin24m            fixed-clock         À            Ín6         Ýxin24m          {   I      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ¡    ÿ                  œ                   ¥      )     7        ði2s_clk i2s_hclk            ü                    tx rx                       ‹okay            {         i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ¡    ÿ                 œ                   ¥      *     8        ði2s_clk i2s_hclk            ü                    tx rx                       ‹okay            {         i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ¡    ÿ                 œ                   ¥      +     9        ði2s_clk i2s_hclk            ü                     tx rx                     	  ‹disabled          spdif@ff030000            rockchip,rk3328-spdif            ¡    ÿ                 œ                   ¥      .     :      
  ðmclk hclk           ü      
        tx          default         *                       ‹okay            {   l      pdm@ff040000              rockchip,pdm             ¡    ÿ                  ¥      =     R        ðpdm_clk pdm_hclk            ü              rx          default sleep           *                       4                     	  ‹disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd            ¡    ÿ                 {   E   io-domains        "    rockchip,rk3328-io-voltage-domain           ‹okay            >           L           Z           h           v           „           ’         gpio              rockchip,rk3328-grf-gpio             Ÿ        ¯           {   H      power-controller          !    rockchip,rk3328-power-controller            »                        +            {   ;   power-domain@1           ¡            ¥      ‡        »          power-domain@6           ¡            ¥      D        »          power-domain@5           ¡             ¥      ‹     B      A      B        »          power-domain@8           ¡            ¥      �     F        »             reboot-mode           syscon-reboot-mode          Ï  È        ÖRBÃ         âRBÃ        ðRBÃ	         RBÃ         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart            ¡    ÿ                 œ       7            ¥      &      Ò        ðbaudclk apb_pclk            ü                    tx rx           default         *          !                            	  ‹disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart            ¡    ÿ                 œ       8            ¥      '      Ó        ðbaudclk apb_pclk            ü                    tx rx           default         *   "   #   $                            	  ‹disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart            ¡    ÿ                 œ       9            ¥      (      Ô        ðbaudclk apb_pclk            ü                    tx rx           default         *   %                              ‹okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       $                        +             ¥      7      Í      	  ði2c pclk            default         *   &      	  ‹disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       %                        +             ¥      8      Î      	  ði2c pclk            default         *   '        ‹okay       pmic@18           rockchip,rk805           ¡               (        œ              À           Ýxin32k rk805-clkout2             Ÿ        ¯           default         *   )         #         ;        I   *        U   *        a   *        m   *        y           …   *        {   k   regulators     DCDC_REG1         
  ‘vdd_logic             
ß4        ¸          Ð  0Ô         å         ù        {   <   regulator-state-mem                  # B@         DCDC_REG2           ‘vdd_arm           
ß4        ¸          Ð  0Ô         å         ù        {      regulator-state-mem                  # ~ð         DCDC_REG3           ‘vcc_ddr          å         ù   regulator-state-mem                   DCDC_REG4           ‘vcc_io            2Z         ¸ 2Z          å         ù        {      regulator-state-mem                  # 2Z          LDO_REG1            ‘vcc_18            w@        ¸ w@         å         ù        {      regulator-state-mem                  # w@         LDO_REG2            ‘vcc18_emmc            w@        ¸ w@         å         ù        {      regulator-state-mem                  # w@         LDO_REG3            ‘vdd_10            B@        ¸ B@         å         ù        {   F   regulator-state-mem                  # B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       &                        +             ¥      9      Ï      	  ði2c pclk            default         *   +      	  ‹disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       '                        +             ¥      :      Ð      	  ði2c pclk            default         *   ,      	  ‹disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi          ¡    ÿ                 œ       1                        +             ¥             Ñ        ðspiclk apb_pclk         ü            	        tx rx           default         *   -   .   /   0        ‹okay       flash@0           jedec,spi-nor            ¡            ?úð€        Q            watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt          ¡    ÿ                 œ       (            ¥      ì      pwm@ff1b0000              rockchip,rk3328-pwm          ¡    ÿ                  ¥      <      Ö      	  ðpwm pclk            default         *   1        \         	  ‹disabled          pwm@ff1b0010              rockchip,rk3328-pwm          ¡    ÿ                 ¥      <      Ö      	  ðpwm pclk            default         *   2        \         	  ‹disabled          pwm@ff1b0020              rockchip,rk3328-pwm          ¡    ÿ                  ¥      <      Ö      	  ðpwm pclk            default         *   3        \         	  ‹disabled          pwm@ff1b0030              rockchip,rk3328-pwm          ¡    ÿ 0                ¥      <      Ö      	  ðpwm pclk            default         *   4        \         	  ‹disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell          ¡    ÿ        @         œ                              g         ¥      †      	  ðapb_pclk            ~           {         thermal-zones      soc-thermal         ‰           Ÿ  è        ­  è        ¿   5       trips      trip-point0         Ï p        Û  Ð         œpassive       trip-point1         Ï L        Û  Ð         œpassive         {   6      soc-crit            Ï s        Û  Ð      	   œcritical             cooling-maps       map0            æ   6      0  ë   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        ú         map1            æ   6        ë   7ÿÿÿÿÿÿÿÿ        ú                  tsadc@ff250000            rockchip,rk3328-tsadc            ¡    ÿ%                 œ       :                 $          ÃP         ¥      $      Õ        ðtsadc apb_pclk          init default sleep          *   8        4   9        ,   8        6      B      
  =tsadc-apb           I †         `           ‹okay            v            �            {   5      efuse@ff260000            rockchip,rk3328-efuse            ¡    ÿ&         P                     +            ¥      >        ðpclk_efuse          ¨       id@7             ¡            cpu-leakage@17           ¡            logic-leakage@19             ¡            cpu-version@1a           ¡              ¼              {   J         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc            ¡    ÿ(                 œ       P           Á            ¥      %      ê        ðsaradc apb_pclk         6      V        =saradc-apb        	  ‹disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450            ¡    ÿ0               T  œ       Z          W          ]          X          Y          [          \         "  Ógp gpmmu pp pp0 ppmmu0 pp1 ppmmu1            ¥      ‡      ‡      	  ðbus core             ó   :        ã   ;           6      f         ¬           ñ   <        {   7      opp-table-gpu             operating-points-v2         {   :   opp-200000000               ëÂ          g8      opp-300000000               á£          g8      opp-400000000               ×„          g8      opp-500000000               Íe          Œ0      	  ‹disabled             iommu@ff330200            rockchip,iommu           ¡    ÿ3                œ       `            ¥      “      Ý        ðaclk iface          ý          	  ‹disabled          iommu@ff340800            rockchip,iommu           ¡    ÿ4        @        œ       b            ¥      �     F        ðaclk iface          ý          	  ‹disabled          video-codec@ff350000              rockchip,rk3328-vpu          ¡    ÿ5                 œ       	           Óvdpu             ¥      �     F      
  ðaclk hclk           
   =        ã   ;         iommu@ff350800            rockchip,iommu           ¡    ÿ5        @        œ                   ¥      �     F        ðaclk iface          ý            ã   ;           {   =      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec            ¡    ÿ6        €        œ                    ¥      ‹     B      A      B        ðaxi ahb cabac core                ‹      A      B        ×„ ×„ á£         
   >        ã   ;         iommu@ff360480            rockchip,iommu            ¡    ÿ6€       @    ÿ6À       @        œ       J            ¥      ‹     B        ðaclk iface          ý            ã   ;           {   >      vop@ff370000              rockchip,rk3328-vop          ¡    ÿ7        >ü        œ                    ¥      ‘      x     ;        ðaclk_vop dclk_vop hclk_vop          6      …      †      ‡        =axi ahb dclk            
   ?        ‹okay       port            {      endpoint               @        {   G            iommu@ff373f00            rockchip,iommu           ¡    ÿ7?                œ                    ¥      ‘     ;        ðaclk iface          ý            ‹okay            {   ?      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi          ¡    ÿ<                            œ       #            ¥      ç      F              ðiahb isfr cec           !   A        &hdmi            default         *   B   C   D        0   E                    ‹okay            =   F        M           {      ports                        +       port@0           ¡       endpoint               G        {   @         port@1           ¡               codec@ff410000            rockchip,rk3328-codec            ¡    ÿA                  ¥      ë      *      
  ðpclk mclk           0   E                    ‹okay            ]   H               {         phy@ff430000              rockchip,rk3328-hdmi-phy             ¡    ÿC                 œ       S            ¥      ä   I      y        ðsysclk refoclk refpclk        	  Ýhdmi_phy            À            h   J        tcpu-version         …            ‹okay            {   A      clock-controller@ff440000             rockchip,rk3328-cru          ¡    ÿD                  ¥   I        ðxin24m          0   E        À           �         ø        x      =            &      '      (      ˆ      ‰      Ž      …      ƒ      Š      Œ      �      A      B      D      C      "      \      5                        ˆ     H      Ø      ‰     4      æ            $  �      z               I   I   I      |      ©€     n6 n6 n6  äáÀ äáÀá£ õá ×„ õá úð€õá õá õá úð€úð€úð€úð€n6 #ÃF L  G†Œ ðÑ€xhÀxhÀðÑ€xhÀxhÀ  €         {         syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd            ¡    ÿE                              +      usb2phy@100           rockchip,rk3328-usb2phy          ¡               ¥   I        ðphyclk          Ýusb480m_phy         À                  {        �   K        ‹okay            {   K   otg-port            …          $  œ       ;          <          =           Óotg-bvalid otg-id linestate         ‹okay            {   Z      host-port           …            œ       >         
  Ólinestate           ‹okay            {   [            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿP        @         œ                    ¥     =      !      J      N        ðbiu ciu ciu-drive ciu-sample            ´           CðÑ€        6      m        =reset           ‹okay            ¿            É         Û         ì        default         *   L   M   N   O        ÷   P      mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿQ        @         œ                    ¥     >      "      K      O        ðbiu ciu ciu-drive ciu-sample            ´           CðÑ€        6      n        =reset         	  ‹disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿR        @         œ                    ¥     ?      #      L      P        ðbiu ciu ciu-drive ciu-sample            ´           CðÑ€        6      o        =reset           ‹okay            ¿            É                          default         *   Q   R   S        ÷                     ethernet@ff540000             rockchip,rk3328-gmac             ¡    ÿT                 œ                  Ómacirq        8   ¥      d      W      X      Z      Y      –      ß      M  ðstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            6      c      
  =stmmaceth           0   E        -           ;           I           ‹okay                  d      f        �   T   T        Tinput           a           lrgmii           default         *   U        u   V               …        ›      '  ÃP        °   $        ¹         ethernet@ff550000             rockchip,rk3328-gmac             ¡    ÿU                 0   E        œ                  Ómacirq        8   ¥      T      S      S      U      •      Þ      V      I  ðstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy            6      b      
  =stmmaceth           lrmii            Â   W        -           ;           I           Toutput        	  ‹disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22          ¡             ¥      V        6      d        default         *   X   Y         Í        {   W            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2            ¡    ÿX                 œ                   ¥     M        ðotg         ßhost            ç           ù          	      €   €   @               !   Z      	  &usb2-phy            ‹okay          usb@ff5c0000              generic-ehci             ¡    ÿ\                 œ                   ¥     N   K        !   [        &usb         ‹okay          usb@ff5d0000              generic-ohci             ¡    ÿ]                 œ                   ¥     N   K        !   [        &usb         ‹okay          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿ_        @         œ                    ¥     @            M      Q        ðbiu ciu ciu-drive ciu-sample            ´           CðÑ€        6      h        =reset         	  ‹disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3           ¡    ÿ`                 œ       C            ¥      `      a      „        ðref_clk suspend_clk bus_clk         ßhost          
  	utmi_wide            	          	A         	Y         	{         	œ         	µ        ‹okay          interrupt-controller@ff811000             arm,gic-400         	Î                         	ß      @   ¡    ÿ�            ÿ�              ÿ�@             ÿ�`                 œ      	          {         crypto@ff060000           rockchip,rk3328-crypto           ¡    ÿ        @         œ                   ¥     P     Q      ;        ðhclk_master hclk_slave sclk         6      D        =crypto-rst        pinctrl           rockchip,rk3328-pinctrl         0   E                     +            	ô   gpio@ff210000             rockchip,gpio-bank           ¡    ÿ!                 œ       3            ¥      È         Ÿ        ¯            	ß        	Î           {   g      gpio@ff220000             rockchip,gpio-bank           ¡    ÿ"                 œ       4            ¥      É         Ÿ        ¯            	ß        	Î           {   V      gpio@ff230000             rockchip,gpio-bank           ¡    ÿ#                 œ       5            ¥      Ê         Ÿ        ¯            	ß        	Î           {   (      gpio@ff240000             rockchip,gpio-bank           ¡    ÿ$                 œ       6            ¥      Ë         Ÿ        ¯            	ß        	Î         pcfg-pull-up             	û        {   ^      pcfg-pull-down           
        {   f      pcfg-pull-none           
        {   \      pcfg-pull-none-2ma           
        
$           {   e      pcfg-pull-up-2ma             	û        
$         pcfg-pull-up-4ma             	û        
$           {   _      pcfg-pull-none-4ma           
        
$           {   b      pcfg-pull-down-4ma           
        
$         pcfg-pull-none-8ma           
        
$           {   `      pcfg-pull-up-8ma             	û        
$           {   a      pcfg-pull-none-12ma          
        
$           {   c      pcfg-pull-up-12ma            	û        
$           {   d      pcfg-output-high             
3      pcfg-output-low          
?      pcfg-input-high          	û         
J        {   ]      pcfg-input           
J      i2c0       i2c0-xfer            
W            \            \        {   &         i2c1       i2c1-xfer            
W            \            \        {   '         i2c2       i2c2-xfer            
W            \            \        {   +         i2c3       i2c3-xfer            
W             \             \        {   ,      i2c3-pins            
W              \              \         hdmi_i2c       hdmii2c-xfer             
W             \             \        {   C         pdm-0      pdmm0-clk           
W            \        {         pdmm0-fsync         
W            \      pdmm0-sdi0          
W            \        {         pdmm0-sdi1          
W            \        {         pdmm0-sdi2          
W            \        {         pdmm0-sdi3          
W            \        {         pdmm0-clk-sleep         
W             ]        {         pdmm0-sdi0-sleep            
W             ]        {         pdmm0-sdi1-sleep            
W             ]        {         pdmm0-sdi2-sleep            
W             ]        {         pdmm0-sdi3-sleep            
W             ]        {         pdmm0-fsync-sleep           
W             ]         tsadc      otp-pin         
W             \        {   8      otp-out         
W            \        {   9         uart0      uart0-xfer           
W      	      \            ^        {         uart0-cts           
W            \        {          uart0-rts           
W      
      \        {   !      uart0-rts-pin           
W      
       \         uart1      uart1-xfer           
W            \            ^        {   "      uart1-cts           
W            \        {   #      uart1-rts           
W            \        {   $      uart1-rts-pin           
W             \         uart2-0    uart2m0-xfer             
W             \            ^         uart2-1    uart2m1-xfer             
W             \            ^        {   %         spi0-0     spi0m0-clk          
W            ^      spi0m0-cs0          
W            ^      spi0m0-tx           
W      	      ^      spi0m0-rx           
W      
      ^      spi0m0-cs1          
W            ^         spi0-1     spi0m1-clk          
W            ^      spi0m1-cs0          
W            ^      spi0m1-tx           
W            ^      spi0m1-rx           
W            ^      spi0m1-cs1          
W            ^         spi0-2     spi0m2-clk          
W             ^        {   -      spi0m2-cs0          
W            ^        {   0      spi0m2-tx           
W            ^        {   .      spi0m2-rx           
W            ^        {   /         i2s1       i2s1-mclk           
W            \      i2s1-sclk           
W            \      i2s1-lrckrx         
W            \      i2s1-lrcktx         
W            \      i2s1-sdi            
W            \      i2s1-sdo            
W            \      i2s1-sdio1          
W            \      i2s1-sdio2          
W            \      i2s1-sdio3          
W            \      i2s1-sleep        �  
W             ]             ]             ]             ]             ]             ]             ]             ]             ]         i2s2-0     i2s2m0-mclk         
W            \      i2s2m0-sclk         
W            \      i2s2m0-lrckrx           
W            \      i2s2m0-lrcktx           
W            \      i2s2m0-sdi          
W            \      i2s2m0-sdo          
W            \      i2s2m0-sleep          `  
W             ]             ]             ]             ]             ]             ]         i2s2-1     i2s2m1-mclk         
W            \      i2s2m1-sclk         
W             \      i2sm1-lrckrx            
W            \      i2s2m1-lrcktx           
W            \      i2s2m1-sdi          
W            \      i2s2m1-sdo          
W            \      i2s2m1-sleep          P  
W             ]              ]             ]             ]             ]         spdif-0    spdifm0-tx          
W             \        {            spdif-1    spdifm1-tx          
W            \         spdif-2    spdifm2-tx          
W             \         sdmmc0-0       sdmmc0m0-pwren          
W            _      sdmmc0m0-pin            
W             _         sdmmc0-1       sdmmc0m1-pwren          
W             _      sdmmc0m1-pin            
W              _        {   h         sdmmc0     sdmmc0-clk          
W            `        {   L      sdmmc0-cmd          
W            a        {   M      sdmmc0-dectn            
W            _        {   N      sdmmc0-wrprt            
W            _      sdmmc0-bus1         
W             a      sdmmc0-bus4       @  
W             a            a            a            a        {   O      sdmmc0-pins       €  
W             _             _             _             _             _             _             _              _         sdmmc0ext      sdmmc0ext-clk           
W            b      sdmmc0ext-cmd           
W             _      sdmmc0ext-wrprt         
W            _      sdmmc0ext-dectn         
W            _      sdmmc0ext-bus1          
W            _      sdmmc0ext-bus4        @  
W            _            _            _            _      sdmmc0ext-pins        €  
W              _             _             _             _             _             _             _             _         sdmmc1     sdmmc1-clk          
W            `      sdmmc1-cmd          
W            a      sdmmc1-pwren            
W            a      sdmmc1-wrprt            
W            a      sdmmc1-dectn            
W            a      sdmmc1-bus1         
W            a      sdmmc1-bus4       @  
W            a            a            a            a      sdmmc1-pins       �  
W             _             _             _             _             _             _             _             _             _         emmc       emmc-clk            
W            c        {   Q      emmc-cmd            
W            d        {   R      emmc-pwren          
W            \      emmc-rstnout            
W            \      emmc-bus1           
W             d      emmc-bus4         @  
W             d            d            d            d      emmc-bus8         €  
W             d            d            d            d            d            d            d            d        {   S         pwm0       pwm0-pin            
W            \        {   1         pwm1       pwm1-pin            
W            \        {   2         pwm2       pwm2-pin            
W            \        {   3         pwmir      pwmir-pin           
W            \        {   4         gmac-1     rgmiim1-pins         `  
W            `            b            b            `            b            b            b      
      b            b            `      	      `            b            b            `            `             `             `             b             `             `             `             `        {   U      rmiim1-pins         
W            e            c            e            e            e            e      
      e            e            c      	      c             \             \             \             \             \             \         gmac2phy       fephyled-speed10            
W             \      fephyled-duplex         
W             \      fephyled-rxm1           
W            \        {   X      fephyled-txm1           
W            \      fephyled-linkm1         
W            \        {   Y         tsadc_pin      tsadc-int           
W            \      tsadc-pin           
W             \         hdmi_pin       hdmi-cec            
W             \        {   B      hdmi-hpd            
W             f        {   D         cif-0      dvp-d2d9-m0       À  
W            \            \            \            \            \      	      \      
      \            \            \             \            \            \         cif-1      dvp-d2d9-m1       À  
W            \            \            \            \            \            \            \            \            \             \            \            \         ir     ir-int          
W             \        {   j         pmic       pmic-int-l          
W             ^        {   )         usb2       usb20-host-drv          
W              \        {   i            chosen          
eserial2:1500000n8         external-gmac-clock           fixed-clock         ÍsY@        Ýgmac_clkin          À            {   T      regulator-sdmmc           regulator-fixed         €   g              default         *   h        ‘vcc_sd            2Z         ¸ 2Z         
q           {   P      regulator-vcc-host-5v             regulator-fixed         €   g              default         *   i        ‘vcc_host_5v          å         ù        
q   *      regulator-vcc-sys             regulator-fixed         ‘vcc_sys          å         ù          LK@        ¸ LK@        {   *      ir-receiver           gpio-ir-receiver            b   (              *   j        default       leds          
    gpio-leds      led-0           b   k              
|mmc0          led-1           b   k             
  
|heartbeat            spdif-sound           simple-audio-card           tSPDIF      simple-audio-card,cpu           ’   l      simple-audio-card,codec         ’   m         spdif-dit             linux,spdif-dit                     {   m         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 mmc0 mmc1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply pmuio-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt spi-max-frequency vcc-supply #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names power-domains mali-supply #iommu-cells iommus remote-endpoint phys phy-names rockchip,grf avdd-0v9-supply avdd-1v8-supply mute-gpios nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vmmc-supply mmc-hs200-1_8v non-removable vqmmc-supply tx-fifo-depth rx-fifo-depth snps,txpbl clock_in_out phy-supply phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay phy-handle phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path vin-supply linux,default-trigger 