Ðþí  (   8  ü   (            ,  Ä                             '    Amlogic A113L2 ba400 Development Board           amlogic,ba400 amlogic,a4                         "            1      timer            arm,armv8-timer       0   =                              
        psci             arm,psci-1.0             Hsmc       xtal-clk             fixed-clock          On6          _xtal             r                      soc          simple-bus           "            1             ‡   interrupt-controller@fff01000            arm,gic-400       @   Ž    ÿð            ÿð              ÿð@             ÿð`                  ’            "              £         =      	                    bus@fe000000             simple-bus           Ž    þ        H           "            1            ‡            þ        H     watchdog@2100            amlogic,a4-wdt amlogic,t7-wdt            Ž      !                 ¸         serial@7a000          &   amlogic,a4-uart amlogic,meson-s4-uart            Ž                       =       ©            ¸                  ¿xtal pclk baud           Ëokay          ao-secure@10220       7   amlogic,a4-ao-secure amlogic,meson-gx-ao-secure syscon           Ž            @          Ò      reset-controller@2000         (   amlogic,a4-reset amlogic,meson-s4-reset          Ž               ˜         æ         pinctrl@4000             amlogic,pinctrl-a4           "            1            ‡              @       €               gpio@100              Ž              @                    	   ógpio mux              ý                                      gpio@140              Ž      @       @       ,             	   ógpio mux              ý                                      gpio@180              Ž      €       @       @             	   ógpio mux              ý                                      gpio@1c0              Ž      À       @       H             	   ógpio mux              ý                                      gpio@240              Ž      @       @                     	   ógpio mux              ý                                      func-uart-a    group-uart-a-pins1          %          group-uart-a-pins2          %           ,        9            func-uart-b    group-uart-b-pins           %            ,        9            func-uart-d    group-uart-d-pins1          %           ,        9         group-uart-d-pins2          %   	 
         ,        9            func-uart-e    group-uart-e-pins           %             ,        9               interrupt-controller@4080         -   amlogic,a4-gpio-intc amlogic,meson-gpio-intc             Ž      @€                  £         ’         0  Q   
                                       pinctrl@8e700            amlogic,pinctrl-a4           "            1            ‡             ç        €   gpio@4            Ž                                   	   ógpio mux              ý                                      gpio@44          Ž       D                 ógpio              ý                                         interrupt-controller@8e72c        0   amlogic,a4-gpio-ao-intc amlogic,meson-gpio-intc          Ž     ç,                 £         ’           Q   Œ   �            cpus             "            1       cpu@0           lcpu          arm,cortex-a53           Ž                xpsci            †            ˜  €         ¥            ²            Ä  €         Ñ            Þ         cpu@1           lcpu          arm,cortex-a53           Ž               xpsci            †            ˜  €         ¥            ²            Ä  €         Ñ            Þ         cpu@2           lcpu          arm,cortex-a53           Ž               xpsci            †            ˜  €         ¥            ²            Ä  €         Ñ            Þ         cpu@3           lcpu          arm,cortex-a53           Ž               xpsci            †            ˜  €         ¥            ²            Ä  €         Ñ            Þ         l2-cache0            cache           ï            û        š           ˆ   @        §                        secure-monitor           amlogic,meson-gxbb-sm      power-controller             amlogic,a4-pwrc         	            aliases         /soc/bus@fe000000/serial@7a000        memory@0            lmemory           Ž            @         reserved-memory          "            1             ‡   secmon@5000000           shared-dma-pool          Ž                        %            	model compatible interrupt-parent #address-cells #size-cells interrupts method clock-frequency clock-output-names #clock-cells phandle ranges reg #interrupt-cells interrupt-controller clocks clock-names status amlogic,has-chip-id #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-up drive-strength-microamp amlogic,channel-interrupts device_type enable-method d-cache-line-size d-cache-size d-cache-sets i-cache-line-size i-cache-size i-cache-sets next-level-cache cache-level cache-unified #power-domain-cells serial0 no-map 