Ðþí vñ   8 l¬   (            
E lt                                                                   6   ,Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board         B   2toradex,apalis-imx8-v1.1-eval toradex,apalis-imx8-v1.1 fsl,imx8qm      aliases          =/bus@5b000000/mmc@5b010000           B/bus@5b000000/mmc@5b020000           G/bus@5b000000/mmc@5b030000           L/bus@5a000000/serial@5a060000            T/bus@5a000000/serial@5a070000            \/bus@5a000000/serial@5a080000            d/bus@5a000000/serial@5a090000            l/bus@5a000000/spi@5a000000           q/bus@5a000000/spi@5a010000           v/bus@5a000000/spi@5a020000           {/bus@5a000000/spi@5a030000            €/vpu@2c000000/vpu-core@2d080000           Š/vpu@2c000000/vpu-core@2d090000           ”/vpu@2c000000/vpu-core@2d0a0000           ž/bus@5b000000/ethernet@5b040000       "   ¨/bus@5a000000/i2c@5a820000/rtc@68            ­/system-controller/rtc        cpus                                 cpu-map    cluster0       core0            ²         core1            ²         core2            ²         core3            ²            cluster1       core0            ²         core1            ²               cpu@0            ¶cpu          2arm,cortex-a53           Â                 Æ                   Ípsci             Û  €          è   @         ú             €            @        &   €        3   	        D   
        X           g         cpu@1            ¶cpu          2arm,cortex-a53           Â                Æ                   Ípsci             Û  €          è   @         ú             €            @        &   €        3   	        D   
        X           g         cpu@2            ¶cpu          2arm,cortex-a53           Â                Æ                   Ípsci             Û  €          è   @         ú             €            @        &   €        3   	        D   
        X           g         cpu@3            ¶cpu          2arm,cortex-a53           Â                Æ                   Ípsci             Û  €          è   @         ú             €            @        &   €        3   	        D   
        X           g         cpu@100          ¶cpu          2arm,cortex-a72           Â                Æ                  Ípsci             Û  À          è   @         ú             €            @        &           3           D           X           g         cpu@101          ¶cpu          2arm,cortex-a72           Â               Æ                  Ípsci            3           D           X           g         l2-cache0            2cache           o            {         Ý            ê   @         ü           g   	      l2-cache1            2cache           o            {         Ý            ê   @         ü           g            opp-table-0          2operating-points-v2          ‰        g   
   opp-600000000           ”    #ÃF         › »         © Ið      opp-896000000           ”    5gà         › B@        © Ið      opp-1104000000          ”    AÍ´         › Èà        © Ið      opp-1200000000          ”    G†Œ         › Èà        © Ið         º         opp-table-1          2operating-points-v2          ‰        g      opp-600000000           ”    #ÃF         › B@        © Ið      opp-1056000000          ”    >ñH         › B@        © Ið      opp-1296000000          ”    M?d         › Èà        © Ið      opp-1596000000          ”    _!         › Èà        © Ið         º         interrupt-controller@51a00000            2arm,gic-v3        P   Â    Q              Q°             R               R             R                              Æ            ×        ì      	                        g         pmu          2arm,armv8-pmuv3         ì               psci             2arm,psci-1.0             Ôsmc       timer            2arm,armv8-timer       0  ì                                 
         iommu@51400000           2arm,mmu-500                       Â    Q@                 ÷           
        Œ  ì                                                                                                                                                                                                                                                                                                                                                                                   g   Í      system-controller            2fsl,imx-scu         tx0 rx0 gip3          $  "                                 power-controller             2fsl,imx8qm-scu-pd fsl,scu-pd            )           g   %      clock-controller             2fsl,imx8qm-clk fsl,scu-clk          =           g         pinctrl          2fsl,imx8qm-iomuxc           Jdefault       H  X                                                              g   ÷   adc0grp       0  b   �    À  `   Œ    À  `   ‹    À  `   Š    À  `        g   ½      adc1grp       0  b   ‰    À  `   ˆ    À  `   ‡    À  `   †    À  `        g   ¿      cam1gpiosgrp          �  b   C      !   D      !   l      !   m      !   n      !   o      !   p      !   q      !   r      !   c      !   j      !   k      !        g         dap1gpiosgrp          T  b   d      !         !   X      !   y      !   �      !   ~      !   ^      !        g         esai0gpiosgrp           b   h      !   i      !        g         fec1grp       Ø  b   ÿ          ¦          ¥          ô          ó          õ          ö          ÷          ø          ù          ú          û          ü          ý          þ          §          9         M     `        g   ã      fec1-sleepgrp         Ø  b   ÿ          ¦     @   ¥     @   ô     @   ó     @   õ     @   ö     @   ÷     @   ø     @   ù     @   ú     @   û     @   ü     @   ý     @   þ     @   §     @   9         M     @        g   ä      fec2gpiosgrp          ¨  b            ª      !   ©      !   ¨      !        !        !  	      !  
      !        !        !         !        !        !        !        g         flexcan0grp         b   “       !   ’       !        g   Á      flexcan1grp         b   •       !   ”       !        g   Ã      flexcan2grp         b   —       !   –       !        g   Å      gpio1grp            b   	     !      gpio2grp            b   
     !      gpio3grp            b        !        g         gpio4grp            b        !        g         gpio5grp            b   –     !        g   ¸      gpio6grp            b   —      !        g   ¹      gpio7grp            b   Ž      !        g        gpio8grp            b   �      !        g        gpiobklongrp            b   2      !        g        gpiokeysgrp         b   e   p !        g         gpiousbhocngrp          b   œ     !        g         hdmictrlgrp         b   N      a        g   ø      lpi2c1grp           b                          g   ¬      lpi2c2grp           b                          g   ¶      lpi2c3grp           b                          g   »      lpspi0grp         0  b   u      L   v      L   w      L   x     L        g   ›      lpspi2grp         0  b   z      L   {      L   |      L   }     L        g   Ÿ      lpuart0grp          b                            g   ¢      lpuart1grp        0  b                                                g   ¤      lpuart1ctrlgrp        0  b         !         !         !         !        g         lpuart2grp          b   6         7              g   ¦      lpuart3grp        0  b   <         =                              g   ¨      lvds0i2c0gpiogrp            b   4      !        g         lvds1i2c0gpiosgrp           b   :      !   ;      !        g         mipidsi0-1engrp         b   5      !        g         mipidsi1gpiosgrp            b   E      !        g         mlbgpiosgrp         b   �      !        g         mmc1cdgrp           b   Z      !        g   Ô      mmc1cdsleepgrp          b   Z     !        g   Û      pciebgrp          $  b   É      !   Ê      !   Ë      !        g   ÿ      pciesatarefclkgrp           b   ¢      !        g   û      pciewifirefclkgrp           b   \      !        g   ý      pwm0grp         b                  g   ð      pwm1grp         b                  g   ò      pwm2grp         b                  g   ô      pwm3grp         b                  g   ö      pwmbklgrp           b   8               g   |      qspi1agpiosgrp        `  b   ³      !   ²      !   ±      !   °      !   ¯      !   ®      !   ¬      !   ­      !        g         resetmocigrp            b   &      !        g        sai1grp       0  b   ƒ    Æ  l   €    Æ  L   ‚    Æ  L   „    Æ  L        g   5      sata1actgrp         b   Y      !        g         sd1cdgrp            b   £      !        g   ß      sgtl5000grp         b   s    Æ  L        g   ±      sim0gpiosgrp          0  b          !         !         !         !        g         spdif0grp           b   `    Æ  @   _    Æ  @        g   2      touchctrlgpiosgrp         0  b   U      !   V      A   b      !   f      A        g        touchctrlidlegrp          0  b   ‰      !   ˆ      !   ‡      !   †      !        g        usbh1activegrp          b   Í       Ï   Î       ÿ      usbh1idlegrp            b   Í       Ï   Î       Ï      usb3503agrp       $  b   '      A   )      !   *      A        g   ­      usbhengrp           b   š      !        g        usbotg1grp          b   ™      !   ›     !        g   Ê      usdhc1grp         �  b   Ñ      A   Ò       !   Ó       !   Ô       !   Õ       !   Ö       !   ×       !   Ø       !   Ù       !   Ú       !   Û      A   Ü       !        g   Î      usdhc1-100mhzgrp          �  b   Ñ      @   Ò           Ó           Ô           Õ           Ö           ×           Ø           Ù           Ú           Û      @   Ü                g   Ï      usdhc1-200mhzgrp          �  b   Ñ      @   Ò           Ó           Ô           Õ           Ö           ×           Ø           Ù           Ú           Û      @   Ü                g   Ð      usdhc1gpiosgrp          b   ê      !        g         usdhc2grp4bitgrp          T  b   Þ      A   ß       !   à       !   á       !   ã       !   ä       !   Ÿ       !        g   Ò      usdhc2-4bit100mhzgrp          T  b   Þ      @   ß           à           á           ã           ä           Ÿ       !        g   Õ      usdhc2-4bit200mhzgrp          T  b   Þ      @   ß           à           á           ã           ä           Ÿ       !        g   ×      usdhc2grp8bitgrp          0  b   æ       !   ç       !   è       !   é       !        g   Ó      usdhc2-8bit100mhzgrp          0  b   æ           ç           è           é                g   Ö      usdhc2-8bit200mhzgrp          0  b   æ           ç           è           é                g   Ø      usdhc2-4bitsleepgrp       T  b   Þ      a   ß      a   à      a   á      a   ã      a   ä      a   Ÿ       !        g   Ù      usdhc2-8bitsleepgrp       0  b   æ      a   ç      a   è      a   é      a        g   Ú      usdhc3grp         T  b   ì      A   í       !   î       !   ï       !   ð       !   ñ       !   ¡       !        g   Þ      usdhc3-100mhzgrp          T  b   ì      A   í       !   î       !   ï       !   ð       !   ñ       !   ¡       !        g   à      usdhc3-200mhzgrp          T  b   ì      A   í       !   î       !   ï       !   ð       !   ñ       !   ¡       !        g   á      wifigrp         b   +     !   H     !        g         wifipdngrp          b   L     !        g           reset-controller             2fsl,imx-scu-reset           k           g   Ž      rtc          2fsl,imx8qxp-sc-rtc        ocotp            2fsl,imx8qm-scu-ocotp                                      x   mac@1c4          Â  Ä         mac@1c6          Â  Æ            thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal           ‚           g          watchdog          !   2fsl,imx8qm-sc-wdt fsl,imx-sc-wdt            ˜   <         thermal-zones      cpu0-thermal            ¤   ú        º  Ð        È           trips      trip0           Ø s        ä  Ð         ½passive         g   !      trip1           Ø š(        ä  Ð      	   ½critical             cooling-maps       map0            ï   !      0  ô   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu1-thermal            ¤   ú        º  Ð        È          trips      trip0           Ø s        ä  Ð         ½passive         g   "      trip1           Ø š(        ä  Ð      	   ½critical             cooling-maps       map0            ï   "        ô   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            gpu0-thermal            ¤   ú        º  Ð        È       �   trips      trip0           Ø s        ä  Ð         ½passive       trip1           Ø š(        ä  Ð      	   ½critical                gpu1-thermal            ¤   ú        º  Ð        È       ”   trips      trip0           Ø s        ä  Ð         ½passive       trip1           Ø š(        ä  Ð      	   ½critical                drc0-thermal            ¤   ú        º  Ð        È          trips      trip0           Ø s        ä  Ð         ½passive       trip1           Ø š(        ä  Ð      	   ½critical                pmic-thermal            ¤   ú        º  Ð        È      ñ   cooling-maps       map0            ï   #      H  ô   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ         trips      trip0           ä  Ð        Ø ­°         ½passive         g   #      trip1           ä  Ð        Ø èH      	   ½critical                   clock-dummy          2fixed-clock         =                      
  clk_dummy           g   $      clock-esai1-rx           2fixed-clock         =                        esai1_rx_clk            g   J      clock-esai1-rx-hf            2fixed-clock         =                        esai1_rx_hf_clk         g   K      clock-esai1-tx           2fixed-clock         =                        esai1_tx_clk            g   L      clock-esai1-tx-hf            2fixed-clock         =                        esai1_tx_hf_clk         g   M      clock-hdmi-rx-mclk           2fixed-clock         =                        hdmi-rx-mclk            g   C      clock-mlb-clk            2fixed-clock         =                        mlb_clk         g   B      clock-sai5-rx-bclk           2fixed-clock         =                        sai5_rx_bclk            g   V      clock-sai5-tx-bclk           2fixed-clock         =                        sai5_tx_bclk          clock-sai6-rx-bclk           2fixed-clock         =                        sai6_rx_bclk            g   W      clock-sai6-tx-bclk           2fixed-clock         =                        sai6_tx_bclk          clock-spdif1-rx          2fixed-clock         =                      
  spdif1_rx         clock-controller-lvds-ipg            2fixed-clock         =            n6         lvds0_ipg_clk           g   m      clock-controller-dsi-ipg             2fixed-clock         =            '         dsi_ipg_clk         g   f      clock-controller-mipi-div2-pll           2fixed-clock         =            ¿Ì         mipi_pll_div2_clk         bus@55000000             2simple-bus                                   &U       U         dsp@556e8000             2fsl,imx8qm-hifi4             ÂUn€  €          Æ   $   $   $        -ipg ocram core           9   %   ë   %      %     %   ×      $  "   &           &          &               tx rx rxdb          Gimx/dsp/hifi4.bin         	  Udisabled             bus@31400000             2simple-bus                                   &1@      1@   	     crypto@31400000          2fsl,imx8qm-caam fsl,sec-v4.0             Â1@   	          ì       ”                                    &    1@   	          9   %  õ        \   	   jr@30000          *   2fsl,imx8qm-job-ring fsl,sec-v4.0-job-ring            Â              ì      Å           9   %  õ      jr@40000          *   2fsl,imx8qm-job-ring fsl,sec-v4.0-job-ring            Â              ì      Æ           9   %  ö            clock-cm41-ipg           2fixed-clock         =            Þ)         cm41_ipg_clk            g   )      bus@38000000             2simple-bus                                   &8       8                   '   i2c@3b230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          Â;#             ì   	            Æ   (       (           -per ipg         h     4           xn6         9   %  4      	  Udisabled          intmux@3b400000          2fsl,imx-intmux           Â;@                        `  ì                                                         '                                ×        Æ            Æ   )        -ipg         9   %  5      	  Udisabled            g   '      clock-controller@3b630000            2fsl,imx8qxp-lpcg             Â;c             =            Æ     4      )        �             (  cm41_lpcg_i2c_clk cm41_lpcg_i2c_ipg_clk         9   %  4        g   (         clock-audio-ipg          2fixed-clock         =            '         audio_ipg_clk           g   1      clock-ext-aud-mclk0          2fixed-clock         =                        ext_aud_mclk0           g   D      clock-ext-aud-mclk1          2fixed-clock         =                        ext_aud_mclk1           g   E      clock-esai0-rx           2fixed-clock         =                        esai0_rx_clk            g   F      clock-esai0-rx-hf            2fixed-clock         =                        esai0_rx_hf_clk         g   G      clock-esai0-tx           2fixed-clock         =                        esai0_tx_clk            g   H      clock-esai0-tx-hf            2fixed-clock         =                        esai0_tx_hf_clk         g   I      clock-spdif0-rx          2fixed-clock         =                      
  spdif0_rx           g   N      clock-sai0-rx-bclk           2fixed-clock         =                        sai0_rx_bclk            g   O      clock-sai0-tx-bclk           2fixed-clock         =                        sai0_tx_bclk            g   P      clock-sai1-rx-bclk           2fixed-clock         =                        sai1_rx_bclk            g   Q      clock-sai1-tx-bclk           2fixed-clock         =                        sai1_tx_bclk            g   R      clock-sai2-rx-bclk           2fixed-clock         =                        sai2_rx_bclk            g   S      clock-sai3-rx-bclk           2fixed-clock         =                        sai3_rx_bclk            g   T      clock-sai4-rx-bclk           2fixed-clock         =                        sai4_rx_bclk            g   U      bus@59000000             2simple-bus                                   &Y       Y         asrc@59000000            2fsl,imx8qm-asrc          ÂY              ì      t         d   Æ   *       *      +       ,       -       -      $   $   $   $   $   $   $   $   $   $   $   $   $      �  -mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  ›   .               .              .              .             .             .                   rxa rxb rxc txa txb txc         ª  »€        ¸           Ç            9   %  ž        Uokay          esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai             ÂY             ì      ™            Æ   /       /      /       $        -core extal fsys spba             ›   .             .                    rx tx           9   %  Ÿ      	  Udisabled          spdif@59020000           2fsl,imx8qm-spdif             ÂY             ì      È         Ê         0   Æ   0      $   0      $   $   $   1   $   $   $      :  -core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            ›   .             .   	                rx tx           9   %           Uokay          $  h     E        E         E           x.à  î   »€         Jdefault         X   2        g        sai@59040000             2fsl,imx8qm-sai           ÂY             ì      :            Æ   3       $   3      $   $        -bus mclk0 mclk1 mclk2 mclk3          rx tx            ›   .             .                   9   %  >      	  Udisabled          sai@59050000             2fsl,imx8qm-sai           ÂY             ì      <            Æ   4       $   4      $   $        -bus mclk0 mclk1 mclk2 mclk3          rx tx            ›   .             .                   9   %  ?        Uokay          ,  h     E        E         E      4            x.à  î   »€ î          Jdefault         X   5        Ø            g        sai@59060000             2fsl,imx8qm-sai           ÂY             ì      >            Æ   6       $   6      $   $        -bus mclk0 mclk1 mclk2 mclk3          rx          ›   .                  9   %  @      	  Udisabled          sai@59070000             2fsl,imx8qm-sai           ÂY             ì      C            Æ   7       $   7      $   $        -bus mclk0 mclk1 mclk2 mclk3          rx          ›   .                  9   %  ¢      	  Udisabled          dma-controller@591f0000          2fsl,imx8qm-edma          ÂY             é           ô                     ü  ì      v         w         x         y         z         {         š         š         É         Ë         Í         Ï         ;         ;         =         =         ?         D         F         H         q            9   %   þ   %   ÿ   %      %     %     %  «   %  ¬   %  ­   %  ®   %  ¯   %  °   %  ±   %  ²   %  ³   %  ´   %  µ   %  ¶   %  ·   %  ¸   %  ¹        g   .      clock-controller@59400000            2fsl,imx8qxp-lpcg             ÂY@             =            Æ   1   1        �             &  asrc0_lpcg_ipg_clk asrc0_lpcg_mem_clk           9   %  ž        g   *      clock-controller@59410000            2fsl,imx8qxp-lpcg             ÂYA             =            Æ   -      1        �             (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk         9   %  Ÿ        g   /      clock-controller@59420000            2fsl,imx8qxp-lpcg             ÂYB             =            Æ   -      1        �            %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw            9   %           g   0      clock-controller@59440000            2fsl,imx8qxp-lpcg             ÂYD             =            Æ   -      1        �             !  sai0_lpcg_mclk sai0_lpcg_ipg_clk            9   %  >        g   3      clock-controller@59450000            2fsl,imx8qxp-lpcg             ÂYE             =            Æ   -      1        �             !  sai1_lpcg_mclk sai1_lpcg_ipg_clk            9   %  ?        g   4      clock-controller@59460000            2fsl,imx8qxp-lpcg             ÂYF             =            Æ   -      1        �             !  sai2_lpcg_mclk sai2_lpcg_ipg_clk            9   %  @        g   6      clock-controller@59470000            2fsl,imx8qxp-lpcg             ÂYG             =            Æ   -      1        �             !  sai3_lpcg_mclk sai3_lpcg_ipg_clk            9   %  ¢        g   7      clock-controller@59580000            2fsl,imx8qxp-lpcg             ÂYX             =            Æ   1   1   1        �               4  dsp_lpcg_adb_clk dsp_lpcg_ipg_clk dsp_lpcg_core_clk         9   %         	  Udisabled          clock-controller@59590000            2fsl,imx8qxp-lpcg             ÂYY             =            Æ   1        �           dsp_ram_lpcg_ipg_clk            9   %        	  Udisabled          asrc@59800000            2fsl,imx8qm-asrc          ÂY€             ì      |         d   Æ   8       8      +       ,       -       -      $   $   $   $   $   $   $   $   $   $   $   $   $      �  -mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  ›   9               9              9              9             9             9                   rxa rxb rxc txa txb txc         ª  @        ¸           Ç           9   %  Æ      	  Udisabled          sai@59820000             2fsl,imx8qm-sai           ÂY‚             ì      I            Æ   :       $   :      $   $        -bus mclk0 mclk1 mclk2 mclk3          ›   9             9   	                 rx tx           9   %  È      	  Udisabled            g   =      sai@59830000             2fsl,imx8qm-sai           ÂYƒ             ì      K            Æ   ;       $   ;      $   $        -bus mclk0 mclk1 mclk2 mclk3         ›   9   
                 tx          9   %  É      	  Udisabled            g   >      amix@59840000            2fsl,imx8qm-audmix            ÂY„              Æ   <            -ipg         9   %  Ê           =   >      	  Udisabled          mqs@59850000             2fsl,imx8qm-mqs           ÂY…              Æ   ?      ?          
  -mclk core           9   %  Ë      	  Udisabled          dma-controller@599f0000          2fsl,imx8qm-edma          ÂYŸ             é           ô              À      �  ì      ~                  €         �         ‚         ƒ                               J         J         L         s         X  9   %  Ì   %  Í   %  Î   %  Ï   %  Ð   %  Ñ   %  Ò   %  Ó   %  Ô   %  Õ   %  Ö        g   9      clock-controller@59d00000            2fsl,imx8qxp-lpcg             ÂYÐ             =            Æ     E           �            aud_rec_clk0_lpcg_clk           9   %  E        g   @      clock-controller@59d10000            2fsl,imx8qxp-lpcg             ÂYÑ             =            Æ     ì           �            aud_rec_clk1_lpcg_clk           9   %  ì        g   A      clock-controller@59d20000            2fsl,imx8qxp-lpcg             ÂYÒ             =            Æ     E            �            aud_pll_div_clk0_lpcg_clk           9   %  E        g   +      clock-controller@59d30000            2fsl,imx8qxp-lpcg             ÂYÓ             =            Æ     ì            �            aud_pll_div_clk1_lpcg_clk           9   %  ì        g   ,      clock-controller@59d50000            2fsl,imx8qxp-lpcg             ÂYÕ             =            Æ   -           �            mclkout0_lpcg_clk           9   %  ï        g   °      clock-controller@59d60000            2fsl,imx8qxp-lpcg             ÂYÖ             =            Æ   -           �            mclkout1_lpcg_clk           9   %  ð      acm@59e00000             2fsl,imx8qm-acm           ÂYà             =         ¨  9   %  í   %  î   %  ï   %  ð   %  E   %  ì   %  ž   %  Æ   %  Ÿ   %  Ç   %  >   %  ?   %  @   %  ¢   %  £   %  ¤   %  È   %  É   %      %  ¡   %  Ë      |   Æ   @       A       +       ,       B   C   D   E   F   G   H   I   J   K   L   M   N   N   O   P   Q   R   S   T   U   V   W     Ž  -aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk mlb_clk hdmi_rx_mclk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk esai1_rx_clk esai1_rx_hf_clk esai1_tx_clk esai1_tx_hf_clk spdif0_rx spdif1_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk sai5_tx_bclk sai6_rx_bclk           g   -      clock-controller@59c00000            2fsl,imx8qxp-lpcg             ÂYÀ             =            Æ   1   1        �             &  asrc1_lpcg_ipg_clk asrc1_lpcg_mem_clk           9   %  Æ        g   8      clock-controller@59c20000            2fsl,imx8qxp-lpcg             ÂYÂ             =            Æ   -      1        �             !  sai6_lpcg_mclk sai6_lpcg_ipg_clk            9   %  È        g   :      clock-controller@59c30000            2fsl,imx8qxp-lpcg             ÂYÃ             =            Æ   -      1        �             !  sai7_lpcg_mclk sai7_lpcg_ipg_clk            9   %  É        g   ;      clock-controller@59c40000            2fsl,imx8qxp-lpcg             ÂYÄ             =            Æ   1        �            amix_lpcg_ipg_clk           9   %  Ê        g   <      clock-controller@59c50000            2fsl,imx8qxp-lpcg             ÂYÅ             =            Æ   -      1        �             !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk            9   %  Ë        g   ?      sai@59080000             2fsl,imx8qm-sai           ÂY             ì      E            Æ   X       $   X      $   $        -bus mclk0 mclk1 mclk2 mclk3          rx          ›   .                                     9   %  £      	  Udisabled          sai@59090000             2fsl,imx8qm-sai           ÂY	             ì      G            Æ   Y       $   Y      $   $        -bus mclk0 mclk1 mclk2 mclk3          tx          ›   .                                      9   %  ¤        Uokay          `  h   -      -        E        E         E        ì        ì         ì      Y            $   +       A          $  x        .à  î   »€ +  ±  ¬D î        clock-controller@59480000            2fsl,imx8qxp-lpcg             ÂYH             =            Æ   -      1        �             !  sai4_lpcg_mclk sai4_lpcg_ipg_clk            9   %  £      	  Udisabled            g   X      clock-controller@59490000            2fsl,imx8qxp-lpcg             ÂYI             =            Æ   -      1        �             !  sai5_lpcg_mclk sai5_lpcg_ipg_clk            9   %  ¤        Uokay            g   Y      esai@59810000         !   2fsl,imx8qm-esai fsl,imx6ull-esai             ÂY�             ì      ›            Æ   Z       Z      Z       $        -core extal fsys spba             ›   9             9                    rx tx           9   %  Ç      	  Udisabled          clock-controller@59c10000            2fsl,imx8qxp-lpcg             ÂYÁ             =            Æ   -      1        �             (  esai1_lpcg_extal_clk esai1_lpcg_ipg_clk         9   %  Ç        g   Z         vpu@2c000000                                     &,       ,               Â    ,                  9   %          Uokay             2nxp,imx8qm-vpu     mailbox@2d000000             2fsl,imx6sx-mu            Â-              ì      Ø           ;           9   %          Uokay            g   [      mailbox@2d020000             2fsl,imx6sx-mu            Â-             ì      Ù           ;           9   %          Uokay            g   ^      mailbox@2d040000             2fsl,imx6sx-mu            Â-             ì      Ú           ;           9   %          Uokay            g   a      vpu-core@2d080000            Â-              2nxp,imx8q-vpu-decoder           9   %          tx0 tx1 rx        $  "   [           [          [               Uokay            G   \   ]      vpu-core@2d090000            Â-	              2nxp,imx8q-vpu-encoder           9   %          tx0 tx1 rx        $  "   ^           ^          ^               Uokay            G   _   `      vpu-core@2d0a0000            Â-
              2nxp,imx8q-vpu-encoder           9   %          tx0 tx1 rx        $  "   a           a          a               Uokay            G   b   c         bus@53000000             2simple-bus                                   &S       S         gpu@53100000             2vivante,gc           ÂS             ì       @            Æ      �         �           -core shader         h      �         �           x)¹' 2©ø€        9   %   �         bus@56220000             2simple-bus               d                                 &V"      V"        interrupt-controller@56220000         &   2fsl,imx8qxp-irqsteer fsl,imx-irqsteer            ÂV"             ì       ;            ×                     Æ            Æ   e            -ipg         9   %  ‰        U            a            g   d      clock-controller@56223000            2fsl,imx8qxp-lpcg             ÂV"0            =           9   %  ‰         Æ   f        �            mipi0_lis_lpcg_ipg_clk          g   e      clock-controller@5622300c            2fsl,imx8qxp-lpcg             ÂV"0           =           9   %  Š         Æ     Š      f        �             *  mipi0_pwm_lpcg_clk mipi0_pwm_lpcg_ipg_clk           g   i      clock-controller@56223014            2fsl,imx8qxp-lpcg             ÂV"0           =            Æ   g            �            mipi0_i2c0_lpcg_ipg_clk         9   %  ‹        g   k      clock-controller@56223018            2fsl,imx8qxp-lpcg             ÂV"0           =            Æ   f        �            mipi0_i2c0_lpcg_ipg_s_clk           9   %  ‹        g   g      clock-controller@5622301c            2fsl,imx8qxp-lpcg             ÂV"0           =            Æ     ‹           �            mipi0_i2c0_lpcg_clk         9   %  ‹        g   j      clock-controller@56223024            2fsl,imx8qxp-lpcg             ÂV"0$           =            Æ   h            �            mipi0_i2c1_lpcg_ipg_clk         9   %  Œ      clock-controller@56223028            2fsl,imx8qxp-lpcg             ÂV"0(           =            Æ   f        �            mipi0_i2c1_lpcg_ipg_s_clk           9   %  Œ        g   h      clock-controller@5622302c            2fsl,imx8qxp-lpcg             ÂV"0,           =            Æ     Œ           �            mipi0_i2c1_lpcg_clk         9   %  Œ      pwm@56224000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ÂV"@             Æ   i      i            -ipg per         h     Š           xn6         n           9   %  Š      	  Udisabled          i2c@56226000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ÂV"`                                      ì            Æ   j       k            -per ipg         h   j            xn6         9   %  ‹      	  Udisabled             bus@56240000             2simple-bus                                   &V$      V$                  l   clock-controller@56243000            2fsl,imx8qxp-lpcg             ÂV$0            =           lvds0_lis_lpcg_ipg_clk          9   %  �         Æ   m        �           g   p      clock-controller@5624300c            2fsl,imx8qxp-lpcg             ÂV$0           =         A  lvds0_pwm_lpcg_clk lvds0_pwm_lpcg_ipg_clk lvds0_pwm_lpcg_32k_clk            9   %  Ž         Æ           m        �               g   n      clock-controller@56243010            2fsl,imx8qxp-lpcg             ÂV$0           =         ,  lvds0_i2c0_lpcg_clk lvds0_i2c0_lpcg_ipg_clk         9   %  �         Æ           m        �               g   o      pwm@56244000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ÂV$@            -ipg per         h     Ž           xn6         n           9   %  Ž      	  Udisabled             Æ   n      n          i2c@56246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ÂV$`                                      ì           -per ipg         h     �           xn6         9   %  �      	  Udisabled             Æ   o       o         interrupt-controller@56240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ÂV$             ì       9            ×                     Æ            Æ   p           -ipg         9   %  
        U            a            g   l      clock-controller@56243014            2fsl,imx8qxp-lpcg             ÂV$0           =            Æ           m        �             ,  lvds0_i2c1_lpcg_clk lvds0_i2c1_lpcg_ipg_clk         9   %          g   q      i2c@56247000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ÂV$p            ì   	         Æ   q       q           -per ipg         h                xn6         9   %        	  Udisabled             bus@57220000             2simple-bus               r                                 &W"      W"        interrupt-controller@57220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ÂW"             ì       <            ×                     Æ            Æ   s            -ipg         9   %  �        U            a            g   r      clock-controller@57223000            2fsl,imx8qxp-lpcg             ÂW"0            =            Æ   f        �            mipi1_lis_lpcg_ipg_clk          9   %  �        g   s      clock-controller@5722300c            2fsl,imx8qxp-lpcg             ÂW"0           =            Æ     Ž      f        �             *  mipi1_pwm_lpcg_clk mipi1_pwm_lpcg_ipg_clk           9   %  Ž        g   v      clock-controller@5722301c            2fsl,imx8qxp-lpcg             ÂW"0           =            Æ     �           �            mipi1_i2c0_lpcg_clk         9   %  �        g   w      clock-controller@57223014            2fsl,imx8qxp-lpcg             ÂW"0           =            Æ   t            �            mipi1_i2c0_lpcg_ipg_clk         9   %  �        g   x      clock-controller@57223018            2fsl,imx8qxp-lpcg             ÂW"0           =            Æ   f        �            mipi1_i2c0_lpcg_ipg_s_clk           9   %  �        g   t      clock-controller@57223024            2fsl,imx8qxp-lpcg             ÂW"0$           =            Æ   u            �            mipi1_i2c1_lpcg_ipg_clk         9   %  �      clock-controller@57223028            2fsl,imx8qxp-lpcg             ÂW"0(           =            Æ   f        �            mipi1_i2c1_lpcg_ipg_s_clk           9   %  �        g   u      clock-controller@5722302c            2fsl,imx8qxp-lpcg             ÂW"0,           =            Æ     �           �            mipi1_i2c1_lpcg_clk         9   %  �      pwm@57224000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ÂW"@             Æ   v      v            -ipg per         h     Ž           xn6         n           9   %  Ž      	  Udisabled          i2c@57226000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ÂW"`                                      ì                r         Æ   w       x            -per ipg         h   w            xn6         9   %  �      	  Udisabled             bus@57240000             2simple-bus               y                                 &W$      W$        interrupt-controller@57240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ÂW$             ì       :            ×                     Æ            Æ   z           -ipg         9   %          U            a            g   y      clock-controller@57243000            2fsl,imx8qxp-lpcg             ÂW$0            =            Æ   m        �           lvds1_lis_lpcg_ipg_clk          9   %          g   z      clock-controller@5724300c            2fsl,imx8qxp-lpcg             ÂW$0           =            Æ           m        �             *  lvds1_pwm_lpcg_clk lvds1_pwm_lpcg_ipg_clk           9   %          g   {      clock-controller@57243010            2fsl,imx8qxp-lpcg             ÂW$0           =            Æ           m        �             ,  lvds1_i2c0_lpcg_clk lvds1_i2c0_lpcg_ipg_clk         9   %          g   }      clock-controller@57243014            2fsl,imx8qxp-lpcg             ÂW$0           =            Æ           m        �             ,  lvds1_i2c1_lpcg_clk lvds1_i2c1_lpcg_ipg_clk         9   %          g   ~      pwm@57244000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ÂW$@             Æ   {      {            -ipg per         h                xn6         n           9   %          Uokay            Jdefault         X   |        g        i2c@57246000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ÂW$`                                      ì            Æ   }       }           -per ipg         h                xn6         9   %        	  Udisabled          i2c@57247000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ÂW$p            ì   	         Æ   ~       ~           -per ipg         h                xn6         9   %        	  Udisabled             clock-img-ipg            2fixed-clock         =            ëÂ         img_ipg_clk         g   ‰      clock-img-pxl            2fixed-clock         =            #ÃF         img_pxl_clk         g   ˜      bus@58000000             2simple-bus                                   &X       X         isi@58100000             ÂX           `  ì      )         *         +         ,         -         .         /         0         @   Æ          €       �       ‚       ƒ       „       …       †          (  -per0 per1 per2 per3 per4 per5 per6 per7                    @  9   %  y   %  z   %  {   %  |   %  }   %  ~   %     %  €      	  Udisabled             2fsl,imx8qm-isi     ports                                port@2           Â      endpoint            y   ‡        g   �         port@3           Â      endpoint            y   ˆ        g   ”               irqsteer@58220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ÂX"             Æ            ×        ì      @            Æ   ‰        -ipg                      9   %  ‘        U            a            g   Š      gpio@58222000            2fsl,imx8qm-gpio fsl,imx35-gpio           ÂX"             Æ            ×        ì            ‰            •             Š        9   %  ‘      clock-controller@58223018            2fsl,imx8qxp-lpcg             ÂX"0            Æ     ‘           =           �           csi0_lpcg_core_clk          9   %  y        g   ‹      clock-controller@5822301c            2fsl,imx8qxp-lpcg             ÂX"0            Æ     ‘           =           �           csi0_lpcg_esc_clk           9   %  y        g   Œ      i2c@58226000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ÂX"`            ì            Æ     “      ‰        -per ipg         h     “           xn6              Š        9   %  “      	  Udisabled          csi@58227000          +   2fsl,imx8qm-mipi-csi2 fsl,imx8qxp-mipi-csi2           ÂX"p    X"             Æ   ‹      Œ      �            -core esc ui         h   ‹      Œ           xu* J¢         9   %  y        ¥   Ž  ‘      	  Udisabled       ports                                port@0           Â          port@1           Â      endpoint            y   �        g   ‡               irqsteer@58240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ÂX$             Æ            ×        ì      A            Æ   ‰        -ipg                      9   %  ”        U            a            g   �      gpio@58242000            2fsl,imx8qm-gpio fsl,imx35-gpio           ÂX$             Æ            ×        ì            ‰            •             �        9   %  ”      clock-controller@58243018            2fsl,imx8qxp-lpcg             ÂX$0            Æ     ”           =           �           csi1_lpcg_core_clk          9   %  y        g   ‘      clock-controller@5824301c            2fsl,imx8qxp-lpcg             ÂX$0            Æ     ”           =           �           csi1_lpcg_esc_clk           9   %  y        g   ’      i2c@58246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ÂX$`            ì            Æ     –      ‰        -per ipg         h     –           xn6              �        9   %  –      	  Udisabled          csi@58247000          +   2fsl,imx8qm-mipi-csi2 fsl,imx8qxp-mipi-csi2           ÂX$p    X$             Æ   ‘      ’      “            -core esc ui         h   ‘      ’           xu* J¢         9   %  y        ¥   Ž  ”      	  Udisabled       ports                                port@0           Â          port@1           Â      endpoint            y   ”        g   ˆ               irqsteer@58260000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ÂX&             Æ            ×        ì      B            Æ   $        -ipg                      9   %  F        U            a          	  Udisabled            g   •      clock-controller@58263004            2fsl,imx8qxp-lpcg             ÂX&0            Æ     F           =           �           pi0_lpcg_ipg_clk            9   %  y      	  Udisabled          clock-controller@58263018            2fsl,imx8qxp-lpcg             ÂX&0            Æ     F           =           �            pi0_lpcg_pxl_clk            9   %  y      	  Udisabled          clock-controller@5826301c            2fsl,imx8qxp-lpcg             ÂX&0            Æ     F            =           �            pi0_lpcg_misc_clk           9   %  y      	  Udisabled          i2c@58266000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ÂX&`            ì            Æ     I      ‰        -per ipg         h     I           xn6              •        9   %  I      	  Udisabled          jpegdec@58400000             ÂX@             ì      5            Æ   –       –           h   –       –           xëÂ ëÂ         9   %     %  �      %   2nxp,imx8qm-jpgdec nxp,imx8qxp-jpgdec            Uokay          jpegenc@58450000             ÂXE             ì      1            Æ   —       —           h   —       —           xëÂ ëÂ         9   %     %  …      %   2nxp,imx8qm-jpgenc nxp,imx8qxp-jpgenc            Uokay          clock-controller@58500000            2fsl,imx8qxp-lpcg             ÂXP              Æ   ˜        =           �            pdma0_lpcg_clk          9   %  y        g         clock-controller@58510000            2fsl,imx8qxp-lpcg             ÂXQ              Æ   ˜        =           �            pdma1_lpcg_clk          9   %  z        g   €      clock-controller@58520000            2fsl,imx8qxp-lpcg             ÂXR              Æ   ˜        =           �            pdma2_lpcg_clk          9   %  {        g   �      clock-controller@58530000            2fsl,imx8qxp-lpcg             ÂXS              Æ   ˜        =           �            pdma3_lpcg_clk          9   %  |        g   ‚      clock-controller@58540000            2fsl,imx8qxp-lpcg             ÂXT              Æ   ˜        =           �            pdma4_lpcg_clk          9   %  }        g   ƒ      clock-controller@58550000            2fsl,imx8qxp-lpcg             ÂXU              Æ   ˜        =           �            pdma5_lpcg_clk          9   %  ~        g   „      clock-controller@58560000            2fsl,imx8qxp-lpcg             ÂXV              Æ   ˜        =           �            pdma6_lpcg_clk          9   %          g   …      clock-controller@58570000            2fsl,imx8qxp-lpcg             ÂXW              Æ   ˜        =           �            pdma7_lpcg_clk          9   %  €        g   †      clock-controller@58580000            2fsl,imx8qxp-lpcg             ÂXX              Æ   ˜        =           �            csi0_lpcg_pxl_clk           9   %  ‘        g   �      clock-controller@58590000            2fsl,imx8qxp-lpcg             ÂXY              Æ   ˜        =           �            csi1_lpcg_pxl_clk           9   %  ”        g   “      clock-controller@585a0000            2fsl,imx8qxp-lpcg             ÂXZ              Æ   ˜        =           �            hdmi_rx_lpcg_pxl_link_clk           9   %  ›      clock-controller@585d0000            2fsl,imx8qxp-lpcg             ÂX]             =            Æ   ‰   ‰        �             0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         9   %          g   –      clock-controller@585f0000            2fsl,imx8qxp-lpcg             ÂX_             =            Æ   ‰   ‰        �             0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         9   %          g   —         clock-dma-ipg            2fixed-clock         =            '         dma_ipg_clk         g   ©      bus@5a000000             2simple-bus                                   &Z       Z         spi@5a000000             2fsl,imx7ulp-spi          ÂZ                                        ì      P                         Æ   ™       ™           -per ipg         h      5           x“‡         9   %   5         ›   š              š                    tx rx           Uokay            Jdefault         X   ›        ¬   œ            spi@5a010000             2fsl,imx7ulp-spi          ÂZ                                       ì      Q                         Æ   �       �           -per ipg         h      6           x“‡         9   %   6         ›   š              š                   tx rx         	  Udisabled          spi@5a020000             2fsl,imx7ulp-spi          ÂZ                                       ì      R                         Æ   ž       ž           -per ipg         h      7           x“‡         9   %   7         ›   š              š                   tx rx           Uokay            Jdefault         X   Ÿ        ¬   œ   
         spi@5a030000             2fsl,imx7ulp-spi          ÂZ                                       ì      S                         Æ                       -per ipg         h      8           x“‡         9   %   8         ›   š              š                   tx rx         	  Udisabled          serial@5a060000          ÂZ             ì      Y            Æ   ¡      ¡          	  -ipg baud            h      9           xÄ´         9   %   9         rx tx            ›   š             š                   Uokay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            Jdefault         X   ¢      serial@5a070000          ÂZ             ì      Z            Æ   £      £          	  -ipg baud            h      :           xÄ´         9   %   :         rx tx            ›   š             š                   Uokay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            Jdefault         X   ¤      serial@5a080000          ÂZ             ì      [            Æ   ¥      ¥          	  -ipg baud            h      ;           xÄ´         9   %   ;         rx tx            ›   š             š                   Uokay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            Jdefault         X   ¦      serial@5a090000          ÂZ	             ì      \            Æ   §      §          	  -ipg baud            h      <           xÄ´         9   %   <         rx tx            ›   š             š                   Uokay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            Jdefault         X   ¨      dma-controller@5a1f0000          2fsl,imx8qm-edma          ÂZ             é           ô          ì                ¡         ¢         £         ¤         ¥         ¦         §                                                     ²         ³         ´         µ         ¶         ·         ¸         ¹         º         »          C         °  9   %   @   %   A   %   B   %   C   %   D   %   E   %   F   %   G   %   H   %   I   %   J   %   K   %   L   %   M   %   N   %   O   %   P   %   Q   %   R   %   S   %   T   %   U                   Uokay            g   š      clock-controller@5a400000            2fsl,imx8qxp-lpcg             ÂZ@             =            Æ      5      ©        �                spi0_lpcg_clk spi0_lpcg_ipg_clk         9   %   5        g   ™      clock-controller@5a410000            2fsl,imx8qxp-lpcg             ÂZA             =            Æ      6      ©        �                spi1_lpcg_clk spi1_lpcg_ipg_clk         9   %   6        g   �      clock-controller@5a420000            2fsl,imx8qxp-lpcg             ÂZB             =            Æ      7      ©        �                spi2_lpcg_clk spi2_lpcg_ipg_clk         9   %   7        g   ž      clock-controller@5a430000            2fsl,imx8qxp-lpcg             ÂZC             =            Æ      8      ©        �                spi3_lpcg_clk spi3_lpcg_ipg_clk         9   %   8        g          clock-controller@5a460000            2fsl,imx8qxp-lpcg             ÂZF             =            Æ      9      ©        �             '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk          9   %   9        g   ¡      clock-controller@5a470000            2fsl,imx8qxp-lpcg             ÂZG             =            Æ      :      ©        �             '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk          9   %   :        g   £      clock-controller@5a480000            2fsl,imx8qxp-lpcg             ÂZH             =            Æ      ;      ©        �             '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk          9   %   ;        g   ¥      clock-controller@5a490000            2fsl,imx8qxp-lpcg             ÂZI             =            Æ      <      ©        �             '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk          9   %   <        g   §      i2c@5a800000             ÂZ€    @                                   ì       Ü            Æ   ª       ª           -per ipg         h      `           xn6         9   %   `      	  Udisabled          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c        i2c@5a810000             ÂZ�    @                                   ì       Ý            Æ   «       «           -per ipg         h      a           xn6         9   %   a        Uokay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          Jdefault         X   ¬         †    usb-hub@8            2smsc,usb3503a            Â           Jdefault         X   ­        µ   ®              Ã           Ð   ¯               Û}x@        ì   ¯            audio-codec@a            2fsl,sgtl5000             Â   
      ,  h     E        E         E      °            x.à  î   »€  »€          Æ   °            Jdefault         X   ±        Ø            ø   ²           ³           ´        g           i2c@5a820000             ÂZ‚    @                                   ì       Þ            Æ   µ       µ           -per ipg         h      b           xn6         9   %   b        Uokay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          Jdefault         X   ¶         †    touch@4a             2atmel,maxtouch           Â   J             ·        ì              Jdefault         X   ¸   ¹        ì   ·            	  Udisabled          rtc@68        	   2st,m41t0             Â   h        Uokay             i2c@5a830000             ÂZƒ    @                                   ì       ß            Æ   º       º           -per ipg         h      c           xn6         9   %   c        Uokay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          Jdefault         X   »         †       adc@5a880000             2nxp,imx8qxp-adc                     ÂZˆ             ì       ð                         Æ   ¼       ¼           -per ipg         h      e           xn6         9   %   e        Uokay            Jdefault         X   ½        /   ³      adc@5a890000             2nxp,imx8qxp-adc                     ÂZ‰             ì       ñ                         Æ   ¾       ¾           -per ipg         h      f           xn6         9   %   f        Uokay            Jdefault         X   ¿        /   ³        g        can@5a8d0000             2fsl,imx8qm-flexcan           ÂZ�             ì       ë                         Æ   À      À            -ipg per         h      i           xbZ         9   %   i        ;           J            Uokay            Jdefault         X   Á      can@5a8e0000             2fsl,imx8qm-flexcan           ÂZŽ             ì       ì                         Æ   Â      Â            -ipg per         h      j           xbZ         9   %   j        ;           J           Uokay            Jdefault         X   Ã      can@5a8f0000             2fsl,imx8qm-flexcan           ÂZ�             ì       í                         Æ   Ä      Ä            -ipg per         h      k           xbZ         9   %   k        ;           J         	  Udisabled            Jdefault         X   Å      dma-controller@5a9f0000          2fsl,imx8qm-edma          ÂZŸ   !          é           ô   
      x  ì      ¨         ©         ª         «         ¬         ­         ®         ¯         °         ±         P  9   %   l   %   m   %   n   %   o   %   p   %   q   %   r   %   s   %   t   %   u      clock-controller@5ac00000            2fsl,imx8qxp-lpcg             ÂZÀ             =            Æ      `      ©        �                i2c0_lpcg_clk i2c0_lpcg_ipg_clk         9   %   `        g   ª      clock-controller@5ac10000            2fsl,imx8qxp-lpcg             ÂZÁ             =            Æ      a      ©        �                i2c1_lpcg_clk i2c1_lpcg_ipg_clk         9   %   a        g   «      clock-controller@5ac20000            2fsl,imx8qxp-lpcg             ÂZÂ             =            Æ      b      ©        �                i2c2_lpcg_clk i2c2_lpcg_ipg_clk         9   %   b        g   µ      clock-controller@5ac30000            2fsl,imx8qxp-lpcg             ÂZÃ             =            Æ      c      ©        �                i2c3_lpcg_clk i2c3_lpcg_ipg_clk         9   %   c        g   º      clock-controller@5ac80000            2fsl,imx8qxp-lpcg             ÂZÈ             =            Æ      e      ©        �                adc0_lpcg_clk adc0_lpcg_ipg_clk         9   %   e        g   ¼      clock-controller@5ac90000            2fsl,imx8qxp-lpcg             ÂZÉ             =            Æ      f      ©        �                adc1_lpcg_clk adc1_lpcg_ipg_clk         9   %   f        g   ¾      clock-controller@5acd0000            2fsl,imx8qxp-lpcg             ÂZÍ             =            Æ      i      ©   ©        �                5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            9   %   i        g   À      clock-controller@5a4a0000            2fsl,imx8qxp-lpcg             ÂZJ             =            Æ      =      ©        �             '  uart4_lpcg_baud_clk uart4_lpcg_ipg_clk          9   %   =      i2c@5a840000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ÂZ„    @         ì      X                         Æ   Æ       Æ           -per ipg         h      d           xn6         9   %   d      	  Udisabled          clock-controller@5ac40000            2fsl,imx8qxp-lpcg             ÂZÄ             =            Æ      d      ©        �                i2c4_lpcg_clk i2c4_lpcg_ipg_clk         9   %   d        g   Æ      clock-controller@5ace0000            2fsl,imx8qxp-lpcg             ÂZÎ             =            Æ      j      ©   ©        �                5  can1_lpcg_pe_clk can1_lpcg_ipg_clk can1_lpcg_chi_clk            9   %   j        g   Â      clock-controller@5acf0000            2fsl,imx8qxp-lpcg             ÂZÏ             =            Æ      k      ©   ©        �                5  can2_lpcg_pe_clk can2_lpcg_ipg_clk can2_lpcg_chi_clk            9   %   k        g   Ä         clock-conn-axi           2fixed-clock         =            ÞCU        conn_axi_clk            g   ê      clock-conn-ahb           2fixed-clock         =            	ï!ª        conn_ahb_clk            g   ë      clock-conn-ipg           2fixed-clock         =            ÷�Õ        conn_ipg_clk            g   é      clock-conn-bch           2fixed-clock         =            ×„         conn_bch_clk          bus@5b000000             2simple-bus                                   &[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb             Â[                          ì                 X   Ç        c   È             Æ   É           o            €           ”           9   %          Uokay            Jdefault         X   Ê         ¨         ´         À         Ø         ê      usbmisc@5b0d0200            ö         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          Â[            g   È      usbphy@5b100000       %   2fsl,imx8qm-usbphy fsl,imx7ulp-usbphy             Â[              Æ   É           9   %          Uokay               Ë        g   Ç      mmc@5b010000            ì       è            Â[              Æ   Ì      Ì      Ì            -ipg ahb per         h      ø           x×„         9   %   ø                   '           Uokay          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc          7   Í     €      "  Jdefault state_100mhz state_200mhz           X   Î        >   Ï        H   Ð        R            \      mmc@5b020000            ì       é            Â[              Æ   Ñ      Ñ      Ñ            -ipg ahb per         h      ù           xëÂ         9   %   ù                   '           Uokay          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc          7   Í     €      (  Jdefault state_100mhz state_200mhz sleep         X   Ò   Ó   Ô        >   Õ   Ö   Ô        H   ×   Ø   Ô        j   Ù   Ú   Û        R           t   Ü   	            }      mmc@5b030000            ì       ê            Â[              Æ   Ý      Ý      Ý            -ipg ahb per         h      ú           xëÂ         9   %   ú                   '           Uokay          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc          7   Í     €      "  Jdefault state_100mhz state_200mhz           X   Þ   ß        >   à   ß        H   á   ß        R           t   ·               }      ethernet@5b040000            Â[           0  ì                                           (   Æ   â      â      â      â       â         '  -ipg ahb enet_clk_ref ptp enet_2x_txclk          h      û         û           xæ²€sY@        †           ˜           9   %   û        Uokay             2fsl,imx8qm-fec fsl,imx6sx-fec           7   Í     €        Jdefault sleep           X   ã        >   ä         ª        »   å      	  Ærgmii-id       mdio                                 ethernet-phy@7           2ethernet-phy-ieee802.3-c22           Â                ¯        ì              Ï            ß           ï           ì   ¯              g   å            ethernet@5b050000            Â[           0  ì                                          (   Æ   æ      æ      æ      æ       â         '  -ipg ahb enet_clk_ref ptp enet_2x_txclk          h      ü         ü           xæ²€sY@        †           ˜           9   %   ü      	  Udisabled             2fsl,imx8qm-fec fsl,imx6sx-fec           7   Í     €      usb@5b110000             2fsl,imx8qm-usb3          Â[                                       &      (   Æ   ç      ç       ç      ç      ç           -lpm bus aclk ipg core           h                xæ²€        9   %          Uokay       usb@5b120000          
   2cdns,usb3            Â[     [     [             otg xhci dev                       0  ì                                            host peripheral otg wakeup             è         cdns3,usb3-phy          *           Uokay            Ahost             usb-phy@5b160000             2nxp,salvo-phy            Â[              Æ   ç           -salvo_phy_clk           9   %          I            Uokay            g   è      clock-controller@5b200000            2fsl,imx8qxp-lpcg             Â[              =            Æ      ø      é   ê        �                9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            9   %   ø        g   Ì      clock-controller@5b210000            2fsl,imx8qxp-lpcg             Â[!             =            Æ      ù      é   ê        �                9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            9   %   ù        g   Ñ      clock-controller@5b220000            2fsl,imx8qxp-lpcg             Â["             =            Æ      ú      é   ê        �                9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            9   %   ú        g   Ý      clock-controller@5b230000            2fsl,imx8qxp-lpcg             Â[#             =         0   Æ      û         û      ê      û      é   é        �                         …  enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            9   %   û        g   â      clock-controller@5b240000            2fsl,imx8qxp-lpcg             Â[$             =         0   Æ      ü         ü      ê      ü      é   é        �                         …  enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            9   %   ü        g   æ      clock-controller@5b270000            2fsl,imx8qxp-lpcg             Â['             =            Æ   ë   é        �            "  usboh3_ahb_clk usboh3_phy_ipg_clk           9   %          g   É      clock-controller@5b280000            2fsl,imx8qxp-lpcg             Â[(             =           �                         0   Æ                   é   é   é              M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            9   %          g   ç      clock-controller@5b290000            2fsl,imx8qxp-lpcg             Â[)             =             Æ     	        	      ê   ê        �                   '  gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb          9   %  	        g   í      clock-controller@5b290004            2fsl,imx8qxp-lpcg             Â[)            =            Æ   ê        �           apbhdma_hclk            9   %  	        g   ì      dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh          Â[�            0  ì                                            é           ô            Æ   ì            9   %  	        g   î      nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand            Â[�      [�@             gpmi-nand bch                                     ì                 bch           Æ   í      í      í       í         '  -gpmi_io gpmi_apb gpmi_bch gpmi_bch_apb          ›   î             rx-tx           9   %  	        h     	           xúð€      	  Udisabled             bus@5c000000             2simple-bus                                   &\       \         ddr-pmu@5c020000          $   2fsl,imx8qm-ddr-pmu fsl,imx8-ddr-pmu          Â\             ì       ‚         ddr-pmu@5c120000          $   2fsl,imx8qm-ddr-pmu fsl,imx8-ddr-pmu          Â\                          ì       ƒ            clock-lsio-bus           2fixed-clock         =            õá         lsio_bus_clk            g   ù      bus@5d000000             2simple-bus                                    &]       ]                      pwm@5d000000             2fsl,imx27-pwm            Â]              -ipg per          Æ   ï      ï           h      ¿           xn6         n           ì       ^           Uokay            Jdefault         X   ð      pwm@5d010000             2fsl,imx27-pwm            Â]             -ipg per          Æ   ñ      ñ           h      À           xn6         n           ì       _           Uokay            Jdefault         X   ò      pwm@5d020000             2fsl,imx27-pwm            Â]             -ipg per          Æ   ó      ó           h      Á           xn6         n           ì       `           Uokay            Jdefault         X   ô      pwm@5d030000             2fsl,imx27-pwm            Â]             -ipg per          Æ   õ      õ           h      Â           xn6         n           ì       a           Uokay            Jdefault         X   ö      gpio@5d080000            Â]             ì       ˆ            •        ‰            ×        Æ           9   %   Ç         2fsl,imx8qm-gpio fsl,imx35-gpio        0  T   ÷              ÷            ÷      $         þ  `MXM3_279 MXM3_277 MXM3_135 MXM3_203 MXM3_201 MXM3_275 MXM3_110 MXM3_120 MXM3_1/GPIO1 MXM3_3/GPIO2 MXM3_124 MXM3_122 MXM3_5/GPIO3 MXM3_7/GPIO4   MXM3_4 MXM3_211 MXM3_209 MXM3_2 MXM3_136 MXM3_134 MXM3_6 MXM3_8 MXM3_112 MXM3_118 MXM3_114 MXM3_116   MXM3_26           g   ®      gpio@5d090000            Â]	             ì       ‰            •        ‰            ×        Æ           9   %   È         2fsl,imx8qm-gpio fsl,imx35-gpio        @  T   ÷       (      ÷      2      ÷      ?      ÷      H         }  `    MXM3_286  MXM3_87 MXM3_99 MXM3_138 MXM3_140 MXM3_239  MXM3_281 MXM3_283 MXM3_126 MXM3_132     MXM3_173 MXM3_175 MXM3_123            g   ¯   hdmi-ctrl-hog           Jdefault         X   ø         p        ¯               yCONNECTOR_IS_HDMI            ƒ         gpio@5d0a0000            Â]
             ì       Š            •        ‰            ×        Æ           9   %   É         2fsl,imx8qm-gpio fsl,imx35-gpio        0  T   ÷       P      ÷      U      ÷      h   
      ®  `       MXM3_198 MXM3_35 MXM3_164     MXM3_217 MXM3_215   MXM3_193 MXM3_194 MXM3_37  MXM3_271 MXM3_273 MXM3_195 MXM3_197 MXM3_177 MXM3_179 MXM3_181 MXM3_183 MXM3_185 MXM3_187           g   Ü      gpio@5d0b0000            Â]             ì       ‹            •        ‰            ×        Æ           9   %   Ê         2fsl,imx8qm-gpio fsl,imx35-gpio        À  T   ÷       r      ÷      u      ÷      �      ÷      Œ      ÷      ‹      ÷      Š      ÷      ‰      ÷      ˆ      ÷      ‡      ÷      †      ÷      Ž      ÷      ’         þ  `MXM3_191  MXM3_221 MXM3_225 MXM3_223 MXM3_227 MXM3_200 MXM3_235 MXM3_231 MXM3_229 MXM3_233 MXM3_204 MXM3_196  MXM3_202    MXM3_305 MXM3_307 MXM3_309 MXM3_311 MXM3_315 MXM3_317 MXM3_319 MXM3_321 MXM3_15/GPIO7 MXM3_63 MXM3_17/GPIO8 MXM3_12 MXM3_14 MXM3_16           g   œ      gpio@5d0c0000            Â]             ì       Œ            •        ‰            ×        Æ           9   %   Ë         2fsl,imx8qm-gpio fsl,imx35-gpio        `  T   ÷       •      ÷      ™      ÷      ž      ÷      ¥      ÷      ¬      ÷      Æ         º  `MXM3_18 MXM3_11/GPIO5 MXM3_13/GPIO6 MXM3_274 MXM3_84 MXM3_262 MXM3_96      MXM3_190    MXM3_269 MXM3_251 MXM3_253 MXM3_295 MXM3_299 MXM3_301 MXM3_297 MXM3_293 MXM3_291 MXM3_289 MXM3_287           g   ·      gpio@5d0d0000            Â]             ì       �            •        ‰            ×        Æ           9   %   Ì         2fsl,imx8qm-gpio fsl,imx35-gpio        €  T   ÷       Ë      ÷      Í      ÷      Ò      ÷      ß      ÷      ã      ÷      æ      ÷      ì      ÷      ó         ž  `              MXM3_150 MXM3_160 MXM3_162 MXM3_144 MXM3_146 MXM3_148 MXM3_152 MXM3_156 MXM3_158 MXM3_159 MXM3_184 MXM3_180 MXM3_186 MXM3_188 MXM3_176 MXM3_178           g        gpio@5d0e0000            Â]             ì       Ž            •        ‰            ×        Æ           9   %   Í         2fsl,imx8qm-gpio fsl,imx35-gpio           T   ÷       õ   
   ÷   
            v  `          MXM3_261 MXM3_263 MXM3_259 MXM3_257 MXM3_255 MXM3_128 MXM3_130 MXM3_265 MXM3_249 MXM3_247 MXM3_245 MXM3_243         gpio@5d0f0000            Â]             ì       �            •        ‰            ×        Æ           9   %   Î         2fsl,imx8qm-gpio fsl,imx35-gpio        spi@5d120000                                       2nxp,imx8qxp-fspi             Â]                   fspi_base fspi_mmap         ì       \            Æ      í         í           -fspi_en fspi            9   %   í      	  Udisabled          mailbox@5d1b0000             Â]             ì       °           ;         	  Udisabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d1c0000             Â]             ì       ±           ;         ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu         g         mailbox@5d1d0000             Â]             ì       ²           ;         	  Udisabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d1e0000             Â]             ì       ³           ;         	  Udisabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d1f0000             Â]             ì       ´           ;         	  Udisabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d200000             Â]              ì       ¸           ;           9   %   Ú      	  Udisabled             2fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d210000             Â]!             ì       ¹           ;           9   %   Û      	  Udisabled             2fsl,imx8qm-mu fsl,imx6sx-mu       mailbox@5d280000             Â](             ì       À           ;           9   %   â         2fsl,imx8qm-mu fsl,imx6sx-mu         g   &      clock-controller@5d400000            2fsl,imx8qxp-lpcg             Â]@             =         4   Æ      ¿         ¿         ¿      ù      ¿           �                      h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         9   %   ¿        g   ï      clock-controller@5d410000            2fsl,imx8qxp-lpcg             Â]A             =         4   Æ      À         À         À      ù      À           �                      h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         9   %   À        g   ñ      clock-controller@5d420000            2fsl,imx8qxp-lpcg             Â]B             =         4   Æ      Á         Á         Á      ù      Á           �                      h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         9   %   Á        g   ó      clock-controller@5d430000            2fsl,imx8qxp-lpcg             Â]C             =         4   Æ      Â         Â         Â      ù      Â           �                      h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         9   %   Â        g   õ      clock-controller@5d440000            2fsl,imx8qxp-lpcg             Â]D             =         4   Æ      Ã         Ã         Ã      ù      Ã           �                      h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         9   %   Ã      clock-controller@5d450000            2fsl,imx8qxp-lpcg             Â]E             =         4   Æ      Ä         Ä         Ä      ù      Ä           �                      h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         9   %   Ä      clock-controller@5d460000            2fsl,imx8qxp-lpcg             Â]F             =         4   Æ      Å         Å         Å      ù      Å           �                      h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         9   %   Å      clock-controller@5d470000            2fsl,imx8qxp-lpcg             Â]G             =         4   Æ      Æ         Æ         Æ      ù      Æ           �                      h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         9   %   Æ         clock-hsio-axi           2fixed-clock         =            ×„         hsio_axi_clk            g        clock-hsio-per           2fixed-clock         =            ò�U        hsio_per_clk            g        clock-hsio-refa          2gpio-gate-clock          Æ   ú        =            �   ·               Jdefault         X   û        g   ü      clock-hsio-refb          2gpio-gate-clock          Æ   ü        =            �   Ü               Jdefault         X   ý        g  
      clock-xtal100m           2fixed-clock         =            õá         xtal_100MHz         g   ú      bus@5f000000             2simple-bus        0  &_       _      @       `      €       p                                       œ€       €   €      pcie@5f010000            2fsl,imx8q-pcie           Â_     �ð             dbi config        0  &�           �ø         ‚       €   €       ð          Æ           ì       f          h           msi dma                                   Æ   þ      þ      þ           -dbi mstr slv            §       ÿ         ¶pci       €  ±                         i                            j                            k                            l           ¿                       Ò           Ü           9   %   ©        é           Uokay            Jdefault         X   ÿ                            	   pcie-phy            ü               pcie-ep@5f010000             2fsl,imx8q-pcie-ep            Â_     €              dbi addr_space          Ò           ì       h           dma          Æ   þ      þ      þ           -dbi mstr slv            9   %   ©        é                               	  Udisabled          clock-controller@5f060000            2fsl,imx8qxp-lpcg             Â_              Æ              =           �               F  hsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk           9   %   ©        g   þ      clock-controller@5f0b0000            2fsl,imx8qxp-lpcg             Â_              Æ          =           �           hsio_phyx1_per_clk          9   %   «        g        clock-controller@5f0d0000            2fsl,imx8qxp-lpcg             Â_              Æ          =           �           hsio_pcieb_per_clk          9   %   ©        g        clock-controller@5f0f0000            2fsl,imx8qxp-lpcg             Â_              Æ          =           �           hsio_misc_per_clk           9   %   ¬        g        pcie@5f000000            2fsl,imx8q-pcie           Â_      Oð             dbi config        0  &�           Oø         ‚       @   @       ð          Æ           ì       F          H           msi dma                                   Æ                       -dbi mstr slv            §       ÿ         ¶pci       €  ±                         I                            J                            K                            L           ¿                       Ò           Ü           9   %   ˜        é           Uokay            Jdefault         X                             	   pcie-phy            ü   ®              %        pcie-ep@5f000000             2fsl,imx8q-pcie-ep            Â_      @              dbi addr_space          Ò           ì       H           dma          Æ                       -dbi mstr slv            9   %   ˜        é                               	  Udisabled          sata@5f020000            2fsl,imx8qm-ahci          Â_             ì       X            Æ       	           -sata sata_ref            sata-phy cali-phy0 cali-phy1            9   %   ª      0                                              Uokay          clock-controller@5f050000            2fsl,imx8qxp-lpcg             Â_              Æ              =           �               F  hsio_pciea_mstr_axi_clk hsio_pciea_slv_axi_clk hsio_pciea_dbi_axi_clk           9   %   ˜        g        clock-controller@5f070000            2fsl,imx8qxp-lpcg             Â_              Æ          =           �           hsio_sata_clk           9   %   ª        g        clock-controller@5f080000            2fsl,imx8qxp-lpcg             Â_              Æ   ü  
   ü          =           �                   L  hsio_phyx2_pclk_0 hsio_phyx2_pclk_1 hsio_phyx2_apbclk_0 hsio_phyx2_apbclk_1         9   %   ™        g        clock-controller@5f090000            2fsl,imx8qxp-lpcg             Â_	              Æ   ü              =           �                   Q  hsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk            9   %   «        g        clock-controller@5f0a0000            2fsl,imx8qxp-lpcg             Â_
              Æ          =           �           hsio_phyx2_per_clk          9   %   ™        g        clock-controller@5f0c0000            2fsl,imx8qxp-lpcg             Â_              Æ          =           �           hsio_pciea_per_clk          9   %   ˜        g        clock-controller@5f0e0000            2fsl,imx8qxp-lpcg             Â_              Æ          =           �           hsio_sata_per_clk           9   %   ª        g  	      phy@5f180000             2fsl,imx8qm-hsio           Â_     _     _     _             reg phy ctrl misc         p   Æ                                                                	              v  -pclk0 pclk1 apb_pclk0 apb_pclk1 pclk2 epcs_tx epcs_rx apb_pclk2 phy0_crr phy1_crr ctl0_crr ctl1_crr ctl2_crr misc_crr           I           9   %   ™   %   «        Uokay            2pciea-pcieb-sata            ?input           g           chosen          S/bus@5a000000/serial@5a070000         backlight            2pwm-backlight           Jdefault         X           _       -   ?   X   w   ž   Ë   ÿ        q           �   ¯               Š       e¹«         	  Udisabled          gpio-fan          	   2gpio-fan            Jdefault         X          ¯   œ               �          ¸         regulator-ext-rgmii          2regulator-fixed         9   %          ¢ 2Z         º 2Z         ÒVDD_EXT_RGMII (LDO1)       regulator-state-mem          á         regulator-module-3v3             2regulator-fixed         ¢ 2Z         º 2Z         Ò+V3.3           g   ´      regulator-module-3v3-avdd            2regulator-fixed         ¢ 2Z         º 2Z         Ò+V3.3_AUDIO         g   ²      regulator-module-wifi            2regulator-fixed         Jdefault         X             ¯                ú         	        ÒWi-Fi_POWER_DOWN            	!   d      regulator-pcie-switch            2regulator-fixed         Jdefault         X             œ                ú        ¢ w@        º w@        Òpcie_switch         	! †         g        regulator-usb-host-vbus          2regulator-fixed         Jdefault         X             ·                ú         	        ¢ LK@        º LK@        ÒVCC USBH2(ABCD) / USBH(3|4)       regulator-usb-hsic           2regulator-fixed         ¢ -ÆÀ        º -ÆÀ        Òusb-hsic-dummy        regulator-usb-hsic1          2regulator-fixed         ¢ -ÆÀ        º -ÆÀ        Òusb-phy-dummy           g   Ë      regulator-vref-1v8           2regulator-fixed         Ò+V1.8           º w@        ¢ w@        g   ³      reserved-memory                                   &   decoder-boot@84000000            Â    „                   	2        g   \      encoder1-boot@86000000           Â    †                    	2        g   _      encoder2-boot@86200000           Â    †                    	2        g   b      m4@88000000          Â    ˆ                   	2      rpmsg@90200000           Â    �                    	2      vdevbuffer@90400000          2shared-dma-pool          Â    �@                  	2      decoder-rpc@92000000             Â    ’                    	2        g   ]      dsp@92400000             Â    ’@                  	2      encoder1-rpc@94400000            Â    ”@       p           	2        g   `      encoder2-rpc@94b00000            Â    ”°       p           	2        g   c      linux,cma            2shared-dma-pool         	9    À       <            	F         	X         ã    <            sound            2simple-audio-card           	a          	ƒi2s         	œ          	»apalis-imx8qm      simple-audio-card,cpu           	Ò        simple-audio-card,codec         	Ò          g           sound-spdif          2fsl,imx-audio-spdif       
   ,imx-spdif           	Ü           	í         	ö      touchscreen          2toradex,vf50-touchscreen                 œ        ì              Jidle default            X            >   ¿           
                              
   È        
!   Ü              
*   Ü               
3   Ü              
<   Ü             	  Udisabled             	interrupt-parent #address-cells #size-cells model compatible mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 vpu-core2 ethernet0 rtc0 rtc1 cpu device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts #global-interrupts #iommu-cells mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins #reset-cells read-only #thermal-sensor-cells timeout-sec polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device clock-frequency clock-output-names ranges clock-names power-domains firmware-name status fsl,sec-era assigned-clocks assigned-clock-rates clock-indices dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map #sound-dai-cells #dma-cells dma-channels dma-channel-mask dais fsl,dataline assigned-clock-parents #mbox-cells memory-region fsl,channel fsl,num-irqs #pwm-cells remote-endpoint #gpio-cells gpio-controller resets cs-gpios connect-gpios initial-mode intn-gpios refclk-frequency reset-gpios VDDA-supply VDDD-supply VDDIO-supply #io-channel-cells vref-supply fsl,clk-source fsl,scu-index fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable hnp-disable over-current-active-low power-active-high srp-disable #index-cells phy-3p0-supply fsl,tuning-start-tap fsl,tuning-step iommus pinctrl-1 pinctrl-2 bus-width non-removable pinctrl-3 cd-gpios no-1-8-v fsl,num-tx-queues fsl,num-rx-queues fsl,magic-packet phy-handle phy-mode micrel,led-mode reset-assert-us reset-deassert-us reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode #phy-cells gpio-ranges gpio-line-names gpio-hog line-name output-high enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed reset-gpio num-ib-windows num-ob-windows vpcie-supply fsl,hsio-cfg fsl,refclk-pad-mode stdout-path brightness-levels default-brightness-level pwms gpio-fan,speed-map regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend enable-active-high regulator-always-on startup-delay-us no-map alloc-ranges linux,cma-default reusable simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,name sound-dai spdif-controller spdif-in spdif-out io-channels vf50-ts-min-pressure xp-gpios xm-gpios yp-gpios ym-gpios 