Ðþí  ¨“   8  Ÿ   (            	  žÜ                             +    hisilicon,hi3660-hikey960 hisilicon,hi3660                                   +         	   7HiKey960       psci              arm,psci-0.2             =smc       cpus                         +       cpu-map    cluster0       core0            D         core1            D         core2            D         core3            D            cluster1       core0            D         core1            D         core2            D         core3            D   	            cpu@0             arm,cortex-a53           Hcpu          T                 Xpsci             f   
         w               ‡  P         š                ¡            µ            Ä   n         Þ         cpu@1             arm,cortex-a53           Hcpu          T                Xpsci             f   
         w               ‡  P         š                ¡            µ            Þ         cpu@2             arm,cortex-a53           Hcpu          T                Xpsci             f   
         w               ‡  P         š                ¡            µ            Þ         cpu@3             arm,cortex-a53           Hcpu          T                Xpsci             f   
         w               ‡  P         š                ¡            µ            Þ         cpu@100           arm,cortex-a73           Hcpu          T                Xpsci             f            w               ‡            š               ¡            µ            Ä  &         Þ         cpu@101           arm,cortex-a73           Hcpu          T               Xpsci             f            w               ‡            š               ¡            µ            Þ         cpu@102           arm,cortex-a73           Hcpu          T               Xpsci             f            w               ‡            š               ¡            µ            Þ         cpu@103           arm,cortex-a73           Hcpu          T               Xpsci             f            w               ‡            š               ¡            µ            Þ   	      idle-states          æpsci       cpu-sleep-0           arm,idle-state            ó                     �        ,  Š        <  Ü         Þ         cluster-sleep-0           arm,idle-state            ó                    ô        ,  @        <  ¬         Þ         cpu-sleep-1           arm,idle-state            ó                     �        ,  &        <  Ü         Þ         cluster-sleep-1           arm,idle-state            ó                             ,  T        <  ¬         Þ            l2-cache0             cache           M            Y         Þ   
      l2-cache1             cache           M            Y         Þ            opp-table-0           operating-points-v2          g         Þ      opp00           r    Äï@        y 
®`        ‡ “à      opp01           r    ;‹‡À        y 5         ‡ “à      opp02           r    S�Ò€        y »         ‡ “à      opp03           r    eÝE@        y B@        ‡ “à      opp04           r    mé5         y Èà        ‡ “à         opp-table-1           operating-points-v2          g         Þ      opp10           r    5Ò¯À        y 
®`        ‡ “à      opp11           r    T²½@        y 5         ‡ “à      opp12           r    k–@        y »         ‡ “à      opp13           r    }â�         y B@        ‡ “à      opp14           r    ŒÉB€        y Èà        ‡ “à         interrupt-controller@e82b0000             arm,gic-400       @   T    è+            è+              è+@             è+`                              ˜            ©        ¾      	  ÿ         Þ         a53-pmu           arm,cortex-a53-pmu        0  ¾                                                É                  a73-pmu           arm,cortex-a73-pmu        0  ¾                                                É            	      timer             arm,armv8-timer                   0  ¾        ÿ        ÿ        ÿ      
  ÿ      soc           simple-bus                       +            Ü   crg_ctrl@fff35000              hisilicon,hi3660-crgctrl syscon          T    ÿóP                ã            Þ         crg_rst_controller            hisilicon,hi3660-reset          ð           ý            Þ         pctrl@e8a09000            hisilicon,hi3660-pctrl syscon            T    è �                 ã            Þ   M      crg_ctrl@fff34000              hisilicon,hi3660-pmuctrl syscon          T    ÿó@                ã         sctrl@fff0a000            hisilicon,hi3660-sctrl syscon            T    ÿð                 ã            Þ   9      iomcu@ffd7e000            hisilicon,hi3660-iomcu syscon            T    ÿ×à                ã            Þ         reset             hisilicon,hi3660-reset          ý           ð            Þ         mailbox@e896b000              hisilicon,hi3660-mbox            T    è–°                ¾       À          Á                       Þ         stub_clock@e896b500           hisilicon,hi3660-stub-clk            T    è–µ                ã                                 Þ         timer@fff14000            arm,sp804 arm,primecell          T    ÿñ@                ¾       0          1            š                           timer1 timer2 apb_pclk        i2c@ffd71000              snps,designware-i2c          T    ÿ×                ¾       v                        +            , €         š              <                  Cdefault         Q              [okay            bLS-I2C0       i2c@ffd72000              snps,designware-i2c          T    ÿ×                 ¾       w                        +            , €         š              <                  Cdefault         Q              [okay       rt1711h@4e            richtek,rt1711h          T   N        [okay                        ¾              Cdefault         Q      connector             usb-c-connector         bUSB-C           hdual            rdual            }sink            Œ�2        ˜�2†A�d        ¢ ˜–€   ports                        +       port@1           T      endpoint            ´            Þ   P               port                         +       endpoint@0           T            ´            Þ   O            adv7533@39          [okay              adi,adv7533          T   9        Ä      ports                        +       port@0           T          port@1           T                  i2c@fdf0c000              snps,designware-i2c          T    ýðÀ                ¾       Q                        +            , €         š      7        <      x           Cdefault         Q       !      	  [disabled          i2c@fdf0b000              snps,designware-i2c          T    ýð°                ¾      :                        +            , €         š      6        <      `           Cdefault         Q   "   #        [okay            bLS-I2C1       serial@fdf02000           arm,pl011 arm,primecell          T    ýð                 ¾       J            š      h               uartclk apb_pclk            Cdefault         Q   $   %      	  [disabled          serial@fdf00000           arm,pl011 arm,primecell          T    ýð                 ¾       K           Òrx tx           Ü   &      &            š      9      9         uartclk apb_pclk            Cdefault         Q   '   (      	  [disabled          serial@fdf03000           arm,pl011 arm,primecell          T    ýð0                ¾       L           Òrx tx           Ü   &      &            š      :               uartclk apb_pclk            Cdefault         Q   )   *      	  [disabled          serial@ffd74000           arm,pl011 arm,primecell          T    ÿ×@                ¾       r            š                     uartclk apb_pclk            Cdefault         Q   +   ,        [okay          	  bLS-UART0          serial@fdf01000           arm,pl011 arm,primecell          T    ýð                ¾       M           Òrx tx           Ü   &      &            š      ;      ;         uartclk apb_pclk            Cdefault         Q   -   .        [okay       bluetooth             ti,wl1837-st            á   /               î -ÆÀ         serial@fdf05000           arm,pl011 arm,primecell          T    ýðP                ¾       N           Òrx tx           Ü   &      &   	         š      <      <         uartclk apb_pclk            Cdefault         Q   0   1      	  [disabled          serial@fff32000           arm,pl011 arm,primecell          T    ÿó                 ¾       O            š      
               uartclk apb_pclk            Cdefault         Q   2   3        [okay          	  bLS-UART1          dma@fdf30000              hisilicon,k3-dma-1.0             T    ýó                 ø                                    ÿþ        ¾       �            š      >         .        9hi3660_dma           Þ   &      dma-controller@e804b000           hisilicon,hisi-pcm-asp-dma-1.0           T    è°                ø                                  ¾       Ø           Basp_dma_irq       rtc@fff04000              arm,pl031 arm,primecell          T    ÿð@                ¾       .            š            	   apb_pclk          gpio@e8a0b000             arm,pl061 arm,primecell          T    è °                ¾       T            R        b           n   4                   ©        ˜            š            	   apb_pclk          L  z TP901 [PMU0_SSI] [PMU1_SSI] [PMU2_SSI] [PMU0_CLKOUT] [JTAG_TCK] [JTAG_TMS]       gpio@e8a0c000             arm,pl061 arm,primecell          T    è À                ¾       U            R        b           n   4                  ©        ˜            š             	   apb_pclk          C  z[JTAG_TRST_N] [JTAG_TDI] [JTAG_TDO] NC NC [I2C3_SCL] [I2C3_SDA] NC        gpio@e8a0d000             arm,pl061 arm,primecell          T    è Ð                ¾       V            R        b           n   4                   ©        ˜            š      !      	   apb_pclk          G  zNC NC NC GPIO-J GPIO_020_HDMI_SEL GPIO-L GPIO_022_UFSBUCK_INT_N GPIO-G        gpio@e8a0e000             arm,pl061 arm,primecell          T    è à                ¾       W            R        b           n   4                   ©        ˜            š      "      	   apb_pclk          J  z[CSI0_MCLK] [CSI1_MCLK] NC [I2C2_SCL] [I2C2_SDA] [I2C3_SCL] [I2C3_SDA] NC         gpio@e8a0f000             arm,pl061 arm,primecell          T    è ð                ¾       X            R        b           n   4                   ©        ˜            š      #      	   apb_pclk          A  zNC NC PWR_BTN_N GPIO_035_PMU2_EN GPIO_036_USB_HUB_RESET NC NC NC             Þ   v      gpio@e8a10000             arm,pl061 arm,primecell          T    è¡                 ¾       Y            R        b           n   4       &            ©        ˜            š      $      	   apb_pclk          Q  zGPIO-H GPIO_041_HDMI_PD TP904 TP905 NC NC GPIO_046_HUB_VDD33_EN GPIO_047_PMU1_EN          gpio@e8a11000             arm,pl061 arm,primecell          T    è¡                ¾       Z            R        b           n   4       .            ©        ˜            š      %      	   apb_pclk          A  zNC NC NC GPIO_051_WIFI_EN GPIO-I [SD_DAT1] [SD_DAT2] [UART1_RXD]             Þ   x      gpio@e8a12000             arm,pl061 arm,primecell          T    è¡                 ¾       [            R        b           n   4       6            ©        ˜            š      &      	   apb_pclk          y  z[UART1_TXD] [UART0_CTS] [UART0_RTS] [UART0_RXD] [UART0_TXD] [SOC_BT_UART4_CTS_N] [SOC_BT_UART4_RTS_N] [SOC_BT_UART4_RXD]          gpio@e8a13000             arm,pl061 arm,primecell          T    è¡0                ¾       \            R        b           n   4       >            ©        ˜            š      '      	   apb_pclk          ?  z[SOC_BT_UART4_TXD] NC [PMU_HKADC_SSI] NC GPIO_068_SEL NC NC NC        gpio@e8a14000             arm,pl061 arm,primecell          T    è¡@                ¾       ]            R        b           n   4       F            ©        ˜            š      (      	   apb_pclk            zNC NC NC GPIO-K NC NC NC NC       gpio@e8a15000             arm,pl061 arm,primecell          T    è¡P                ¾       ^            R        b           n   4       N            ©        ˜            š      )      	   apb_pclk            zNC NC NC NC NC NC NC NC       gpio@e8a16000             arm,pl061 arm,primecell          T    è¡`                ¾       _            R        b           n   4       V            ©        ˜            š      *      	   apb_pclk          $  zNC [PCIE_PERST_N] NC NC NC NC NC NC          Þ   ?      gpio@e8a17000             arm,pl061 arm,primecell          T    è¡p                ¾       `            R        b            n   4       ^      4      e            ©        ˜            š      +      	   apb_pclk            zNC NC NC     NC       gpio@e8a18000             arm,pl061 arm,primecell          T    è¡€                ¾       a            R        b           n   4       f            ©        ˜            š      ,      	   apb_pclk            zNC NC NC NC NC NC NC NC       gpio@e8a19000             arm,pl061 arm,primecell          T    è¡�                ¾       b            R        b           n   4       n            ©        ˜            š      -      	   apb_pclk            zNC NC NC NC NC NC NC NC       gpio@e8a1a000             arm,pl061 arm,primecell          T    è¡                 ¾       c            R        b           n   4       v            ©        ˜            š      .      	   apb_pclk          '  zNC NC NC NC NC NC GPIO_126_BT_EN TP902           Þ   /      gpio@e8a1b000             arm,pl061 arm,primecell          T    è¡°                ¾       d            R        b            ©        ˜            š      /      	   apb_pclk            z              gpio@e8a1c000             arm,pl061 arm,primecell          T    è¡À                ¾       e            R        b            ©        ˜            š      0      	   apb_pclk            z              gpio@ff3b4000             arm,pl061 arm,primecell          T    ÿ;@                ¾       f            R        b           n   5                    ©        ˜            š      1      	   apb_pclk          m  z[UFS_REF_CLK] [UFS_RST_N] [SPI1_SCLK] [SPI1_DIN] [SPI1_DOUT] [SPI1_CS] GPIO_150_USER_LED1 GPIO_151_USER_LED2             Þ   >      gpio@ff3b5000             arm,pl061 arm,primecell          T    ÿ;P                ¾       g            R        b           n   5                   ©        ˜            š      2      	   apb_pclk            zNC NC NC NC           gpio@e8a1f000             arm,pl061 arm,primecell          T    è¡ð                ¾       h            R        b           n   6                    ©        ˜            š      3      	   apb_pclk          @  z[SD_CLK] [SD_CMD] [SD_DATA0] [SD_DATA1] [SD_DATA2] [SD_DATA3]         gpio@e8a20000             arm,pl061 arm,primecell          T    è¢                 ¾       i            R        b            ©        ˜           n   7                    š      4      	   apb_pclk          ^  z[WL_SDIO_CLK] [WL_SDIO_CMD] [WL_SDIO_DATA0] [WL_SDIO_DATA1] [WL_SDIO_DATA2] [WL_SDIO_DATA3]           gpio@fff0b000             arm,pl061 arm,primecell          T    ÿð°                ¾       j            R        b           n   8                   ©        ˜            š   9          	   apb_pclk          d  z[GPIO_176_PMU_PWR_HOLD] NA [SYSCLK_EN] GPIO_179_WL_WAKEUP_AP GPIO_180_HDMI_INT NA GPIO-F [I2C0_SCL]          Þ   J      gpio@fff0c000             arm,pl061 arm,primecell          T    ÿðÀ                ¾       k            R        b           n   8                   ©        ˜            š   9         	   apb_pclk          ^  z[I2C0_SDA] [I2C1_SCL] [I2C1_SDA] [I2C1_SCL] [I2C1_SDA] GPIO_189_USER_LED3 GPIO_190_USER_LED4             Þ   w      gpio@fff0d000             arm,pl061 arm,primecell          T    ÿðÐ                ¾       l            R        b           n   8                   ©        ˜            š   9         	   apb_pclk          t  z[PCM_DI] [PCM_DO] [PCM_CLK] [PCM_FS] [GPIO_196_I2S2_DI] [GPIO_197_I2S2_DO] [GPIO_198_I2S2_XCLK] [GPIO_199_I2S2_XFS]       gpio@fff0e000             arm,pl061 arm,primecell          T    ÿðà                ¾       m            R        b            n   8             8                  ©        ˜            š   9         	   apb_pclk          z  zNC NC GPIO_202_VBUS_TYPEC GPIO_203_SD_DET GPIO_204_PMU12_IRQ_N GPIO_205_WIFI_ACTIVE GPIO_206_USBSW_SEL GPIO_207_BT_ACTIVE            Þ   @      gpio@fff0f000             arm,pl061 arm,primecell          T    ÿðð                ¾       n            R        b           n   8                   ©        ˜            š   9         	   apb_pclk          L  zGPIO-A GPIO-B GPIO-C GPIO-D GPIO-E [PCIE_CLKREQ_N] [PCIE_WAKE_N] [SPI0_CLK]       gpio@fff10000             arm,pl061 arm,primecell          T    ÿñ                 ¾       o            R        b           n   8       $            ©        ˜            š   9         	   apb_pclk          B  z[SPI0_DIN] [SPI0_DOUT] [SPI0_CS] GPIO_219_CC_INT NC NC [PMU_INT]             Þ         gpio@fff1d000             arm,pl061 arm,primecell          T    ÿñÐ                ¾       �            R        b            ©        ˜            š   9         	   apb_pclk            z              spi@ffd68000              arm,pl022 arm,primecell          T    ÿÖ€                             +            ¾       t            š                     sspclk apb_pclk         Cdefault         Q   :   ;        Š           ‘                  [okay            bLS-SPI0       spi@ff3b3000              arm,pl022 arm,primecell          T    ÿ;0                             +            ¾      8            š      5      5         sspclk apb_pclk         Cdefault         Q   <   =        Š           ‘   >               [okay            bHS-SPI1       pcie@f4000000             hisilicon,kirin960-pcie       @   T    ô              ÿ?à            óò             õ                   šdbi apb phy config          ¤       ÿ                     +            Hpci         Ü               ö                  ®           ˜           ¾                 Bmsi         ¸  ø                  €  Ë                                                                                                                  (   š            R      S      Q      P      :   pcie_phy_ref pcie_aux pcie_apb_phy pcie_apb_sys pcie_aclk           Ù   ?             ufs@ff3b0000          #    hisilicon,hi3660-ufs jedec,ufs-1.1            T    ÿ;             ÿ;                            ¾                  š      f      e         ref_clk phy_clk         å                        <      „           órst       mmc@ff37f000              hisilicon,hi3660-dw-mshc             T    ÿ7ð                             +            ¾       ‹            š      K               ciu biu         , 0Ô         <      ”           óreset           ÿ   9           È        [okay            -            7         H         U         b         o         }        ˆ   @              Cdefault         Q   A   B   C        ‘   D        �   E      mmc@ff3ff000              hisilicon,hi3660-dw-mshc             T    ÿ?ð                             +            ¾       Œ            š      L               ciu biu         <      ”           óreset              È        [okay            -            ª         ¸         Â        Cdefault         Q   F   G   H        ‘   I   wlcore@2          
    ti,wl1837            T               J        ¾               watchdog@e8a06000             arm,sp805 arm,primecell          T    è `                ¾       ,            š                     wdog_clk apb_pclk         watchdog@e8a07000             arm,sp805 arm,primecell          T    è p                ¾       -            š                     wdog_clk apb_pclk         tsensor@fff30000              hisilicon,hi3660-tsensor             T    ÿó                 ¾       ‘           Õ            Þ   K      thermal-zones      cls0-thermal            ë  è        ù   d          ”        !   K      trips      trip-point0         1  ýè        =  è         Opassive       trip-point1         1 $ø        =  è         Opassive          Þ   L         cooling-maps       map0            H   L        M         0  Z   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ      map1            H   L        M         0  Z   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ               usb3_otg_bc@ff200000          /    hisilicon,hi3660-usb3-otg-bc syscon simple-mfd           T    ÿ             usb-phy           hisilicon,hi3660-usb-phy            i            t           �   M        ¤$fä         Þ   N         usb@ff100000          
    snps,dwc3            T    ÿ                  š            I         ref bus_early           À      I        Ð¦C@      0  <      �         �         �         �           ¾       Ÿ          ¡           å   N      	  êusb3-phy            ôotg         üsuper-speed         
utmi                      4         K         d         }         •        ¥host       port                         +       endpoint@0           T            ´   O         Þ         endpoint@1           T           ´   P         Þ               etm@ecc40000          "    arm,coresight-etm4x arm,primecell            T    ìÄ                  š            	   apb_pclk             D            ¾   out-ports      port       endpoint            ´   Q         Þ   V               etm@ecd40000          "    arm,coresight-etm4x arm,primecell            T    ìÔ                  š            	   apb_pclk             D            ¾   out-ports      port       endpoint            ´   R         Þ   W               etm@ece40000          "    arm,coresight-etm4x arm,primecell            T    ìä                  š            	   apb_pclk             D            ¾   out-ports      port       endpoint            ´   S         Þ   X               etm@ecf40000          "    arm,coresight-etm4x arm,primecell            T    ìô                  š            	   apb_pclk             D            ¾   out-ports      port       endpoint            ´   T         Þ   Y               funnel@ec801000       +    arm,coresight-dynamic-funnel arm,primecell           T    ì€                 š            	   apb_pclk       out-ports      port       endpoint            ´   U         Þ   Z            in-ports                         +       port@0           T       endpoint            ´   V         Þ   Q         port@1           T      endpoint            ´   W         Þ   R         port@2           T      endpoint            ´   X         Þ   S         port@3           T      endpoint            ´   Y         Þ   T               etf@ec802000               arm,coresight-tmc arm,primecell          T    ì€                  š            	   apb_pclk       in-ports       port       endpoint            ´   Z         Þ   U            out-ports      port       endpoint            ´   [         Þ   h               etm@ed440000          "    arm,coresight-etm4x arm,primecell            T    íD                  š            	   apb_pclk             D            ¾   out-ports      port       endpoint            ´   \         Þ   a               etm@ed540000          "    arm,coresight-etm4x arm,primecell            T    íT                  š            	   apb_pclk             D            ¾   out-ports      port       endpoint            ´   ]         Þ   b               etm@ed640000          "    arm,coresight-etm4x arm,primecell            T    íd                  š            	   apb_pclk             D            ¾   out-ports      port       endpoint            ´   ^         Þ   c               etm@ed740000          "    arm,coresight-etm4x arm,primecell            T    ít                  š            	   apb_pclk             D   	         ¾   out-ports      port       endpoint            ´   _         Þ   d               funnel@ed001000       +    arm,coresight-dynamic-funnel arm,primecell           T    í                  š            	   apb_pclk       out-ports      port       endpoint            ´   `         Þ   e            in-ports                         +       port@0           T       endpoint            ´   a         Þ   \         port@1           T      endpoint            ´   b         Þ   ]         port@2           T      endpoint            ´   c         Þ   ^         port@3           T      endpoint            ´   d         Þ   _               etf@ed002000               arm,coresight-tmc arm,primecell          T    í                   š            	   apb_pclk       in-ports       port       endpoint            ´   e         Þ   `            out-ports      port       endpoint            ´   f         Þ   i               funnel            arm,coresight-static-funnel          š            	   apb_pclk       out-ports      port       endpoint            ´   g         Þ   k            in-ports                         +       port@0           T       endpoint            ´   h         Þ   [         port@1           T      endpoint            ´   i         Þ   f               funnel@ec031000       +    arm,coresight-dynamic-funnel arm,primecell           T    ì                 š            	   apb_pclk       out-ports      port       endpoint            ´   j         Þ   l            in-ports                         +       port@0           T       endpoint            ´   k         Þ   g               etf@ec036000               arm,coresight-tmc arm,primecell          T    ì`                 š            	   apb_pclk       in-ports       port       endpoint            ´   l         Þ   j            out-ports      port       endpoint            ´   m         Þ   n               replicator             arm,coresight-static-replicator          š            	   apb_pclk       in-ports       port       endpoint            ´   n         Þ   m            out-ports                        +       port@0           T       endpoint            ´   o         Þ   q         port@1           T      endpoint            ´   p         Þ   r               etr@ec033000               arm,coresight-tmc arm,primecell          T    ì0                 š            	   apb_pclk       in-ports       port       endpoint            ´   q         Þ   o               tpiu@ec032000         !    arm,coresight-tpiu arm,primecell             T    ì                  š            	   apb_pclk       in-ports       port       endpoint            ´   r         Þ   p               gpio-range          ã            Þ   s      pinmux@e896c000           pinctrl-single           T    è–À       ð                              %            C            `   s              s      t             Þ   4   pmu-pins             z                              csi0-pwd-n-pins         z   D          csi1-pwd-n-pins         z   L          isp0-pins           z   X      d      h         isp1-pins           z   \      l      p         pwr-key-pins            z   €             Þ   t      i2c3-pins           z   ,      0            Þ          i2c4-pins           z   �      ”         pcie-perstn-pins            z  \         usbhub5734-pins         z                   uart0-pins          z   Ì      Ð            Þ   $      uart1-pins           z   °      ´      ¨      ¬            Þ   '      uart2-pins           z   ¼      À      È      Ä            Þ   )      uart3-pins           z   Ü      à      ä      è            Þ   +      uart4-pins           z   ì      ð      ô      ø            Þ   -      uart5-pins           z   Ä      È      ¼      À            Þ   0      uart6-pins           z   Ì      Ð      Ô      Ø            Þ   2      cam0-rst-pins           z   È          cam1-rst-pins           z  $             pinmux@ff37e000           pinctrl-single           T    ÿ7à                                      %            C           `   s                    Þ   6   sd-pins       0  z                                              Þ   A         pinmux@ff3b6000           pinctrl-single           T    ÿ;`        0                              %            C           `   s                    Þ   5   ufs-pins            z                   spi3-pins            z                                 Þ   <         pinmux@ff3fd000           pinctrl-single           T    ÿ?Ð                                      %            C           `   s                    Þ   7   sdio-pins         0  z                                              Þ   F         pinmux@fff11000           pinctrl-single           T    ÿñ        ¨                              %            C           `   s       *             Þ   8   i2s2-pins            z   D      H      L      P         slimbus-pins            z   ,      0         i2c0-pins           z                     Þ         i2c1-pins           z                      Þ         i2c7-pins           z   $      (            Þ   "      pcie-pins           z   „      ˆ         spi2-pins            z   Œ      �      ”      ˜            Þ   :      i2s0-pins            z   4      8      <      @            pinmux@e896c800           pinconf-single           T    è–È                           %       pmu-cfg-pins             z                                   Ž                      «                      Æ       ð      i2c3-cfg-pins           z   8       <            Ž                      «                      Æ       ð         Þ   !      csi0-pwd-n-cfg-pins         z   P            Ž                      «                      Æ      ð      csi1-pwd-n-cfg-pins         z   X            Ž                      «                      Æ      ð      isp0-cfg-pins           z   d       p       t            Ž                      «                      Æ      ð      isp1-cfg-pins           z   h       x       |            Ž                      «                      Æ      ð      pwr-key-cfg-pins            z   Œ            Ž                      «                      Æ       ð         Þ   u      uart1-cfg-pins           z   ´       ¸       ¼       À            Ž                      «                      Æ       ð         Þ   (      uart2-cfg-pins           z   È       Ì       Ð       Ô            Ž                      «                      Æ       ð         Þ   *      uart5-cfg-pins           z   È       Ì       Ð       Ô            Ž                      «                      Æ       ð         Þ   1      cam0-rst-cfg-pins           z   Ô            Ž                      «                      Æ      ð      uart0-cfg-pins          z   Ø       Ü            Ž                      «                      Æ       ð         Þ   %      uart6-cfg-pins           z   Ø       Ü       à       ä            Ž                      «                      Æ       ð         Þ   3      uart3-cfg-pins           z   è       ì       ð       ô            Ž                      «                      Æ       ð         Þ   ,      uart4-cfg-pins           z   ø       ü                         Ž                      «                      Æ       ð         Þ   .      cam1-rst-cfg-pins           z  0            Ž                      «                      Æ      ð         pinmux@ff3b6800           pinconf-single           T    ÿ;h                           %       ufs-cfg-pins            z                       Ž                      «                      Æ   0   ð      spi3-cfg-pins            z                                    Ž                      «                      Æ       ð         Þ   =         pinmux@ff3fd800           pinconf-single           T    ÿ?Ø                           %       sdio-clk-cfg-pins           z                Ž                      «                      Æ   ð   ð         Þ   G      sdio-cfg-pins         (  z                                           Ž                      «                     Æ   €   ð         Þ   H         pinmux@ff37e800           pinconf-single           T    ÿ7è                           %       sd-clk-cfg-pins         z                Ž                      «                      Æ   ð   ð         Þ   B      sd-cfg-pins       (  z                                           Ž                      «                     Æ   €   ð         Þ   C         pinmux@fff11800           pinconf-single           T    ÿñ        ¼                   %       i2c0-cfg-pins           z                       Ž                      «                     Æ       ð         Þ         i2c1-cfg-pins           z   $       (            Ž                      «                     Æ       ð         Þ         i2c7-cfg-pins           z   ,       0            Ž                      «                     Æ       ð         Þ   #      slimbus-cfg-pins            z   4       8            Ž                      «                     Æ       ð      i2s0-cfg-pins            z   @       D       H       L            Ž                      «                     Æ       ð      i2s2-cfg-pins            z   P       T       X       \            Ž                      «                     Æ       ð      pcie-cfg-pins           z   ”       ˜            Ž                      «                     Æ       ð      spi2-cfg-pins            z   œ               ¤       ¨            Ž                      «                     Æ       ð         Þ   ;      usb-cfg-pins            z   ¬            Ž                      «                     Æ       ð         Þ               aliases         ä/soc/mmc@ff37f000           é/soc/mmc@ff3ff000           î/soc/serial@fdf02000            ö/soc/serial@fdf00000            þ/soc/serial@fdf03000            /soc/serial@ffd74000            /soc/serial@fdf01000            /soc/serial@fdf05000            /soc/serial@fff32000          chosen          &serial6:115200n8          memory@0             Hmemory           T                      reserved-memory                      +            Ü   ramoops@32000000              ramoops          T    2                  2           >           K            reboot-mode-syscon@32100000           syscon simple-mfd            T    2            reboot-mode           syscon-reboot-mode          W            ^wfU        jwfU         zwfU         keys          
    gpio-keys           Cdefault         Q   t   u   key-power            ˆ        è   v              bGPIO Power          –   t         leds          
    gpio-leds      led-user-1          bgreen:user1         è   >             
  ¡heartbeat         led-user-2          bgreen:user2         è   >               ¡none          led-user-3          bgreen:user3         è   w               ¡mmc0          led-user-4          bgreen:user4         è   w                ·        ¡none          led-wlan            byellow:wlan         è   @               ¡phy0tx          Çoff       led-bt          bblue:bt         è   @               ¡hci0-power          Çoff          pmic@fff34000             hisilicon,hi6421v530-pmic            T    ÿó@                 ©        ˜      regulators     LDO3            ÕVOUT3_1V85          ä w@        ü !‘À        	   x      LDO9            ÕVOUT9_1V8_2V95          ä ³ð        ü 2Z         	   ð         Þ   E      LDO11           ÕVOUT11_1V8_2V95         ä ³ð        ü 2Z         	   ð      LDO15           ÕVOUT15_3V0          ä ³ð        ü -ÆÀ         	0         	B        	   x      LDO16           ÕVOUT16_2V95         ä ³ð        ü -ÆÀ        	  h         Þ   D            wlan-en-1-8v              regulator-fixed         Õwlan-en-regulator           ä w@        ü w@        	V   x               	[ p         	l         Þ   I      firmware       optee             linaro,optee-tz          =smc             	compatible interrupt-parent #address-cells #size-cells model method cpu device_type reg enable-method next-level-cache cpu-idle-states capacity-dmips-mhz clocks operating-points-v2 #cooling-cells dynamic-power-coefficient phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns #interrupt-cells interrupt-controller interrupts interrupt-affinity ranges #clock-cells #reset-cells hisi,rst-syscon #mbox-cells mboxes clock-names clock-frequency resets pinctrl-names pinctrl-0 status label data-role power-role try-power-role source-pdos sink-pdos op-sink-microwatt remote-endpoint adi,dsi-lanes dma-names dmas enable-gpios max-speed #dma-cells dma-channels dma-requests dma-channel-mask dma-no-cci dma-type interrupt-names gpio-controller #gpio-cells gpio-ranges gpio-line-names num-cs cs-gpios reg-names bus-range num-lanes interrupt-map-mask interrupt-map reset-gpios freq-table-hz reset-names hisilicon,peripheral-syscon card-detect-delay bus-width cap-sd-highspeed sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 disable-wp cd-gpios vmmc-supply vqmmc-supply non-removable broken-cd cap-power-off-card #thermal-sensor-cells polling-delay polling-delay-passive sustainable-power thermal-sensors temperature hysteresis trip contribution cooling-device #phy-cells hisilicon,pericrg-syscon hisilicon,pctrl-syscon hisilicon,eye-diagram-param assigned-clocks assigned-clock-rates phys phy-names dr_mode maximum-speed phy_type snps,dis-del-phy-power-chg-quirk snps,lfps_filter_quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk snps,dis_enblslpm_quirk usb-role-switch role-switch-default-mode arm,coresight-loses-context-with-cpu #pinctrl-single,gpio-range-cells #pinctrl-cells #gpio-range-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,drive-strength mmc1 mmc2 serial0 serial1 serial2 serial3 serial4 serial5 serial6 stdout-path record-size console-size ftrace-size offset mode-normal mode-bootloader mode-recovery wakeup-source linux,code linux,default-trigger panic-indicator default-state regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-boot-on regulator-always-on gpio startup-delay-us enable-active-high 