Ðþí  ¸   8  t   (            D  <                                                                  +   ,Qualcomm Technologies, Inc. IPQ5210 RDP504        !   2qcom,ipq5210-rdp504 qcom,ipq5210       clocks     sleep-clk            2fixed-clock          =             J  }          Z         xo-board-clk             2fixed-clock          =             Jn6          Z            cpus                                 cpu@0            bcpu          2arm,cortex-a53           n             rpsci             €         cpu@1            bcpu          2arm,cortex-a53           n            rpsci             €         cpu@2            bcpu          2arm,cortex-a53           n            rpsci             €         cpu@3            bcpu          2arm,cortex-a53           n            rpsci             €         l2-cache             2cache            ‘             �         Z            firmware       optee            2linaro,optee-tz          ysmc       scm          2qcom,scm-ipq5210 qcom,scm            memory@80000000          bmemory           n    €                 pmu          2arm,cortex-a53-pmu           «              psci             2arm,psci-1.0             ysmc       reserved-memory                                    ¶   bootloader@87800000          n    ‡€       @            ½      smem@87c00000         
   2qcom,smem            n    ‡À                   ½         Ä            tfa@87d00000             n    ‡Ð                   ½      optee@87d80000           n    ‡Ø       (            ½         soc@0            2simple-bus                                    Ì                                ¶                          pinctrl@1000000          2qcom,ipq5210-tlmm            n            0           «                    ×         ç            ó              6          ÿ                    Z      qup-uart1-default-state         %gpio38 gpio39           *qup_se1         3            B         Z         sdhc-default-state           Z   	   clk-pins            %gpio5           *sdc_clk         3            Q      cmd-pins            %gpio4           *sdc_cmd         3            ^      data-pins           %gpio0 gpio1 gpio2 gpio3       	  *sdc_data            3            ^            clock-controller@1800000             2qcom,ipq5210-gcc             n    €                 k                               =           r            Z         hwlock@1905000           2qcom,tcsr-mutex          n    �P                            Z         geniqup@1ac0000          2qcom,geni-se-qup             n    ¬                  k      E      F        �m-ahb s-ahb           ¶                            serial@1a84000           2qcom,geni-debug-uart             n    ¨@       @         k      I        �se           «       ‹           ™okay                        ªdefault          mmc@7804000       %   2qcom,ipq5210-sdhci qcom,sdhci-msm-v5              n    €@            €P              	  ¸hc cqhci             «       ?          B           Âhc_irq pwr_irq          k      S      T           �iface core xo            Ò        ™okay            àq°         î            ø                     	        ªdefault       interrupt-controller@b000000             2qcom,msm-qgic2            ÿ                 @   n                                              @                 «      	                                     ¶             À       0          Z      v2m@0            2arm,gic-v2m-frame            n              ý               v2m@1000             2arm,gic-v2m-frame            n             ý               v2m@2000             2arm,gic-v2m-frame            n              ý                  timer@b120000            2arm,armv7-timer-mem          n                      ¶                                           frame@b121000           #             «                             n               frame@b123000           #            «       	            n0          	  ™disabled          frame@b124000           #            «       
            n@          	  ™disabled          frame@b125000           #            «                   nP          	  ™disabled          frame@b126000           #            «                   n`          	  ™disabled          frame@b127000           #            «                   np          	  ™disabled          frame@b128000           #            «                   n€          	  ™disabled                timer            2arm,armv8-timer       0   «                                      aliases       &  0/soc@0/geniqup@1ac0000/serial@1a84000         chosen          8serial0          	#address-cells #size-cells interrupt-parent model compatible #clock-cells clock-frequency phandle device_type reg enable-method next-level-cache cache-level cache-unified interrupts ranges no-map hwlocks dma-ranges gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells pins function drive-strength bias-pull-down bias-disable bias-pull-up clocks #reset-cells #hwlock-cells clock-names status pinctrl-0 pinctrl-names reg-names interrupt-names non-removable max-frequency bus-width mmc-ddr-1_8v mmc-hs200-1_8v msi-controller frame-number serial0 stdout-path 