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H  [ n      &okayZspeaker@0,02sdw20217020400   SpkrLeft   * Zspeaker@0,12sdw20217020400   SpkrRight   * Zclock-controller@6b6c00062qcom,x1e80100-lpassaudioccqcom,sc8280xp-lpassaudioccMZsoundwire@6d300002qcom,soundwire-v2.0.0b-iface corewakeupTXswr_audio_cgcr[edefault# <H[n &okayZcodec@0,32sdw20217010d00 UZcodec@6d4400082qcom,x1e80100-lpass-va-macroqcom,sm8550-lpass-va-macro@$b9fg-mclkmacrodcodecMfsgen jI> [edefaultZpinctrl@6e80000>2qcom,x1e80100-lpass-lpi-pinctrlqcom,sm8550-lpass-lpi-pinctrl %bfg -coreaudio   Ztx-swr-active-stateZclk-pins gpio0 swr_tx_clk   data-pins gpio1gpio2 swr_tx_data   rx-swr-active-stateZclk-pins gpio3 swr_rx_clk   data-pins gpio4gpio5 swr_rx_data   dmic01-default-stateZclk-pins gpio6 dmic1_clk  data-pins gpio7 dmic1_data  dmic23-default-stateZQclk-pins gpio8 dmic2_clk  data-pins gpio9 dmic2_data  wsa-swr-active-stateZclk-pins gpio10 wsa_swr_clk   data-pins gpio11 wsa_swr_data   wsa2-swr-active-stateZclk-pins gpio15 wsa2_swr_clk   data-pins gpio16 wsa2_swr_data   spkr-01-sd-n-active-state gpio12 gpio   Zclock-controller@6ea0000,2qcom,x1e80100-lpassccqcom,sc8280xp-lpasscc MZinterconnect@7e400002qcom,x1e80100-lpass-ag-noc&ZRinterconnect@74000002qcom,x1e80100-lpass-lpiaon-noc@&ZSinterconnect@74300002qcom,x1e80100-lpass-lpicx-nocC&Zmmc@8804000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@hc_irqpwr_irqb>>2-ifacecorexo =  d, .h<s0q !@A9sdhc-ddrcpu-sdhc >N &disabledZTopp-table2operating-points-v2Zopp-192000003$:opp-500000003:/opp-1000000003:0opp-2020000003 F:mmc@8844000&2qcom,x1e80100-sdhciqcom,sdhci-msm-v5@hc_irqpwr_irqb>>2-ifacecorexo =` d, .h<s0q !@A9sdhc-ddrcpu-sdhc >N &disabledZUopp-table2operating-points-v2Zopp-192000003$:opp-500000003:/opp-1000000003:0opp-2020000003 F:phy@88e000082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTb" -ref>9 &disabledZphy@88e100082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phyTb"-ref>4&okayZphy@88e200082qcom,x1e80100-snps-eusb2-phyqcom,sm8550-snps-eusb2-phy Tb"-ref>5&okayZphy@88e30002qcom,x1e80100-qmp-usb3-uni-phy0  b>>>-auxrefcom_auxpipe>G>L phyphy_phy>Musb_mp_phy0_pipe_clk&okay*Zphy@88e50002qcom,x1e80100-qmp-usb3-uni-phyP  b>>>-auxrefcom_auxpipe>H>M phyphy_phy>Musb_mp_phy1_pipe_clk&okay*Zusb@a000000"2qcom,x1e80100-dwc3qcom,snps-dwc3 Hb>>>>>> >>>R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys>>$ DHar:9 :dwc_usb3pwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq>:>A0q!@A%9usb-ddrapps-usb H = :usb2-phyusb3-phy V o   N &disabledZVports port@0endpointZWport@1endpointaZusb@a200000"2qcom,x1e80100-dwc3qcom,snps-dwc3 Hb>>>>>> >>>R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys>>$ 8H21/dwc_usb3pwr_eventdp_hs_phy_irqdm_hs_phy_irq>:>=0q!@A"9usb-ddrapps-usb  H = usb2-phy high-speed  N &disabledZXportendpointZYusb@a400000%2qcom,x1e80100-dwc3-mpqcom,snps-dwc3 @Hb>>>>>> >>>R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys>>$ H39:58436578udwc_usb3pwr_event_1pwr_event_2hs_phy_1hs_phy_2dp_hs_phy_1dm_hs_phy_1dp_hs_phy_2dm_hs_phy_2ss_phy_1ss_phy_2>:>>0q!@A&9usb-ddrapps-usb H =usb2-0usb3-0usb2-1usb3-1 host V o   N&okayZZusb@a600000"2qcom,x1e80100-dwc3qcom,snps-dwc3 `Hb>>>> >> >>>R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys>>$ DHcs=:dwc_usb3pwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq>:>? H =  8usb2-phyusb3-phy V o   N&okay hostZ[ports port@0endpointaZport@1endpointaZusb@a800000"2qcom,x1e80100-dwc3qcom,snps-dwc3 Hb>> >>> > >>>R-cfg_noccoreifacesleepmock_utminoc_aggrnoc_aggr_northnoc_aggr_southnoc_sys> > $ DHet< /:dwc_usb3pwr_eventdp_hs_phy_irqdm_hs_phy_irqss_phy_irq>:>@0q!@A$9usb-ddrapps-usb H =` 9usb2-phyusb3-phy V o   N&okay hostZ\ports port@0endpointaZport@1endpointaZvideo-codec@aa00000$2qcom,x1e80100-irisqcom,sm8550-iris   < <venusvcodec0mxcmmcxsb>Y-ifacecorevcodec0_core0q@A*!9cpu-cfgvideo-mem>Xbus=@=GN &disabledZ]opp-table2operating-points-v2Zopp-1920000003 q:opp-2400000003N:0/opp-3380000003%x:00opp-3660000003з:0opp-4440000003v:opp-4810000003z@:clock-controller@aaf00002qcom,x1e80100-videocc  b2>X<< ://MZdisplay-subsystem@ae000002qcom,x1e80100-mdss :mdss Sb>&:Hq@ !!@A9mdp0-memmdp1-memcpu-cfg = &okayZ display-controller@ae010002qcom,x1e80100-dpu   :mdpvbifH (b>&=:F-nrt_busifacelutcorevsyncs <Z^ports port@0endpointa Zport@4endpointa Zport@5endpointa Zport@6endpointaZopp-table2operating-points-v2Z opp-2000000003 :/opp-3250000003_@:0opp-3750000003Z :opp-5140000003:opp-5750000003"E:displayport-controller@ae900002qcom,x1e80100-dpP     H 0b J-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel 888s<8dp DisplayPort0&okayZ_ports port@0endpointaZ port@1endpoint a "`=Av1Zopp-table2operating-points-v2Zopp-2700000003߀:/opp-5400000003 /:0opp-5940000003#g:opp-81000000030G:displayport-controller@ae980002qcom,x1e80100-dpP    H 0bJ-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel  999s<9dp DisplayPort1&okayZ`ports port@0endpointaZ port@1endpoint a "`=Av1Zdisplayport-controller@ae9a0002qcom,x1e80100-dpP    H 0b"$'(*J-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelstream_1_pixel%)+ :::s<:dp DisplayPort2 &disabledZaports port@0endpointaZport@1endpoint aZdisplayport-controller@aea00002qcom,x1e80100-dpP     H (b-/23;-core_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel04 s<dp DisplayPort3&okay[edefaultZbports port@0endpointaZ port@1endpoint  "`=Av1aZopp-table2operating-points-v2Zopp-2700000003߀:/opp-5940000003#g:0opp-81000000030G:aux-buspanel 2edp-panel 3 =portendpointaZphy@aec2a002qcom,x1e80100-dp-phy@ * " & b"" -auxcfg_ahbref<M &disabledZcphy@aec5a002qcom,x1e80100-dp-phy@ Z R V Pb-" -auxcfg_ahbref<M&okay*Zclock-controller@af000002qcom,x1e80100-dispcc db2>%38899::<:/MZinterrupt-controller@b2200002qcom,x1e80100-pdcqcom,pdc "@dH J**/ 4ca  0Zpower-management@c300000%2qcom,x1e80100-aoss-qmpqcom,aoss-qmp 01H1 1MZsram@c3f00002qcom,rpmh-stats ?arbiter@c4000002qcom,x1e80100-spmi-pmic-arb0 @0 P@ D:corechnlsobsrvr Z Zdspmi@c42d000 B@ L :cnfgintr periph_irq H Zepmic@02qcom,pm8550qcom,spmi-pmic Zfpon@13002qcom,pmk8350-pon :hlospbsZgpwrkey2qcom,pmk8350-pwrkey gtZhresin2qcom,pmk8350-resin &disabledZirtc@61002qcom,pmk8350-rtcab :rtcalarmb r Zjnvram@71002qcom,spmi-sdamq  qZkreboot-reason@48H Zlnvram@7e002qcom,spmi-sdam~  ~Zmcharge-limit-en@73sZncharge-limit-end@75uZocharge-limit-delta@76vZpgpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio    Z edp-bl-pwm-state gpio5 func3Zpwm2qcom,pmk8550-pwm &okayZpmic@12qcom,pm8550qcom,spmi-pmic Zqtemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio   Zrtmr0-reset-n-active-state gpio10 normal Zrtmr0-3p3-reg-en-state gpio11 normal Zled-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led &disabledZrpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm  &disabledZspmic@22qcom,pm8550qcom,spmi-pmic Zttemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio  ! Z!pmic@32qcom,pmc8380qcom,spmi-pmic Zutemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio  "  Z"edp-bl-en-state gpio4 normal   Zpmic@42qcom,pmc8380qcom,spmi-pmic Zvtemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio  #  Z#pmic@52qcom,pmc8380qcom,spmi-pmic Zwtemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio  $  Z$rtmr0-1p15-reg-en-state gpio8 normal Zpmic@62qcom,pmc8380qcom,spmi-pmic Zxtemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800!2qcom,pmc8380-gpioqcom,spmi-gpio  %  Z%pmic@82qcom,pm8550qcom,spmi-pmic Zytemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio  & Z&pmic@92qcom,pm8550qcom,spmi-pmic  Zztemp-alarm@a002qcom,spmi-temp-alarm  Zgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio  ' Z'rtmr0-1p8-reg-en-state gpio8 normal Zpmic@c2qcom,pm8010qcom,spmi-pmic   &disabledZ{temp-alarm@24002qcom,spmi-temp-alarm$ $Zspmi@c432000 C @ M :cnfgintr periph_irq H Z|pmic@72qcom,smb2360qcom,spmi-pmic &okayZ}phy@fd002qcom,smb2360-eusb2-repeater ( )Zpmic@a2qcom,smb2360qcom,spmi-pmic  &okayZ~phy@fd002qcom,smb2360-eusb2-repeater ( *Zpmic@b2qcom,smb2360qcom,spmi-pmic  &okayZphy@fd002qcom,smb2360-eusb2-repeater ( +Zpmic@c2qcom,smb2360qcom,spmi-pmic   &disabledZphy@fd002qcom,smb2360-eusb2-repeaterZpinctrl@f1000002qcom,x1e80100-tlmm      ,Zedp0-hpd-default-state gpio119 edp0_hot Zqup-i2c0-data-clk-state gpio0gpio1 qup0_se0  Zqup-i2c1-data-clk-state gpio4gpio5 qup0_se1  Zqup-i2c2-data-clk-state gpio8gpio9 qup0_se2  Zqup-i2c3-data-clk-state gpio12gpio13 qup0_se3  Zqup-i2c4-data-clk-state gpio16gpio17 qup0_se4  Zqup-i2c5-data-clk-state gpio20gpio21 qup0_se5  Zqup-i2c6-data-clk-state gpio24gpio25 qup0_se6  Zqup-i2c7-data-clk-state gpio14gpio15 qup0_se7  Zqup-i2c8-data-clk-state gpio32gpio33 qup1_se0  Z`qup-i2c9-data-clk-state gpio36gpio37 qup1_se1  Zcqup-i2c10-data-clk-state gpio40gpio41 qup1_se2  Zfqup-i2c11-data-clk-state gpio44gpio45 qup1_se3  Ziqup-i2c12-data-clk-state gpio48gpio49 qup1_se4  Zlqup-i2c13-data-clk-state gpio52gpio53 qup1_se5  Zoqup-i2c14-data-clk-state gpio56gpio57 qup1_se6  Zrqup-i2c15-data-clk-state gpio54gpio55 qup1_se7  Z}qup-i2c16-data-clk-state gpio64gpio65 qup2_se0  ZCqup-i2c17-data-clk-state gpio68gpio69 qup2_se1  ZGqup-i2c18-data-clk-state gpio72gpio73 qup2_se2  ZJqup-i2c19-data-clk-state gpio76gpio77 qup2_se3  ZNqup-i2c20-data-clk-state gpio80gpio81 qup2_se4  ZQqup-i2c21-data-clk-state gpio84gpio85 qup2_se5  ZTqup-i2c22-data-clk-state gpio88gpio89 qup2_se6  ZXqup-i2c23-data-clk-state gpio86gpio87 qup2_se7  Z[qup-spi0-cs-state gpio3 qup0_se0  Zqup-spi0-data-clk-state gpio0gpio1gpio2 qup0_se0  Zqup-spi1-cs-state gpio7 qup0_se1  Zqup-spi1-data-clk-state gpio4gpio5gpio6 qup0_se1  Zqup-spi2-cs-state gpio11 qup0_se2  Zqup-spi2-data-clk-state gpio8gpio9gpio10 qup0_se2  Zqup-spi3-cs-state gpio15 qup0_se3  Zqup-spi3-data-clk-state gpio12gpio13gpio14 qup0_se3  Zqup-spi4-cs-state gpio19 qup0_se4  Zqup-spi4-data-clk-state gpio16gpio17gpio18 qup0_se4  Zqup-spi5-cs-state gpio23 qup0_se5  Zqup-spi5-data-clk-state gpio20gpio21gpio22 qup0_se5  Zqup-spi6-cs-state gpio27 qup0_se6  Zqup-spi6-data-clk-state gpio24gpio25gpio26 qup0_se6  Zqup-spi7-cs-state gpio13 qup0_se7  Zqup-spi7-data-clk-state gpio14gpio15gpio12 qup0_se7  Zqup-spi8-cs-state gpio35 qup1_se0  Zbqup-spi8-data-clk-state gpio32gpio33gpio34 qup1_se0  Zaqup-spi9-cs-state gpio39 qup1_se1  Zequp-spi9-data-clk-state gpio36gpio37gpio38 qup1_se1  Zdqup-spi10-cs-state gpio43 qup1_se2  Zhqup-spi10-data-clk-state gpio40gpio41gpio42 qup1_se2  Zgqup-spi11-cs-state gpio47 qup1_se3  Zkqup-spi11-data-clk-state gpio44gpio45gpio46 qup1_se3  Zjqup-spi12-cs-state gpio51 qup1_se4  Znqup-spi12-data-clk-state gpio48gpio49gpio50 qup1_se4  Zmqup-spi13-cs-state gpio55 qup1_se5  Zqqup-spi13-data-clk-state gpio52gpio53gpio54 qup1_se5  Zpqup-spi14-cs-state gpio59 qup1_se6  Ztqup-spi14-data-clk-state gpio56gpio57gpio58 qup1_se6  Zsqup-spi15-cs-state gpio53 qup1_se7  Zqup-spi15-data-clk-state gpio54gpio55gpio52 qup1_se7  Z~qup-spi16-cs-state gpio67 qup2_se0  ZFqup-spi16-data-clk-state gpio64gpio65gpio66 qup2_se0  ZEqup-spi17-cs-state gpio71 qup2_se1  ZIqup-spi17-data-clk-state gpio68gpio69gpio70 qup2_se1  ZHqup-spi18-cs-state gpio75 qup2_se2  ZMqup-spi18-data-clk-state gpio72gpio73gpio74 qup2_se2  ZLqup-spi19-cs-state gpio79 qup2_se3  ZPqup-spi19-data-clk-state gpio76gpio77gpio78 qup2_se3  ZOqup-spi20-cs-state gpio83 qup2_se4  ZSqup-spi20-data-clk-state gpio80gpio81gpio82 qup2_se4  ZRqup-spi21-cs-state gpio87 qup2_se5  ZVqup-spi21-data-clk-state gpio84gpio85gpio86 qup2_se5  ZUqup-spi22-cs-state gpio91 qup2_se6  ZZqup-spi22-data-clk-state gpio88gpio89gpio90 qup2_se6  ZYqup-spi23-cs-state gpio85 qup2_se7  Z]qup-spi23-data-clk-state gpio86gpio87gpio84 qup2_se7  Z\qup-uart2-default-stateZcts-pins gpio8 qup0_se2  rts-pins gpio9 qup0_se2  tx-pins gpio10 qup0_se2  rx-pins gpio11 qup0_se2  qup-uart14-default-stateZucts-pins gpio56 qup1_se6 rts-pins gpio57 qup1_se6  tx-pins gpio58 qup1_se6  rx-pins gpio59 qup1_se6 qup-uart21-default-stateZWtx-pins gpio86 qup2_se5  rx-pins gpio87 qup2_se5  sdc2-default-stateZclk-pins sdc2_clk  cmd-pins sdc2_cmd  data-pins sdc2_data  sdc2-sleep-stateZclk-pins sdc2_clk  cmd-pins sdc2_cmd  data-pins sdc2_data  hall-int-n-state gpio2 gpio Znvme-reg-en-state gpio18 gpio  Zedp-reg-en-state gpio70 gpio  Zssam-state-state gpio91 gpio Zwcn-wlan-bt-en-state gpio116gpio117 gpio  Zpcie3-default-stateZperst-n-pins gpio143 gpio  clkreq-n-pins gpio144 pcie3_clk  wake-n-pins gpio145 gpio  pcie6a-default-stateZperst-n-pins gpio152 gpio  clkreq-n-pins gpio153 pcie6a_clk  wake-n-pins gpio154 gpio  rtmr1-1p8-reg-en-state gpio175 gpio  Zrtmr1-3p3-reg-en-state gpio186 gpio  Zrtmr1-1p15-reg-en-state gpio188 gpio  Zwcd-reset-n-active-state gpio191 gpio   Zwcn-sw-en-state gpio214 gpio  Zcam-indicator-en-state gpio225 gpio  Zstm@10002000 2arm,coresight-stmarm,primecell  (:stm-basestm-stimulus-baseb -apb_pclkout-portsportendpointa,Z3tpdm@10003000"2qcom,coresight-tpdmarm,primecell0b -apb_pclk   +  &disabledout-portsportendpointa-Z.tpda@10004000"2qcom,coresight-tpdaarm,primecell@b -apb_pclkin-ports port@0endpointa.Z-port@1endpointa/Z1out-portsportendpointa0Z2tpdm@1000f000"2qcom,coresight-tpdmarm,primecellb -apb_pclk   + out-portsportendpointa1Z/funnel@10041000+2arm,coresight-dynamic-funnelarm,primecellb -apb_pclkin-ports port@6endpointa2Z0port@7endpointa3Z,out-portsportendpointa4Z9funnel@10042000+2arm,coresight-dynamic-funnelarm,primecell b -apb_pclkin-ports port@2endpointa5Zport@5endpointa6ZIport@6endpointa7Zqout-portsportendpointa8Z:funnel@10045000+2arm,coresight-dynamic-funnelarm,primecellPb -apb_pclkin-ports port@0endpointa9Z4port@1endpointa:Z8out-portsportendpointa;ZLtpdm@10800000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ + out-portsportendpointa<Zutpdm@1082c000"2qcom,coresight-tpdmarm,primecellb -apb_pclk =  S out-portsportendpointa=Zjtpdm@10841000"2qcom,coresight-tpdmarm,primecellb -apb_pclk   + out-portsportendpointa>Zhtpdm@10844000"2qcom,coresight-tpdmarm,primecell@b -apb_pclk =  S out-portsportendpointa?Z@funnel@10846000+2arm,coresight-dynamic-funnelarm,primecell`b -apb_pclkin-portsportendpointa@Z?out-portsportendpointaAZgcti@1098b000 2arm,coresight-ctiarm,primecellb -apb_pclktpdm@109d0000"2qcom,coresight-tpdmarm,primecellb -apb_pclk =  S  &disabledout-portsportendpointaBZitpdm@10ac0000"2qcom,coresight-tpdmarm,primecellb -apb_pclk =  S  &disabledout-portsportendpointaCZEtpdm@10ac1000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ + out-portsportendpointaDZFtpda@10ac4000"2qcom,coresight-tpdaarm,primecell@b -apb_pclkin-ports port@8endpointaEZCport@9 endpointaFZDout-portsportendpointaGZHfunnel@10ac5000+2arm,coresight-dynamic-funnelarm,primecellPb -apb_pclkin-portsportendpointaHZGout-portsportendpointaIZ6funnel@10b04000+2arm,coresight-dynamic-funnelarm,primecell@b -apb_pclkin-ports port@3endpointaJZaport@6endpointaKZWport@7endpointaLZ;out-portsportendpointaMZNtmc@10b05000 2arm,coresight-tmcarm,primecellPb -apb_pclkZin-portsportendpointaNZMout-portsportendpointaOZPreplicator@10b06000/2arm,coresight-dynamic-replicatorarm,primecell`b -apb_pclkin-portsportendpointaPZOout-portsportendpointaQZtpda@10b08000"2qcom,coresight-tpdaarm,primecellb -apb_pclkin-ports port@0endpointaRZXport@1endpointaSZYport@2endpointaTZZport@3endpointaUZ[port@4endpointaVZ\out-portsportendpointaWZKtpdm@10b09000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ + out-portsportendpointaXZRtpdm@10b0a000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ + out-portsportendpointaYZStpdm@10b0b000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ + out-portsportendpointaZZTtpdm@10b0c000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ + out-portsportendpointa[ZUtpdm@10b0d000"2qcom,coresight-tpdmarm,primecellb -apb_pclk =  S out-portsportendpointa\ZVtpdm@10b20000"2qcom,coresight-tpdmarm,primecellb -apb_pclk =  S  &disabledout-portsportendpointa]Z^tpda@10b23000"2qcom,coresight-tpdaarm,primecell0b -apb_pclk &disabledin-portsportendpointa^Z]out-portsportendpointa_Z`funnel@10b24000+2arm,coresight-dynamic-funnelarm,primecell@b -apb_pclk &disabledin-portsportendpointa`Z_out-portsportendpointaaZJtpdm@10c08000"2qcom,coresight-tpdmarm,primecellb -apb_pclk =  S out-portsportendpointabZcfunnel@10c0b000+2arm,coresight-dynamic-funnelarm,primecellb -apb_pclkin-ports port@4endpointacZbout-portsportendpointadZttpdm@10c28000"2qcom,coresight-tpdmarm,primecell€b -apb_pclk =  S out-portsportendpointaeZktpdm@10c29000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ + out-portsportendpointafZltpda@10c2b000"2qcom,coresight-tpdaarm,primecell°b -apb_pclkin-ports port@4endpointagZAport@13endpointahZ>port@14endpointaiZBport@15endpointajZ=port@1aendpointakZeport@1bendpointalZfout-portsportendpointamZnfunnel@10c2c000+2arm,coresight-dynamic-funnelarm,primecellb -apb_pclkin-ports port@0endpointanZmport@4endpointaoZzport@5endpointapZout-portsportendpointaqZ7tpdm@10c38000"2qcom,coresight-tpdmarm,primecellÀb -apb_pclk @ + out-portsportendpointarZvtpdm@10c39000"2qcom,coresight-tpdmarm,primecellÐb -apb_pclk @ + out-portsportendpointasZwtpda@10c3c000"2qcom,coresight-tpdaarm,primecellb -apb_pclkin-ports port@4endpointatZdport@fendpointauZ<port@10endpointavZrport@11endpointawZsout-portsportendpointaxZyfunnel@10c3d000+2arm,coresight-dynamic-funnelarm,primecellb -apb_pclkin-portsportendpointayZxout-portsportendpointazZotpdm@10cc1000"2qcom,coresight-tpdmarm,primecellb -apb_pclk @ +  =  S  &disabledout-portsportendpointa{Z|tpda@10cc4000"2qcom,coresight-tpdaarm,primecell@b -apb_pclkin-ports port@2endpointa|Z{out-portsportendpointa}Z~funnel@10cc5000+2arm,coresight-dynamic-funnelarm,primecellPb -apb_pclkin-portsportendpointa~Z}out-portsportendpointaZ5funnel@10d04000+2arm,coresight-dynamic-funnelarm,primecell@b -apb_pclkin-ports port@6endpointaZout-portsportendpointaZptpdm@10d08000"2qcom,coresight-tpdmarm,primecellЀb -apb_pclk   + out-portsportendpointaZtpdm@10d09000"2qcom,coresight-tpdmarm,primecellАb -apb_pclk   + out-portsportendpointaZtpdm@10d0a000"2qcom,coresight-tpdmarm,primecellРb -apb_pclk   + out-portsportendpointaZtpdm@10d0b000"2qcom,coresight-tpdmarm,primecellаb -apb_pclk   + out-portsportendpointaZtpdm@10d0c000"2qcom,coresight-tpdmarm,primecellb -apb_pclk   + out-portsportendpointaZtpdm@10d0d000"2qcom,coresight-tpdmarm,primecellb -apb_pclk   + out-portsportendpointaZtpdm@10d0e000"2qcom,coresight-tpdmarm,primecellb -apb_pclk   + out-portsportendpointaZtpdm@10d0f000"2qcom,coresight-tpdmarm,primecellb -apb_pclk   + out-portsportendpointaZtpda@10d12000"2qcom,coresight-tpdaarm,primecell b -apb_pclkin-ports port@0endpointaZport@1endpointaZport@2endpointaZport@3endpointaZport@4endpointaZport@5endpointaZport@6endpointaZport@7endpointaZout-portsportendpointaZfunnel@10d13000+2arm,coresight-dynamic-funnelarm,primecell0b -apb_pclkin-portsportendpointaZout-portsportendpointaZiommu@1500000012qcom,x1e80100-smmu-500qcom,smmu-500arm,mmu-500Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYIVNZ=iommu@15400000 2arm,smmu-v3@I$eventqgerrorcmdq-syncN&okayvedZinterrupt-controller@17000000 2arm,gic-v3 0   e | Zmsi-controller@170400002arm,gic-v3-its  Zwatchdog@17410000%2qcom,apss-wdt-x1e80100qcom,kpss-wdtAb3 &okayvedZmailbox@174300002qcom,x1e80100-cpucp-mbox C Z#rsc@175000002qcom,rpmh-rsc0PQR:drv-0drv-1drv-2$    apps_rsc-Zbcm-voter2qcom,bcm-voterZ&clock-controller2qcom,x1e80100-rpmh-clkb-xoMZpower-controller2qcom,x1e80100-rpmhpdsZ<opp-table2operating-points-v2Zopp-16Zopp-480Zopp-524Zopp-568Zopp-60<Zopp-64@Z/opp-80PZopp-128Z0opp-144Zopp-192Zopp-256Zopp-320@Zopp-336PZopp-384Zopp-416Zregulators-02qcom,pm8550-rpmh-regulators b     / A R c r bob1 vreg_bob1 - opp-1q@opp-2|opp-3opp-4Ȁopp-5`@pmu@240b6400*2qcom,x1e80100-cpu-bwmonqcom,sdm845-bwmon$ d Eq@@ ssystem-cache-controller@250000002qcom,x1e80100-llcc% % %@ %` % % % % & & :llcc0_basellcc1_basellcc2_basellcc3_basellcc4_basellcc5_basellcc6_basellcc7_basellcc_broadcast_basellcc_broadcast_and_base  remoteproc@32300000 = 2qcom,x1e80100-cdsp-pas20@HB#wdogfatalreadyhandoverstop-ackb-xo<< <  cxmxcnspq!@izstop&okay]qcom/x1e80100/microsoft/Romulus/qccdsp8380.mbnqcom/x1e80100/microsoft/Romulus/cdsp_dtbs.elfZglink-edgeH1 1cdspufastrpc 2qcom,fastrpcfastrpcglink-apps-dspcdsp compute-cb@12qcom,fastrpc-compute-cb =  Ncompute-cb@22qcom,fastrpc-compute-cb =  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criticalmem-thermali tripstrip-point0y_hotmem-criticaly8 criticalvideo-thermali tripstrip-point0y_hotvideo-criticaly8 criticalaoss1-thermalitripstrip-point0y_hotaoss0-criticaly8 criticalcpu1-0-top-thermalitripscpu-criticaly8 criticalcpu1-0-btm-thermalitripscpu-criticaly8 criticalcpu1-1-top-thermalitripscpu-criticaly8 criticalcpu1-1-btm-thermalitripscpu-criticaly8 criticalcpu1-2-top-thermalitripscpu-criticaly8 criticalcpu1-2-btm-thermalitripscpu-criticaly8 criticalcpu1-3-top-thermalitripscpu-criticaly8 criticalcpu1-3-btm-thermalitripscpu-criticaly8 criticalcpuss1-top-thermali tripscpuss2-criticaly8 criticalcpuss1-btm-thermali tripscpuss2-criticaly8 criticalaoss2-thermalitripstrip-point0y_hotaoss0-criticaly8 criticalcpu2-0-top-thermaliZtripscpu-criticaly8 criticalcpu2-0-btm-thermaliZtripscpu-criticaly8 criticalcpu2-1-top-thermaliZtripscpu-criticaly8 criticalcpu2-1-btm-thermaliZtripscpu-criticaly8 criticalcpu2-2-top-thermaliZtripscpu-criticaly8 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criticalpm8550-thermalditripstrip0yspassivetrip1y8hotpm8550ve-2-thermalditripstrip0yspassivetrip1y8hotpmc8380-3-thermalditripstrip0yspassivetrip1y8hotpmc8380-4-thermalditripstrip0yspassivetrip1y8hotpmc8380-5-thermalditripstrip0yspassivetrip1y8hotpmc8380-6-thermaldiZtripstrip0yspassivetrip1y8hotpm8550ve-8-thermalditripstrip0yspassivetrip1y8hotpm8550ve-9-thermalditripstrip0yspassivetrip1y8hotpm8010-thermalditripstrip0yspassivetrip1y8hotaliases$/soc@0/geniqup@bc0000/serial@b88000!/soc@0/geniqup@bc0000/i2c@b80000!/soc@0/geniqup@bc0000/i2c@b8c000!/soc@0/geniqup@bc0000/i2c@b90000!/soc@0/geniqup@bc0000/i2c@b94000!/soc@0/geniqup@bc0000/i2c@b9c000audio-codec2qcom,wcd9385-codec w@w@ w@#w@ ;$I     bP [edefaultZbacklight2pwm-backlight LK@  "[edefaultZgpio-keys 2gpio-keys[edefaultswitch-lid  g H'leds 2gpio-ledsedefault[led-camera-indicatorwhite:camera-indicator indicator; AnoneWoffepmic-glink@2qcom,x1e80100-pmic-glinkqcom,sm8550-pmic-glinkqcom,pmic-glink uy{connector@02usb-c-connectordualdualports port@0endpointaZport@1endpointaZport@2endpointaZconnector@12usb-c-connectordualdualports port@0endpointaZport@1endpointaZport@2endpointaZregulator-edp-3p32regulator-fixed VREG_EDP_3P3 2Z 2Z F[edefaultZregulator-rtmr0-1p152regulator-fixed VREG_RTMR0_1P15 0 0 $[edefaultZregulator-rtmr0-1p82regulator-fixed VREG_RTMR0_1P8 w@ w@ '[edefaultZregulator-rtmr0-3p32regulator-fixed VREG_RTMR0_3P3 2Z 2Z  [edefaultZregulator-rtmr1-1p152regulator-fixed VREG_RTMR1_1P15 0 0 [edefaultZregulator-rtmr1-1p82regulator-fixed VREG_RTMR1_1P8 w@ w@ [edefaultZregulator-rtmr1-3p32regulator-fixed VREG_RTMR1_3P3 2Z 2Z [edefaultZregulator-nvme2regulator-fixed VREG_NVME_3P3 2Z 2Z [edefaultZregulator-vph-pwr2regulator-fixed vph_pwr 8u  8u  Zregulator-wcn-0p952regulator-fixed VREG_WCN_0P95 ~ ~Zregulator-wcn-1p92regulator-fixed VREG_WCN_1P9  Zregulator-wcn-3p32regulator-fixed VREG_WCN_3P3 2Z 2Z [edefaultZsound2qcom,x1e80100-sndcard,X1E80100-RomulusSpkrLeft INWSA WSA_SPK1 OUTSpkrRight INWSA WSA_SPK2 OUTIN1_HPHLHPHL_OUTIN2_HPHRHPHR_OUTAMIC2MIC BIAS2VA DMIC0MIC BIAS3VA DMIC1MIC BIAS3VA DMIC0VA MIC BIAS3VA DMIC1VA MIC BIAS3TX SWR_INPUT1ADC2_OUTPUTva-dai-link VA Capturecpuncodecplatformwcd-capture-dai-link WCD Capturecpuxcodecplatformwcd-playback-dai-link WCD Playbackcpuqcodecplatformwsa-dai-link WSA Playbackcpuicodecplatformwcn7850-pmu2qcom,wcn7850-pmu^ u t[edefaultregulatorsldo0 vreg_pmu_rfa_cmnZyldo1 vreg_pmu_aon_0p59Zvldo2 vreg_pmu_wlcx_0p8Zwldo3 vreg_pmu_wlmx_0p85Zxldo4 vreg_pmu_btcmx_0p85Zldo5 vreg_pmu_rfa_0p8Zzldo6 vreg_pmu_rfa_1p2Z{ldo7 vreg_pmu_rfa_1p8Z|ldo8 vreg_pmu_pcie_0p9Zldo9 vreg_pmu_pcie_1p8Z__symbols__#/clocks/xo-board,/clocks/sleep-clk6/clocks/bi-tcxo-div2-clkC/clocks/bi-tcxo-ao-div2-clk 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3)/audio-codec 3/backlight.31/pmic-glink/connector@0/ports/port@0/endpoint.3F/pmic-glink/connector@0/ports/port@1/endpoint.3[/pmic-glink/connector@0/ports/port@2/endpoint.3u/pmic-glink/connector@1/ports/port@0/endpoint.3/pmic-glink/connector@1/ports/port@1/endpoint.3/pmic-glink/connector@1/ports/port@2/endpoint3/regulator-edp-3p33/regulator-rtmr0-1p153/regulator-rtmr0-1p83/regulator-rtmr0-3p33/regulator-rtmr1-1p154/regulator-rtmr1-1p84/regulator-rtmr1-3p34"/regulator-nvme4,/regulator-vph-pwr44/regulator-wcn-0p954B/regulator-wcn-1p94O/regulator-wcn-3p34\/wcn7850-pmu/regulators/ldo04m/wcn7850-pmu/regulators/ldo14/wcn7850-pmu/regulators/ldo24/wcn7850-pmu/regulators/ldo34/wcn7850-pmu/regulators/ldo44/wcn7850-pmu/regulators/ldo54/wcn7850-pmu/regulators/ldo64/wcn7850-pmu/regulators/ldo74/wcn7850-pmu/regulators/ldo84/wcn7850-pmu/regulators/ldo9 interrupt-parent#address-cells#size-cellsmodelcompatibleclock-frequency#clock-cellsphandleclocksclock-multclock-divdevice_typeregenable-methodnext-level-cachepower-domainspower-domain-names#cooling-cellscache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usremote-endpointinterconnectsqcom,dload-modemboxesmbox-namesshmem#power-domain-cells#interconnect-cellsqcom,bcm-votersinterruptsdomain-idle-statesrangesno-maphwlockssizereusablelinux,cma-defaultopp-hzrequired-oppsinterrupts-extendedqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#mbox-cellsdma-channelsdma-channel-mask#dma-cellsiommusstatusclock-namesinterconnect-namesdmasdma-namespinctrl-0pinctrl-namesoperating-points-v2max-speedvddaon-supplyvddwlcx-supplyvddwlmx-supplyvddrfacmn-supplyvddrfa0p8-supplyvddrfa1p2-supplyvddrfa1p8-supplycurrent-speedreset-gpiosvdd-supplyvdd33-supplyvdd33-cap-supplyvddar-supplyvddat-supplyvddio-supplyretimer-switchorientation-switchvdd3v3-supplyvdd1v8-supply#phy-cellsinterrupt-names#qcom,sensors#thermal-sensor-cellsresetsvdda12-supplyphysreset-namesmode-switchvdda-phy-supplyvdda-pll-supplyreg-namesbus-rangedma-coherentlinux,pci-domainnum-lanesinterrupt-map-maskinterrupt-mapassigned-clocksassigned-clock-rateseq-presets-8gtseq-presets-16gtsmax-link-speedopp-peak-kBpsopp-levelwake-gpiosclock-output-namesmsi-mapvddpe-3v3-supplyqcom,4ln-config-selvddpcie0p9-supplyvddpcie1p8-supplylanes-per-directionphy-namesqcom,eeqcom,controlled-remotelynum-channelsqcom,num-ees#hwlock-cellsqcom,gmunvmem-cellsnvmem-cell-namesmemory-regionfirmware-nameqcom,opp-acd-levelopp-supported-hwqcom,qmp#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-nameslabelqcom,glink-channelsqcom,non-secure-domainqcom,domainqcom,intents#sound-dai-cellsqcom,protection-domainsound-name-prefixqcom,din-portsqcom,dout-portsqcom,ports-sintervalqcom,ports-offset1qcom,ports-offset2qcom,ports-hstartqcom,ports-hstopqcom,ports-word-lengthqcom,ports-block-pack-modeqcom,ports-block-group-countqcom,ports-lane-controlqcom,rx-port-mappingvdd-1p8-supplyvdd-io-supplyqcom,port-mappingqcom,ports-sinterval-lowqcom,tx-port-mappingqcom,dmic-sample-ratevdd-micb-supplygpio-controller#gpio-cellsgpio-rangespinsfunctiondrive-strengthslew-ratebias-disablebias-bus-holdoutput-highinput-enableoutput-lowqcom,dll-configqcom,ddr-configbus-widthwakeup-sourcesnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,usb3_lpm_capablesnps,dis-u1-entry-quirksnps,dis-u2-entry-quirkqcom,select-utmi-as-pipe-clkmaximum-speeddr_modeassigned-clock-parentsdata-laneslink-frequenciesbacklightpower-supplyqcom,pdc-rangesqcom,channellinux,codeqcom,no-alarmqcom,uefi-rtc-infobits#pwm-cellspower-sourceinput-disableoutput-enablevdd18-supplyvdd3-supplywakeup-parentgpio-reserved-rangesbias-pull-upqcom,cmb-element-bitsqcom,cmb-msrs-numqcom,dsb-element-bitsqcom,dsb-msrs-num#redistributor-regionsredistributor-stridemsi-controller#msi-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-bob1-supplyvdd-bob2-supplyvdd-l1-l4-l10-supplyvdd-l2-l13-l14-supplyvdd-l5-l16-supplyvdd-l6-l7-supplyvdd-l8-l9-supplyvdd-l12-supplyvdd-l15-supplyvdd-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onvdd-l1-supplyvdd-l2-supplyvdd-l3-supplyvdd-s4-supplyvdd-s1-supplyvdd-s2-supplyvdd-s5-supplyframe-numberthermal-sensorstemperaturehysteresispolling-delay-passivetripcooling-deviceserial0i2c0i2c3i2c4i2c5i2c7qcom,micbias1-microvoltqcom,micbias2-microvoltqcom,micbias3-microvoltqcom,micbias4-microvoltqcom,mbhc-buttons-vthreshold-microvoltqcom,mbhc-headset-vthreshold-microvoltqcom,mbhc-headphone-vthreshold-microvoltqcom,rx-deviceqcom,tx-devicevdd-buck-supplyvdd-rxtx-supplyvdd-mic-bias-supplypwmsenable-gpioslinux,input-typewakeup-event-actioncolorlinux,default-triggerdefault-statepanic-indicatororientation-gpiospower-roledata-rolegpioenable-active-highregulator-boot-onvin-supplyaudio-routinglink-namesound-daivdddig-supplywlan-enable-gpiosbt-enable-gpiosxo_boardsleep_clkbi_tcxo_div2bi_tcxo_ao_div2cpu0l2_0cpu1cpu2cpu3cpu4l2_1cpu5cpu6cpu7cpu8l2_2cpu9cpu10cpu11cpu_map_cluster2cluster_c4cluster_cl4cluster_cl5eud_inscmscmi_dvfsclk_virtmc_virtcpu_pd0cpu_pd1cpu_pd2cpu_pd3cpu_pd4cpu_pd5cpu_pd6cpu_pd7cpu_pd8cpu_pd9cpu_pd10cpu_pd11cluster_pd0cluster_pd1cluster_pd2system_pdgunyah_hyp_memhyp_elf_package_memncc_memcpucp_log_memcpucp_memtags_memxbl_dtlog_memxbl_ramdump_memaop_image_memaop_cmd_db_memaop_config_memtme_crash_dump_memtme_log_memuefi_log_memsecdata_apss_mempdp_ns_shared_memgpu_prr_memtpm_control_memusb_ucsi_shared_mempld_pep_mempld_gmu_mempld_pdp_memtz_stat_memxbl_tmp_buffer_memadsp_rpc_remote_heap_memspu_secure_shared_memory_memadsp_boot_dtb_memspss_region_memadsp_boot_memvideo_memadspslpi_memq6_adsp_dtb_memcdsp_memq6_cdsp_dtb_memgpu_microcode_memcvp_memcamera_memav1_encoder_memwpss_memq6_wpss_dtb_memxbl_sc_memqtee_memta_memtags_mem1llcc_lpi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ddr_lpi_tpda_outddr_lpi_funnel_in0ddr_lpi_funnel_outmm_tpdm_outmm_funnel_in4mm_funnel_outdlct1_tpdm_outipcc_tpdm_outdlct1_tpda_in4dlct1_tpda_in19dlct1_tpda_in20dlct1_tpda_in21dlct1_tpda_in26dlct1_tpda_in27dlct1_tpda_outdlct1_funnel_in0dlct1_funnel_in4dlct1_funnel_in5dlct1_funnel_outdlct2_tpdm0_outdlct2_tpdm1_outdlct2_tpda_in4dlct2_tpda_in15dlct2_tpda_in16dlct2_tpda_in17dlct2_tpda_outdlct2_funnel_in0dlct2_funnel_outtmess_tpdm1_outtmess_tpda_in2tmess_tpda_outtmess_funnel_in0tmess_funnel_outddr_funnel0_in6ddr_funnel0_outllcc0_tpdm_outllcc1_tpdm_outllcc2_tpdm_outllcc3_tpdm_outllcc4_tpdm_outllcc5_tpdm_outllcc6_tpdm_outllcc7_tpdm_outllcc_tpda_in0llcc_tpda_in1llcc_tpda_in2llcc_tpda_in3llcc_tpda_in4llcc_tpda_in5llcc_tpda_in6llcc_tpda_in7llcc_tpda_outddr_funnel1_in0ddr_funnel1_outapps_smmupcie_smmuintcgic_itsapss_watchdogcpucp_mboxapps_rscapps_bcm_voterrpmhccrpmhpdrpmhpd_opp_tablerpmhpd_opp_retrpmhpd_opp_min_svsrpmhpd_opp_low_svs_d2rpmhpd_opp_low_svs_d1rpmhpd_opp_low_svs_d0rpmhpd_opp_low_svsrpmhpd_opp_low_svs_l1rpmhpd_opp_svsrpmhpd_opp_svs_l0rpmhpd_opp_svs_l1rpmhpd_opp_nomrpmhpd_opp_nom_l1rpmhpd_opp_nom_l2rpmhpd_opp_turborpmhpd_opp_turbo_l1vreg_bob1vreg_bob2vreg_l1bvreg_l2bvreg_l4bvreg_l5bvreg_l6bvreg_l7bvreg_l8bvreg_l9bvreg_l10bvreg_l12bvreg_l13bvreg_l14bvreg_l15bvreg_l16bvreg_l17bvreg_s4cvreg_l1cvreg_l2cvreg_l3cvreg_l1dvreg_l2dvreg_l3dvreg_l2evreg_l3evreg_s1fvreg_l1fvreg_l2fvreg_l3fvreg_s1ivreg_s2ivreg_l1ivreg_l2ivreg_l3ivreg_s5jvreg_l1jvreg_l2jvreg_l3jsramcpu_scp_lpri0cpu_scp_lpri1sbsa_watchdogqfpromgpu_speed_binllcc_bwmon_opp_tablebwmon_cluster0bwmon_cluster2cpu_bwmon_opp_tableremoteproc_cdspthermal_zonesthermal_cpu2_0_topthermal_cpu2_0_btmthermal_cpu2_1_topthermal_cpu2_1_btmthermal_cpu2_2_topthermal_cpu2_2_btmthermal_cpu2_3_topthermal_cpu2_3_btmthermal_cpuss2_topthermal_cpuss2_btmthermal_aoss3thermal_nsp0thermal_nsp1thermal_nsp2thermal_nsp3thermal_gpuss_0gpuss0_alert0thermal_gpuss_1gpuss1_alert0thermal_gpuss_2gpuss2_alert0thermal_gpuss_3gpuss3_alert0thermal_gpuss_4gpuss4_alert0thermal_gpuss_5gpuss5_alert0thermal_gpuss_6gpuss6_alert0thermal_gpuss_7gpuss7_alert0thermal_camera0thermal_camera1pmc8380_6_thermalwcd938xpmic_glink_ss0_hs_inpmic_glink_ss0_ss_inpmic_glink_ss0_con_sbu_inpmic_glink_ss1_hs_inpmic_glink_ss1_ss_inpmic_glink_ss1_con_sbu_invreg_edp_3p3vreg_rtmr0_1p15vreg_rtmr0_1p8vreg_rtmr0_3p3vreg_rtmr1_1p15vreg_rtmr1_1p8vreg_rtmr1_3p3vreg_nvmevph_pwrvreg_wcn_0p95vreg_wcn_1p9vreg_wcn_3p3vreg_pmu_rfa_cmnvreg_pmu_aon_0p59vreg_pmu_wlcx_0p8vreg_pmu_wlmx_0p85vreg_pmu_btcmx_0p85vreg_pmu_rfa_0p8vreg_pmu_rfa_1p2vreg_pmu_rfa_1p8vreg_pmu_pcie_0p9vreg_pmu_pcie_1p8iommu-map