Ðþí  ê   8  ÞÌ   (            N  Þ”                                                                   %   ,lunzn,fastrhino-r66s rockchip,rk3568             7Lunzn FastRhino R66S       aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             �/serial@fe650000             ‰/serial@fe660000             ‘/serial@fe670000             ™/serial@fe680000             ¡/serial@fe690000             ©/serial@fe6a0000             ±/serial@fe6b0000             ¹/serial@fe6c0000             Á/serial@fe6d0000             É/spi@fe610000            Î/spi@fe620000            Ó/spi@fe630000            Ø/spi@fe640000            Ý/mmc@fe2b0000         cpus                                 cpu@0            âcpu          ,arm,cortex-a55           î                 ò                ù           psci              €         #   @        5   €        B  €         O   @        a   €        n                      “           ž   
      cpu@100          âcpu          ,arm,cortex-a55           î                ò                ù           psci              €         #   @        5   €        B  €         O   @        a   €        n                      “           ž         cpu@200          âcpu          ,arm,cortex-a55           î                ò                ù           psci              €         #   @        5   €        B  €         O   @        a   €        n                      “           ž         cpu@300          âcpu          ,arm,cortex-a55           î                ò                ù           psci              €         #   @        5   €        B  €         O   @        a   €        n                      “           ž            l3-cache             ,cache           ¦            ²                   %   @        7           ž         display-subsystem            ,rockchip,display-subsystem          À         	  Ædisabled          firmware       scmi             ,arm,scmi-smc            Í‚          Ø                                protocol@14          î           Þ           ž               hdmi-sound           ,simple-audio-card           ëHDMI            i2s                  	  Ædisabled       simple-audio-card,codec         5         simple-audio-card,cpu           5   	         pmu          ,arm,cortex-a55-pmu        0  ?       ä          å          æ          ç           J   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   ]   shmem@10f000             ,arm,scmi-shmem           î     ð                 d        ž            timer            ,arm,armv8-timer       0  ?                                 
            k      xin24m           ,fixed-clock         ‚n6         ’xin24m          Þ            ž         xin32k           ,fixed-clock         ‚  €         ’xin32k          ¥           ¯default         Þ          sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci           î    ü@                  ò      ›      œ      �        ½sata pmalive rxoob          ?       _           É           Û                                      	  Ædisabled       sata-port@0          î            é @          ö            	  ûsata-phy                                     sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci           î    ü€                  ò             ¡      ¢        ½sata pmalive rxoob          ?       `           É           Û                                      	  Ædisabled       sata-port@0          î            é @          ö            	  ûsata-phy                                     usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3           î    üÀ       @          ?       ©            ò      ¦      §      ¥        ½ref_clk suspend_clk bus_clk         #host          
  +utmi_wide           Û              4      ”         ;        Æokay            ö                 ûusb2-phy usb3-phy           T         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3           î    ý        @          ?       ª            ò      ©      ª      ¨        ½ref_clk suspend_clk bus_clk         #host            ö                 ûusb2-phy usb3-phy         
  +utmi_wide           Û              4      •         ;        Æokay          interrupt-controller@fd400000            ,arm,gic-v3            î    ý@             ýF                 ?      	            [        p           �    ýA          ‹  (            –         ]                                  ¥        ž      msi-controller@fd440000          ,arm,gic-v3-its           î    ýD                  ¥         –        µ           ž   U         usb@fd800000             ,generic-ehci             î    ý€                 ?       ‚            ò      ½      ¾      ¼        ö           ûusb       	  Ædisabled          usb@fd840000             ,generic-ohci             î    ý„                 ?       ƒ            ò      ½      ¾      ¼        ö           ûusb       	  Ædisabled          usb@fd880000             ,generic-ehci             î    ýˆ                 ?       …            ò      ¿      À      ¼        ö           ûusb       	  Ædisabled          usb@fd8c0000             ,generic-ohci             î    ýŒ                 ?       †            ò      ¿      À      ¼        ö           ûusb       	  Ædisabled          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd             î    ýÂ                 ž   S   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           Æokay            À           Î           Ü           ê           ø                                 "           0            syscon@fdc50000          î    ýÅ                   ,rockchip,rk3568-pipe-grf syscon         ž   ¡      syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd            î    ýÆ                 ž         syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon          î    ýÈ                 ž   ¢      syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon          î    ýÉ                 ž   £      syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon           î    ýÊ        €         ž   ¤      syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon           î    ýÊ€       €         ž   ¦      clock-controller@fdd00000            ,rockchip,rk3568-pmucru           î    ýÐ                 Þ           >           ž         clock-controller@fdd20000            ,rockchip,rk3568-cru          î    ýÒ                  ò           ½xin24m          Þ           >           K                          [  € G†Œ ëÂ         p              ‡           ž         i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    ýÔ                 ?       .            ò            -      	  ½i2c pclk            ¥            ¯default                                   Æokay       regulator@1c             ,tcs,tcs4525          î           ”           ±vdd_cpu          À         Ô        æ 5         þ Œ0          ü        +   !        ž      regulator-state-mem          6         pmic@20          ,rockchip,rk809           î                 "        ?              Þ           ¯default         ¥   #         O        g   $        s   $           $        ‹   $        —   $        £   $        ¯   $        »   $        Ç   $         Ó   regulators     DCDC_REG1         
  ±vdd_logic            À         Ô        á           æ ¡         þ ™p          q   regulator-state-mem          6         DCDC_REG2           ±vdd_gpu          À        á           æ ¡         þ ™p          q        ž   F   regulator-state-mem          6         DCDC_REG3           ±vcc_ddr          À         Ô        á      regulator-state-mem          ø         DCDC_REG4           ±vdd_npu         á           æ ¡         þ ™p          q   regulator-state-mem          6         DCDC_REG5           ±vcc_1v8          À         Ô        æ w@        þ w@        ž      regulator-state-mem          6         LDO_REG1            ±vdda0v9_image           æ ~ð        þ ~ð   regulator-state-mem          6         LDO_REG2          	  ±vdda_0v9             À         Ô        æ »         þ »    regulator-state-mem          6         LDO_REG3            ±vdda0v9_pmu          À         Ô        æ »         þ »    regulator-state-mem          ø         »          LDO_REG4            ±vccio_acodec             À        æ 2Z         þ 2Z    regulator-state-mem          6         LDO_REG5          	  ±vccio_sd            æ w@        þ 2Z         ž      regulator-state-mem          6         LDO_REG6            ±vcc3v3_pmu           À         Ô        æ 2Z         þ 2Z         ž      regulator-state-mem          ø         2Z          LDO_REG7          	  ±vcca_1v8             À         Ô        æ w@        þ w@        ž   ”   regulator-state-mem          6         LDO_REG8            ±vcca1v8_pmu          À         Ô        æ w@        þ w@   regulator-state-mem          ø         w@         LDO_REG9            ±vcca1v8_image           æ ~ð        þ w@   regulator-state-mem          6         ~ð         SWITCH_REG1         ±vcc_3v3          À         Ô        ž      regulator-state-mem          6         SWITCH_REG2       
  ±vcc3v3_sd           ž   Z   regulator-state-mem          6                  serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    ýÕ                 ?       t            ò            ,        ½baudclk apb_pclk            ,   %       %           ¥   &        ¯default         1           >         	  Ædisabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý×                  ò            0      	  ½pwm pclk            ¥   '        ¯default         H         	  Ædisabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý×                 ò            0      	  ½pwm pclk            ¥   (        ¯default         H         	  Ædisabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý×                  ò            0      	  ½pwm pclk            ¥   )        ¯default         H         	  Ædisabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    ý× 0                ò            0      	  ½pwm pclk            ¥   *        ¯default         H         	  Ædisabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd            î    ýÙ            power-controller          !   ,rockchip,rk3568-power-controller            S                                     ž      power-domain@7           î            ò                    g   +        S          power-domain@8           î            ò      Ì      Í        g   ,   -   .        S          power-domain@9           î   	         ò      Ú      Û      Ü        g   /   0   1        S          power-domain@10          î   
         ò      ñ      ò        g   2   3   4   5   6   7        S          power-domain@11          î            ò      í        g   8        S          power-domain@13          ò              î           g   9        S          power-domain@14          î            ò             g   :   ;   <        S          power-domain@15          î            ò               g   =   >   ?   @   A   B   C   D        S                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost            î    ýæ        @       $  ?       (          )          '           njob mmu gpu          ò                    ½gpu bus          ù           Û              Æokay               E        ~   F        ž   ‘      video-codec@fdea0400             ,rockchip,rk3568-vpu          î    ýê                 ?       ‹           nvdpu             ò      î      ï      
  ½aclk hclk           Š   G        Û            iommu@fdea0800           ,rockchip,rk3568-iommu            î    ýê        @        ?       Š           ½aclk iface           ò      î      ï        Û              ‘            ž   G      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga          î    ýë        €        ?       Z            ò      ó      ô      õ        ½aclk hclk sclk          4     &     $     %        žcore axi ahb            Û      
      video-codec@fdee0000             ,rockchip,rk3568-vepu             î    ýî                 ?       @            ò      ý      þ      
  ½aclk hclk           Š   H        Û      
      iommu@fdee0800           ,rockchip,rk3568-iommu            î    ýî        @        ?       ?            ò      ý      þ        ½aclk iface          Û      
        ‘            ž   H      video-capture@fdfe0000           ,rockchip,rk3568-vicap            î    ýþ                 ?       ’           K      Ð        [á£           ò      Î      Ï      Ð      Ñ        ½aclk hclk dclk iclk         Š   I        Û            (  4      ÷      ø      ù      û      ú        žarst hrst drst prst irst            ‡         	  Ædisabled       ports                                port@0           î          port@1           î               iommu@fdfe0800           ,rockchip,rk3568-iommu            î    ýþ                ?       ’            ò      Î      Ï        ½aclk iface          ‘            Û               ª      	  Ædisabled            ž   I      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc          î    þ         @         ?       d             ò      Á      Â     Ž     �        ½biu ciu ciu-drive ciu-sample            Å           ÐðÑ€        4      ë        žreset         	  Ædisabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a            î    þ                 ?                             nmacirq eth_wake_irq       @   ò     †     ‰     ‰      Ç      Ã      Ä     ‰      È      W  ½stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          4      ì      
  žstmmaceth           ‡           Þ   J         î        ÿ   K           L         %      	  Ædisabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config           .                                 8           H           ž   J      rx-queues-config            X           ž   K   queue0           tx-queues-config            n           ž   L   queue0              vop@fe040000              î    þ        0     þ@                „vop gamma-lut           ?       ”         (   ò      Ý      Þ      ß      à      á      %  ½aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            Š   M        Û      	        ‡           Æokay             ,rockchip,rk3568-vop         K      ß      à        p               ports                                     ž      port@0           î                                    port@1           î                                   port@2           î                                         iommu@fe043e00           ,rockchip,rk3568-iommu             î    þ>            þ?                ?       ”            ò      Ý      Þ        ½aclk iface          ‘            Û      	        Æokay            ž   M      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi            î    þ                 ?       D           ½pclk             ò      è        ûdphy            ö   N        Û      	        žapb         4             ‡         	  Ædisabled       ports                                port@0           î          port@1           î               dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi            î    þ                 ?       E           ½pclk             ò      é        ûdphy            ö   O        Û      	        žapb         4             ‡         	  Ædisabled       ports                                port@0           î          port@1           î               hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi          î    þ
                 ?       -         (   ò      æ      ç     “      (      Ú        ½iahb isfr cec ref           ¯default         ¥   P   Q   R        Û      	        1           ‡           Ž          	  Ædisabled            ž      ports                                port@0           î          port@1           î               qos@fe128000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   +      qos@fe138080             ,rockchip,rk3568-qos syscon           î    þ€€                ž   :      qos@fe138100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   ;      qos@fe138180             ,rockchip,rk3568-qos syscon           î    þ�€                ž   <      qos@fe148000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   ,      qos@fe148080             ,rockchip,rk3568-qos syscon           î    þ€€                ž   -      qos@fe148100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   .      qos@fe150000             ,rockchip,rk3568-qos syscon           î    þ                  ž   8      qos@fe158000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   2      qos@fe158100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   3      qos@fe158180             ,rockchip,rk3568-qos syscon           î    þ�€                ž   4      qos@fe158200             ,rockchip,rk3568-qos syscon           î    þ‚                 ž   5      qos@fe158280             ,rockchip,rk3568-qos syscon           î    þ‚€                ž   6      qos@fe158300             ,rockchip,rk3568-qos syscon           î    þƒ                 ž   7      qos@fe180000             ,rockchip,rk3568-qos syscon           î    þ                qos@fe190000             ,rockchip,rk3568-qos syscon           î    þ                  ž   =      qos@fe190280             ,rockchip,rk3568-qos syscon           î    þ€                ž   A      qos@fe190300             ,rockchip,rk3568-qos syscon           î    þ                 ž   B      qos@fe190380             ,rockchip,rk3568-qos syscon           î    þ€                ž   C      qos@fe190400             ,rockchip,rk3568-qos syscon           î    þ                 ž   D      qos@fe198000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   9      qos@fe1a8000             ,rockchip,rk3568-qos syscon           î    þ€                 ž   /      qos@fe1a8080             ,rockchip,rk3568-qos syscon           î    þ€€                ž   0      qos@fe1a8100             ,rockchip,rk3568-qos syscon           î    þ�                 ž   1      dfi@fe230000             ,rockchip,rk3568-dfi          î    þ#                 ?                  Ÿ   S      pcie@fe260000            ,rockchip,rk3568-pcie          0   î   À        @      þ&             ô                  „dbi apb config        <  ?       K          J          I          H          G           nsys pmc msg legacy err          ¬             0   ò      �      ‚      ƒ      „      …      ‡      )  ½aclk_mst aclk_slv aclk_dbi pclk aux pipe             âpci         p           ¶                     `  É                  T                      T                     T                     T           ×            è           ÷                             U                          ö            	  ûpcie-phy            Û            T  ]       ô      ô                ô       ô       à                       @           4      ¡        žpipe                                   	  Ædisabled       legacy-interrupt-controller                      p            [                     ?       H           ž   T         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc          î    þ+        @         ?       b             ò      °      ±     Š     ‹        ½biu ciu ciu-drive ciu-sample            Å           ÐðÑ€        4      Ô        žreset           Æokay            '            1         C         T         _         g         n        ¯default         ¥   V   W   X   Y        {   Z        ‡         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc          î    þ,        @         ?       c             ò      ²      ³     Œ     �        ½biu ciu ciu-drive ciu-sample            Å           ÐðÑ€        4      Ö        žreset         	  Ædisabled          spi@fe300000             ,rockchip,sfc             î    þ0        @         ?       e            ò      x      v        ½clk_sfc hclk_sfc            ¥   [        ¯default       	  Ædisabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc          î    þ1                 ?                  K      {      }        [ëÂ n6       (   ò      |      z      y      {      }        ½core bus axi block timer          	  Ædisabled          rng@fe388000             ,rockchip,rk3568-rng          î    þ8€       @          ò      p      o      	  ½core ahb            4      m        Æokay          efuse@fe38c000           ,rockchip,rk3568-otp          î    þ8À       @           ò      s      q     �      r        ½otp apb_pclk phy sbpi            4     n     l     Ï     m        žotp apb phy sbpi       nvmem-layout             ,fixed-layout                                cpu-code@2           î            cpu-version@8            î              ”            id@a             î   
         cpu-leakage@1a           î            log-leakage@1b           î            npu-leakage@1c           î            gpu-leakage@1d           î                  i2s@fe400000             ,rockchip,rk3568-i2s-tdm          î    þ@                 ?       4           K      =      A        [FÏq FÏq          ò      ?      C      9        ½mclk_tx mclk_rx hclk            ,   \            ™tx          4      P      Q      
  žtx-m rx-m           ‡           Ž          	  Ædisabled            ž   	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm          î    þA                 ?       5           K      E      I        [FÏq FÏq          ò      G      K      :        ½mclk_tx mclk_rx hclk            ,   \      \           ™rx tx           4      R      S      
  žtx-m rx-m           ‡           ¯default       0  ¥   ]   ^   _   `   a   b   c   d   e   f   g   h        Ž          	  Ædisabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm          î    þB                 ?       6           K      M        [FÏq          ò      O      O      ;        ½mclk_tx mclk_rx hclk            ,   \      \           ™tx rx           4      T        žtx-m            ‡           ¯default         ¥   i   j   k   l        Ž          	  Ædisabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm          î    þC                 ?       7            ò      S      W      <        ½mclk_tx mclk_rx hclk            ,   \      \           ™tx rx           4      U      V      
  žtx-m rx-m           ‡           Ž          	  Ædisabled          pdm@fe440000             ,rockchip,rk3568-pdm          î    þD                 ?       L            ò      Z      Y        ½pdm_clk pdm_hclk            ,   \   	        ™rx          ¥   m   n   o   p   q   r        ¯default         4      X        žpdm-m           Ž          	  Ædisabled          spdif@fe460000           ,rockchip,rk3568-spdif            î    þF                 ?       f         
  ½mclk hclk            ò      _      \        ,   \           ™tx          ¯default         ¥   s        Ž          	  Ædisabled          dma-controller@fe530000          ,arm,pl330 arm,primecell          î    þS        @         ?                             £         ò           	  ½apb_pclk            º           ž   %      dma-controller@fe550000          ,arm,pl330 arm,primecell          î    þU        @         ?                             £         ò           	  ½apb_pclk            º           ž   \      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þZ                 ?       /            ò     H     G      	  ½i2c pclk            ¥   t        ¯default                                 	  Ædisabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ[                 ?       0            ò     J     I      	  ½i2c pclk            ¥   u        ¯default                                 	  Ædisabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ\                 ?       1            ò     L     K      	  ½i2c pclk            ¥   v        ¯default                                 	  Ædisabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ]                 ?       2            ò     N     M      	  ½i2c pclk            ¥   w        ¯default                                 	  Ædisabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c          î    þ^                 ?       3            ò     P     O      	  ½i2c pclk            ¥   x        ¯default                                 	  Ædisabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt          î    þ`                 ?       •            ò                
  ½tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þa                 ?       g            ò     R     Q        ½spiclk apb_pclk         ,   %      %           ™tx rx           ¯default         ¥   y   z   {                                	  Ædisabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þb                 ?       h            ò     T     S        ½spiclk apb_pclk         ,   %      %           ™tx rx           ¯default         ¥   |   }   ~                                	  Ædisabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þc                 ?       i            ò     V     U        ½spiclk apb_pclk         ,   %      %           ™tx rx           ¯default         ¥      €   �                                	  Ædisabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi          î    þd                 ?       j            ò     X     W        ½spiclk apb_pclk         ,   %      %           ™tx rx           ¯default         ¥   ‚   ƒ   „                                	  Ædisabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þe                 ?       u            ò                  ½baudclk apb_pclk            ,   %      %           ¥   …        ¯default         1           >         	  Ædisabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þf                 ?       v            ò     #              ½baudclk apb_pclk            ,   %      %           ¥   †        ¯default         1           >           Æokay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þg                 ?       w            ò     '     $        ½baudclk apb_pclk            ,   %      %           ¥   ‡        ¯default         1           >         	  Ædisabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þh                 ?       x            ò     +     (        ½baudclk apb_pclk            ,   %      %   	        ¥   ˆ        ¯default         1           >         	  Ædisabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þi                 ?       y            ò     /     ,        ½baudclk apb_pclk            ,   %   
   %           ¥   ‰        ¯default         1           >         	  Ædisabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þj                 ?       z            ò     3     0        ½baudclk apb_pclk            ,   %      %           ¥   Š        ¯default         1           >         	  Ædisabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þk                 ?       {            ò     7     4        ½baudclk apb_pclk            ,   %      %           ¥   ‹        ¯default         1           >         	  Ædisabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þl                 ?       |            ò     ;     8        ½baudclk apb_pclk            ,   %      %           ¥   Œ        ¯default         1           >         	  Ædisabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart            î    þm                 ?       }            ò     ?     <        ½baudclk apb_pclk            ,   %      %           ¥   �        ¯default         1           >         	  Ædisabled          thermal-zones      cpu-thermal         Å   d        Û  è        é   Ž       trips      cpu_alert0          ù p        	  Ð         épassive         ž   �      cpu_alert1          ù $ø        	  Ð         épassive       cpu_crit            ù s        	  Ð      	   écritical             cooling-maps       map0            	   �      0  	   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            gpu-thermal         Å           Û  è        é   Ž      trips      gpu-threshold           ù p        	  Ð         épassive       gpu-target          ù $ø        	  Ð         épassive         ž   �      gpu-crit            ù s        	  Ð      	   écritical             cooling-maps       map0            	   �        	   ‘ÿÿÿÿÿÿÿÿ               tsadc@fe710000           ,rockchip,rk3568-tsadc            î    þq                 ?       s           K                  [f@ 
®`         ò                  ½tsadc apb_pclk          4     �     ‚     ×        ‡           	$ s        ¯default sleep           ¥   ’        	;   “        	E           Æokay            	[           	r            ž   Ž      saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc            î    þr                 ?       ]            ò                  ½saradc apb_pclk         4     €        žsaradc-apb          	�           Æokay            	Ÿ   ”      pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn                  ò     Z     Y      	  ½pwm pclk            ¥   •        ¯default         H         	  Ædisabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn                 ò     Z     Y      	  ½pwm pclk            ¥   –        ¯default         H         	  Ædisabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn                  ò     Z     Y      	  ½pwm pclk            ¥   —        ¯default         H         	  Ædisabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þn 0                ò     Z     Y      	  ½pwm pclk            ¥   ˜        ¯default         H         	  Ædisabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo                  ò     ]     \      	  ½pwm pclk            ¥   ™        ¯default         H         	  Ædisabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo                 ò     ]     \      	  ½pwm pclk            ¥   š        ¯default         H         	  Ædisabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo                  ò     ]     \      	  ½pwm pclk            ¥   ›        ¯default         H         	  Ædisabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þo 0                ò     ]     \      	  ½pwm pclk            ¥   œ        ¯default         H         	  Ædisabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp                  ò     `     _      	  ½pwm pclk            ¥   �        ¯default         H         	  Ædisabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp                 ò     `     _      	  ½pwm pclk            ¥   ž        ¯default         H         	  Ædisabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp                  ò     `     _      	  ½pwm pclk            ¥   Ÿ        ¯default         H         	  Ædisabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm          î    þp 0                ò     `     _      	  ½pwm pclk            ¥            ¯default         H         	  Ædisabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy           î    þƒ                  ò      "     }              ½ref apb pipe            K      "        [õá         4     Ç        žphy         	«   ¡        	½   ¢        	Ó           Æokay            ž         phy@fe840000             ,rockchip,rk3568-naneng-combphy           î    þ„                  ò      %     ~              ½ref apb pipe            K      %        [õá         4     É        žphy         	«   ¡        	½   £        	Ó         	  Ædisabled            ž         phy@fe870000             ,rockchip,rk3568-csi-dphy             î    þ‡                  ò     y        ½pclk            	Ó            4     º        žapb         ‡         	  Ædisabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy             î    þ…               	  ½ref pclk             ò           z        	Ó            Û      	        žapb         4     »      	  Ædisabled            ž   N      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy             î    þ†               	  ½ref pclk             ò           {        	Ó            Û      	        žapb         4     ¼      	  Ædisabled            ž   O      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy          î    þŠ                  ò              ½phyclk          ’clk_usbphy0_480m            ?       ‡           	Þ   ¤        Þ            Æokay            ž      host-port           	Ó            Æokay            	î   !        ž         otg-port            	Ó            Æokay            	î   ¥        ž            usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy          î    þ‹                  ò              ½phyclk          ’clk_usbphy1_480m            ?       ˆ           	Þ   ¦        Þ          	  Ædisabled       host-port           	Ó          	  Ædisabled            ž         otg-port            	Ó          	  Ædisabled            ž            pinctrl          ,rockchip,rk3568-pinctrl         ‡           Ÿ   S                                  ]        ž   §   gpio@fdd60000            ,rockchip,gpio-bank           î    ýÖ                 ?       !            ò      .               	ù        
	   §                    
            [        p           ž   "      gpio@fe740000            ,rockchip,gpio-bank           î    þt                 ?       "            ò     c     d         	ù        
	   §                    
            [        p         gpio@fe750000            ,rockchip,gpio-bank           î    þu                 ?       #            ò     e     f         	ù        
	   §       @            
            [        p         gpio@fe760000            ,rockchip,gpio-bank           î    þv                 ?       $            ò     g     h         	ù        
	   §       `            
            [        p         gpio@fe770000            ,rockchip,gpio-bank           î    þw                 ?       %            ò     i     j         	ù        
	   §       €            
            [        p         pcfg-pull-up             
!        ž   ª      pcfg-pull-none           
.        ž   ¨      pcfg-pull-none-drv-level-1           
.        
;           ž   ¬      pcfg-pull-none-drv-level-2           
.        
;           ž   «      pcfg-pull-none-drv-level-3           
.        
;           ž   ¯      pcfg-pull-up-drv-level-1             
!        
;           ž   ®      pcfg-pull-up-drv-level-2             
!        
;           ž   ©      pcfg-pull-none-smt           
.         
J        ž   ­      acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
_             ¨             ¨        ž   ¸         can1       can1m0-pins          
_             ¨            ¨        ž   ¹         can2       can2m0-pins          
_            ¨            ¨        ž   º         cif       clk32k     clk32k-out0         
_             ¨        ž            cpu       ebc       edpdp         emmc          eth0          eth1          flash         fspi       fspi-pins         `  
_            ¨            ¨            ¨            ¨            ¨            ¨        ž   [         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
_            ¨        ž   R      hdmitx-scl          
_            ¨        ž   P      hdmitx-sda          
_            ¨        ž   Q         i2c0       i2c0-xfer            
_       	      ­       
      ­        ž             i2c1       i2c1-xfer            
_             ­             ­        ž   t         i2c2       i2c2m0-xfer          
_             ­             ­        ž   u         i2c3       i2c3m0-xfer          
_            ­             ­        ž   v         i2c4       i2c4m0-xfer          
_            ­      
      ­        ž   w         i2c5       i2c5m0-xfer          
_            ­            ­        ž   x         i2s1       i2s1m0-lrckrx           
_            ¨        ž   `      i2s1m0-lrcktx           
_            ¨        ž   _      i2s1m0-sclkrx           
_            ¨        ž   ^      i2s1m0-sclktx           
_            ¨        ž   ]      i2s1m0-sdi0         
_            ¨        ž   a      i2s1m0-sdi1         
_      
      ¨        ž   b      i2s1m0-sdi2         
_      	      ¨        ž   c      i2s1m0-sdi3         
_            ¨        ž   d      i2s1m0-sdo0         
_            ¨        ž   e      i2s1m0-sdo1         
_            ¨        ž   f      i2s1m0-sdo2         
_      	      ¨        ž   g      i2s1m0-sdo3         
_      
      ¨        ž   h         i2s2       i2s2m0-lrcktx           
_            ¨        ž   j      i2s2m0-sclktx           
_            ¨        ž   i      i2s2m0-sdi          
_            ¨        ž   k      i2s2m0-sdo          
_            ¨        ž   l         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
_            ¨        ž   m      pdmm0-clk1          
_            ¨        ž   n      pdmm0-sdi0          
_            ¨        ž   o      pdmm0-sdi1          
_      
      ¨        ž   p      pdmm0-sdi2          
_      	      ¨        ž   q      pdmm0-sdi3          
_            ¨        ž   r         pmic       pmic-int            
_              ª        ž   #         pmu       pwm0       pwm0m0-pins         
_             ¨        ž   '         pwm1       pwm1m0-pins         
_             ¨        ž   (         pwm2       pwm2m0-pins         
_             ¨        ž   )         pwm3       pwm3-pins           
_             ¨        ž   *         pwm4       pwm4-pins           
_             ¨        ž   •         pwm5       pwm5-pins           
_             ¨        ž   –         pwm6       pwm6-pins           
_             ¨        ž   —         pwm7       pwm7-pins           
_             ¨        ž   ˜         pwm8       pwm8m0-pins         
_      	      ¨        ž   ™         pwm9       pwm9m0-pins         
_      
      ¨        ž   š         pwm10      pwm10m0-pins            
_            ¨        ž   ›         pwm11      pwm11m0-pins            
_            ¨        ž   œ         pwm12      pwm12m0-pins            
_            ¨        ž   �         pwm13      pwm13m0-pins            
_            ¨        ž   ž         pwm14      pwm14m0-pins            
_            ¨        ž   Ÿ         pwm15      pwm15m0-pins            
_            ¨        ž             refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
_            ©            ©            ©             ©        ž   V      sdmmc0-clk          
_            ©        ž   W      sdmmc0-cmd          
_            ©        ž   X      sdmmc0-det          
_             ª        ž   Y         sdmmc1        sdmmc2        spdif      spdifm0-tx          
_            ¨        ž   s         spi0       spi0m0-pins       0  
_             ¨             ¨             ¨        ž   {      spi0m0-cs0          
_             ¨        ž   y      spi0m0-cs1          
_             ¨        ž   z         spi1       spi1m0-pins       0  
_            ¨            ¨            ¨        ž   ~      spi1m0-cs0          
_            ¨        ž   |      spi1m0-cs1          
_            ¨        ž   }         spi2       spi2m0-pins       0  
_            ¨            ¨            ¨        ž   �      spi2m0-cs0          
_            ¨        ž         spi2m0-cs1          
_            ¨        ž   €         spi3       spi3m0-pins       0  
_            ¨            ¨      
      ¨        ž   „      spi3m0-cs0          
_            ¨        ž   ‚      spi3m0-cs1          
_            ¨        ž   ƒ         tsadc      tsadc-shutorg           
_             ¨        ž   ’      tsadc-pin           
_              ¨        ž   “         uart0      uart0-xfer           
_             ª             ª        ž   &         uart1      uart1m0-xfer             
_            ª            ª        ž   …         uart2      uart2m0-xfer             
_             ª             ª        ž   †         uart3      uart3m0-xfer             
_             ª            ª        ž   ‡         uart4      uart4m0-xfer             
_            ª            ª        ž   ˆ         uart5      uart5m0-xfer             
_            ª            ª        ž   ‰         uart6      uart6m0-xfer             
_            ª            ª        ž   Š         uart7      uart7m0-xfer             
_            ª            ª        ž   ‹         uart8      uart8m0-xfer             
_            ª            ª        ž   Œ         uart9      uart9m0-xfer             
_            ª            ª        ž   �         vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       gpio-leds      status-led-pin          
_              ¨        ž   ½         rockchip-key       reset-button-pin            
_              ª        ž   ¼         usb    vcc5v0-usb-otg-en           
_              ¨        ž   ¿            opp-table-0          ,operating-points-v2          
m        ž      opp-408000000           
x    Q–         
 øP øP Œ0        
�  œ@      opp-600000000           
x    #ÃF         
 øP øP Œ0        
�  œ@      opp-816000000           
x    0£,         
 øP øP Œ0        
�  œ@         
ž      opp-1104000000          
x    AÍ´         
 »  »  Œ0        
�  œ@      opp-1416000000          
x    Tfr         
 £è £è Œ0        
�  œ@      opp-1608000000          
x    _Ø"         
 Èà Èà Œ0        
�  œ@      opp-1800000000          
x    kIÒ         
 Œ0 Œ0 Œ0        
�  œ@      opp-1992000000          
x    v»‚         
 Œ0 Œ0 Œ0        
�  œ@         opp-table-1          ,operating-points-v2         ž   E   opp-200000000           
x    ëÂ         
 øP øP B@      opp-300000000           
x    á£         
 øP øP B@      opp-400000000           
x    ×„         
 øP øP B@      opp-600000000           
x    #ÃF         
 »  »  B@      opp-700000000           
x    )¹'         
 ~ð ~ð B@      opp-800000000           
x    /¯         
 B@ B@ B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci           î    ü                   ò      –      —      ˜        ½sata pmalive rxoob          ?       ^           ö            	  ûsata-phy            É           Û            	  Ædisabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon          î    ýÇ                 ž   »      qos@fe190080             ,rockchip,rk3568-qos syscon           î    þ €                ž   >      qos@fe190100             ,rockchip,rk3568-qos syscon           î    þ                 ž   ?      qos@fe190200             ,rockchip,rk3568-qos syscon           î    þ                 ž   @      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon             î    ýË€                ž   °      phy@fe8c0000             ,rockchip,rk3568-pcie3-phy            î    þŒ                 	Ó             ò      &      '     w        ½refclk_m refclk_n pclk          4     ¾        žphy         
ª   °        Æokay            
»              ž   ²      pcie@fe270000            ,rockchip,rk3568-pcie                                     ¬            0   ò      ˆ      ‰      Š      ‹      Œ      Ž      )  ½aclk_mst aclk_slv aclk_dbi pclk aux pipe             âpci       <  ?                  Ÿ          ž          �          œ           nsys pmc msg legacy err          p           ¶                     `  É                  ±                      ±                     ±                     ±           ×           è           ÷                            U                         ö   ²      	  ûpcie-phy            Û            0   î   À@       @      þ'             ò                T  ]       ò      ò                ò       ò       à        @      @       @           „dbi apb config          4      ±        žpipe            Æokay            
Æ   "               
Ò   ³   legacy-interrupt-controller          [                     p                        ?       �           ž   ±         pcie@fe280000            ,rockchip,rk3568-pcie                                     ¬       /      0   ò      �      �      ‘      ’      “      •      )  ½aclk_mst aclk_slv aclk_dbi pclk aux pipe             âpci       <  ?       ¥          ¤          £          ¢          ¡           nsys pmc msg legacy err          p           ¶                     `  É                  ´                      ´                     ´                     ´           ×           è           ÷                             U                          ö   ²      	  ûpcie-phy            Û            0   î   À€       @      þ(             ð                T  ]       ð      ð                ð       ð       à        €      €       @           „dbi apb config          4      Á        žpipe            Æokay            
Æ   "               
Ò   ³   legacy-interrupt-controller          [                     p                        ?       ¢           ž   ´         ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a            î    þ*                 ?                            nmacirq eth_wake_irq       @   ò     ‚     …     …      ¸      ´      µ     …      ¹      W  ½stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          4      ×      
  žstmmaceth           ‡           Þ   µ         î        ÿ   ¶           ·         %      	  Ædisabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config           .                                 8           H           ž   µ      rx-queues-config            X           ž   ¶   queue0           tx-queues-config            n           ž   ·   queue0              can@fe570000             ,rockchip,rk3568v2-canfd          î    þW                 ?                   ò     A     @      
  ½baud pclk           4     U     T      	  žcore apb            ¯default         ¥   ¸      	  Ædisabled          can@fe580000             ,rockchip,rk3568v2-canfd          î    þX                 ?                   ò     C     B      
  ½baud pclk           4     W     V      	  žcore apb            ¯default         ¥   ¹      	  Ædisabled          can@fe590000             ,rockchip,rk3568v2-canfd          î    þY                 ?                   ò     E     D      
  ½baud pclk           4     Y     X      	  žcore apb            ¯default         ¥   º      	  Ædisabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy           î    þ‚                  ò           |              ½ref apb pipe            K              [õá         4     Å        žphy         	«   ¡        	½   »        	Ó           Æokay            ž         chosen          
âserial2:1500000n8         gpio-keys         
   ,gpio-keys           ¯default         ¥   ¼   button-reset            
î   2        
Ì   "               reset             ˜         gpio-leds         
   ,gpio-leds           ¯default         ¥   ½   led-status                     status          
Ì   "             
   heartbeat            regulator-vcc12v-dcin            ,regulator-fixed         ±vcc12v_dcin          À         Ô        æ ·         þ ·         ž   ¾      regulator-vcc3v3-pcie            ,regulator-fixed         ±vcc3v3_pcie          À         Ô        æ 2Z         þ 2Z         +   !        ž   ³      regulator-vcc3v3-sys             ,regulator-fixed         ±vcc3v3_sys           À         Ô        æ 2Z         þ 2Z         +   ¾        ž   $      regulator-vcc5v0-sys             ,regulator-fixed         ±vcc5v0_sys           À         Ô        æ LK@        þ LK@        +   ¾        ž   !      regulator-vcc5v0-usb-otg             ,regulator-fixed          6        I   "               ¯default         ¥   ¿        ±vcc5v0_usb_otg          æ LK@        þ LK@        +   !        ž   ¥         	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports status arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names ports-implemented power-domains hba-port-cap phys phy-names snps,rx-ts-max snps,tx-ts-max dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply vccio3-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names rockchip,disable-mmu-reset fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names #sound-dai-cells rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp no-sdio no-mmc sd-uhs-sdr50 vmmc-supply vqmmc-supply bits dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf data-lanes reset-gpios vpcie3v3-supply stdout-path debounce-interval label linux,code color function linux,default-trigger enable-active-high gpio 