Ðþí  ù   8  ä   (              ¬                                                                   3   ,ARM Corstone1000-A320 FVP (Fixed Virtual Platform)           2arm,corstone1000-a320-fvp      aliases          =/soc/serial@1a510000             E/soc/serial@1a520000          chosen           Mserial0:115200n8          memory@88200000          Ymemory           eˆ   wà        interrupt-controller@1c000000            2arm,gic-v3           i                         z         e                    �      	                         š         l2-cache0            2cache             ¢         °            ¼            Ç   @         ×            š         clock-100000000          2fixed-clock          â             ïõá       	   ÿapb_pclk             š         clock-48000000           2fixed-clock          â             ïÜl          ÿsmclk            š         timer            2arm,armv8-timer       0   �                                 
         clock-50000000           2fixed-clock          â             ïúð€         ÿuartclk          š         psci             2arm,psci-1.0 arm,psci-0.2           smc       soc          2simple-bus                                                    timer@1a220000           2arm,armv7-timer-mem          e"                                          frame@1a230000                        �                   e#              serial@1a510000          2arm,pl011 arm,primecell          eQ              �                  -              4uartclk apb_pclk          serial@1a520000          2arm,pl011 arm,primecell          eR              �                  -              4uartclk apb_pclk          mailbox@1b820000             2arm,mhuv2-tx arm,primecell           e‚             -         	  4apb_pclk             �       -           @           L                `okay          	  gdisabled          mailbox@1b830000             2arm,mhuv2-rx arm,primecell           eƒ             -         	  4apb_pclk             �       .           @           L                `okay          	  gdisabled          npu@1a050000          )   2arm,corstone1000-ethos-u85 arm,ethos-u85             e              �                  -            	  4core apb            n            cpus                                 cpu@0            Ycpu          2arm,cortex-a320          e                spsci            �         cpu@100          Ycpu          2arm,cortex-a320          e               spsci            �         cpu@200          Ycpu          2arm,cortex-a320          e               spsci            �         cpu@300          Ycpu          2arm,cortex-a320          e               spsci            �            sram@2400000          
   2mmio-sram            e@                                                 š         ethernet@4010000             2smsc,lan91c111           e@             ’mii          �       t           ›         regulator-vmmc           2regulator-fixed         ¨vmmc_supply         · 2Z         Ï 2Z          ç         š         mmc@40300000             2arm,pl18x arm,primecell          e@0              �       u           û ·         	           -              4smclk apb_pclk        mmc@50000000             2arm,pl18x arm,primecell          eP               �       s           û ·         	           -              4smclk apb_pclk           	interrupt-parent #address-cells #size-cells model compatible serial0 serial1 stdout-path device_type reg #interrupt-cells interrupt-controller interrupts phandle cache-unified cache-level cache-size cache-line-size cache-sets #clock-cells clock-frequency clock-output-names method ranges frame-number clocks clock-names #mbox-cells arm,mhuv2-protocols secure-status sram enable-method next-level-cache phy-mode reg-io-width regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on max-frequency vmmc-supply 