Ðþí  Öx   8  Äœ   (            Ü  Äd                                                                      ,PHYTEC phyGATE-Tauri-L-iMX8MM         C   2phytec,imx8mm-phygate-tauri-l phytec,imx8mm-phycore-som fsl,imx8mm     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   ƒ/soc@0/bus@30800000/mmc@30b60000          6   ˆ/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   �/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   ˜/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $    /soc@0/bus@30800000/serial@30a60000       3   ¨/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   ­/soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   ²/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   ·/soc@0/bus@30800000/i2c@30a20000/rtc@52       .   ¼/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          Ápsci       cpu-pd-wait          2arm,idle-state           Î  3          å         ö  è          ¼          
Œ        (            cpu@0           0cpu          2arm,cortex-a53          <            @      ×        Gpsci            U  €         b   @        t           �  €         Ž   @            €        ­           ¾           Ò           Þspeed_grade         ï           ÿ                      (   
      cpu@1           0cpu          2arm,cortex-a53          <           @      ×        Gpsci            U  €         b   @        t           �  €         Ž   @            €        ­           ¾           ï           ÿ                      (         cpu@2           0cpu          2arm,cortex-a53          <           @      ×        Gpsci            U  €         b   @        t           �  €         Ž   @            €        ­           ¾           ï           ÿ                      (         cpu@3           0cpu          2arm,cortex-a53          <           @      ×        Gpsci            U  €         b   @        t           �  €         Ž   @            €        ­           ¾           ï           ÿ                      (         l2-cache0            2cache                       %        W           d   @        v           (            opp-table            2operating-points-v2          3        (      opp-1200000000          >    G†Œ         E øP        S              d Ið         u      opp-1600000000          >    _^         E ~ð        S              d Ið         u      opp-1800000000          >    kIÒ         E B@        S              d Ið         u         clock-osc-32k            2fixed-clock         �            Ž  €         žosc_32k         (         clock-osc-24m            2fixed-clock         �            Žn6         žosc_24m         (         clock-ext1           2fixed-clock         �            Žík@      	  žclk_ext1            (         clock-ext2           2fixed-clock         �            Žík@      	  žclk_ext2            (         clock-ext3           2fixed-clock         �            Žík@      	  žclk_ext3            (         clock-ext4           2fixed-clock         �            Žík@      	  žclk_ext4            (         psci             2arm,psci-1.0             Çsmc       pmu          2arm,cortex-a53-pmu          ±               timer            2arm,armv8-timer       0  ±                                 
           Ž z          ¼      thermal-zones           (   k   cpu-thermal         Ó   ú        é  Ð        ÷      trips      trip0            L          Ð        7passive         (   	      trip1            s          Ð      	  7critical            (   l         cooling-maps       map0               	      0  #   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               usbphynop1          2             2usb-nop-xceiv           @      „        =      „        M      2      	  dmain_clk            p           (   S      usbphynop2          2             2usb-nop-xceiv           @      „        =      „        M      2      	  dmain_clk            p           (   W      soc@0            2fsl,imx8mm-soc simple-bus                                    ~            >           …@       @   À           Ò           Þsoc_unique_id           (   m   bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   ~0   0    @          (   n   spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0               ~        (   o   sai@30010000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       _            @      ±      °                      dbus mclk1 mclk2 mclk3            ¡                                   ¦rx tx         	  °disabled            (   p      sai@30020000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       `            @      ³      ²                      dbus mclk1 mclk2 mclk3            ¡                                  ¦rx tx         	  °disabled            (   q      sai@30030000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       2            @      µ      ´                      dbus mclk1 mclk2 mclk3            ¡                                  ¦rx tx         	  °disabled            (   r      sai@30050000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       Z            @      ¹      ¸                      dbus mclk1 mclk2 mclk3            ¡                   	               ¦rx tx         	  °disabled            (   s      sai@30060000            �             2fsl,imx8mm-sai fsl,imx8mq-sai           <0             ±       Z            @      »      º                      dbus mclk1 mclk2 mclk3            ¡      
                            ¦rx tx         	  °disabled            (   t      audio-controller@30080000            2fsl,imx8mm-micfil           <0           0  ±       m          n          ,          -         (  @      Ø      Ë      &      '            )  dipg_clk ipg_clk_app pll8k pll11k clkext3            ¡         €           ¦rx          �          	  °disabled            (   u      spdif@30090000           2fsl,imx8mm-spdif            <0	             ±                P  @      ^            r                           ^                           :  dcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            ¡                                  ¦rx tx         	  °disabled            (   v         gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0              ±       @          A           @      ß         ·        Ç            Ó        è           ù          
         8    WDOG_INT X_RTC_INT    RESET_ETHPHY   nENABLE_FLATLINK         (   '      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!             ±       B          C           @      à         ·        Ç            Ó        è           ù          (           (   )      gpio@30220000           N   ¿        @default          2fsl,imx8mm-gpio fsl,imx35-gpio          <0"             ±       D          E           @      á         ·        Ç            Ó        è           ù          =           (   ^   uart4-rs485-en-hog          §uart4_rs485_en          ›        ú                ’         gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#             ±       F          G           @      â         ·        Ç            Ó        è           ù          W            (   7      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$             ±       H          I           @      ã         ·        Ç            Ó        è           ù          w           (   #      tmu@30260000             2fsl,imx8mm-tmu          <0&             @      Ñ        Ò           Þcalib                       (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(             ±       N           @      Ä        °okay             +        @default         N           (   w      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)             ±       O           @      Å      	  °disabled            (   x      watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*             ±       
           @      Æ      	  °disabled            (   y      dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,             ±       g           @      Ô      Ô        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+             ±       "           @      Õ      Õ        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (   z      pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             (      uart4grp            (   Á      H  |  L  ´            I  P  ¸               I  X  À              I      gpio3hoggrp         (   ¿        |  D  ¬              I      fec1grp      h  |   h  Ð                  l  Ô  À             �  ø               �   ”  ü               �   ˜                  �   œ                 �   Œ  ô               �   ˆ  ð               �   |  ä                  x  à                  t  Ü                  p  Ø                  „  ì                  €  è                  D  ¬                       (   J      flexspi0grp       �  |   ô  \             Â   ø  `              ‚    t              ‚    x              ‚    |              ‚    €              ‚        (   F      i2c1grp       0  |    €            @ À    |            @ À        (   .      i2c1gpiogrp       0  |    €             à    |             à        (   /      sn65dsi83grp            |   P  ¸                        (   0      usdhc3grp          |    p             Ð   ü  d             �     h             Ð    l             Ð    „             Ð     ˆ             Ð  $  Œ             Ð  (  �             Ð  0  ˜             Ð  8                �  <  ¤             Ð        (   C      usdhc3-100mhzgrp           |    p             Ô   ü  d             ”     h             Ô    l             Ô    „             Ô     ˆ             Ô  $  Œ             Ô  (  �             Ô  0  ˜             Ô  8                ”  <  ¤             Ô        (   D      usdhc3-200mhzgrp           |    p             Ö   ü  d             –     h             Ö    l             Ö    „             Ö     ˆ             Ö  $  Œ             Ö  (  �             Ö  0  ˜             Ö  8                –  <  ¤             Ö        (   E      wdoggrp         |   0  ˜              &        (         can-intgrp          |   H  °                        (   (      ecspi1grp         H  |  ü  d               ‚  ø  `               ‚  ô  \               ‚        (   $      ecspi1csgrp       H  |     h                   x                 ä  L                       (   %      keygrp          |   L  ´                        (   f      i2c2grp       0  |    „            @ Â     ˆ            @ Â        (   5      i2c2gpiogrp       0  |     ˆ             à    „             à        (   6      i2c3grp       0  |  $  Œ            @ Â  (  �            @ Â        (   9      i2c3gpiogrp       0  |  (  �             à  $  Œ             à        (   :      i2c4grp       0  |  ,  ”            @ Â  0  ˜            @ Â        (   ;      i2c4gpiogrp       0  |  0  ˜             à  ,  ”             à        (   <      leds1grp          0  |  Ô  <                 ð  X                       (   g      pciegrp       0  |  L  ´                 Œ  ô                      (   ]      pwm1grp         |   ,  ”              @        (         pwm3grp         |  è  P              @        (          pwm4grp         |   d  Ì              @        (   !      regusdhc2vmmcgrp            |   ì  T              @        (   j      rtcgrp          |   4  œ              À        (   4      tempsensegrp            |  Ø  @                       (   8      tpmgrp          |   Ì  4             @        (   *      uart1grp          0  |  8                     4  œ  ô                    (   +      uart2grp          0  |  <  ¤  ü              @  ¨                        (   -      uart3grp          0  |  D  ¬           @  H  °              @        (   ,      usbhubpwrgrp            |   `  È                        (   h      usbotg1pwrgrp           |   X  À                        (   i      usbotg1grp          |   \  Ä                       (   U      usdhc1grp         �  |                    ‚   ¤                 Æ   ¨                 Æ   ¬                 Æ   °                 Æ   ´                 Æ        (   {      usdhc2gpiogrp           |   Ð  8              @        (   >      usdhc2grp         ¨  |   8                Ð   Ô  <              ’   Ø  @              Ò   Ü  D              Ò   à  H              Ò   ä  L              Ò   è  P              Ò        (   =      usdhc2100mhzgrp       ¨  |   8                Ð   Ô  <              ”   Ø  @              Ô   Ü  D              Ô   à  H              Ô   ä  L              Ô   è  P              Ô        (   ?      usdhc2200mhzgrp       ¨  |   8                Ð   Ô  <              –   Ø  @              Ö   Ü  D              Ö   à  H              Ö   ä  L              Ö   è  P              Ö        (   @         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            <04             (   H      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             @      ¨                                 (   |   unique-id@4         <              (         speed-grade@10          <              (         calib@3c            <   <           (         mac-address@90          <   �           (   G         clock-controller@30360000            2fsl,imx8mm-anatop           <06             �           (   }      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         …           Œ   4        ±                            @      ä      	  dsnvs-rtc            (   ~      snvs-powerkey            2fsl,sec-v4.0-pwrkey         …           ±                  @      ä        dsnvs-pwrkey         “   t         ¡      	  °disabled            (         snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr          (   €         clock-controller@30380000            2fsl,imx8mm-ccm          <08             ±       U          V           �           @                        4  dosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  =      B      û      [      ^      `                     M      8      ,      /      8        ¯            ×„ ×„ ,´€p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09             ±       Y           Ä           (         gpc@303a0000             2fsl,imx8mm-gpc          <0:             ±       W                         Ó        è           (   �   pgc                              power-domain@0          Ñ            <            @      X        =      X        M      @        (         power-domain@1          Ñ            <           p           @      ©        (   [      power-domain@2          Ñ            <           (         power-domain@3          Ñ            <           (         power-domain@4          Ñ            <           @      È      Z        =      Y      Z        M      8      8        ¯/¯ ×„         (         power-domain@5          Ñ            <            @      Z      È      Ù      Á        å               p           (   _      power-domain@6          Ñ            <           @      Ò        =      T        M      8        (   a      power-domain@7          Ñ            <           (   b      power-domain@8          Ñ            <           (   c      power-domain@9          Ñ            <   	        (   d      power-domain@10         Ñ            <   
        @      Î      Í        =      U      V        M      A      8        ¯Íe ëÂ         (   P      power-domain@11         Ñ            <           (   Q               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   ~0@  0@   @          (   ‚   pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f             ±       Q           @      ª      ª        dipg per         ì           °okay            @default         N           (   ƒ      pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g             ±       R           @      «      «        dipg per         ì         	  °disabled            (   „      pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h             ±       S           @      ¬      ¬        dipg per         ì           °okay            @default         N            (   …      pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i             ±       T           @      ­      ­        dipg per         ì           °okay            @default         N   !        (   †      timer@306a0000           2nxp,sysctr-timer            <0j             ±       /           @           dper         (   ‡         bus@30800000             2fsl,aips-bus simple-bus         <0€   @                                   ~0€  0€   @                   (   ˆ   spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0€              ~        (   ‰   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0‚             ±                  @      Ÿ      Ÿ        dipg per          ¡   "             "                 ¦rx tx           °okay          $  ÷   #   	      #         #              @default         N   $   %        (   Š   can@0            2microchip,mcp251xfd         <            @   &        ±                   '        @default         N   (          ˜–€        (   ‹      tpm@1         !   2infineon,slb9670 tcg,tpm_tis-spi            ±                   )        @default         N   *        <            CÕ€        (   Œ         spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0ƒ             ±                   @                      dipg per          ¡   "            "                 ¦rx tx         	  °disabled            (   �      spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0„             ±       !           @      ¡      ¡        dipg per          ¡   "            "                 ¦rx tx         	  °disabled            (   Ž      serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0†             ±                  @      ¼      ¼        dipg per          ¡   "             "                  ¦rx tx           °okay            =              M      1        @default         N   +        (   �      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0ˆ             ±                  @      ¾      ¾        dipg per          ¡   "             "                  ¦rx tx           °okay            @default         N   ,        (   �      serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0‰             ±                  @      ½      ½        dipg per          ¡   "             "                  ¦rx tx           °okay            =      €        M      1        @default         N   -        (   ‘         crypto@30900000          2fsl,sec-v4.0                                     <0�             ~    0�             ±       [           @      ]      _      	  daclk ipg            (   ’   jr@1000          2fsl,sec-v4.0-job-ring           <              ±       i         	  °disabled            (   “      jr@2000          2fsl,sec-v4.0-job-ring           <               ±       j           (   ”      jr@3000          2fsl,sec-v4.0-job-ring           <  0            ±       r           (   •         i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0¢             ±       #           @      ¤        °okay            Ž €        @default gpio            N   .           /           #              &   #              (   –   pmic@8           2nxp,pf8121a         <      regulators     ldo1             0         D        V 2Z         n 2Z         †NVCC_SD1 (LDO1)         (   —   regulator-state-mem          •         ldo2             0         D        V 2Z         n w@        †NVCC_SD2 (LDO2)         (   B   regulator-state-mem          •         ldo3             0         D        V &%         n &%         †VCC_ENET_2V5 (LDO3)         (   ˜   regulator-state-mem          ®        Æ &%         æ &%          ldo4             0         D        V w@        n ã`        †VDDA_1V8 (LDO4)         (   ™   regulator-state-mem          ®        æ ã`        Æ ã`         buck1            0         D        V »         n €        †VDD_SOC_VDDA_PHY_0P8 (BUCK1)            (   š   regulator-state-mem          ®        æ €        Æ €         buck2            0         D        V B@        n B@        †VDD_GPU_DRAM (BUCK2)            (   ›   regulator-state-mem          ®        Æ B@        æ B@         buck3            0         D        V B@        n €        †VDD_VPU (BUCK3)         (   œ   regulator-state-mem          •         buck4            0         D        V �        n »         †VDD_MIPI_0P9 (BUCK4)            (   �   regulator-state-mem          •         buck5            0         D        V �        n €        †VDD_ARM (BUCK5)         (      regulator-state-mem          •         buck6            0         D        V w@        n w@        †VDD_1V8 (BUCK6)         (   1   regulator-state-mem          ®        Æ w@        æ w@         buck7            0         D        V Èà        n Èà        †NVCC_DRAM_1P1V (BUCK7)          (   ž      vsnvs            0         D        V w@        n w@        †NVCC_SNVS_1P8 (VSNVS)           (   Ÿ            bridge@2d            2ti,sn65dsi83               '   
           @default         N   0        <   -           1      	  °disabled            (       ports                                port@0          <       endpoint               2        .                    (   N         port@2          <      endpoint            (   ¡               eeprom@51            2atmel,24c32         9            <   Q           3      rtc@52           2microcrystal,rv3028         <   R             '        ±              N   4        @default         B           Y  ¸         ¡        (   ¢         i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0£             ±       $           @      ¥        °okay            Ž €        @default         N   5           6           #              &   #              (   £   temperature-sensor@49         
   2ti,tmp102           <   I             7        ±              @default         N   8                   (   ¤         i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0¤             ±       %           @      ¦        °okay            Ž €        @default         N   9           :           #              &   #              (   ¥      i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0¥             ±       &           @      §        °okay            Ž €        @default         N   ;           <           #              &   #              (   ¦      serial@30a60000          »        ±   ^               M      1        =      ‚        N   Á        @default          2fsl,imx8mm-uart fsl,imx6q-uart          <0¦             ±                  @      ¿      ¿        dipg per          ¡   "             "                  ¦rx tx           °okay led        (   §      mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0ª             ±       X           @      Ú        o           (   ¨      mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0´             ±                  @      _      S      Â        dipg ahb per         {           �                     	  °disabled            (   ©      mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0µ             ±                  @      _      S      Ã        dipg ahb per         {           �                       °okay            =      z        ¯ëÂ         ª   )               ³      "  @default state_100mhz state_200mhz           N   =   >           ?   >        ¾   @   >        È   A        Ô   B        (   ª      mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0¶             ±                  @      _      S      Ð        dipg ahb per         {           �                       °okay            =      Ð        ¯×„          á      "  @default state_100mhz state_200mhz           N   C           D        ¾   E         ÷        (   «      spi@30bb0000                                       2nxp,imx8mm-fspi         <0»                   fspi_base fspi_mmap         ±       k           @      ®      ®        dfspi_en fspi            °okay            @default         N   F        (   ¬   flash@0                                   2jedec,spi-nor           <             Ä´                                (   ­         dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0½             ±                  @      Ó      ]        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (   "      ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0¾           0  ±       v          w          x          y         (  @      ¢      ¢      u      t      v      "  dipg ahb ptp enet_clk_ref enet_out            =      R      u      t      v         M      6      :      ;      9        ¯    õá sY@            1           C           Ò   G        Þmac-address         U   H              °okay          	  crgmii-id            l   I        @default         N   J        (   ®   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22           w        �ÿÿÿÿ        Ÿ            ­        Å           Ú           <            ï   '               û  è          è        (   I               bus@32c00000             2fsl,aips-bus simple-bus         <2À   @                                   ~2À  2À   @          (   ¯   lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           <2à             @      k      Î      Í        dpix axi disp_axi            =      k      U      V        M      (      A      8        ¯n6 Íe ëÂ         ±                  p   K         	  °disabled            (   °   port       endpoint               L        (   M            dsi@32e10000             2fsl,imx8mm-mipi-dsim            <2á             @      Ž      �        dbus_clk sclk_mipi           =      Ž      �        M      6              ±                  p   K         	  °disabled             ˜–€        (   ±   ports                                port@0          <       endpoint               M        (   L         port@1          <      endpoint               N        (   2               csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2â             ±                  @      Û        dmclk            p   K          	  °disabled            (   ²   port       endpoint               O        (   R            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2â€            p   P   P   P   Q   Q      '  9bus csi-bridge lcdif mipi-dsi mipi-csi        P  @      Í      Î      Û      Í      Î      Ì      Ž      �      ’      “      o  dcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk          Ñ           (   K      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2ã             ±                  =      ’        M      A        ŽÙ-@         @      Î      Û      “      Í        dpclk wrap phy axi           p   K         	  °disabled            (   ³   ports                                port@0          <          port@1          <      endpoint               R        (   O               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2ä             ±       (           @      À        =      X        M      @        L   S        Q   T            p           °okay             ]        iotg          q        ‰           ®           @default         N   U         Ò        Þ   V        (   ´      usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          ê           <2ä            (   T      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2å             ±       )           @      À        =      X        M      @        L   W        Q   X            p           °okay             ÷        ihost            ‰           ®           Þ   Y        (   µ      usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          ê           <2å            (   X      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2ð             @      h        dref         =      h        ¯õá         M      :        å              	pciephy         2            °okay             	        	/           	C   -        	V           (   \         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0  ±                                                X           	i           @      Þ        (   Z      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         gpmi-nand bch           ±                  	vbch         @      ¯      Þ        dgpmi_io gpmi_bch_apb            ¡   Z            ¦rx-tx         	  °disabled            (   ¶      pcie@33800000            2fsl,imx8mm-pcie         <3€   @  ð             dbi config                                   0pci         	†       ÿ      0  ~�           ø         ‚                 ð          	�           	š           ±       z           	vmsi         è           	§                     €  	º                         }                            |                            {                            z           	È           	Û            @      ©      h      i        dpcie pcie_bus pcie_aux          p   [        å                    	apps turnoff            L   \      	  	ìpcie-phy            °okay            =      i      h      g        M      9      :      >        ¯ ˜–€õá æ²€        @default         N   ]        	ö   ^              (   ·      pcie-ep@33800000             2fsl,imx8mm-pcie-ep           <3€           3�     3°             dbi addr_space dbi2 atu         	�           ±                  	vdma         	È           @      ©      h      i        dpcie pcie_bus pcie_aux          p   [        å                    	apps turnoff            L   \      	  	ìpcie-phy            
           
         	  °disabled            (   ¸      gpu@38000000             2vivante,gc          <8     €         ±                   @      Z      È      Á      Á        dreg bus core shader         =      ø      *        M      *        ¯    /¯         p   _        (   ¹      gpu@38008000             2vivante,gc          <8 €   €         ±                  @      Z      È      Ù        dreg bus core            =      ù      *        M      *        ¯    /¯         p   _        (   º      video-codec@38300000             2nxp,imx8mm-vpu-g1           <80             ±                  @      Ç        p   `            (   »      video-codec@38310000             2nxp,imx8mq-vpu-g2           <81             ±                  @      Ê        p   `           (   ¼      blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             p   a   b   c   d        9bus g1 g2 h1            @      Ç      Ê      É      	  dg1 g2 h1            =      c      d        M      +      +        ¯#ÃF #ÃF         Ñ           (   `      interrupt-controller@38800000            2arm,gic-v3          <8€     8ˆ                          è            Ó        ±      	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          dcore pll alt apb             @      Ü            a      b        ¾   e        (   ½   opp-table            2operating-points-v2         (   e   opp-25000000            >    }x@      opp-100000000           >    õá       opp-750000000           >    ,´€            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=€   @          ±       b            memory@40000000         0memory          <    @       €         regulator-vdd-3v3-s          2regulator-fixed          0         D        V 2Z         n 2Z       
  †VDD_3V3_S           (   3      chosen        6  
/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         clock-can            2fixed-clock         ŽbZ         žcan_osc_40m         �            (   &      gpio-keys         
   2gpio-keys           @default         N   f   key         ú   '   	           
+KEY-A           
1            leds          
   2gpio-leds           @default         N   g   led-1           
<           ú   #               
Bnone          led-2           
<           ú   7               
Bnone             pwr-seq          2mmc-pwrseq-simple           
X   d        
o   <        ï   )              (   ¾      regulator-hub-otg1           2regulator-fixed         	ü   '                
‚        @default         N   h        †usb_hub_vbus            V LK@        n LK@        (   Y      regulator-usb-otg1           2regulator-fixed         	ü   '                
‚        @default         N   i        †usb_otg1_vbus           V LK@        n LK@        (   V      regulator-usdhc2             2regulator-fixed         	ü   )                
‚        
•  N         @default         N   j        V 2Z         n 2Z         †VSD_3V3         (   A      __symbols__         
¥/cpus/idle-states/cpu-pd-wait           
±/cpus/cpu@0         
·/cpus/cpu@1         
½/cpus/cpu@2         
Ã/cpus/cpu@3         
É/cpus/l2-cache0         
Ð/opp-table          
Þ/clock-osc-32k          
æ/clock-osc-24m          
î/clock-ext1         
÷/clock-ext2          /clock-ext3         	/clock-ext4         /thermal-zones        '   /thermal-zones/cpu-thermal/trips/trip0        '  +/thermal-zones/cpu-thermal/trips/trip1          5/usbphynop1         @/usbphynop2         K/soc@0          O/soc@0/bus@30000000       &  U/soc@0/bus@30000000/spba-bus@30000000         3  [/soc@0/bus@30000000/spba-bus@30000000/sai@30010000        3  `/soc@0/bus@30000000/spba-bus@30000000/sai@30020000        3  e/soc@0/bus@30000000/spba-bus@30000000/sai@30030000        3  j/soc@0/bus@30000000/spba-bus@30000000/sai@30050000        3  o/soc@0/bus@30000000/spba-bus@30000000/sai@30060000        @  t/soc@0/bus@30000000/spba-bus@30000000/audio-controller@30080000       5  {/soc@0/bus@30000000/spba-bus@30000000/spdif@30090000          "   M/soc@0/bus@30000000/gpio@30200000         "   S/soc@0/bus@30000000/gpio@30210000         "   Y/soc@0/bus@30000000/gpio@30220000         "   _/soc@0/bus@30000000/gpio@30230000         "  ‚/soc@0/bus@30000000/gpio@30240000         !  ˆ/soc@0/bus@30000000/tmu@30260000          &  Œ/soc@0/bus@30000000/watchdog@30280000         &  ’/soc@0/bus@30000000/watchdog@30290000         &  ˜/soc@0/bus@30000000/watchdog@302a0000         ,  ž/soc@0/bus@30000000/dma-controller@302c0000       ,  ¤/soc@0/bus@30000000/dma-controller@302b0000       %  ª/soc@0/bus@30000000/pinctrl@30330000          -  ±/soc@0/bus@30000000/pinctrl@30330000/fec1grp          1  ¾/soc@0/bus@30000000/pinctrl@30330000/flexspi0grp          -  Ï/soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  Ü/soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          2  î/soc@0/bus@30000000/pinctrl@30330000/sn65dsi83grp         /   /soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  %/soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  ;/soc@0/bus@30000000/pinctrl@30330000/wdoggrp          0  H/soc@0/bus@30000000/pinctrl@30330000/can-intgrp       /  X/soc@0/bus@30000000/pinctrl@30330000/ecspi1grp        1  g/soc@0/bus@30000000/pinctrl@30330000/ecspi1csgrp          ,  y/soc@0/bus@30000000/pinctrl@30330000/keygrp       -  Š/soc@0/bus@30000000/pinctrl@30330000/i2c2grp          1  —/soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp          -  ©/soc@0/bus@30000000/pinctrl@30330000/i2c3grp          1  ¶/soc@0/bus@30000000/pinctrl@30330000/i2c3gpiogrp          -  È/soc@0/bus@30000000/pinctrl@30330000/i2c4grp          1  Õ/soc@0/bus@30000000/pinctrl@30330000/i2c4gpiogrp          .  ç/soc@0/bus@30000000/pinctrl@30330000/leds1grp         -  ô/soc@0/bus@30000000/pinctrl@30330000/pciegrp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm1grp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm3grp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm4grp          6  (/soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp         ,  @/soc@0/bus@30000000/pinctrl@30330000/rtcgrp       2  L/soc@0/bus@30000000/pinctrl@30330000/tempsensegrp         ,  ^/soc@0/bus@30000000/pinctrl@30330000/tpmgrp       .  j/soc@0/bus@30000000/pinctrl@30330000/uart1grp         .  x/soc@0/bus@30000000/pinctrl@30330000/uart2grp         .  †/soc@0/bus@30000000/pinctrl@30330000/uart3grp         2  ”/soc@0/bus@30000000/pinctrl@30330000/usbhubpwrgrp         3  ¦/soc@0/bus@30000000/pinctrl@30330000/usbotg1pwrgrp        0  ¹/soc@0/bus@30000000/pinctrl@30330000/usbotg1grp       /  É/soc@0/bus@30000000/pinctrl@30330000/usdhc1grp        3  Ø/soc@0/bus@30000000/pinctrl@30330000/usdhc2gpiogrp        /  ì/soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        5  û/soc@0/bus@30000000/pinctrl@30330000/usdhc2100mhzgrp          5  /soc@0/bus@30000000/pinctrl@30330000/usdhc2200mhzgrp          $  '/soc@0/bus@30000000/syscon@30340000       #  +/soc@0/bus@30000000/efuse@30350000        /  1/soc@0/bus@30000000/efuse@30350000/unique-id@4        2  </soc@0/bus@30000000/efuse@30350000/speed-grade@10         ,  L/soc@0/bus@30000000/efuse@30350000/calib@3c       2  V/soc@0/bus@30000000/efuse@30350000/mac-address@90         .  f/soc@0/bus@30000000/clock-controller@30360000         "  m/soc@0/bus@30000000/snvs@30370000         .  r/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  {/soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  ‡/soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  ’/soc@0/bus@30000000/clock-controller@30380000         .  –/soc@0/bus@30000000/reset-controller@30390000         !  š/soc@0/bus@30000000/gpc@303a0000          4  ž/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  ª/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  ³/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  ¼/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  Å/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  Ð/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  Ø/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  ã/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  î/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  ù/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11            /soc@0/bus@30400000       !  	/soc@0/bus@30400000/pwm@30660000          !  /soc@0/bus@30400000/pwm@30670000          !  /soc@0/bus@30400000/pwm@30680000          !  #/soc@0/bus@30400000/pwm@30690000          #  $/soc@0/bus@30400000/timer@306a0000          3/soc@0/bus@30800000       &  9/soc@0/bus@30800000/spba-bus@30800000         3  `/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        9  ?/soc@0/bus@30800000/spba-bus@30800000/spi@30820000/can@0          9  f/soc@0/bus@30800000/spba-bus@30800000/spi@30820000/tpm@1          3  D/soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  K/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  r/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  Ž/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  €/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         $  R/soc@0/bus@30800000/crypto@30900000       ,  Y/soc@0/bus@30800000/crypto@30900000/jr@1000       ,  a/soc@0/bus@30800000/crypto@30900000/jr@2000       ,  i/soc@0/bus@30800000/crypto@30900000/jr@3000       !   j/soc@0/bus@30800000/i2c@30a20000          8  q/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo1       8  ~/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo2       8  ‹/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo3       8  ˜/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo4       9  ¥/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck1          9  ¶/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck2          9  Ç/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck3          9  Ó/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck4          9  à/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck5          9  ì/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck6          9  ø/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck7          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/vsnvs          +  ö/soc@0/bus@30800000/i2c@30a20000/bridge@2d        A  /soc@0/bus@30800000/i2c@30a20000/bridge@2d/ports/port@0/endpoint          A  /soc@0/bus@30800000/i2c@30a20000/bridge@2d/ports/port@2/endpoint          (  %/soc@0/bus@30800000/i2c@30a20000/rtc@52       !   o/soc@0/bus@30800000/i2c@30a30000          7  ,/soc@0/bus@30800000/i2c@30a30000/temperature-sensor@49        !   t/soc@0/bus@30800000/i2c@30a40000          !  Ð/soc@0/bus@30800000/i2c@30a50000          $  8/soc@0/bus@30800000/serial@30a60000       %  ‰/soc@0/bus@30800000/mailbox@30aa0000          !  Ñ/soc@0/bus@30800000/mmc@30b40000          !  ô/soc@0/bus@30800000/mmc@30b50000          !  /soc@0/bus@30800000/mmc@30b60000          !  >/soc@0/bus@30800000/spi@30bb0000          )  F/soc@0/bus@30800000/spi@30bb0000/flash@0          ,  P/soc@0/bus@30800000/dma-controller@30bd0000       &  ¹/soc@0/bus@30800000/ethernet@30be0000         :  V/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0           ^/soc@0/bus@32c00000       #  d/soc@0/bus@32c00000/lcdif@32e00000        1  j/soc@0/bus@32c00000/lcdif@32e00000/port/endpoint          !  x/soc@0/bus@32c00000/dsi@32e10000          7  �/soc@0/bus@32c00000/dsi@32e10000/ports/port@0/endpoint        7  ‘/soc@0/bus@32c00000/dsi@32e10000/ports/port@1/endpoint        !  ž/soc@0/bus@32c00000/csi@32e20000          /  ¢/soc@0/bus@32c00000/csi@32e20000/port/endpoint        &  ©/soc@0/bus@32c00000/blk-ctrl@32e28000         &  ·/soc@0/bus@32c00000/mipi-csi@32e30000         <  À/soc@0/bus@32c00000/mipi-csi@32e30000/ports/port@1/endpoint       !  Á/soc@0/bus@32c00000/usb@32e40000          %  Ô/soc@0/bus@32c00000/usbmisc@32e40200          !  Ý/soc@0/bus@32c00000/usb@32e50000          %  å/soc@0/bus@32c00000/usbmisc@32e50200          &  î/soc@0/bus@32c00000/pcie-phy@32f00000           ÷/soc@0/dma-controller@33000000            /soc@0/nand-controller@33002000         /soc@0/pcie@33800000            /soc@0/pcie-ep@33800000         /soc@0/gpu@38000000         /soc@0/gpu@38008000         ç/soc@0/video-codec@38300000         ò/soc@0/video-codec@38310000         "/soc@0/blk-ctrl@38330000          %  //soc@0/interrupt-controller@38800000          "  3/soc@0/memory-controller@3d400000         ,  8/soc@0/memory-controller@3d400000/opp-table         G/regulator-vdd-3v3-s            U/clock-can        	  a/pwr-seq            o/regulator-hub-otg1         €/regulator-usb-otg1         0/regulator-usdhc2            	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output pinctrl-names pinctrl-0 #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-max-microvolt regulator-suspend-min-microvolt enable-gpios vcc-supply remote-endpoint data-lanes pagesize aux-voltage-chargeable trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width cd-gpios disable-wp pinctrl-2 vmmc-supply vqmmc-supply keep-power-in-suspend non-removable reg-names spi-rx-bus-width spi-tx-bus-width fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,min-output-impedance ti,rx-internal-delay ti,tx-internal-delay reset-gpios reset-assert-us reset-deassert-us samsung,esc-clock-frequency power-domain-names phys fsl,usbmisc adp-disable dr_mode over-current-active-low samsung,picophy-pre-emp-curr-control samsung,picophy-dc-vol-level-adjust srp-disable vbus-supply #index-cells disable-over-current reset-names fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,tx-deemph-gen1 fsl,tx-deemph-gen2 dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows stdout-path label linux,code color linux,default-trigger post-power-on-delay-ms power-off-delay-us enable-active-high off-on-delay-us cpu_pd_wait A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 thermal_zones cpu_alert0 cpu_crit0 usbphynop1 usbphynop2 soc aips1 spba2 sai1 sai2 sai3 sai5 sai6 micfil spdif1 gpio5 tmu wdog1 wdog2 wdog3 sdma2 sdma3 iomuxc pinctrl_fec1 pinctrl_flexspi0 pinctrl_i2c1 pinctrl_i2c1_gpio pinctrl_sn65dsi83 pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_can_int pinctrl_ecspi1 pinctrl_ecspi1_cs pinctrl_gpiokeys pinctrl_i2c2 pinctrl_i2c2_gpio pinctrl_i2c3 pinctrl_i2c3_gpio pinctrl_i2c4 pinctrl_i2c4_gpio pinctrl_leds pinctrl_pcie pinctrl_pwm1 pinctrl_pwm3 pinctrl_pwm4 pinctrl_reg_usdhc2_vmmc pinctrl_rtc pinctrl_tempsense pinctrl_tpm pinctrl_uart1 pinctrl_uart2 pinctrl_uart3 pinctrl_usbhubpwr pinctrl_usbotg1pwr pinctrl_usbotg1 pinctrl_usdhc1 pinctrl_usdhc2_gpio pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz gpr ocotp imx8mm_uid cpu_speed_grade tmu_calib fec_mac_address anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_hsiomix pgc_pcie pgc_otg1 pgc_otg2 pgc_gpumix pgc_gpu pgc_vpumix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_h1 pgc_dispmix pgc_mipi aips2 pwm2 system_counter aips3 spba1 can0 ecspi2 ecspi3 crypto sec_jr0 sec_jr1 sec_jr2 reg_nvcc_sd1 reg_nvcc_sd2 reg_vcc_enet reg_vdda_1v8 reg_soc_vdda_phy reg_vdd_gpu_dram reg_vdd_vpu reg_vdd_mipi reg_vdd_arm reg_vdd_1v8 reg_nvcc_dram reg_vsnvs bridge_in bridge_out rv3028 temp_sense0 uart4 flexspi som_flash sdma1 ethphy0 aips4 lcdif lcdif_to_dsim mipi_dsi dsim_from_lcdif mipi_dsi_out csi csi_in disp_blk_ctrl mipi_csi imx8mm_mipi_csi_out usbmisc1 usbotg2 usbmisc2 pcie_phy dma_apbh gpmi pcie0 pcie0_ep gpu_3d gpu_2d vpu_blk_ctrl gic ddrc ddrc_opp_table reg_vdd_3v3_s can_osc_40m usdhc1_pwrseq reg_usb_hub_vbus reg_usb_otg1_vbus gpio-hog output-high line-name rts-gpios linux,rs485-enabled-at-boot-time 