Ðþí +   8 8   (            Ë                                                                     C   ,phytec,imx8mp-libra-rdk-fpsc phytec,imx8mp-phycore-fpsc fsl,imx8mp           7PHYTEC i.MX8MP Libra RDK FPSC      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         &   G/soc@0/bus@30800000/ethernet@30bf0000         "   Q/soc@0/bus@30000000/gpio@30200000         "   W/soc@0/bus@30000000/gpio@30210000         "   ]/soc@0/bus@30000000/gpio@30220000         "   c/soc@0/bus@30000000/gpio@30230000         "   i/soc@0/bus@30000000/gpio@30240000         !   o/soc@0/bus@30800000/i2c@30a20000          !   t/soc@0/bus@30800000/i2c@30a30000          !   y/soc@0/bus@30800000/i2c@30a40000          !   ~/soc@0/bus@30800000/i2c@30a50000          !   ƒ/soc@0/bus@30800000/i2c@30ad0000          !   ˆ/soc@0/bus@30800000/i2c@30ae0000          !   �/soc@0/bus@30800000/mmc@30b40000          !   ’/soc@0/bus@30800000/mmc@30b50000          !   —/soc@0/bus@30800000/mmc@30b60000          6   œ/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   ¤/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   ¬/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   ´/soc@0/bus@30800000/serial@30a60000       !   ¼/soc@0/bus@30800000/spi@30bb0000          (   Á/soc@0/bus@30800000/i2c@30a20000/rtc@52       .   Æ/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          Ëpsci       cpu-pd-wait          ,arm,idle-state           Ø  3          ï           è          ¼        !  
Œ        2  Ü        D            cpu@0           Lcpu          ,arm,cortex-a53          X            \             cpsci            q  €         ~   @        �           �  €         ª   @        ¼   €        É           Ú           æspeed_grade         ÷                                 *           D      thermal-idle                       5  '          ¼        D            cpu@1           Lcpu          ,arm,cortex-a53          X           \             cpsci            q  €         ~   @        �           �  €         ª   @        ¼   €        É           ÷                                 *           D      thermal-idle                       5  '          ¼        D            cpu@2           Lcpu          ,arm,cortex-a53          X           \             cpsci            q  €         ~   @        �           �  €         ª   @        ¼   €        É           ÷                                 *           D      thermal-idle                       5  '          ¼        D            cpu@3           Lcpu          ,arm,cortex-a53          X           \             cpsci            q  €         ~   @        �           �  €         ª   @        ¼   €        É           ÷                                 *           D      thermal-idle                       5  '          ¼        D            l2-cache0            ,cache            A        O           s           €   @        ’           D            opp-table            ,operating-points-v2          [        D      opp-1200000000          f    G†Œ         m øP        {              Œ Ið         �      opp-1600000000          f    _^         m ~ð        {               Œ Ið         �      opp-1800000000          f    kIÒ         m B@        {               Œ Ið         �         clock-osc-32k            ,fixed-clock         ©            ¶  €         Æosc_32k         D   +      clock-osc-24m            ,fixed-clock         ©            ¶n6         Æosc_24m         D   ,      clock-ext1           ,fixed-clock         ©            ¶ík@      	  Æclk_ext1            D   -      clock-ext2           ,fixed-clock         ©            ¶ík@      	  Æclk_ext2            D   .      clock-ext3           ,fixed-clock         ©            ¶ík@      	  Æclk_ext3            D   /      clock-ext4           ,fixed-clock         ©            ¶ík@      	  Æclk_ext4            D   0      funnel           ,arm,coresight-static-funnel    in-ports                                 port@0          X       endpoint            Ù           D            port@1          X      endpoint            Ù   	        D            port@2          X      endpoint            Ù   
        D            port@3          X      endpoint            Ù           D               out-ports      port       endpoint            Ù           D                   reserved-memory                                   é   dsp@92400000            X    ’@                  ð      	  ÷disabled            D   ¡         pmu          ,arm,cortex-a53-pmu          þ               psci             ,arm,psci-1.0             Ñsmc       thermal-zones      cpu-thermal         	   ú          Ð        -         trips      trip0           = L        I  Ð        Spassive         D         trip1           = s        I  Ð      	  Scritical            D   ¢         cooling-maps       map0            T         „  Y   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ          2          2          2          2            soc-thermal         	   ú          Ð        -          trips      trip0           = L        I  Ð        Spassive         D         trip1           = s        I  Ð      	  Scritical            D   £         cooling-maps       map0            T         „  Y   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ          2          2          2          2               timer            ,arm,armv8-timer       0  þ                                 
           ¶ z          h      soc@0            ,fsl,imx8mp-soc simple-bus                                    é            >           Ú           æsoc_unique_id           D   ¤   etm@28440000          "   ,arm,coresight-etm4x arm,primecell           X(D                        \      ]      	  ƒapb_pclk            D   ¥   out-ports      port       endpoint            Ù           D                  etm@28540000          "   ,arm,coresight-etm4x arm,primecell           X(T                        \      ]      	  ƒapb_pclk            D   ¦   out-ports      port       endpoint            Ù           D   	               etm@28640000          "   ,arm,coresight-etm4x arm,primecell           X(d                        \      ]      	  ƒapb_pclk            D   §   out-ports      port       endpoint            Ù           D   
               etm@28740000          "   ,arm,coresight-etm4x arm,primecell           X(t                        \      ]      	  ƒapb_pclk            D   ¨   out-ports      port       endpoint            Ù           D                  funnel@28c03000       +   ,arm,coresight-dynamic-funnel arm,primecell          X(À0            \      ]      	  ƒapb_pclk       in-ports                                 port@0          X       endpoint            Ù            D            port@1          X      endpoint            D   ©         port@2          X      endpoint            D   ª            out-ports      port       endpoint            Ù   !        D   "               etf@28c04000              ,arm,coresight-tmc arm,primecell         X(À@            \      ]      	  ƒapb_pclk       in-ports       port       endpoint            Ù   "        D   !            out-ports      port       endpoint            Ù   #        D   $               etr@28c06000              ,arm,coresight-tmc arm,primecell         X(À`            \      ]      	  ƒapb_pclk       in-ports       port       endpoint            Ù   $        D   #               bus@30000000             ,fsl,aips-bus simple-bus         X0    @                                    é        D   «   gpio@30200000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0              þ       @          A           \      Á         �        Ÿ            «        À           Ñ   %                  Ý        PCIE1_nPERST            D   Š      gpio@30210000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0!             þ       B          C           \      Â         �        Ÿ            «        À           Ñ   %       #           Ý                   SD2_RESET_B          D   ›      gpio@30220000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0"             þ       D          E           \      Ã         �        Ÿ            «        À            Ñ   %       8      %      �         .  Ý                   I2C6_SCL I2C6_SDA I2C5_SCL           D   Q      gpio@30230000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0#             þ       F          G           \      Ä         �        Ÿ            «        À           Ñ   %       R          f  ÝGPIO6 RGMII2_nINT GPIO7 GPIO4               X_PMIC_IRQ_B   GPIO5   RGMII2_EVENT_OUT   RGMII2_EVENT_IN           í   &        ÷default         D   D      gpio@30240000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0$             þ       H          I           \      Å         �        Ÿ            «        À           Ñ   %       r         ‚  Ý    I2C5_SDA GPIO1    SPI1_CS    SPI2_CS I2C1_SCL I2C1_SDA I2C2_SCL I2C2_SDA I2C3_SCL I2C3_SDA  GPIO2  LVDS1_BL_EN SPI3_CS  GPIO3           í   '        ÷default         D   C      tmu@30260000             ,fsl,imx8mp-tmu          X0&             \             Ú   (        æcalib                      D         watchdog@30280000            ,fsl,imx8mp-wdt fsl,imx21-wdt            X0(             þ       N           \             ÷okay            í   )        ÷default                  D   ¬      watchdog@30290000            ,fsl,imx8mp-wdt fsl,imx21-wdt            X0)             þ       O           \           	  ÷disabled            D   ­      watchdog@302a0000            ,fsl,imx8mp-wdt fsl,imx21-wdt            X0*             þ       
           \           	  ÷disabled            D   ®      timer@302d0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0-             þ       7           \      Æ      ›        ƒipg per         D   ¯      timer@302e0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0.             þ       6           \      Ç      œ        ƒipg per         D   °      timer@302f0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0/             þ       5           \      È      �        ƒipg per         D   ±      pinctrl@30330000             ,fsl,imx8mp-iomuxc           X03             D   %   can1grp       0  0                   T  ¬    L        T        D   =      can2grp       0  0  °               T  4  ”  P        T        D   ?      eqosgrp      ˜  0  L  ¬                ´                  ¨                   X  ¸  �             T  ´                  \  ¼                  `  À                  d  Ä                  h  È                  l  Ì                  p  Ð                  ˆ  è               �   „  ä               �   €  à               �   |  Ü               �   t  Ô               �   x  Ø               �        D   b      fecgrp       h  0  X  ¸                \  ¼  |           `  À  €         �  d  Ä  „         �  h  È              �  l  Ì              �  ”  ô             @  t  Ô              �  x  Ø                |  Ü                €  à                „  ä                ˆ  è                Œ  ì                p  Ð  ˆ         �        D   `      flexspigrp        ¨  0   ä  D              ‚   à  @             Â   ø  X              ‚   ü  \              ‚     `              ‚    d              ‚    x              ‚        D   ]      gpio4grp          `  0  T  ´              @  œ  ü               H  ¨               P  °                     D   &      gpio5grp          H  0  Ü  <                 |               0  �                     D   '      hdmigrp       `  0  H  ¨                @                   D  ¤                L  ¬                      D   ²      i2c1gpiogrp       0  0    d             â     `             â        D   B      i2c1grp       0  0    d  ¨       @ Â     `  ¤       @ Â        D   A      i2c2gpiogrp       0  0    l             â    h             â        D   I      i2c2grp       0  0    l  °       @ Â    h  ¬       @ Â        D   H      i2c3gpiogrp       0  0    t             â    p             â        D   L      i2c3grp       0  0    t  ¸       @ Â    p  ´       @ Â        D   K      i2c5gpiogrp       0  0  Ø  8             â  4  ”             â        D   P      i2c5grp       0  0  Ø  8  È      @ Â  4  ”  Ä      @ Â        D   O      i2c6gpiogrp       0  0  0  �             â  ,  Œ             â        D   S      i2c6grp       0  0  0  �  Ð      @ Â  ,  Œ  Ì      @ Â        D   R      pcie0grp          0  0    x                4  ”               @        D   ‰      pmicirqgrp          0  �  ð             @        D   E      pwm1grp         0     x                     D   2      pwm2grp         0   8  ˜                     D   3      pwm3grp         0  Ô  4                     D   4      pwm4grp         0  Ð  0                     D   5      regusdhc2vmmcgrp            0   Ø  8              @        D   š      sai5grp       ¨  0  D  ¤  ð            ¸              ¼    ô          À     ø          8  ˜             <  œ             ¤                       D   f      spi1grp       `  0  à  @  X           ‚  ä  D  `           ‚  è  H  \           ‚  ì  L                     D   7      spi2grp       `  0  ð  P  h          ‚  ô  T  p          ‚  ø  X  l          ‚  ü  \                     D   8      spi3grp       `  0     €              ‚  $  „              ‚  (  ˆ              ‚  (  ˆ                     D   9      uart2grp          `  0  È  (  ð        @  Ä  $             @   ¨    ì        @   ¤               @        D   ;      uart3grp          `  0   ¬    ø         @   °               @   ¸    ô        @   ´               @        D   :      uart4grp          0  0  8  ˜            @  <  œ              @        D   M      usb0grp       H  0   D  ¤                H  ¨                <  œ                     D   ”      usb1grp       H  0   L  ¬                P  °                @                        D   –      usdhc1grp         À  0   0  �                ,  Œ                Œ  ì                 �  ð                 ”  ô                 ˜  ø                 œ  ü                                           D   T      usdhc2grp         Ø  0   ¼                 @   Ü  <               @   À                 �   Ä  $              Ð   È  (              Ð   Ì  ,              Ð   Ð  0              Ð   Ô  4              Ð   $  „              À        D   U      usdhc2-100mhzgrp          Ø  0   ¼                 @   Ü  <               @   À                 ”   Ä  $              Ô   È  (              Ô   Ì  ,              Ô   Ð  0              Ô   Ô  4              Ô   $  „              À        D   V      usdhc2-200mhzgrp          Ø  0   ¼                 @   Ü  <               @   À                 –   Ä  $              Ö   È  (              Ö   Ì  ,              Ö   Ð  0              Ö   Ô  4              Ö   $  „              À        D   W      usdhc3grp          0   è  H  0        �   ì  L  $        Ð   ð  P  (        Ð   ô  T  ,        Ð    h          Ð    l          Ð    p          Ð    t          Ð    |           Ð  $  „          �  (  ˆ          Ð        D   Z      usdhc3-100mhzgrp           0   è  H  0        ”   ì  L  $        Ô   ð  P  (        Ô   ô  T  ,        Ô    h          Ô    l          Ô    p          Ô    t          Ô    |           Ô  $  „          ”  (  ˆ          Ô        D   [      usdhc3-200mhzgrp           0   è  H  0        –   ì  L  $        Ò   ð  P  (        Ò   ô  T  ,        Ò    h          Ò    l          Ò    p          Ò    t          Ò    |           Ò  $  „          –  (  ˆ          Ö        D   \      wdoggrp         0     |              æ        D   )      lvds0grp            0  $  „                      D   œ      rtcgrp          0  ,  Œ             À        D   G         syscon@30340000          ,fsl,imx8mp-iomuxc-gpr syscon            X04             D   <      efuse@30350000        )   ,fsl,imx8mp-ocotp fsl,imx8mm-ocotp syscon            X05             \      Ö                                 D   ³   unique-id@8         X              D         speed-grade@10          X              D         mac-address@90          X   �           D   ^      mac-address@96          X   –           D   a      calib@264           X  d           D   (         clock-controller@30360000         $   ,fsl,imx8mp-anatop fsl,imx8mm-anatop         X06             ©           D   ´      snvs@30370000         #   ,fsl,sec-v4.0-mon syscon simple-mfd          X07             D   *   snvs-rtc-lp          ,fsl,sec-v4.0-mon-rtc-lp         9   *        @   4        þ                            \      ù      	  ƒsnvs-rtc            D   µ      snvs-powerkey            ,fsl,sec-v4.0-pwrkey         9   *        þ                  \      ù        ƒsnvs-pwrkey         G   t         U        ÷okay            D   ¶      snvs-lpgpr        +   ,fsl,imx8mp-snvs-lpgpr fsl,imx7d-snvs-lpgpr          D   ·         clock-controller@30380000            ,fsl,imx8mp-ccm          X08             þ       U          V           ©           \   +   ,   -   .   /   0      4  ƒosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       (  c      B            g      h      ”      (  s      8      ,      A      8      @        Š        ;šÊ /¯ Íe         D         reset-controller@30390000            ,fsl,imx8mp-src syscon           X09             þ       Y           Ÿ           D   w      gpc@303a0000             ,fsl,imx8mp-gpc          X0:                          þ       W            «        À           D   ¸   pgc                              power-domain@0          ¬            X            D   q      power-domain@1          ¬            X           D   |      power-domain@2          ¬            X           D   z      power-domain@3          ¬            X           D   {      power-domain@4          ¬            X           \      i      j             c     2      i      j        s      A      8      8        Š;šÊ /¯ ×„         D   “      power-domain@5          ¬            X           \          6        c      l      H        s      8      8        Š×„ /¯         D   d      power-domain@6          ¬            X           \      ÷        À   1        D   �      power-domain@7          ¬            X           \           f        c      e      f        s      8      8        Š/¯ ×„         D   1      power-domain@8          ¬            X           \             D   �      power-domain@9          ¬            X   	        \      ø     4        À   1        D   Œ      power-domain@10         ¬            X   
        \                  D   p      power-domain@11         ¬            X           D   �      power-domain@12         ¬            X           D   ‘      power-domain@13         ¬            X           D   ’      power-domain@14         ¬            X           \           c        c      d      c        s      @      3        ŠÍe ík@        D   }      power-domain@15         ¬            X           D   ~      power-domain@16         ¬            X           D   r      power-domain@17         ¬            X           \     7             c     7        s      @        ŠÍe         D   y      power-domain@18         ¬            X           \             D   s               bus@30400000             ,fsl,aips-bus simple-bus         X0@   @                                    é        D   ¹   pwm@30660000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0f             þ       Q           \      Ü      Ü        ƒipg per         Î         	  ÷disabled            í   2        ÷default         D   º      pwm@30670000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0g             þ       R           \      Ý      Ý        ƒipg per         Î         	  ÷disabled            í   3        ÷default         D   »      pwm@30680000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0h             þ       S           \      Þ      Þ        ƒipg per         Î         	  ÷disabled            í   4        ÷default         D   ¼      pwm@30690000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0i             þ       T           \      ß      ß        ƒipg per         Î         	  ÷disabled            í   5        ÷default         D   ½      timer@306a0000           ,nxp,sysctr-timer            X0j             þ       /           \   ,        ƒper         D   ¾      timer@306e0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0n             þ       3           \      Ë               ƒipg per         D   ¿      timer@306f0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0o             þ       3           \      Ê      Ÿ        ƒipg per         D   À      timer@30700000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0p             þ       4           \      É      ž        ƒipg per         D   Á         bus@30800000             ,fsl,aips-bus simple-bus         X0€   @                                    é        D   Â   spba-bus@30800000            ,fsl,spba-bus simple-bus         X0€                                       é   spi@30820000                                    "   ,fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0‚             þ                  \      ½      ½        ƒipg per         ŠÄ´         c      •        s      8         Ù   6             6                 Þrx tx         	  ÷disabled            í   7        ÷default         D   Ã      spi@30830000                                    "   ,fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0ƒ             þ                   \      ¾      ¾        ƒipg per         ŠÄ´         c      –        s      8         Ù   6            6                 Þrx tx         	  ÷disabled            í   8        ÷default         D   Ä      spi@30840000                                    "   ,fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0„             þ       !           \      ¿      ¿        ƒipg per         ŠÄ´         c      ³        s      8         Ù   6            6                 Þrx tx         	  ÷disabled            í   9        ÷default         D   Å      serial@30860000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0†             þ                  \      û      û        ƒipg per          Ù   6             6                  Þrx tx         	  ÷disabled            D   Æ      serial@30880000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0ˆ             þ                  \      ý      ý        ƒipg per          Ù   6             6                  Þrx tx         	  ÷disabled            í   :        ÷default          è        D   Ç      serial@30890000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0‰             þ                  \      ü      ü        ƒipg per          Ù   6             6                  Þrx tx         	  ÷disabled            í   ;        ÷default          è        D   È      can@308c0000             ,fsl,imx8mp-flexcan          X0Œ             þ       Ž           \      n      é        ƒipg per         c      t        s      0        ŠbZ         õ               <              ÷okay            í   =        ÷default            >        D   É      can@308d0000             ,fsl,imx8mp-flexcan          X0�             þ       �           \      n      ê        ƒipg per         c      u        s      0        ŠbZ         õ               <              ÷okay            í   ?        ÷default            @        D   Ê         crypto@30900000          ,fsl,sec-v4.0                                     X0�             é    0�             þ       [           \      k      n      	  ƒaclk ipg            D   Ë   jr@1000          ,fsl,sec-v4.0-job-ring           X              þ       i         	  ÷disabled            D   Ì      jr@2000          ,fsl,sec-v4.0-job-ring           X               þ       j           D   Í      jr@3000          ,fsl,sec-v4.0-job-ring           X  0            þ       r           D   Î         i2c@30a20000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0¢             þ       #           \      Í        ÷okay            ¶ €        í   A        !   B        ÷default gpio            +   C              5   C              D   Ï   pmic@25          ,nxp,pca9450c            X   %             D        þ              í   E        ÷default         D   Ð   regulators     BUCK1            ?         S        e ~ð        } øP        •VDD_SOC (BUCK1)         ¤  5        D   Ñ      BUCK2            ?         S        e B@        } øP        •VDD_ARM (BUCK2)         ¤  5        ¹ ~ð        Í øP        D         BUCK4            ?         S        e 2Z         } 2Z         •VDD_3V3 (BUCK4)         D   Ò      BUCK5            ?         S        e w@        } w@        •VDD_1V8 (BUCK5)         D   Ó      BUCK6            ?         S        e Ÿ¸        } ò        •NVCC_DRAM_1V1 (BUCK6)           D   Ô      LDO1             ?         S        e w@        } w@        •NVCC_SNVS_1V8 (LDO1)            D   Õ      LDO3             ?         S        e w@        } w@        •VDDA_1V8 (LDO3)         D   Ö      LDO5             ?         S        e 2Z         } w@        •NVCC_SD2 (LDO5)         D   Y            eeprom@50            ,atmel,24c32         X   P        å            î   F      eeprom@51            ,atmel,24c32         X   Q        å             ù        î   F      rtc@52           ,microcrystal,rv3028         X   R             C        þ                         í   G        ÷default           ¸         U        D   ×         i2c@30a30000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0£             þ       $           \      Î        ÷okay            í   H        !   I        ÷default gpio            +   C              5   C              ¶ €        D   Ø   eeprom@51            ,atmel,24c02         X   Q        å           î   J         i2c@30a40000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0¤             þ       %           \      Ï        ÷okay            í   K        !   L        ÷default gpio            +   C              5   C              ¶ €        D   Ù   leds@62          ,nxp,pca9533         X   b   led-1           S         led-2           S         led-3           S               i2c@30a50000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0¥             þ       &           \      Ð      	  ÷disabled            D   Ú      serial@30a60000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0¦             þ                  \      þ      þ        ƒipg per          Ù   6             6                  Þrx tx           ÷okay            í   M        ÷default         D   Û      mailbox@30aa0000             ,fsl,imx8mp-mu fsl,imx6sx-mu         X0ª             þ       X           \      Õ        0           D   Ü      mailbox@30e60000             ,fsl,imx8mp-mu fsl,imx6sx-mu         X0æ             þ       ˆ           0           \   N   $      	  ÷disabled            D   ˜      i2c@30ad0000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0­             þ       L           \      ç        ÷okay            í   O        !   P        ÷default gpio            +   Q              5   C              ¶ €        D   Ý   gpio@20          ,ti,tca6416          X                 D        þ              Ÿ            �      Á  ÝCSI1_CTRL1 CSI1_CTRL2 CSI1_CTRL3 CSI1_CTRL4 CSI2_CTRL1 CSI2_CTRL2 CSI2_CTRL3 CSI2_CTRL4 CLK_EN_AV nCAN2_EN nCAN1_EN PCIE1_nWAKE PCIE2_nWAKE PCIE2_nALERT_3V3 UART1_BT_RS_SEL UART1_RS232_485_SEL            î   J        D       bt-rs-hog           /                <        EUART1_BT_RS_SEL          O        D   Þ      rs232-485-hog           /                <        EUART1_RS232_485_SEL          Z        D   ß            i2c@30ae0000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0®             þ       M           \      è      	  ÷disabled            í   R        !   S        ÷default gpio            +   Q              5   Q              D   à      mmc@30b40000          2   ,fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0´             þ                  \      n      _             ƒipg ahb per         f           {           ‹         	  ÷disabled            í   T        ÷default         D   á      mmc@30b50000          2   ,fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0µ             þ                  \      n      _             ƒipg ahb per         f           {           ‹           ÷okay            í   U        !   V        •   W      "  ÷default state_100mhz state_200mhz            Ÿ        ­   X        ¹   Y        c      ‰        ŠëÂ          Æ        D   â      mmc@30b60000          2   ,fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0¶             þ                  \      n      _             ƒipg ahb per         f           {           ‹           ÷okay            c             Š×„          Ñ        í   Z        !   [        •   \      "  ÷default state_100mhz state_200mhz           D   ã      spi@30bb0000             ,nxp,imx8mp-fspi         X0»                   ßfspi_base fspi_mmap         þ       k           \      â      â        ƒfspi_en fspi            ŠÄ´         c      ‡                                  ÷okay            í   ]        ÷default         D   ä   flash@0          ,jedec,spi-nor           X            éÄ´         û                      î   J        D   å         dma-controller@30bd0000           ,fsl,imx8mp-sdma fsl,imx8mq-sdma         X0½             þ                  \      ì      k        ƒipg ahb                    (imx/sdma/sdma-imx7d.bin         D   6      ethernet@30be0000         -   ,fsl,imx8mp-fec fsl,imx8mq-fec fsl,imx6sx-fec            X0¾           0  þ       v          w          x          y         (  \      À      ò      „      ƒ      …      "  ƒipg ahb ptp enet_clk_ref enet_out            c      ^      „      ƒ      …         s      6      :      ;      9        Š    õá sY@            A           S           Ú   ^        æmac-address            <              ÷okay            e   _      	  prgmii-id            í   `        ÷default          y        D   æ   mdio                                 ethernet-phy@0           ,ethernet-phy-ieee802.3-c22          X                 D        þ               Š         ÿÿÿÿ        ²            À        Ø           í           D   _            ethernet@30bf0000         '   ,nxp,imx8mp-dwmac-eqos snps,dwmac-5.10a          X0¿             þ       ‡          †           macirq eth_wake_irq          \      í      á      ‚      �        ƒstmmaceth pclk ptp_ref tx           c      ^      ‚      �        s      6      :      ;        Š    õá sY@        Ú   a        æmac-address            <           ÷okay          	  prgmii-id            í   b        ÷default         e   c        D   ç   mdio             ,snps,dwmac-mdio                              ethernet-phy@1           ,ethernet-phy-ieee802.3-c22          X            Š         ÿÿÿÿ        ²           Ø           í           D   c               bus@30df0000             ,fsl,imx8mp-aipstz           X0ß             À   d                                            é0À  0À   @          D   ™   spba-bus@30c00000            ,fsl,spba-bus simple-bus         X0À                                       é   sai@30c10000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0Á             5          (  \   N              N      N      N           ƒbus mclk0 mclk1 mclk2 mclk3          Ù   e              e                  Þrx tx           þ       _         	  ÷disabled            D   è      sai@30c20000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0Â             5          (  \   N             N      N      N           ƒbus mclk0 mclk1 mclk2 mclk3          Ù   e             e                  Þrx tx           þ       `         	  ÷disabled            D   é      sai@30c30000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0Ã             5          (  \   N             N   	   N   
   N           ƒbus mclk0 mclk1 mclk2 mclk3          Ù   e             e                  Þrx tx           þ       2         	  ÷disabled            D   ê      sai@30c50000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0Å             5          (  \   N             N      N      N           ƒbus mclk0 mclk1 mclk2 mclk3          Ù   e             e   	               Þrx tx           þ       Z         	  ÷disabled            í   f        ÷default         D   ë      sai@30c60000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0Æ             5          (  \   N             N      N      N           ƒbus mclk0 mclk1 mclk2 mclk3          Ù   e   
          e                  Þrx tx           þ       Z         	  ÷disabled            D   ì      sai@30c80000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0È             5          (  \   N             N      N      N           ƒbus mclk0 mclk1 mclk2 mclk3          Ù   e             e                  Þrx tx           þ       o         	  ÷disabled            D   í      easrc@30c90000        "   ,fsl,imx8mp-easrc fsl,imx8mn-easrc           X0É             þ       z           \   N           ƒmem       €  Ù   e             e             e             e             e             e             e             e                @  Þctx0_rx ctx0_tx ctx1_rx ctx1_tx ctx2_rx ctx2_tx ctx3_rx ctx3_tx         Fimx/easrc/easrc-imx8mn.bin          T  @        b         	  ÷disabled            D   î      audio-controller@30ca0000            ,fsl,imx8mp-micfil           X0Ê             5          0  þ       m          n          ,          -         (  \   N      N   6      &      '            )  ƒipg_clk ipg_clk_app pll8k pll11k clkext3            Ù   e      €           Þrx        	  ÷disabled            D   ï      aud2htx@30cb0000             ,fsl,imx8mp-aud2htx          X0Ë             þ       ‚           \   N   !        ƒbus         Ù   e                  Þtx        	  ÷disabled            D   ð      xcvr@30cc0000            ,fsl,imx8mp-xcvr          X0Ì     0Ì    0Ì    €0Ì    €        ßram regs rxfifo txfifo        $  þ       €          �          ’            \   N      N   &   N      N   #        ƒipg phy spba pll_ipg             Ù   e             e                  Þrx tx           r   N          	  ÷disabled            D   ñ         dma-controller@30e00000           ,fsl,imx8mp-sdma fsl,imx8mq-sdma         X0à                        \   N                ƒipg ahb         þ       "           (imx/sdma/sdma-imx7d.bin         D   ò      dma-controller@30e10000           ,fsl,imx8mp-sdma fsl,imx8mq-sdma         X0á                        \   N                ƒipg ahb         þ       g           (imx/sdma/sdma-imx7d.bin         D   e      clock-controller@30e20000            ,fsl,imx8mp-audio-blk-ctrl           X0â             ©           Ÿ         @  \           {      |      }            €      ¶     A      &  ƒahb sai1 sai2 sai3 sai5 sai6 sai7 axi           À   d        c                    Šp  ˆ€         D   N         interconnect@32700000            ,fsl,imx8mp-noc fsl,imx8m-noc            X2p             \      g        y           ÷   g        D   t   opp-table            ,operating-points-v2         D   g   opp-200000000           f    ëÂ       opp-800000000           f    /¯       opp-1000000000          f    ;šÊ             bus@32c00000             ,fsl,aips-bus simple-bus         X2À   @                                    é        D   ó   isi@32e00000             ,fsl,imx8mp-isi          X2à    @         þ                 *           \                  ƒaxi apb         �   h        À   h         	  ÷disabled            D   ô   ports                                port@0          X       endpoint            Ù   i        D   k         port@1          X      endpoint            Ù   j        D   l               isp@32e10000             ,fsl,imx8mp-isp          X2á             þ       J            \                            ƒisp aclk hclk pclk          À   h      h         	  šisp csi2            �   h          	  ÷disabled            D   õ   ports                                port@1          X               isp@32e20000             ,fsl,imx8mp-isp          X2â             þ       K            \                            ƒisp aclk hclk pclk          À   h      h         	  šisp csi2            �   h         	  ÷disabled            D   ö   ports                                port@1          X               dwe@32e30000             ,nxp,imx8mp-dw100            X2ã             þ       d           \                  ƒaxi ahb         À   h           D   ÷      csi@32e40000          *   ,fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2ä             þ                  ¶æ²€         \                            ƒpclk wrap phy axi           c      ª      «        s      >              À   h           ­         	  ÷disabled            D   ø   ports                                port@0          X          port@1          X      endpoint            Ù   k        D   i               csi@32e50000          *   ,fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2å             þ       P           ¶æ²€         \                            ƒpclk wrap phy axi           c      ­      «        s      >              À   h           ­         	  ÷disabled            D   ù   ports                                port@0          X          port@1          X      endpoint            Ù   l        D   j               dsi@32e60000             ,fsl,imx8mp-mipi-dsim            X2æ             \           «        ƒbus_clk sclk_mipi           c      b      «        s      8              ŠëÂ n6         ¾n6         þ                  À   h          	  ÷disabled            D   ú   ports                                port@0          X       endpoint            Ù   m        D   n         port@1          X      endpoint            D   û               display-controller@32e80000          ,fsl,imx8mp-lcdif            X2è             \                       ƒpix axi disp_axi            þ                  À   h         	  ÷disabled            D   ü   port       endpoint            Ù   n        D   m            display-controller@32e90000          ,fsl,imx8mp-lcdif            X2é             þ                  \                       ƒpix axi disp_axi            À   h         	  ÷disabled            D   ý   port       endpoint            Ù   o        D   u            blk-ctrl@32ec0000         !   ,fsl,imx8mp-media-blk-ctrl syscon            X2ì                                    (  À   p   q   q   p   p   r   p   s   s   r      F  šbus mipi-dsi1 mipi-csi1 lcdif1 isi mipi-csi2 lcdif2 isp dwe mipi-dsi2         €  Ú   t      t      t      t      t      t      t      t      t       t      t   !   t      t   "   t      t   #   t         /  èlcdif-rd lcdif-wr isi0 isi1 isi2 isp0 isp1 dwe        @  \                                              &  ƒapb axi cam1 cam2 disp1 disp2 isp phy         0  c      a      b      ¬     9     8            (  s      A      8      (      (      @        ŠÍe ëÂ         Íe =õ‚à        ¬           D   h   bridge@5c            ,fsl,imx8mp-ldb          X   \     (         	  ßldb lvds            \     I        ƒldb         c      ®        s      (      	  ÷disabled            D   þ   ports                                port@0          X       endpoint            Ù   u        D   o         port@1          X      endpoint            Ù   v        D   Ÿ         port@2          X      endpoint            D   ÿ                  pcie-phy@32f00000            ,fsl,imx8mp-pcie-phy         X2ð             r   w      w           ûpciephy perst           À   x           	            ÷okay            \   x        ƒref          	        	)           D   ˆ      blk-ctrl@32f10000             ,fsl,imx8mp-hsio-blk-ctrl syscon         X2ñ     $        \      ÿ      Ù      	  ƒusb pcie            À   y   y   z   {   y   |      (  šbus usb usb-phy1 usb-phy2 pcie pcie-phy       @  Ú   t      t      t      t      t      t      t      t           ènoc-pcie usb1 usb2 pcie         ¬           ©            D   x      blk-ctrl@32fc0000             ,fsl,imx8mp-hdmi-blk-ctrl syscon         X2ü           (  \      c           ¨      §      ¦        ƒapb axi ref_266m ref_24m fdcc         (  À   }   }   }   }   }   }   }   ~   }   }      =  šbus irqsteer lcdif pai pvi trng hdmi-tx hdmi-tx-phy hdcp hrv          0  Ú   t      t      t      t      t      t           èhrv lcdif-hdmi hdcp         ¬           D         interrupt-controller@32fc2000         %   ,fsl,imx8mp-irqsteer fsl,imx-irqsteer            X2ü             þ       +            «        À           	=           	I   @        \      c        ƒipg         À               D   €      display-bridge@32fc4000          ,fsl,imx8mp-hdmi-pvi         X2ü@                 €        þ           À            	  ÷disabled            D      ports                                port@0          X       endpoint            Ù   �        D   …         port@1          X      endpoint            Ù   ‚        D   †               audio-bridge@32fc4800            ,fsl,imx8mp-hdmi-pai         X2üH                 €        þ           \      c        ƒapb         À            	  ÷disabled            D     port       endpoint            Ù   ƒ        D   ‡            display-controller@32fc6000          ,fsl,imx8mp-lcdif            X2ü`                 €        þ           \   „      c             ƒpix axi disp_axi            À            	  ÷disabled            D     port       endpoint            Ù   …        D   �            hdmi@32fd8000            ,fsl,imx8mp-hdmi-tx          X2ý€   ~ÿ             €        þ            \      c      ¨         „        ƒiahb isfr cec pix           c      ¨        s      6        À              	V         	  ÷disabled            D     ports                                port@0          X       endpoint            Ù   †        D   ‚         port@1          X         port@2          X      endpoint            Ù   ‡        D   ƒ               phy@32fdff00             ,fsl,imx8mp-hdmi-phy         X2ýÿ            \      c      §        ƒapb ref         c      §        s              À              ©            	          	  ÷disabled            D   „         pcie@33800000            ,fsl,imx8mp-pcie         X3€   @  ð             ßdbi config          \          7      Ù        ƒpcie pcie_bus pcie_aux          c      x        Š ˜–€        s      9                                 Lpci         	c       ÿ      0  é�           ø         ‚                 ð          	m           	w           þ       Œ           msi         À           	„                     €  	—                         ~                            }                            |                            {           	¥           	¸            À   x           r   w      w           ûapps turnoff            	É   ˆ      	  	Îpcie-phy            ÷okay            í   ‰        ÷default         	Ø   Š              	ã   ‹        D        pcie-ep@33800000             ,fsl,imx8mp-pcie-ep           X3€           3�     3°             ßdbi addr_space dbi2 atu         \          7      Ù        ƒpcie pcie_bus pcie_aux          c      x        Š ˜–€        s      9        	m           þ                  dma         	¥           À   x           r   w      w           ûapps turnoff            	É   ˆ      	  	Îpcie-phy            	ð           	ÿ         	  ÷disabled            D        gpu@38000000             ,vivante,gc          X8     €         þ                   \      ø     4           f        ƒcore shader bus reg                    c     3     4        s      A      A        Š;šÊ ;šÊ         À   Œ        D         gpu@38008000             ,vivante,gc          X8 €   €         þ                  \      ÷           f        ƒcore bus reg                       c     5        s      A        Š;šÊ         À   �        D         video-codec@38300000             ,nxp,imx8mm-vpu-g1           X80             þ                  \             c      r        s      8        Š/¯         À   Ž            D        video-codec@38310000             ,nxp,imx8mq-vpu-g2           X81             þ                  \     
        c      s      +        s      +        Š)¹' )¹'         À   Ž           D        blk-ctrl@38330000            ,fsl,imx8mp-vpu-blk-ctrl syscon          X83             ¬           À   �   �   ‘   ’        šbus g1 g2 vc8000e           \          
     	        ƒg1 g2 vc8000e           c      `        s      8        Š/¯       0  Ú   t   %   t   $   t   &   t   $   t   '   t   $        èg1 g2 vc8000e           D   Ž      npu@38500000             ,vivante,gc          X8P              þ                   \                i      j        ƒcore shader bus reg                    À   “        D         interrupt-controller@38800000            ,arm,gic-v3          X8€     8ˆ                          À            «        þ      	                        D         memory-controller@3d400000           ,snps,ddrc-3.80a         X=@   @          þ       “           D        ddr-pmu@3d800000          %   ,fsl,imx8mp-ddr-pmu fsl,imx8m-ddr-pmu            X=€   @          þ       b         usb-phy@381f0040             ,fsl,imx8mp-usb-phy          X8 @   @        \              ƒphy         c      “        s              À   x           	          	  ÷disabled            D   •      usb@32f10100             ,fsl,imx8mp-dwc3         X2ñ    8              \          @        ƒhsio suspend            þ       ”           À   x                                     
@   @   À            é      	  ÷disabled            í   ”        ÷default         D  	   usb@38100000          
   ,snps,dwc3           X8             \      ÿ      ’     @        ƒbus_early ref suspend           þ       (           	É   •   •        	Îusb2-phy usb3-phy            
         
:        D  
         usb-phy@382f0040             ,fsl,imx8mp-usb-phy          X8/ @   @        \              ƒphy         c      “        s              À   x           	          	  ÷disabled            D   —      usb@32f10108             ,fsl,imx8mp-dwc3         X2ñ   8/              \          @        ƒhsio suspend            þ       •           À   x                                     
@   @   À            é      	  ÷disabled            í   –        ÷default         D     usb@38200000          
   ,snps,dwc3           X8              \      ÿ      ’     @        ƒbus_early ref suspend           þ       )           	É   —   —        	Îusb2-phy usb3-phy            
         
:        D           dsp@3b6e8000             ,fsl,imx8mp-hifi4            X;n€  €          \   N      N       N      N           ƒipg ocram core debug            À   d        
Ytx rx rxdb        $  
d   ˜           ˜          ˜               Fimx/dsp/hifi4.bin           r   N         	  ûrunstall            
k   ™                	  ÷disabled            D           memory@40000000         Lmemory          X    @       €         regulator-usdhc2             ,regulator-fixed         
~  .à        í   š        ÷default         e 2Z         } 2Z       
  •VDDSW_SD2           
Ž   d        	Þ   ›                
Ÿ        D   X      regulator-vdd-io             ,regulator-fixed          ?         S        •VDD_IO          e w@        } w@        D   F      backlight-lvds0          ,pwm-backlight           í   œ        ÷default         
²   �      	  ÷disabled            D   ž      chosen        $  
¿/soc@0/bus@30800000/serial@30a60000       panel-lvds0         
Ë   ž        
²   ‹      	  ÷disabled            D     port       endpoint            Ù   Ÿ        D   v            regulator-can1-stby          ,regulator-fixed         e w@        } w@      
  •can1-stby           	Þ       
           D   >      regulator-can2-stby          ,regulator-fixed         e w@        } w@      
  •can2-stby           	Þ       	           D   @      regulator-vdd-12v0           ,regulator-fixed          ?         S        e ·         } ·       	  •VDD_12V0            D   �      regulator-vdd-1v8            ,regulator-fixed          ?         S        e w@        } w@        •VDD_1V8         D   J      regulator-vdd-3v3            ,regulator-fixed          ?         S        e 2Z         } 2Z         •VDD_3V3         D   ‹      regulator-vdd-5v0            ,regulator-fixed          ?         S        e LK@        } LK@        •VDD_5V0         D        __symbols__         
Õ/cpus/idle-states/cpu-pd-wait           
á/cpus/cpu@0         
ç/cpus/cpu@0/thermal-idle            
ò/cpus/cpu@1         
ø/cpus/cpu@1/thermal-idle            /cpus/cpu@2         	/cpus/cpu@2/thermal-idle            /cpus/cpu@3         /cpus/cpu@3/thermal-idle            %/cpus/l2-cache0         ,/opp-table          :/clock-osc-32k          B/clock-osc-24m          J/clock-ext1         S/clock-ext2         \/clock-ext3         e/clock-ext4       !  n/funnel/in-ports/port@0/endpoint          !  �/funnel/in-ports/port@1/endpoint          !  ”/funnel/in-ports/port@2/endpoint          !  §/funnel/in-ports/port@3/endpoint             º/funnel/out-ports/port/endpoint         Î/reserved-memory/dsp@92400000         '  Û/thermal-zones/cpu-thermal/trips/trip0        '  æ/thermal-zones/cpu-thermal/trips/trip1        '  ð/thermal-zones/soc-thermal/trips/trip0        '  û/thermal-zones/soc-thermal/trips/trip1          /soc@0          	/soc@0/etm@28440000       ,  /soc@0/etm@28440000/out-ports/port/endpoint         /soc@0/etm@28540000       ,  !/soc@0/etm@28540000/out-ports/port/endpoint         //soc@0/etm@28640000       ,  4/soc@0/etm@28640000/out-ports/port/endpoint         B/soc@0/etm@28740000       ,  G/soc@0/etm@28740000/out-ports/port/endpoint       0  U/soc@0/funnel@28c03000/in-ports/port@0/endpoint       0  j/soc@0/funnel@28c03000/in-ports/port@1/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@2/endpoint       /  ”/soc@0/funnel@28c03000/out-ports/port/endpoint        +  ª/soc@0/etf@28c04000/in-ports/port/endpoint        ,  ¶/soc@0/etf@28c04000/out-ports/port/endpoint       +  Ã/soc@0/etr@28c06000/in-ports/port/endpoint          Ï/soc@0/bus@30000000       "   W/soc@0/bus@30000000/gpio@30200000         "   ]/soc@0/bus@30000000/gpio@30210000         "   c/soc@0/bus@30000000/gpio@30220000         "   i/soc@0/bus@30000000/gpio@30230000         "  Õ/soc@0/bus@30000000/gpio@30240000         !  Û/soc@0/bus@30000000/tmu@30260000          &  ß/soc@0/bus@30000000/watchdog@30280000         &  å/soc@0/bus@30000000/watchdog@30290000         &  ë/soc@0/bus@30000000/watchdog@302a0000         #  ñ/soc@0/bus@30000000/timer@302d0000        #  ö/soc@0/bus@30000000/timer@302e0000        #  û/soc@0/bus@30000000/timer@302f0000        %   /soc@0/bus@30000000/pinctrl@30330000          -  /soc@0/bus@30000000/pinctrl@30330000/can1grp          -  /soc@0/bus@30000000/pinctrl@30330000/can2grp          -  )/soc@0/bus@30000000/pinctrl@30330000/eqosgrp          ,  6/soc@0/bus@30000000/pinctrl@30330000/fecgrp       0  B/soc@0/bus@30000000/pinctrl@30330000/flexspigrp       .  R/soc@0/bus@30000000/pinctrl@30330000/gpio4grp         .  `/soc@0/bus@30000000/pinctrl@30330000/gpio5grp         -  n/soc@0/bus@30000000/pinctrl@30330000/hdmigrp          1  {/soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          -  �/soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  š/soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp          -  ¬/soc@0/bus@30000000/pinctrl@30330000/i2c2grp          1  ¹/soc@0/bus@30000000/pinctrl@30330000/i2c3gpiogrp          -  Ë/soc@0/bus@30000000/pinctrl@30330000/i2c3grp          1  Ø/soc@0/bus@30000000/pinctrl@30330000/i2c5gpiogrp          -  ê/soc@0/bus@30000000/pinctrl@30330000/i2c5grp          1  ÷/soc@0/bus@30000000/pinctrl@30330000/i2c6gpiogrp          -  	/soc@0/bus@30000000/pinctrl@30330000/i2c6grp          .  /soc@0/bus@30000000/pinctrl@30330000/pcie0grp         0  $/soc@0/bus@30000000/pinctrl@30330000/pmicirqgrp       -  1/soc@0/bus@30000000/pinctrl@30330000/pwm1grp          -  >/soc@0/bus@30000000/pinctrl@30330000/pwm2grp          -  K/soc@0/bus@30000000/pinctrl@30330000/pwm3grp          -  X/soc@0/bus@30000000/pinctrl@30330000/pwm4grp          6  e/soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp         -  }/soc@0/bus@30000000/pinctrl@30330000/sai5grp          -  Š/soc@0/bus@30000000/pinctrl@30330000/spi1grp          -  ™/soc@0/bus@30000000/pinctrl@30330000/spi2grp          -  ¨/soc@0/bus@30000000/pinctrl@30330000/spi3grp          .  ·/soc@0/bus@30000000/pinctrl@30330000/uart2grp         .  Å/soc@0/bus@30000000/pinctrl@30330000/uart3grp         .  Ó/soc@0/bus@30000000/pinctrl@30330000/uart4grp         -  á/soc@0/bus@30000000/pinctrl@30330000/usb0grp          -  î/soc@0/bus@30000000/pinctrl@30330000/usb1grp          /  û/soc@0/bus@30000000/pinctrl@30330000/usdhc1grp        /  
/soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp         6  //soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp         /  E/soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  T/soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  j/soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  €/soc@0/bus@30000000/pinctrl@30330000/wdoggrp          .  �/soc@0/bus@30000000/pinctrl@30330000/lvds0grp         ,  ›/soc@0/bus@30000000/pinctrl@30330000/rtcgrp       $  §/soc@0/bus@30000000/syscon@30340000       #  «/soc@0/bus@30000000/efuse@30350000        /  ±/soc@0/bus@30000000/efuse@30350000/unique-id@8        2  ¼/soc@0/bus@30000000/efuse@30350000/speed-grade@10         2  Ì/soc@0/bus@30000000/efuse@30350000/mac-address@90         2  Õ/soc@0/bus@30000000/efuse@30350000/mac-address@96         -  Þ/soc@0/bus@30000000/efuse@30350000/calib@264          .  è/soc@0/bus@30000000/clock-controller@30360000         "  ï/soc@0/bus@30000000/snvs@30370000         .  ô/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  ý/soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  	/soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  /soc@0/bus@30000000/clock-controller@30380000         .  /soc@0/bus@30000000/reset-controller@30390000         !  /soc@0/bus@30000000/gpc@303a0000          4   /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  ./soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  ;/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  H/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  U/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  _/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  i/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  s/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  ~/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  ‰/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  “/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5   /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11          5  «/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@12          5  ¶/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@13          5  Æ/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@14          5  Ò/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@15          5  ß/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@16          5  í/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@17          5  ù/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@18            /soc@0/bus@30400000       !  9/soc@0/bus@30400000/pwm@30660000          !  F/soc@0/bus@30400000/pwm@30670000          !  S/soc@0/bus@30400000/pwm@30680000          !  `/soc@0/bus@30400000/pwm@30690000          #  
/soc@0/bus@30400000/timer@306a0000        #  /soc@0/bus@30400000/timer@306e0000        #  /soc@0/bus@30400000/timer@306f0000        #  #/soc@0/bus@30400000/timer@30700000          (/soc@0/bus@30800000       3  ’/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3  ¡/soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  °/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  ./soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  Í/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  ¿/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         3  /soc@0/bus@30800000/spba-bus@30800000/can@308c0000        3   /soc@0/bus@30800000/spba-bus@30800000/can@308d0000        $  4/soc@0/bus@30800000/crypto@30900000       ,  ;/soc@0/bus@30800000/crypto@30900000/jr@1000       ,  C/soc@0/bus@30800000/crypto@30900000/jr@2000       ,  K/soc@0/bus@30800000/crypto@30900000/jr@3000       !   t/soc@0/bus@30800000/i2c@30a20000          )  ,/soc@0/bus@30800000/i2c@30a20000/pmic@25          :  S/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK1         :  Y/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK2         :  _/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK4         :  e/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK5         :  k/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK6         9  q/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO1          9  v/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO3          9  {/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO5          (  €/soc@0/bus@30800000/i2c@30a20000/rtc@52       !   y/soc@0/bus@30800000/i2c@30a30000          !   ~/soc@0/bus@30800000/i2c@30a40000          !   ƒ/soc@0/bus@30800000/i2c@30a50000          $  Û/soc@0/bus@30800000/serial@30a60000       %  Ü/soc@0/bus@30800000/mailbox@30aa0000          %  ‡/soc@0/bus@30800000/mailbox@30e60000          !   ˆ/soc@0/bus@30800000/i2c@30ad0000          )  ‹/soc@0/bus@30800000/i2c@30ad0000/gpio@20          3  ™/soc@0/bus@30800000/i2c@30ad0000/gpio@20/bt-rs-hog        7  ©/soc@0/bus@30800000/i2c@30ad0000/gpio@20/rs232-485-hog        !  /soc@0/bus@30800000/i2c@30ae0000          !  /soc@0/bus@30800000/mmc@30b40000          !  /soc@0/bus@30800000/mmc@30b50000          !  M/soc@0/bus@30800000/mmc@30b60000          !  J/soc@0/bus@30800000/spi@30bb0000          )  ½/soc@0/bus@30800000/spi@30bb0000/flash@0          ,  Å/soc@0/bus@30800000/dma-controller@30bd0000       &  >/soc@0/bus@30800000/ethernet@30be0000         :  Ë/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0         &  1/soc@0/bus@30800000/ethernet@30bf0000         :  Ó/soc@0/bus@30800000/ethernet@30bf0000/mdio/ethernet-phy@1           Û/soc@0/bus@30df0000       3  á/soc@0/bus@30df0000/spba-bus@30c00000/sai@30c10000        3  æ/soc@0/bus@30df0000/spba-bus@30c00000/sai@30c20000        3  ë/soc@0/bus@30df0000/spba-bus@30c00000/sai@30c30000        3  …/soc@0/bus@30df0000/spba-bus@30c00000/sai@30c50000        3  ð/soc@0/bus@30df0000/spba-bus@30c00000/sai@30c60000        3  õ/soc@0/bus@30df0000/spba-bus@30c00000/sai@30c80000        5  ú/soc@0/bus@30df0000/spba-bus@30c00000/easrc@30c90000          @   /soc@0/bus@30df0000/spba-bus@30c00000/audio-controller@30ca0000       7  /soc@0/bus@30df0000/spba-bus@30c00000/aud2htx@30cb0000        4  /soc@0/bus@30df0000/spba-bus@30c00000/xcvr@30cc0000       ,  /soc@0/bus@30df0000/dma-controller@30e00000       ,  /soc@0/bus@30df0000/dma-controller@30e10000       .   /soc@0/bus@30df0000/clock-controller@30e20000           //soc@0/interconnect@32700000          '  3/soc@0/interconnect@32700000/opp-table          A/soc@0/bus@32c00000       !  G/soc@0/bus@32c00000/isi@32e00000          7  M/soc@0/bus@32c00000/isi@32e00000/ports/port@0/endpoint        7  V/soc@0/bus@32c00000/isi@32e00000/ports/port@1/endpoint        !  _/soc@0/bus@32c00000/isp@32e10000          !  e/soc@0/bus@32c00000/isp@32e20000          !  k/soc@0/bus@32c00000/dwe@32e30000          !  r/soc@0/bus@32c00000/csi@32e40000          7  }/soc@0/bus@32c00000/csi@32e40000/ports/port@1/endpoint        !  Œ/soc@0/bus@32c00000/csi@32e50000          7  —/soc@0/bus@32c00000/csi@32e50000/ports/port@1/endpoint        !  ¦/soc@0/bus@32c00000/dsi@32e60000          7  ¯/soc@0/bus@32c00000/dsi@32e60000/ports/port@0/endpoint        7  À/soc@0/bus@32c00000/dsi@32e60000/ports/port@1/endpoint        0  ¹/soc@0/bus@32c00000/display-controller@32e80000       >  Í/soc@0/bus@32c00000/display-controller@32e80000/port/endpoint         0  Ü/soc@0/bus@32c00000/display-controller@32e90000       >  ã/soc@0/bus@32c00000/display-controller@32e90000/port/endpoint         &  ñ/soc@0/bus@32c00000/blk-ctrl@32ec0000         0   /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c       F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@0/endpoint         F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@1/endpoint         F  )/soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@2/endpoint         &  2/soc@0/bus@32c00000/pcie-phy@32f00000         &  6/soc@0/bus@32c00000/blk-ctrl@32f10000         &  D/soc@0/bus@32c00000/blk-ctrl@32fc0000         2  R/soc@0/bus@32c00000/interrupt-controller@32fc2000         ,  `/soc@0/bus@32c00000/display-bridge@32fc4000       B  i/soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@0/endpoint         B  y/soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@1/endpoint         *  ˆ/soc@0/bus@32c00000/audio-bridge@32fc4800         8  ‘/soc@0/bus@32c00000/audio-bridge@32fc4800/port/endpoint       0  r/soc@0/bus@32c00000/display-controller@32fc6000       >   /soc@0/bus@32c00000/display-controller@32fc6000/port/endpoint         "  €/soc@0/bus@32c00000/hdmi@32fd8000         8  ®/soc@0/bus@32c00000/hdmi@32fd8000/ports/port@0/endpoint       8  ¿/soc@0/bus@32c00000/hdmi@32fd8000/ports/port@2/endpoint       !  Ð/soc@0/bus@32c00000/phy@32fdff00            /soc@0/pcie@33800000            Ü/soc@0/pcie@33800000            á/soc@0/pcie-ep@33800000         ê/soc@0/pcie-ep@33800000         �/soc@0/gpu@38000000         m/soc@0/gpu@38008000         ¤/soc@0/video-codec@38300000         ¯/soc@0/video-codec@38310000         ò/soc@0/blk-ctrl@38330000            /soc@0/npu@38500000       %  /soc@0/interrupt-controller@38800000          "  
/soc@0/memory-controller@3d400000           /soc@0/usb-phy@381f0040         /soc@0/usb@32f10100       !  "/soc@0/usb@32f10100/usb@38100000            -/soc@0/usb-phy@382f0040         7/soc@0/usb@32f10108       !  >/soc@0/usb@32f10108/usb@38200000            I/soc@0/dsp@3b6e8000         m/regulator-usdhc2           M/regulator-vdd-io           X/backlight-lvds0            h/panel-lvds0            t/panel-lvds0/port/endpoint          ~/regulator-can1-stby            Œ/regulator-can2-stby            š/regulator-vdd-12v0         §/regulator-vdd-1v8          ³/regulator-vdd-3v3          ¿/regulator-vdd-5v0           	interrupt-parent #address-cells #size-cells compatible model ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us wakeup-latency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache nvmem-cells nvmem-cell-names operating-points-v2 #cooling-cells cpu-idle-states cpu-supply duration-us cache-unified cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names remote-endpoint ranges no-map status interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend cpu clock-names gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names pinctrl-0 pinctrl-names #thermal-sensor-cells fsl,ext-reset-output fsl,pins regmap offset linux,keycode wakeup-source assigned-clocks assigned-clock-parents assigned-clock-rates #reset-cells #power-domain-cells power-domains #pwm-cells dmas dma-names fsl,dte-mode fsl,clk-source fsl,stop-mode xceiver-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-ramp-delay nxp,dvs-run-voltage nxp,dvs-standby-voltage pagesize vcc-supply read-only aux-voltage-chargeable trickle-resistor-ohms #mbox-cells gpio-hog line-name output-low output-high fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 sd-uhs-sdr104 vmmc-supply vqmmc-supply disable-wp non-removable reg-names spi-max-frequency spi-rx-bus-width spi-tx-bus-width #dma-cells fsl,sdma-ram-script-name fsl,num-tx-queues fsl,num-rx-queues phy-handle phy-mode fsl,magic-packet enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,min-output-impedance ti,rx-internal-delay ti,tx-internal-delay interrupt-names intf_mode #access-controller-cells #sound-dai-cells firmware-name fsl,asrc-rate fsl,asrc-format resets #interconnect-cells fsl,blk-ctrl power-domain-names fsl,num-channels samsung,pll-clock-frequency interconnects interconnect-names reset-names #phy-cells fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,channel fsl,num-irqs reg-io-width bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phys phy-names reset-gpio vpcie-supply num-ib-windows num-ob-windows dma-ranges snps,gfladj-refclk-lpm-sel-quirk snps,parkmode-disable-ss-quirk mbox-names mboxes access-controllers off-on-delay-us startup-delay-us enable-active-high power-supply stdout-path backlight cpu_pd_wait A53_0 cpu0_therm A53_1 cpu1_therm A53_2 cpu2_therm A53_3 cpu3_therm A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 ca_funnel_in_port0 ca_funnel_in_port1 ca_funnel_in_port2 ca_funnel_in_port3 ca_funnel_out_port0 dsp_reserved cpu_alert0 cpu_crit0 soc_alert0 soc_crit0 soc etm0 etm0_out_port etm1 etm1_out_port etm2 etm2_out_port etm3 etm3_out_port hugo_funnel_in_port0 hugo_funnel_in_port1 hugo_funnel_in_port2 hugo_funnel_out_port0 etf_in_port etf_out_port etr_in_port aips1 gpio5 tmu wdog1 wdog2 wdog3 gpt1 gpt2 gpt3 iomuxc pinctrl_flexcan1 pinctrl_flexcan2 pinctrl_eqos pinctrl_fec pinctrl_flexspi pinctrl_gpio4 pinctrl_gpio5 pinctrl_hdmi pinctrl_i2c1_gpio pinctrl_i2c1 pinctrl_i2c2_gpio pinctrl_i2c2 pinctrl_i2c3_gpio pinctrl_i2c3 pinctrl_i2c5_gpio pinctrl_i2c5 pinctrl_i2c6_gpio pinctrl_i2c6 pinctrl_pcie0 pinctrl_pmic pinctrl_pwm1 pinctrl_pwm2 pinctrl_pwm3 pinctrl_pwm4 pinctrl_reg_usdhc2_vmmc pinctrl_sai5 pinctrl_ecspi1 pinctrl_ecspi2 pinctrl_ecspi3 pinctrl_uart2 pinctrl_uart3 pinctrl_uart4 pinctrl_usb0 pinctrl_usb1 pinctrl_usdhc1 pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_lvds0 pinctrl_rtc gpr ocotp imx8mp_uid cpu_speed_grade eth_mac1 eth_mac2 tmu_calib anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_mipi_phy1 pgc_pcie_phy pgc_usb1_phy pgc_usb2_phy pgc_mlmix pgc_audio pgc_gpu2d pgc_gpumix pgc_vpumix pgc_gpu3d pgc_mediamix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_vc8000e pgc_hdmimix pgc_hdmi_phy pgc_mipi_phy2 pgc_hsiomix pgc_ispdwp aips2 system_counter gpt6 gpt5 gpt4 aips3 uart1 crypto sec_jr0 sec_jr1 sec_jr2 buck1 buck2 buck4 buck5 buck6 ldo1 ldo3 ldo5 rv3028 mu2 gpio_expander uart1_bt_rs_sel uart1_rs232_485_sel spi_nor sdma1 ethphy0 ethphy1 aips5 sai1 sai2 sai3 sai6 sai7 easrc micfil aud2htx xcvr sdma3 sdma2 audio_blk_ctrl noc noc_opp_table aips4 isi_0 isi_in_0 isi_in_1 isp_0 isp_1 dewarp mipi_csi_0 mipi_csi_0_out mipi_csi_1 mipi_csi_1_out mipi_dsi dsim_from_lcdif1 mipi_dsi_out lcdif1_to_dsim lcdif2 lcdif2_to_ldb media_blk_ctrl lvds_bridge ldb_from_lcdif2 ldb_lvds_ch0 ldb_lvds_ch1 hsio_blk_ctrl hdmi_blk_ctrl irqsteer_hdmi hdmi_pvi pvi_from_lcdif3 pvi_to_hdmi_tx hdmi_pai pai_to_hdmi_tx lcdif3_to_pvi hdmi_tx_from_pvi hdmi_tx_from_pai hdmi_tx_phy pcie pcie0_ep pcie_ep vpumix_blk_ctrl npu gic edacmc usb3_phy0 usb3_0 usb_dwc3_0 usb3_phy1 usb3_1 usb_dwc3_1 dsp reg_vdd_io backlight_lvds0 panel_lvds0 panel0_in reg_can1_stby reg_can2_stby reg_vdd_12v0 reg_vdd_1v8 reg_vdd_3v3 reg_vdd_5v0 