Ðþí ÙÍ   8 º¸   (             º€                                                                      ,Freescale i.MX8QM MEK            2fsl,imx8qm-mek fsl,imx8qm      aliases          =/bus@5b000000/mmc@5b010000           B/bus@5b000000/mmc@5b020000           G/bus@5b000000/mmc@5b030000           L/bus@5a000000/serial@5a060000            T/bus@5a000000/serial@5a070000            \/bus@5a000000/serial@5a080000            d/bus@5a000000/serial@5a090000            l/bus@5a000000/spi@5a000000           q/bus@5a000000/spi@5a010000           v/bus@5a000000/spi@5a020000           {/bus@5a000000/spi@5a030000            €/vpu@2c000000/vpu-core@2d080000           Š/vpu@2c000000/vpu-core@2d090000           ”/vpu@2c000000/vpu-core@2d0a0000       cpus                                 cpu@0            žcpu          2arm,cortex-a53           ª                 ®                   µpsci             Ã  €          Ð   @         â            ï  €          ü   @           €                   ,           @           O   	      cpu@1            žcpu          2arm,cortex-a53           ª                ®                   µpsci             Ã  €          Ð   @         â            ï  €          ü   @           €                   ,           @           O   
      cpu@2            žcpu          2arm,cortex-a53           ª                ®                   µpsci             Ã  €          Ð   @         â            ï  €          ü   @           €                   ,           @           O         cpu@3            žcpu          2arm,cortex-a53           ª                ®                   µpsci             Ã  €          Ð   @         â            ï  €          ü   @           €                   ,           @           O         l2-cache0            2cache           W            c         Å            Ò   @         ä           O         l2-cache1            2cache           W            c         Å            Ò   @         ä           O           opp-table-0          2operating-points-v2          q        O      opp-600000000           |    #ÃF         ƒ »         ‘ Ið      opp-896000000           |    5gà         ƒ B@        ‘ Ið      opp-1104000000          |    AÍ´         ƒ Èà        ‘ Ið      opp-1200000000          |    G†Œ         ƒ Èà        ‘ Ið         ¢         opp-table-1          2operating-points-v2          q        O     opp-600000000           |    #ÃF         ƒ B@        ‘ Ið      opp-1056000000          |    >ñH         ƒ B@        ‘ Ið      opp-1296000000          |    M?d         ƒ Èà        ‘ Ið      opp-1596000000          |    _!         ƒ Èà        ‘ Ið         ¢         interrupt-controller@51a00000            2arm,gic-v3        P   ª    Q              Q°             R               R             R                              ®            ¿        Ô      	                        O         pmu          2arm,armv8-pmuv3         Ô               psci             2arm,psci-1.0             ¼smc       timer            2arm,armv8-timer       0  Ô                                 
         iommu@51400000           2arm,mmu-500                       ª    Q@                 ß           ò        Œ  Ô                                                                                                                                                                                                                                                                                                                                                                                   O   ¼      system-controller            2fsl,imx-scu         ÿtx0 rx0 gip3          $  
                                 power-controller             2fsl,imx8qm-scu-pd fsl,scu-pd                       O         clock-controller             2fsl,imx8qm-clk fsl,scu-clk          %           O         pinctrl          2fsl,imx8qm-iomuxc           2default         @           O   Ù   hoggrp          J   s      L   '     L        O         cs42888_resetgrp            J   ²     L        O         i2c-mipi-csi0grp            J   I    Â      J    Â           O        i2c-mipi-csi1grp            J   P    Â      Q    Â           O        i2c0grp         J   R     !   S     !        O   ž      i2c1grp         J        L        L        O   ¤      i2c1gpio-grp            J      Æ  L      Æ  L        O   ¥      adc0grp         J   �    À  `        O   ª      cm41i2cgrp          J         L         L        O         esai0grp          x  J   h    Æ  @   i    Æ  @   j    Æ  @   k    Æ  @   l    Æ  @   m    Æ  @   n    Æ  @   o    Æ  @   p    Æ  @   q    Æ  @        O   #      fec1grp       ¨  J   ¦          ¥          ô          ó          õ          ö          ÷          ø          ù          ú          û          ü          ý          þ               O   Å      lpspi2grp         $  J   z      @   {      @   |      @        O   �      lpspi2csgrp         J   }      !        O   ‘      mipi0_lpi2c0grp       $  J   ?    Æ      @    Æ      B               O   Z      mipi1_lpi2c0grp       $  J   C    Æ      D    Æ      F               O   j      flexspi0grp       À  J   µ      !   ¶      !   ·      !   ¸      !   ¹      !   º      !   »      !   ¼      !   ½      !   ¾      !   ¿      !   À      !   Á      !   Â      !   Ã      !   Ä      !        O   Ú      fec2grp       œ  J                  `          `         `         `         `         `         `         `         `  	       `  
       `         `        O   È      flexcan0grp         J   “       !   ’       !        O   ®      flexcan1grp         J   •       !   ”       !        O   ±      flexcan3grp         J   —       !   –       !        O   ³      lpuart0grp          J                            O   •      lpuart1grp        0  J                                                O   —      lpuart2grp          J                          O   ™      lpuart3grp          J                          O   ›      lvds0lpi2c1grp          J   6    Æ  L   7    Æ  L        O   b      lvds1lpi2c1grp          J   <    Æ  L   =    Æ  L        O   q      mipi-csi0grp          $  J   K   À  A   L   À  A   H    À  A        O        mipi-csi1grp          $  J   N   À  A   O   À  A   M    À  A        O        pcieagrp          $  J   Ç     !   È     !   +               O   ã      pcieareggrp         J   ;     !        O   û      pciebgrp          $  J   É      !   Ê     !   Ë     !        O   ß      pwmlvds0grp         J   2               O   ^      pwmlvds1grp         J   8               O   n      sai0grp       0  J   y     L   ~     L   �     L        l        O   '      sai1grp       0  J   €      @   „      @   ƒ      `   ‚      @        O   )      typecgrp            J   ³      !        O          typecmuxgrp         J   ¬      `   œ      `        O   õ      usbotg1grp          J   ™     !        O   º      usdhc1grp         „  J   Ñ      A   Ò       !   Ó       !   Ô       !   Õ       !   Ö       !   ×       !   Ø       !   Ù       !   Ú       !   Û       A        O   ½      usdhc2grp         T  J   Þ      A   ß       !   à       !   á       !   ã       !   ä       !   Ÿ       !        O   ¿      usdhc2gpiogrp         $  J   è      !   é      !   ž      !        O   À         reset-controller             2fsl,imx-scu-reset           S           O   �      rtc          2fsl,imx8qxp-sc-rtc          O        ocotp            2fsl,imx8qm-scu-ocotp                                      `        O     mac@1c4          ª  Ä           O        mac@1c6          ª  Æ           O   Ë         thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal           j           O         watchdog          !   2fsl,imx8qm-sc-wdt fsl,imx-sc-wdt            €   <         thermal-zones           O     cpu0-thermal            Œ   ú        ¢  Ð        °          trips      trip0           À ¡ø        Ì  Ð         ¥passive         O         trip1           À ð        Ì  Ð      	   ¥critical            O           cooling-maps       map0            ×         0  Ü   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            gpu0-thermal            Œ   ú        ¢  Ð        °      �   trips      trip0           À ¡ø        Ì  Ð         ¥passive         O        trip1           À ð        Ì  Ð      	   ¥critical            O              gpu1-thermal            Œ   ú        ¢  Ð        °      ”   trips      trip0           À ¡ø        Ì  Ð         ¥passive         O         trip1           À ð        Ì  Ð      	   ¥critical            O  !            drc0-thermal            Œ   ú        ¢  Ð        °         trips      trip0           À ¡ø        Ì  Ð         ¥passive         O  "      trip1           À ð        Ì  Ð      	   ¥critical            O  #            pmic-thermal            Œ   ú        ¢  Ð        °     ñ   trips      trip0           À ­°        Ì  Ð         ¥passive         O         trip1           À èH        Ì  Ð      	   ¥critical            O  $         cooling-maps       map0            ×         0  Ü   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               clock-dummy          2fixed-clock         %            ë          
  ûclk_dummy           O         clock-esai1-rx           2fixed-clock         %            ë            ûesai1_rx_clk            O   >      clock-esai1-rx-hf            2fixed-clock         %            ë            ûesai1_rx_hf_clk         O   ?      clock-esai1-tx           2fixed-clock         %            ë            ûesai1_tx_clk            O   @      clock-esai1-tx-hf            2fixed-clock         %            ë            ûesai1_tx_hf_clk         O   A      clock-hdmi-rx-mclk           2fixed-clock         %            ë            ûhdmi-rx-mclk            O   7      clock-mlb-clk            2fixed-clock         %            ë            ûmlb_clk         O   6      clock-sai5-rx-bclk           2fixed-clock         %            ë            ûsai5_rx_bclk            O   J      clock-sai5-tx-bclk           2fixed-clock         %            ë            ûsai5_tx_bclk            O  %      clock-sai6-rx-bclk           2fixed-clock         %            ë            ûsai6_rx_bclk            O   K      clock-sai6-tx-bclk           2fixed-clock         %            ë            ûsai6_tx_bclk            O  &      clock-spdif1-rx          2fixed-clock         %            ë          
  ûspdif1_rx           O  '      clock-controller-lvds-ipg            2fixed-clock         %            ën6         ûlvds0_ipg_clk           O   \      clock-controller-dsi-ipg             2fixed-clock         %            ë'         ûdsi_ipg_clk         O   T      clock-controller-mipi-div2-pll           2fixed-clock         %            ë¿Ì         ûmipi_pll_div2_clk           O  (      bus@55000000             2simple-bus                                   U       U              O  )   dsp@556e8000             2fsl,imx8qm-hifi4             ªUn€  €          ®                 ipg ocram core           !      ë                 ×      $  
                                       ÿtx rx rxdb          /imx/dsp/hifi4.bin           =okay            D                    O  *         bus@31400000             2simple-bus                                   1@      1@   	          O  +   crypto@31400000          2fsl,imx8qm-caam fsl,sec-v4.0             ª1@   	          Ô       ”                                        1@   	          !     õ        R   	        O  ,   jr@30000          *   2fsl,imx8qm-job-ring fsl,sec-v4.0-job-ring            ª              Ô      Å           !     õ        O  -      jr@40000          *   2fsl,imx8qm-job-ring fsl,sec-v4.0-job-ring            ª              Ô      Æ           !     ö        O  .            clock-cm41-ipg           2fixed-clock         %            ëÞ)         ûcm41_ipg_clk            O         bus@38000000             2simple-bus                                   8       8                           O  /   i2c@3b230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ª;#             Ô   	            ®                     per ipg         ^     4           nn6         !     4        =okay                                      ë †         2default         @           O  0   gpio@20          2ti,tca6416           ª             ƒ        “           O   ø      audio-codec@48           2cirrus,cs42888           ª   H         ®               mclk            2default         @           Ÿ           ©           ³           ¾           É               ,  ^     E        E         E                  n.à  î   »€  »€         O           intmux@3b400000          2fsl,imx-intmux           ª;@                        `  Ô                                                         '                                ¿        ®            ®           ipg         !     5        =okay            O         clock-controller@3b630000            2fsl,imx8qxp-lpcg             ª;c             %            ®     4              Õ             (  ûcm41_lpcg_i2c_clk cm41_lpcg_i2c_ipg_clk         !     4        O            clock-audio-ipg          2fixed-clock         %            ë'         ûaudio_ipg_clk           O   %      clock-ext-aud-mclk0          2fixed-clock         %            ë            ûext_aud_mclk0           O   8      clock-ext-aud-mclk1          2fixed-clock         %            ë            ûext_aud_mclk1           O   9      clock-esai0-rx           2fixed-clock         %            ë            ûesai0_rx_clk            O   :      clock-esai0-rx-hf            2fixed-clock         %            ë            ûesai0_rx_hf_clk         O   ;      clock-esai0-tx           2fixed-clock         %            ë            ûesai0_tx_clk            O   <      clock-esai0-tx-hf            2fixed-clock         %            ë            ûesai0_tx_hf_clk         O   =      clock-spdif0-rx          2fixed-clock         %            ë          
  ûspdif0_rx           O   B      clock-sai0-rx-bclk           2fixed-clock         %            ë            ûsai0_rx_bclk            O   C      clock-sai0-tx-bclk           2fixed-clock         %            ë            ûsai0_tx_bclk            O   D      clock-sai1-rx-bclk           2fixed-clock         %            ë            ûsai1_rx_bclk            O   E      clock-sai1-tx-bclk           2fixed-clock         %            ë            ûsai1_tx_bclk            O   F      clock-sai2-rx-bclk           2fixed-clock         %            ë            ûsai2_rx_bclk            O   G      clock-sai3-rx-bclk           2fixed-clock         %            ë            ûsai3_rx_bclk            O   H      clock-sai4-rx-bclk           2fixed-clock         %            ë            ûsai4_rx_bclk            O   I      bus@59000000             2simple-bus                                   Y       Y              O  1   asrc@59000000            2fsl,imx8qm-asrc          ªY              Ô      t         d   ®                                                                                       �  mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  ã   !               !              !              !             !             !                  èrxa rxb rxc txa txb txc         ò  »€                                !     ž        =okay            O        esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai             ªY             Ô      ™            ®   "       "      "               core extal fsys spba             ã   !             !                   èrx tx           !     Ÿ        =okay            2default         @   #      4  ^            E        E         E      "                           n    .à  î   »€ î          O         spdif@59020000           2fsl,imx8qm-spdif             ªY             Ô      È         Ê         0   ®   $         $               %               :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            ã   !             !   	               èrx tx           !            	  =disabled            O  2      sai@59040000             2fsl,imx8qm-sai           ªY             Ô      :            ®   &          &                 bus mclk0 mclk1 mclk2 mclk3         èrx tx            ã   !             !                   !     >        =okay            7          ,  ^     E        E         E      &           n.à  î   »€ î          2default         @   '        O   þ      sai@59050000             2fsl,imx8qm-sai           ªY             Ô      <            ®   (          (                 bus mclk0 mclk1 mclk2 mclk3         èrx tx            ã   !             !                   !     ?        =okay          ,  ^     E        E         E      (           n.à  î   »€ î          2default         @   )        O        sai@59060000             2fsl,imx8qm-sai           ªY             Ô      >            ®   *          *                 bus mclk0 mclk1 mclk2 mclk3         èrx          ã   !                  !     @      	  =disabled            O  3      sai@59070000             2fsl,imx8qm-sai           ªY             Ô      C            ®   +          +                 bus mclk0 mclk1 mclk2 mclk3         èrx          ã   !                  !     ¢      	  =disabled            O  4      dma-controller@591f0000          2fsl,imx8qm-edma          ªY             H           S           `          ü  Ô      v         w         x         y         z         {         š         š         É         Ë         Í         Ï         ;         ;         =         =         ?         D         F         H         q            !      þ      ÿ                     «     ¬     ­     ®     ¯     °     ±     ²     ³     ´     µ     ¶     ·     ¸     ¹        O   !      clock-controller@59400000            2fsl,imx8qxp-lpcg             ªY@             %            ®   %   %        Õ             &  ûasrc0_lpcg_ipg_clk asrc0_lpcg_mem_clk           !     ž        O         clock-controller@59410000            2fsl,imx8qxp-lpcg             ªYA             %            ®          %        Õ             (  ûesai0_lpcg_extal_clk esai0_lpcg_ipg_clk         !     Ÿ        O   "      clock-controller@59420000            2fsl,imx8qxp-lpcg             ªYB             %            ®          %        Õ            %  ûspdif0_lpcg_tx_clk spdif0_lpcg_gclkw            !              O   $      clock-controller@59440000            2fsl,imx8qxp-lpcg             ªYD             %            ®          %        Õ             !  ûsai0_lpcg_mclk sai0_lpcg_ipg_clk            !     >        O   &      clock-controller@59450000            2fsl,imx8qxp-lpcg             ªYE             %            ®          %        Õ             !  ûsai1_lpcg_mclk sai1_lpcg_ipg_clk            !     ?        O   (      clock-controller@59460000            2fsl,imx8qxp-lpcg             ªYF             %            ®          %        Õ             !  ûsai2_lpcg_mclk sai2_lpcg_ipg_clk            !     @        O   *      clock-controller@59470000            2fsl,imx8qxp-lpcg             ªYG             %            ®          %        Õ             !  ûsai3_lpcg_mclk sai3_lpcg_ipg_clk            !     ¢        O   +      clock-controller@59580000            2fsl,imx8qxp-lpcg             ªYX             %            ®   %   %   %        Õ               4  ûdsp_lpcg_adb_clk dsp_lpcg_ipg_clk dsp_lpcg_core_clk         !            	  =disabled            O  5      clock-controller@59590000            2fsl,imx8qxp-lpcg             ªYY             %            ®   %        Õ           ûdsp_ram_lpcg_ipg_clk            !           	  =disabled            O  6      asrc@59800000            2fsl,imx8qm-asrc          ªY€             Ô      |         d   ®   ,       ,                                                                             �  mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  ã   -               -              -              -             -             -                  èrxa rxb rxc txa txb txc         ò  @                               !     Æ      	  =disabled            O  7      sai@59820000             2fsl,imx8qm-sai           ªY‚             Ô      I            ®   .          .                 bus mclk0 mclk1 mclk2 mclk3          ã   -             -   	                èrx tx           !     È        =okay          4  ^            ì        ì         ì      .                           n    .à  Ü   »€ Ü           q        O   1      sai@59830000             2fsl,imx8qm-sai           ªYƒ             Ô      K            ®   /          /                 bus mclk0 mclk1 mclk2 mclk3         ã   -   
                ètx          !     É        =okay          4  ^            ì        ì         ì      /                           n    .à  Ü   »€ Ü           q        O   2      amix@59840000            2fsl,imx8qm-audmix            ªY„              ®   0            ipg         !     Ê        †   1   2        =okay            O  8      mqs@59850000             2fsl,imx8qm-mqs           ªY…              ®   3      3          
  mclk core           !     Ë      	  =disabled            O  9      dma-controller@599f0000          2fsl,imx8qm-edma          ªYŸ             H           S           `   À      �  Ô      ~                  €         �         ‚         ƒ                               J         J         L         s         X  !     Ì     Í     Î     Ï     Ð     Ñ     Ò     Ó     Ô     Õ     Ö        O   -      clock-controller@59d00000            2fsl,imx8qxp-lpcg             ªYÐ             %            ®     E           Õ            ûaud_rec_clk0_lpcg_clk           !     E        O   4      clock-controller@59d10000            2fsl,imx8qxp-lpcg             ªYÑ             %            ®     ì           Õ            ûaud_rec_clk1_lpcg_clk           !     ì        O   5      clock-controller@59d20000            2fsl,imx8qxp-lpcg             ªYÒ             %            ®     E            Õ            ûaud_pll_div_clk0_lpcg_clk           !     E        O         clock-controller@59d30000            2fsl,imx8qxp-lpcg             ªYÓ             %            ®     ì            Õ            ûaud_pll_div_clk1_lpcg_clk           !     ì        O         clock-controller@59d50000            2fsl,imx8qxp-lpcg             ªYÕ             %            ®               Õ            ûmclkout0_lpcg_clk           !     ï        O         clock-controller@59d60000            2fsl,imx8qxp-lpcg             ªYÖ             %            ®               Õ            ûmclkout1_lpcg_clk           !     ð        O  :      acm@59e00000             2fsl,imx8qm-acm           ªYà             %         ¨  !     í     î     ï     ð     E     ì     ž     Æ     Ÿ     Ç     >     ?     @     ¢     £     ¤     È     É           ¡     Ë      |   ®   4       5                     6   7   8   9   :   ;   <   =   >   ?   @   A   B   B   C   D   E   F   G   H   I   J   K     Ž  aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk mlb_clk hdmi_rx_mclk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk esai1_rx_clk esai1_rx_hf_clk esai1_tx_clk esai1_tx_hf_clk spdif0_rx spdif1_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk sai5_tx_bclk sai6_rx_bclk           O          clock-controller@59c00000            2fsl,imx8qxp-lpcg             ªYÀ             %            ®   %   %        Õ             &  ûasrc1_lpcg_ipg_clk asrc1_lpcg_mem_clk           !     Æ        O   ,      clock-controller@59c20000            2fsl,imx8qxp-lpcg             ªYÂ             %            ®          %        Õ             !  ûsai6_lpcg_mclk sai6_lpcg_ipg_clk            !     È        O   .      clock-controller@59c30000            2fsl,imx8qxp-lpcg             ªYÃ             %            ®          %        Õ             !  ûsai7_lpcg_mclk sai7_lpcg_ipg_clk            !     É        O   /      clock-controller@59c40000            2fsl,imx8qxp-lpcg             ªYÄ             %            ®   %        Õ            ûamix_lpcg_ipg_clk           !     Ê        O   0      clock-controller@59c50000            2fsl,imx8qxp-lpcg             ªYÅ             %            ®          %        Õ             !  ûmqs0_lpcg_mclk mqs0_lpcg_ipg_clk            !     Ë        O   3      sai@59080000             2fsl,imx8qm-sai           ªY             Ô      E            ®   L          L                 bus mclk0 mclk1 mclk2 mclk3         èrx          ã   !                  ‹                   !     £      	  =disabled            O  ;      sai@59090000             2fsl,imx8qm-sai           ªY	             Ô      G            ®   M          M                 bus mclk0 mclk1 mclk2 mclk3         ètx          ã   !                   ‹                   !     ¤      	  =disabled            O  <      clock-controller@59480000            2fsl,imx8qxp-lpcg             ªYH             %            ®          %        Õ             !  ûsai4_lpcg_mclk sai4_lpcg_ipg_clk            !     £      	  =disabled            O   L      clock-controller@59490000            2fsl,imx8qxp-lpcg             ªYI             %            ®          %        Õ             !  ûsai5_lpcg_mclk sai5_lpcg_ipg_clk            !     ¤      	  =disabled            O   M      esai@59810000         !   2fsl,imx8qm-esai fsl,imx6ull-esai             ªY�             Ô      ›            ®   N       N      N               core extal fsys spba             ã   -             -                   èrx tx           !     Ç      	  =disabled            O  =      clock-controller@59c10000            2fsl,imx8qxp-lpcg             ªYÁ             %            ®          %        Õ             (  ûesai1_lpcg_extal_clk esai1_lpcg_ipg_clk         !     Ç        O   N         vpu@2c000000                                     ,       ,               ª    ,                  !           	  =disabled            O  >   mailbox@2d000000             2fsl,imx6sx-mu            ª-              Ô      Ø           ˜           !           	  =disabled            O   O      mailbox@2d020000             2fsl,imx6sx-mu            ª-             Ô      Ù           ˜           !           	  =disabled            O   P      mailbox@2d040000             2fsl,imx6sx-mu            ª-             Ô      Ú           ˜           !           	  =disabled            O   Q      vpu-core@2d080000            ª-              2nxp,imx8q-vpu-decoder           !             ÿtx0 tx1 rx        $  
   O           O          O             	  =disabled            O  ?      vpu-core@2d090000            ª-	              2nxp,imx8q-vpu-encoder           !             ÿtx0 tx1 rx        $  
   P           P          P             	  =disabled            O  @      vpu-core@2d0a0000            ª-
              2nxp,imx8q-vpu-encoder           !             ÿtx0 tx1 rx        $  
   Q           Q          Q             	  =disabled            O  A         bus@53000000             2simple-bus                                   S       S              O  B   gpu@53100000             2vivante,gc           ªS             Ô       @            ®      �         �           core shader         ^      �         �           n)¹' 2©ø€        !      �        O  C         bus@56220000             2simple-bus               R                                 V"      V"             O  D   interrupt-controller@56220000         &   2fsl,imx8qxp-irqsteer fsl,imx-irqsteer            ªV"             Ô       ;            ¿                     ®            ®   S            ipg         !     ‰        ¤            °            O   R      clock-controller@56223000            2fsl,imx8qxp-lpcg             ªV"0            %           !     ‰         ®   T        Õ            ûmipi0_lis_lpcg_ipg_clk          O   S      clock-controller@5622300c            2fsl,imx8qxp-lpcg             ªV"0           %           !     Š         ®     Š      T        Õ             *  ûmipi0_pwm_lpcg_clk mipi0_pwm_lpcg_ipg_clk           O   W      clock-controller@56223014            2fsl,imx8qxp-lpcg             ªV"0           %            ®   U            Õ            ûmipi0_i2c0_lpcg_ipg_clk         !     ‹        O   Y      clock-controller@56223018            2fsl,imx8qxp-lpcg             ªV"0           %            ®   T        Õ            ûmipi0_i2c0_lpcg_ipg_s_clk           !     ‹        O   U      clock-controller@5622301c            2fsl,imx8qxp-lpcg             ªV"0           %            ®     ‹           Õ            ûmipi0_i2c0_lpcg_clk         !     ‹        O   X      clock-controller@56223024            2fsl,imx8qxp-lpcg             ªV"0$           %            ®   V            Õ            ûmipi0_i2c1_lpcg_ipg_clk         !     Œ        O  E      clock-controller@56223028            2fsl,imx8qxp-lpcg             ªV"0(           %            ®   T        Õ            ûmipi0_i2c1_lpcg_ipg_s_clk           !     Œ        O   V      clock-controller@5622302c            2fsl,imx8qxp-lpcg             ªV"0,           %            ®     Œ           Õ            ûmipi0_i2c1_lpcg_clk         !     Œ        O  F      pwm@56224000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ªV"@             ®   W      W            ipg per         ^     Š           nn6         ½           !     Š      	  =disabled            O  G      i2c@56226000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ªV"`                                      Ô            ®   X       Y            per ipg         ^   X            nn6         !     ‹        =okay            2default         @   Z        ë †         O  H         bus@56240000             2simple-bus                                   V$      V$                  [        O  I   clock-controller@56243000            2fsl,imx8qxp-lpcg             ªV$0            %           ûlvds0_lis_lpcg_ipg_clk          !     �         ®   \        Õ           O   `      clock-controller@5624300c            2fsl,imx8qxp-lpcg             ªV$0           %         A  ûlvds0_pwm_lpcg_clk lvds0_pwm_lpcg_ipg_clk lvds0_pwm_lpcg_32k_clk            !     Ž         ®           \        Õ               O   ]      clock-controller@56243010            2fsl,imx8qxp-lpcg             ªV$0           %         ,  ûlvds0_i2c0_lpcg_clk lvds0_i2c0_lpcg_ipg_clk         !     �         ®           \        Õ               O   _      pwm@56244000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ªV$@            ipg per         ^     Ž           nn6         ½           !     Ž        =okay             ®   ]      ]            2default         @   ^        O   ï      i2c@56246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ªV$`                                      Ô           per ipg         ^     �           nn6         !     �      	  =disabled             ®   _       _           O  J      interrupt-controller@56240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ªV$             Ô       9            ¿                     ®            ®   `           ipg         !     
        ¤            °            O   [      clock-controller@56243014            2fsl,imx8qxp-lpcg             ªV$0           %            ®           \        Õ             ,  ûlvds0_i2c1_lpcg_clk lvds0_i2c1_lpcg_ipg_clk         !             O   a      i2c@56247000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ªV$p            Ô   	         ®   a       a           per ipg         ^                nn6         !             =okay            2default         @   b        ë †         O  K         bus@57220000             2simple-bus               c                                 W"      W"             O  L   interrupt-controller@57220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ªW"             Ô       <            ¿                     ®            ®   d            ipg         !     �        ¤            °            O   c      clock-controller@57223000            2fsl,imx8qxp-lpcg             ªW"0            %            ®   T        Õ            ûmipi1_lis_lpcg_ipg_clk          !     �        O   d      clock-controller@5722300c            2fsl,imx8qxp-lpcg             ªW"0           %            ®     Ž      T        Õ             *  ûmipi1_pwm_lpcg_clk mipi1_pwm_lpcg_ipg_clk           !     Ž        O   g      clock-controller@5722301c            2fsl,imx8qxp-lpcg             ªW"0           %            ®     �           Õ            ûmipi1_i2c0_lpcg_clk         !     �        O   h      clock-controller@57223014            2fsl,imx8qxp-lpcg             ªW"0           %            ®   e            Õ            ûmipi1_i2c0_lpcg_ipg_clk         !     �        O   i      clock-controller@57223018            2fsl,imx8qxp-lpcg             ªW"0           %            ®   T        Õ            ûmipi1_i2c0_lpcg_ipg_s_clk           !     �        O   e      clock-controller@57223024            2fsl,imx8qxp-lpcg             ªW"0$           %            ®   f            Õ            ûmipi1_i2c1_lpcg_ipg_clk         !     �        O  M      clock-controller@57223028            2fsl,imx8qxp-lpcg             ªW"0(           %            ®   T        Õ            ûmipi1_i2c1_lpcg_ipg_s_clk           !     �        O   f      clock-controller@5722302c            2fsl,imx8qxp-lpcg             ªW"0,           %            ®     �           Õ            ûmipi1_i2c1_lpcg_clk         !     �        O  N      pwm@57224000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ªW"@             ®   g      g            ipg per         ^     Ž           nn6         ½           !     Ž      	  =disabled            O  O      i2c@57226000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ªW"`                                      Ô                c         ®   h       i            per ipg         ^   h            nn6         !     �        =okay            2default         @   j        ë †         O  P         bus@57240000             2simple-bus               k                                 W$      W$             O  Q   interrupt-controller@57240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ªW$             Ô       :            ¿                     ®            ®   l           ipg         !             ¤            °            O   k      clock-controller@57243000            2fsl,imx8qxp-lpcg             ªW$0            %            ®   \        Õ           ûlvds1_lis_lpcg_ipg_clk          !             O   l      clock-controller@5724300c            2fsl,imx8qxp-lpcg             ªW$0           %            ®           \        Õ             *  ûlvds1_pwm_lpcg_clk lvds1_pwm_lpcg_ipg_clk           !             O   m      clock-controller@57243010            2fsl,imx8qxp-lpcg             ªW$0           %            ®           \        Õ             ,  ûlvds1_i2c0_lpcg_clk lvds1_i2c0_lpcg_ipg_clk         !             O   o      clock-controller@57243014            2fsl,imx8qxp-lpcg             ªW$0           %            ®           \        Õ             ,  ûlvds1_i2c1_lpcg_clk lvds1_i2c1_lpcg_ipg_clk         !             O   p      pwm@57244000             2fsl,imx8qxp-pwm fsl,imx27-pwm            ªW$@             ®   m      m            ipg per         ^                nn6         ½           !             =okay            2default         @   n        O   ð      i2c@57246000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ªW$`                                      Ô            ®   o       o           per ipg         ^                nn6         !           	  =disabled            O  R      i2c@57247000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ªW$p            Ô   	         ®   p       p           per ipg         ^                nn6         !             =okay            2default         @   q        ë †         O  S         clock-img-ipg            2fixed-clock         %            ëëÂ         ûimg_ipg_clk         O   |      clock-img-pxl            2fixed-clock         %            ë#ÃF         ûimg_pxl_clk         O   ‹      bus@58000000             2simple-bus                                   X       X              O  T   isi@58100000             ªX           `  Ô      )         *         +         ,         -         .         /         0         @   ®   r       s       t       u       v       w       x       y          (  per0 per1 per2 per3 per4 per5 per6 per7                    @  !     y     z     {     |     }     ~          €      	  =disabled             2fsl,imx8qm-isi          O  U   ports                                port@2           ª      endpoint            È   z        O   ‚         port@3           ª      endpoint            È   {        O   ‡               irqsteer@58220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ªX"             ®            ¿        Ô      @            ®   |        ipg                      !     ‘        ¤            °            O   }      gpio@58222000            2fsl,imx8qm-gpio fsl,imx35-gpio           ªX"             ®            ¿        Ô            “            ƒ             }        !     ‘        O  V      clock-controller@58223018            2fsl,imx8qxp-lpcg             ªX"0            ®     ‘           %           Õ           ûcsi0_lpcg_core_clk          !     y        O   ~      clock-controller@5822301c            2fsl,imx8qxp-lpcg             ªX"0            ®     ‘           %           Õ           ûcsi0_lpcg_esc_clk           !     y        O         i2c@58226000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ªX"`            Ô            ®     “      |        per ipg         ^     “           nn6              }        !     “      	  =disabled            O  W      csi@58227000          +   2fsl,imx8qm-mipi-csi2 fsl,imx8qxp-mipi-csi2           ªX"p    X"             ®   ~            €            core esc ui         ^   ~                 nu* J¢         !     y        Ø   �  ‘      	  =disabled            O  X   ports                                port@0           ª          port@1           ª      endpoint            È   ‚        O   z               irqsteer@58240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ªX$             ®            ¿        Ô      A            ®   |        ipg                      !     ”        ¤            °            O   ƒ      gpio@58242000            2fsl,imx8qm-gpio fsl,imx35-gpio           ªX$             ®            ¿        Ô            “            ƒ             ƒ        !     ”        O  Y      clock-controller@58243018            2fsl,imx8qxp-lpcg             ªX$0            ®     ”           %           Õ           ûcsi1_lpcg_core_clk          !     y        O   „      clock-controller@5824301c            2fsl,imx8qxp-lpcg             ªX$0            ®     ”           %           Õ           ûcsi1_lpcg_esc_clk           !     y        O   …      i2c@58246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ªX$`            Ô            ®     –      |        per ipg         ^     –           nn6              ƒ        !     –      	  =disabled            O  Z      csi@58247000          +   2fsl,imx8qm-mipi-csi2 fsl,imx8qxp-mipi-csi2           ªX$p    X$             ®   „      …      †            core esc ui         ^   „      …           nu* J¢         !     y        Ø   �  ”      	  =disabled            O  [   ports                                port@0           ª          port@1           ª      endpoint            È   ‡        O   {               irqsteer@58260000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer             ªX&             ®            ¿        Ô      B            ®           ipg                      !     F        ¤            °          	  =disabled            O   ˆ      clock-controller@58263004            2fsl,imx8qxp-lpcg             ªX&0            ®     F           %           Õ           ûpi0_lpcg_ipg_clk            !     y      	  =disabled            O  \      clock-controller@58263018            2fsl,imx8qxp-lpcg             ªX&0            ®     F           %           Õ            ûpi0_lpcg_pxl_clk            !     y      	  =disabled            O  ]      clock-controller@5826301c            2fsl,imx8qxp-lpcg             ªX&0            ®     F            %           Õ            ûpi0_lpcg_misc_clk           !     y      	  =disabled            O  ^      i2c@58266000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          ªX&`            Ô            ®     I      |        per ipg         ^     I           nn6              ˆ        !     I      	  =disabled            O  _      jpegdec@58400000             ªX@             Ô      5            ®   ‰       ‰           ^   ‰       ‰           nëÂ ëÂ         !          �      %   2nxp,imx8qm-jpgdec nxp,imx8qxp-jpgdec            O  `      jpegenc@58450000             ªXE             Ô      1            ®   Š       Š           ^   Š       Š           nëÂ ëÂ         !          …      %   2nxp,imx8qm-jpgenc nxp,imx8qxp-jpgenc            O  a      clock-controller@58500000            2fsl,imx8qxp-lpcg             ªXP              ®   ‹        %           Õ            ûpdma0_lpcg_clk          !     y        O   r      clock-controller@58510000            2fsl,imx8qxp-lpcg             ªXQ              ®   ‹        %           Õ            ûpdma1_lpcg_clk          !     z        O   s      clock-controller@58520000            2fsl,imx8qxp-lpcg             ªXR              ®   ‹        %           Õ            ûpdma2_lpcg_clk          !     {        O   t      clock-controller@58530000            2fsl,imx8qxp-lpcg             ªXS              ®   ‹        %           Õ            ûpdma3_lpcg_clk          !     |        O   u      clock-controller@58540000            2fsl,imx8qxp-lpcg             ªXT              ®   ‹        %           Õ            ûpdma4_lpcg_clk          !     }        O   v      clock-controller@58550000            2fsl,imx8qxp-lpcg             ªXU              ®   ‹        %           Õ            ûpdma5_lpcg_clk          !     ~        O   w      clock-controller@58560000            2fsl,imx8qxp-lpcg             ªXV              ®   ‹        %           Õ            ûpdma6_lpcg_clk          !             O   x      clock-controller@58570000            2fsl,imx8qxp-lpcg             ªXW              ®   ‹        %           Õ            ûpdma7_lpcg_clk          !     €        O   y      clock-controller@58580000            2fsl,imx8qxp-lpcg             ªXX              ®   ‹        %           Õ            ûcsi0_lpcg_pxl_clk           !     ‘        O   €      clock-controller@58590000            2fsl,imx8qxp-lpcg             ªXY              ®   ‹        %           Õ            ûcsi1_lpcg_pxl_clk           !     ”        O   †      clock-controller@585a0000            2fsl,imx8qxp-lpcg             ªXZ              ®   ‹        %           Õ            ûhdmi_rx_lpcg_pxl_link_clk           !     ›        O  b      clock-controller@585d0000            2fsl,imx8qxp-lpcg             ªX]             %            ®   |   |        Õ             0  ûimg_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         !             O   ‰      clock-controller@585f0000            2fsl,imx8qxp-lpcg             ªX_             %            ®   |   |        Õ             0  ûimg_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         !             O   Š         clock-dma-ipg            2fixed-clock         %            ë'         ûdma_ipg_clk         O   œ      bus@5a000000             2simple-bus                                   Z       Z              O  c   spi@5a000000             2fsl,imx7ulp-spi          ªZ                                        Ô      P                         ®   Œ       Œ           per ipg         ^      5           n“‡         !      5         ã   �              �                   ètx rx         	  =disabled            O  d      spi@5a010000             2fsl,imx7ulp-spi          ªZ                                       Ô      Q                         ®   Ž       Ž           per ipg         ^      6           n“‡         !      6         ã   �              �                  ètx rx         	  =disabled            O  e      spi@5a020000             2fsl,imx7ulp-spi          ªZ                                       Ô      R                         ®   �       �           per ipg         ^      7           n“‡         !      7         ã   �              �                  ètx rx           =okay            2default         @   �   ‘        ß   ’   
           O  f      spi@5a030000             2fsl,imx7ulp-spi          ªZ                                       Ô      S                         ®   “       “           per ipg         ^      8           n“‡         !      8         ã   �              �                  ètx rx         	  =disabled            O  g      serial@5a060000          ªZ             Ô      Y            ®   ”      ”          	  ipg baud            ^      9           nÄ´         !      9        èrx tx            ã   �             �                   =okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            2default         @   •        O  h      serial@5a070000          ªZ             Ô      Z            ®   –      –          	  ipg baud            ^      :           nÄ´         !      :        èrx tx            ã   �             �                   =okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            2default         @   —        O  i   bluetooth            2nxp,88w8987-bt           serial@5a080000          ªZ             Ô      [            ®   ˜      ˜          	  ipg baud            ^      ;           nÄ´         !      ;        èrx tx            ã   �             �                   =okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            2default         @   ™        O  j      serial@5a090000          ªZ	             Ô      \            ®   š      š          	  ipg baud            ^      <           nÄ´         !      <        èrx tx            ã   �             �                   =okay          %   2fsl,imx8qm-lpuart fsl,imx8qxp-lpuart            2default         @   ›        O  k      dma-controller@5a1f0000          2fsl,imx8qm-edma          ªZ             H           S          Ô                ¡         ¢         £         ¤         ¥         ¦         §                                                     ²         ³         ´         µ         ¶         ·         ¸         ¹         º         »          C         °  !      @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U        `           =okay            O   �      clock-controller@5a400000            2fsl,imx8qxp-lpcg             ªZ@             %            ®      5      œ        Õ                ûspi0_lpcg_clk spi0_lpcg_ipg_clk         !      5        O   Œ      clock-controller@5a410000            2fsl,imx8qxp-lpcg             ªZA             %            ®      6      œ        Õ                ûspi1_lpcg_clk spi1_lpcg_ipg_clk         !      6        O   Ž      clock-controller@5a420000            2fsl,imx8qxp-lpcg             ªZB             %            ®      7      œ        Õ                ûspi2_lpcg_clk spi2_lpcg_ipg_clk         !      7        O   �      clock-controller@5a430000            2fsl,imx8qxp-lpcg             ªZC             %            ®      8      œ        Õ                ûspi3_lpcg_clk spi3_lpcg_ipg_clk         !      8        O   “      clock-controller@5a460000            2fsl,imx8qxp-lpcg             ªZF             %            ®      9      œ        Õ             '  ûuart0_lpcg_baud_clk uart0_lpcg_ipg_clk          !      9        O   ”      clock-controller@5a470000            2fsl,imx8qxp-lpcg             ªZG             %            ®      :      œ        Õ             '  ûuart1_lpcg_baud_clk uart1_lpcg_ipg_clk          !      :        O   –      clock-controller@5a480000            2fsl,imx8qxp-lpcg             ªZH             %            ®      ;      œ        Õ             '  ûuart2_lpcg_baud_clk uart2_lpcg_ipg_clk          !      ;        O   ˜      clock-controller@5a490000            2fsl,imx8qxp-lpcg             ªZI             %            ®      <      œ        Õ             '  ûuart3_lpcg_baud_clk uart3_lpcg_ipg_clk          !      <        O   š      i2c@5a800000             ªZ€    @                                   Ô       Ü            ®   �       �           per ipg         ^      `           nn6         !      `        =okay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          ë †         2default         @   ž        O  l   accelerometer@19             2st,lsm303agr-accel           ª         gyrometer@20             2nxp,fxas21002c           ª          light-sensor@44          2isil,isl29023            ª   D                     Ô            pressure-sensor@60           2fsl,mpl3115          ª   `        è   Ÿ        ó   Ÿ      gpio@68          2maxim,max7322            ª   h         ƒ        “           O   ÷      gyrometer@69             2st,l3g4200d-gyro             ª   i      tcpc@51          2nxp,ptn5110 tcpci           2default         @             ª   Q                     Ô              =okay            O  m   connector            2usb-c-connector          USB-C           dual            dual            sink            *‘,        6�         @             R        O  n   ports                                port@0           ª       endpoint            È   ¡        O   Î         port@1           ª      endpoint            È   ¢        O   ö                     i2c@5a810000             ªZ�    @                                   Ô       Ý            ®   £       £           per ipg         ^      a           nn6         !      a        =okay          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          ë †         2default gpio            @   ¤        _   ¥        i   ¦               s   ¦               O   ñ      i2c@5a820000             ªZ‚    @                                   Ô       Þ            ®   §       §           per ipg         ^      b           nn6         !      b      	  =disabled          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          O  o      i2c@5a830000             ªZƒ    @                                   Ô       ß            ®   ¨       ¨           per ipg         ^      c           nn6         !      c      	  =disabled          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c          O  p      adc@5a880000             2nxp,imx8qxp-adc         }            ªZˆ             Ô       ð                         ®   ©       ©           per ipg         ^      e           nn6         !      e        =okay            2default         @   ª        �   «        O  q      adc@5a890000             2nxp,imx8qxp-adc         }            ªZ‰             Ô       ñ                         ®   ¬       ¬           per ipg         ^      f           nn6         !      f      	  =disabled            O  r      can@5a8d0000             2fsl,imx8qm-flexcan           ªZ�             Ô       ë                         ®   ­      ­            ipg per         ^      i           nbZ         !      i        ›           ª            =okay            2default         @   ®        ¸   ¯        O  s      can@5a8e0000             2fsl,imx8qm-flexcan           ªZŽ             Ô       ì                         ®   °      °            ipg per         ^      j           nbZ         !      j        ›           ª           =okay            2default         @   ±        ¸   ¯        O  t      can@5a8f0000             2fsl,imx8qm-flexcan           ªZ�             Ô       í                         ®   ²      ²            ipg per         ^      k           nbZ         !      k        ›           ª           =okay            2default         @   ³        ¸   ´        O  u      dma-controller@5a9f0000          2fsl,imx8qm-edma          ªZŸ   !          H           S   
      x  Ô      ¨         ©         ª         «         ¬         ­         ®         ¯         °         ±         P  !      l      m      n      o      p      q      r      s      t      u        O  v      clock-controller@5ac00000            2fsl,imx8qxp-lpcg             ªZÀ             %            ®      `      œ        Õ                ûi2c0_lpcg_clk i2c0_lpcg_ipg_clk         !      `        O   �      clock-controller@5ac10000            2fsl,imx8qxp-lpcg             ªZÁ             %            ®      a      œ        Õ                ûi2c1_lpcg_clk i2c1_lpcg_ipg_clk         !      a        O   £      clock-controller@5ac20000            2fsl,imx8qxp-lpcg             ªZÂ             %            ®      b      œ        Õ                ûi2c2_lpcg_clk i2c2_lpcg_ipg_clk         !      b        O   §      clock-controller@5ac30000            2fsl,imx8qxp-lpcg             ªZÃ             %            ®      c      œ        Õ                ûi2c3_lpcg_clk i2c3_lpcg_ipg_clk         !      c        O   ¨      clock-controller@5ac80000            2fsl,imx8qxp-lpcg             ªZÈ             %            ®      e      œ        Õ                ûadc0_lpcg_clk adc0_lpcg_ipg_clk         !      e        O   ©      clock-controller@5ac90000            2fsl,imx8qxp-lpcg             ªZÉ             %            ®      f      œ        Õ                ûadc1_lpcg_clk adc1_lpcg_ipg_clk         !      f        O   ¬      clock-controller@5acd0000            2fsl,imx8qxp-lpcg             ªZÍ             %            ®      i      œ   œ        Õ                5  ûcan0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            !      i        O   ­      clock-controller@5a4a0000            2fsl,imx8qxp-lpcg             ªZJ             %            ®      =      œ        Õ             '  ûuart4_lpcg_baud_clk uart4_lpcg_ipg_clk          !      =        O  w      i2c@5a840000          #   2fsl,imx8qm-lpi2c fsl,imx7ulp-lpi2c           ªZ„    @         Ô      X                         ®   µ       µ           per ipg         ^      d           nn6         !      d      	  =disabled            O  x      clock-controller@5ac40000            2fsl,imx8qxp-lpcg             ªZÄ             %            ®      d      œ        Õ                ûi2c4_lpcg_clk i2c4_lpcg_ipg_clk         !      d        O   µ      clock-controller@5ace0000            2fsl,imx8qxp-lpcg             ªZÎ             %            ®      j      œ   œ        Õ                5  ûcan1_lpcg_pe_clk can1_lpcg_ipg_clk can1_lpcg_chi_clk            !      j        O   °      clock-controller@5acf0000            2fsl,imx8qxp-lpcg             ªZÏ             %            ®      k      œ   œ        Õ                5  ûcan2_lpcg_pe_clk can2_lpcg_ipg_clk can2_lpcg_chi_clk            !      k        O   ²         clock-conn-axi           2fixed-clock         %            ëÞCU        ûconn_axi_clk            O   Ð      clock-conn-ahb           2fixed-clock         %            ë	ï!ª        ûconn_ahb_clk            O   Ñ      clock-conn-ipg           2fixed-clock         %            ë÷�Õ        ûconn_ipg_clk            O   Ï      clock-conn-bch           2fixed-clock         %            ë×„         ûconn_bch_clk            O  y      bus@5b000000             2simple-bus                                   [       [              O  z   usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb             ª[                          Ô                 Ç   ¶        Ò   ·             ®   ¸           Þ            ï                      !             =okay               ¹        2default         @   º         #         /         ;         G        O  {      usbmisc@5b0d0200            \         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          ª[            O   ·      usbphy@5b100000       %   2fsl,imx8qm-usbphy fsl,imx7ulp-usbphy             ª[              ®   ¸           !             =okay            O   ¶      mmc@5b010000            Ô       è            ª[              ®   »      »      »            ipg ahb per         ^      ø           n×„         !      ø        i           ~           =okay          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc          Ž   ¼     €      "  2default state_100mhz state_200mhz           @   ½        _   ½        •   ½        Ÿ            ©         ¯         ·        O  |      mmc@5b020000            Ô       é            ª[              ®   ¾      ¾      ¾            ipg ahb per         ^      ù           nëÂ         !      ù        i           ~           =okay          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc          Ž   ¼     €      "  2default state_100mhz state_200mhz           @   ¿   À        _   ¿   À        •   ¿   À        Ÿ           Å   Á        Ñ   Â              Ú   Â               O  }      mmc@5b030000            Ô       ê            ª[              ®   Ã      Ã      Ã            ipg ahb per         ^      ú           nëÂ         !      ú        i           ~         	  =disabled          3   2fsl,imx8qm-usdhc fsl,imx8qxp-usdhc fsl,imx7d-usdhc          Ž   ¼     €        O  ~      ethernet@5b040000            ª[           0  Ô                                           (   ®   Ä      Ä      Ä      Ä       Ä         '  ipg ahb enet_clk_ref ptp enet_2x_txclk          ^      û         û           næ²€sY@        ã           õ           !      û        =okay             2fsl,imx8qm-fec fsl,imx6sx-fec           Ž   ¼     €        2default         @   Å      	  rgmii-id               Æ                 O     mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22           ª            O   Æ      ethernet-phy@1           2ethernet-phy-ieee802.3-c22           ª           O   É            ethernet@5b050000            ª[           0  Ô                                          (   ®   Ç      Ç      Ç      Ç       Ä         '  ipg ahb enet_clk_ref ptp enet_2x_txclk          ^      ü         ü           næ²€sY@        ã           õ           !      ü        =okay             2fsl,imx8qm-fec fsl,imx6sx-fec           Ž   ¼     €        2default         @   È        rgmii-txid             É        ,   Ê        7   Ë        Cmac-address         T  Ð                 O  €      usb@5b110000             2fsl,imx8qm-usb3          ª[                                             (   ®   Ì      Ì       Ì      Ì      Ì           lpm bus aclk ipg core           ^                næ²€        !             =okay            O  �   usb@5b120000          
   2cdns,usb3            ª[     [     [             iotg xhci dev                       0  Ô                                            shost peripheral otg wakeup          ƒ   Í        ˆcdns3,usb3-phy          ’           =okay            ©otg          ±        O  ‚   port       endpoint            È   Î        O   ¡               usb-phy@5b160000             2nxp,salvo-phy            ª[              ®   Ì           salvo_phy_clk           !             Á            =okay            O   Í      clock-controller@5b200000            2fsl,imx8qxp-lpcg             ª[              %            ®      ø      Ï   Ð        Õ                9  ûsdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            !      ø        O   »      clock-controller@5b210000            2fsl,imx8qxp-lpcg             ª[!             %            ®      ù      Ï   Ð        Õ                9  ûsdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            !      ù        O   ¾      clock-controller@5b220000            2fsl,imx8qxp-lpcg             ª["             %            ®      ú      Ï   Ð        Õ                9  ûsdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            !      ú        O   Ã      clock-controller@5b230000            2fsl,imx8qxp-lpcg             ª[#             %         0   ®      û         û      Ð      û      Ï   Ï        Õ                         …  ûenet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            !      û        O   Ä      clock-controller@5b240000            2fsl,imx8qxp-lpcg             ª[$             %         0   ®      ü         ü      Ð      ü      Ï   Ï        Õ                         …  ûenet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            !      ü        O   Ç      clock-controller@5b270000            2fsl,imx8qxp-lpcg             ª['             %            ®   Ñ   Ï        Õ            "  ûusboh3_ahb_clk usboh3_phy_ipg_clk           !             O   ¸      clock-controller@5b280000            2fsl,imx8qxp-lpcg             ª[(             %           Õ                         0   ®                   Ï   Ï   Ï              M  ûusb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            !             O   Ì      clock-controller@5b290000            2fsl,imx8qxp-lpcg             ª[)             %             ®     	        	      Ð   Ð        Õ                   '  ûgpmi_bch gpmi_io gpmi_apb gpmi_bch_apb          !     	        O   Ó      clock-controller@5b290004            2fsl,imx8qxp-lpcg             ª[)            %            ®   Ð        Õ           ûapbhdma_hclk            !     	        O   Ò      dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh          ª[�            0  Ô                                            H           S            ®   Ò            !     	        O   Ô      nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand            ª[�      [�@             igpmi-nand bch                                     Ô                 sbch           ®   Ó      Ó      Ó       Ó         '  gpmi_io gpmi_apb gpmi_bch gpmi_bch_apb          ã   Ô            èrx-tx           !     	        ^     	           núð€      	  =disabled            O  ƒ         bus@5c000000             2simple-bus                                   \       \              O  „   ddr-pmu@5c020000          $   2fsl,imx8qm-ddr-pmu fsl,imx8-ddr-pmu          ª\             Ô       ‚           O  …      ddr-pmu@5c120000          $   2fsl,imx8qm-ddr-pmu fsl,imx8-ddr-pmu          ª\                          Ô       ƒ           O  †         clock-lsio-bus           2fixed-clock         %            ëõá         ûlsio_bus_clk            O   Û      bus@5d000000             2simple-bus                                    ]       ]                           O  ‡   pwm@5d000000             2fsl,imx27-pwm            ª]              ipg per          ®   Õ      Õ           ^      ¿           nn6         ½           Ô       ^         	  =disabled            O  ˆ      pwm@5d010000             2fsl,imx27-pwm            ª]             ipg per          ®   Ö      Ö           ^      À           nn6         ½           Ô       _         	  =disabled            O  ‰      pwm@5d020000             2fsl,imx27-pwm            ª]             ipg per          ®   ×      ×           ^      Á           nn6         ½           Ô       `         	  =disabled            O  Š      pwm@5d030000             2fsl,imx27-pwm            ª]             ipg per          ®   Ø      Ø           ^      Â           nn6         ½           Ô       a         	  =disabled            O  ‹      gpio@5d080000            ª]             Ô       ˆ            ƒ        “            ¿        ®           !      Ç         2fsl,imx8qm-gpio fsl,imx35-gpio        0  Ì   Ù              Ù            Ù      $           O   ¦      gpio@5d090000            ª]	             Ô       ‰            ƒ        “            ¿        ®           !      È         2fsl,imx8qm-gpio fsl,imx35-gpio        @  Ì   Ù       (      Ù      2      Ù      ?      Ù      H           O   ü      gpio@5d0a0000            ª]
             Ô       Š            ƒ        “            ¿        ®           !      É         2fsl,imx8qm-gpio fsl,imx35-gpio        0  Ì   Ù       P      Ù      U      Ù      h   
        O  Œ      gpio@5d0b0000            ª]             Ô       ‹            ƒ        “            ¿        ®           !      Ê         2fsl,imx8qm-gpio fsl,imx35-gpio        À  Ì   Ù       r      Ù      u      Ù      �      Ù      Œ      Ù      ‹      Ù      Š      Ù      ‰      Ù      ˆ      Ù      ‡      Ù      †      Ù      Ž      Ù      ’           O   ’      gpio@5d0c0000            ª]             Ô       Œ            ƒ        “            ¿        ®           !      Ë         2fsl,imx8qm-gpio fsl,imx35-gpio        `  Ì   Ù       •      Ù      ™      Ù      ž      Ù      ¥      Ù      ¬      Ù      Æ           O         gpio@5d0d0000            ª]             Ô       �            ƒ        “            ¿        ®           !      Ì         2fsl,imx8qm-gpio fsl,imx35-gpio        €  Ì   Ù       Ë      Ù      Í      Ù      Ò      Ù      ß      Ù      ã      Ù      æ      Ù      ì      Ù      ó           O   Â      gpio@5d0e0000            ª]             Ô       Ž            ƒ        “            ¿        ®           !      Í         2fsl,imx8qm-gpio fsl,imx35-gpio           Ì   Ù       õ   
   Ù   
              O  �      gpio@5d0f0000            ª]             Ô       �            ƒ        “            ¿        ®           !      Î         2fsl,imx8qm-gpio fsl,imx35-gpio          O  Ž      spi@5d120000                                       2nxp,imx8qxp-fspi             ª]                   ifspi_base fspi_mmap         Ô       \            ®      í         í           fspi_en fspi            !      í        =okay            2default         @   Ú        O  �   flash@0          ª                                      2jedec,spi-nor           Øík@        ê           û           O  �         mailbox@5d1b0000             ª]             Ô       °           ˜         	  =disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu         O  ‘      mailbox@5d1c0000             ª]             Ô       ±           ˜         ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu         O         mailbox@5d1d0000             ª]             Ô       ²           ˜         	  =disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu         O  ’      mailbox@5d1e0000             ª]             Ô       ³           ˜         	  =disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu         O  “      mailbox@5d1f0000             ª]             Ô       ´           ˜         	  =disabled          ,   2fsl,imx8-mu-scu fsl,imx8qm-mu fsl,imx6sx-mu         O  ”      mailbox@5d200000             ª]              Ô       ¸           ˜           !      Ú        =okay             2fsl,imx8qm-mu fsl,imx6sx-mu         O        mailbox@5d210000             ª]!             Ô       ¹           ˜           !      Û        =okay             2fsl,imx8qm-mu fsl,imx6sx-mu         O        mailbox@5d280000             ª](             Ô       À           ˜           !      â         2fsl,imx8qm-mu fsl,imx6sx-mu         O         clock-controller@5d400000            2fsl,imx8qxp-lpcg             ª]@             %         4   ®      ¿         ¿         ¿      Û      ¿           Õ                      h  ûpwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         !      ¿        O   Õ      clock-controller@5d410000            2fsl,imx8qxp-lpcg             ª]A             %         4   ®      À         À         À      Û      À           Õ                      h  ûpwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         !      À        O   Ö      clock-controller@5d420000            2fsl,imx8qxp-lpcg             ª]B             %         4   ®      Á         Á         Á      Û      Á           Õ                      h  ûpwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         !      Á        O   ×      clock-controller@5d430000            2fsl,imx8qxp-lpcg             ª]C             %         4   ®      Â         Â         Â      Û      Â           Õ                      h  ûpwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         !      Â        O   Ø      clock-controller@5d440000            2fsl,imx8qxp-lpcg             ª]D             %         4   ®      Ã         Ã         Ã      Û      Ã           Õ                      h  ûpwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         !      Ã        O  •      clock-controller@5d450000            2fsl,imx8qxp-lpcg             ª]E             %         4   ®      Ä         Ä         Ä      Û      Ä           Õ                      h  ûpwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         !      Ä        O  –      clock-controller@5d460000            2fsl,imx8qxp-lpcg             ª]F             %         4   ®      Å         Å         Å      Û      Å           Õ                      h  ûpwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         !      Å        O  —      clock-controller@5d470000            2fsl,imx8qxp-lpcg             ª]G             %         4   ®      Æ         Æ         Æ      Û      Æ           Õ                      h  ûpwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         !      Æ        O  ˜         clock-hsio-axi           2fixed-clock         %            ë×„         ûhsio_axi_clk            O   à      clock-hsio-per           2fixed-clock         %            ëò�U        ûhsio_per_clk            O   á      clock-hsio-refa          2gpio-gate-clock          ®   Ü        %                             O   ç      clock-hsio-refb          2gpio-gate-clock          ®   Ü        %                             O  ™      clock-xtal100m           2fixed-clock         %            ëõá         ûxtal_100MHz         O   Ü      bus@5f000000             2simple-bus        0  _       _      @       `      €       p                                       €       €   €           O  š   pcie@5f010000            2fsl,imx8q-pcie           ª_     �ð             idbi config        0  �           �ø         ‚       €   €       ð          ®           Ô       f          h           smsi dma                                   ®   Ý      Ý      Ý           dbi mstr slv            $       ÿ         žpci       €  .                         i                            j                            k                            l           <                       O           Y           !      ©        f         	  =disabled            ƒ   Þ               	  ˆpcie-phy            @   ß        2default         y   Â               O  ›      pcie-ep@5f010000             2fsl,imx8q-pcie-ep            ª_     €              idbi addr_space          O           Ô       h           sdma          ®   Ý      Ý      Ý           dbi mstr slv            !      ©        f           „           “         	  =disabled            O  œ      clock-controller@5f060000            2fsl,imx8qxp-lpcg             ª_              ®   à   à   à        %           Õ               F  ûhsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk           !      ©        O   Ý      clock-controller@5f0b0000            2fsl,imx8qxp-lpcg             ª_              ®   á        %           Õ           ûhsio_phyx1_per_clk          !      «        O   ë      clock-controller@5f0d0000            2fsl,imx8qxp-lpcg             ª_              ®   á        %           Õ           ûhsio_pcieb_per_clk          !      ©        O   í      clock-controller@5f0f0000            2fsl,imx8qxp-lpcg             ª_              ®   á        %           Õ           ûhsio_misc_per_clk           !      ¬        O   î      pcie@5f000000            2fsl,imx8q-pcie           ª_      Oð             idbi config        0  �           Oø         ‚       @   @       ð          ®           Ô       F          H           smsi dma                                   ®   â      â      â           dbi mstr slv            $       ÿ         žpci       €  .                         I                            J                            K                            L           <                       O           Y           !      ˜        f           =okay            ƒ   Þ                 	  ˆpcie-phy            @   ã        2default         y                 ¢   ä        ¯   ä         Â        O  �      pcie-ep@5f000000             2fsl,imx8q-pcie-ep            ª_      @              idbi addr_space          O           Ô       H           sdma          ®   â      â      â           dbi mstr slv            !      ˜        f           „           “         	  =disabled            O  ž      sata@5f020000            2fsl,imx8qm-ahci          ª_             Ô       X            ®   å      æ           sata sata_ref           ˆsata-phy cali-phy0 cali-phy1            !      ª      0  ƒ   Þ             Þ              Þ                 =okay            O  Ÿ      clock-controller@5f050000            2fsl,imx8qxp-lpcg             ª_              ®   à   à   à        %           Õ               F  ûhsio_pciea_mstr_axi_clk hsio_pciea_slv_axi_clk hsio_pciea_dbi_axi_clk           !      ˜        O   â      clock-controller@5f070000            2fsl,imx8qxp-lpcg             ª_              ®   à        %           Õ           ûhsio_sata_clk           !      ª        O   å      clock-controller@5f080000            2fsl,imx8qxp-lpcg             ª_              ®   ç   á   ç   á        %           Õ                   L  ûhsio_phyx2_pclk_0 hsio_phyx2_pclk_1 hsio_phyx2_apbclk_0 hsio_phyx2_apbclk_1         !      ™        O   è      clock-controller@5f090000            2fsl,imx8qxp-lpcg             ª_	              ®   ç   á   á   á        %           Õ                   Q  ûhsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk            !      «        O   é      clock-controller@5f0a0000            2fsl,imx8qxp-lpcg             ª_
              ®   á        %           Õ           ûhsio_phyx2_per_clk          !      ™        O   ê      clock-controller@5f0c0000            2fsl,imx8qxp-lpcg             ª_              ®   á        %           Õ           ûhsio_pciea_per_clk          !      ˜        O   ì      clock-controller@5f0e0000            2fsl,imx8qxp-lpcg             ª_              ®   á        %           Õ           ûhsio_sata_per_clk           !      ª        O   æ      phy@5f180000             2fsl,imx8qm-hsio           ª_     _     _     _             ireg phy ctrl misc         p   ®   è       è      è      è      é       é      é      é      ê      ë      ì      í      æ      î         v  pclk0 pclk1 apb_pclk0 apb_pclk1 pclk2 epcs_tx epcs_rx apb_pclk2 phy0_crr phy1_crr ctl0_crr ctl1_crr ctl2_crr misc_crr           Á           !      ™      «        =okay            Òpciea-pcieb-sata            ßinput           O   Þ         chosen          ó/bus@5a000000/serial@5a060000         memory@80000000          žmemory           ª    €       @         clock-xtal24m            2fixed-clock         %            ën6         ûxtal_24MHz          O         reserved-memory                                      memory@90000000          ª    �         €          ÿ        O        memory@90008000          ª    � €       €          ÿ        O  	      memory@90010000          ª    �        €          ÿ        O  
      memory@90018000          ª    �€       €          ÿ        O        memory@900ff000          ª    �ð                 ÿ        O        memory@90100000          ª    �        €          ÿ        O        memory@90108000          ª    �€       €          ÿ        O        memory@90110000          ª    �        €          ÿ        O        memory@90118000          ª    �€       €          ÿ        O        memory@901ff000          ª    �ð                 ÿ        O        memory@90400000          2shared-dma-pool          ª    �@                  ÿ        O        memory@92400000          ª    ’@                  ÿ        O         memory@942f0000          ª    ”/        €          ÿ        O         memory@942f8000          ª    ”/€       €          ÿ        O         memory@94300000          2shared-dma-pool          ª    ”0                  ÿ        O         linux,cma            2shared-dma-pool         	    À       <            Ë    <            	         	%         backlight-lvds0          2pwm-backlight           	.   ï     †             	3       d        	E   d        	\   P        O  ¡      backlight-lvds1          2pwm-backlight           	.   ð     †             	3       d        	E   d        	\   P        O  ¢      i2c-mux          2i2c-mux-gpio            	u   Â               	   ñ                             i2c@0            ª                                 audio-codec@1a           2wlf,wm8960           ª            ®               mclk          ,  ^     E        E         E                  n.à  î   »€  »€          	Š        	›                 	¦              	³   ò        	¿   ó        	Ì   ó        	Ù   ô        	è   ô        O           i2c@1            ª                                wm8962@1a            2wlf,wm8962           ª            ®             ,  ^     E        E         E                  n.à  î   »€  »€         	Ì   ó        	¿   ó        	³   ó        	÷   ó        
   ò        
   ó        	Ù   ô        	è   ô        O              mux-controller           2nxp,cbdtu02043 gpio-sbu-mux         2default         @   õ        
                                     
-   port       endpoint            È   ö        O   ¢            regulator-1v5            2regulator-fixed         
@1v5         
O ã`        
g ã`        O  £      regulator-1v8            2regulator-fixed         
@1v8         
O w@        
g w@        O  ¤      regulator-2v8            2regulator-fixed         
@2v8         
O *¹€        
g *¹€        O  ¥      regulator-3v3            2regulator-fixed         
@3v3         
O 2Z         
g 2Z         O   Ÿ      usdhc2-vmmc          2regulator-fixed       	  
@SD1_SPWR            
O -ÆÀ        
g -ÆÀ                           
        
’  À        O   Á      regulator-audio          2regulator-fixed         
@cs42888_supply          
O 2Z         
g 2Z         O         regulator-fec2-nvcc          2regulator-fixed       
  
@fec2_nvcc           
O w@        
g w@           ÷                 
        O   Ê      regulator-can01-gen          2regulator-fixed       	  
@can01-en            
O 2Z         
g 2Z            ø                
        O   ù      regulator-can2-gen           2regulator-fixed         
@can2-en         
O 2Z         
g 2Z            ø                
        O   ú      regulator-can01-stby             2regulator-fixed         
@can01-stby          
O 2Z         
g 2Z            ø                
        
¢   ù        O   ¯      regulator-can2-stby          2regulator-fixed       
  
@can2-stby           
O 2Z         
g 2Z            ø                
        
¢   ú        O   ´      regulator-pcie           2regulator-fixed         @   û        2default         
g 2Z         
O 2Z       
  
@mpcie_3v3              ü                
        O   ä      regulator-usbotg1-vbus           2regulator-fixed         
@usb_otg1_vbus           
O LK@        
g LK@                           
        O   ¹      regulator-adc-vref           2regulator-fixed       	  
@vref_1v8            
O w@        
g w@        O   «      regulator-audio-pwr          2regulator-fixed       	  
@audio-5v            
O LK@        
g LK@         
­         
Á        O   ô      regulator-audio-3v3          2regulator-fixed       
  
@audio-3v3           
O 2Z         
g 2Z          
­         
Á        O   ò      regulator-audio-1v8          2regulator-fixed       
  
@audio-1v8           
O w@        
g w@         
­         
Á        O   ó      audio-codec-bt           2linux,bt-sco            7           O   ÿ      sound-bt-sco             2simple-audio-card           
Óbt-sco-audio            
êdsp_a                    (   ý        G   ý   simple-audio-card,cpu           i   þ        s           „           O   ý      simple-audio-card,codec         i   ÿ            sound-cs42888            2fsl,imx-audio-cs42888            ,imx-cs42888         —           ¡          ­        ô  ¸Line Out Jack AOUT1L Line Out Jack AOUT1R Line Out Jack AOUT2L Line Out Jack AOUT2R Line Out Jack AOUT3L Line Out Jack AOUT3R Line Out Jack AOUT4L Line Out Jack AOUT4R AIN1L Line In Jack AIN1R Line In Jack AIN2L Line In Jack AIN2R Line In Jack       sound-wm8960             2fsl,imx-audio-wm8960             ,wm8960-audio            —          ¡          Æ   ¦             ƒ  ¸Headphone Jack HP_L Headphone Jack HP_R Ext Spk SPK_LP Ext Spk SPK_LN Ext Spk SPK_RP Ext Spk SPK_RN LINPUT1 Mic Jack Mic Jack MICB        sound-wm8962             2fsl,imx-audio-wm8962             ,wm8962-audio            —          ¡          Æ   ¦             m  ¸Headphone Jack HPOUTL Headphone Jack HPOUTR Ext Spk SPKOUTL Ext Spk SPKOUTR AMIC MICBIAS IN1R AMIC IN3R AMIC          imx8qm-cm4-0             2fsl,imx8qm-cm4           ®           ÿtx rx rxdb        $  
                                 D      	  
            !          )        Ó          ã4þ        imx8qm-cm4-1             2fsl,imx8qm-cm4           ®           ÿtx rx rxdb        $  
                                 D                    !     *     =        Ó  *        ã8þ        __symbols__         õ/cpus/cpu@0         û/cpus/cpu@1         /cpus/cpu@2         /cpus/cpu@3         /cpus/l2-cache0         /cpus/l2-cache1         /opp-table-0            )/opp-table-1            7/interrupt-controller@51a00000          ;/iommu@51400000       $  @/system-controller/power-controller       $  	—/system-controller/clock-controller         C/system-controller/pinctrl        "  J/system-controller/pinctrl/hoggrp         ,  V/system-controller/pinctrl/cs42888_resetgrp       ,  l/system-controller/pinctrl/i2c-mipi-csi0grp       ,  ‚/system-controller/pinctrl/i2c-mipi-csi1grp       #  ˜/system-controller/pinctrl/i2c0grp        #  ¥/system-controller/pinctrl/i2c1grp        (  ²/system-controller/pinctrl/i2c1gpio-grp       #  Ä/system-controller/pinctrl/adc0grp        &  Ñ/system-controller/pinctrl/cm41i2cgrp         $  â/system-controller/pinctrl/esai0grp       #  ð/system-controller/pinctrl/fec1grp        %  ý/system-controller/pinctrl/lpspi2grp          '  /system-controller/pinctrl/lpspi2csgrp        +  /system-controller/pinctrl/mipi0_lpi2c0grp        +  3/system-controller/pinctrl/mipi1_lpi2c0grp        '  H/system-controller/pinctrl/flexspi0grp        #  Y/system-controller/pinctrl/fec2grp        '  f/system-controller/pinctrl/flexcan0grp        '  w/system-controller/pinctrl/flexcan1grp        '  ˆ/system-controller/pinctrl/flexcan3grp        &  ™/system-controller/pinctrl/lpuart0grp         &  ©/system-controller/pinctrl/lpuart1grp         &  ¹/system-controller/pinctrl/lpuart2grp         &  É/system-controller/pinctrl/lpuart3grp         *  Ù/system-controller/pinctrl/lvds0lpi2c1grp         *  î/system-controller/pinctrl/lvds1lpi2c1grp         (  /system-controller/pinctrl/mipi-csi0grp       (  /system-controller/pinctrl/mipi-csi1grp       $  '/system-controller/pinctrl/pcieagrp       '  5/system-controller/pinctrl/pcieareggrp        $  G/system-controller/pinctrl/pciebgrp       '  U/system-controller/pinctrl/pwmlvds0grp        '  g/system-controller/pinctrl/pwmlvds1grp        #  y/system-controller/pinctrl/sai0grp        #  †/system-controller/pinctrl/sai1grp        $  “/system-controller/pinctrl/typecgrp       '  ¡/system-controller/pinctrl/typecmuxgrp        &  ³/system-controller/pinctrl/usbotg1grp         %  Ã/system-controller/pinctrl/usdhc1grp          %  Ò/system-controller/pinctrl/usdhc2grp          )  á/system-controller/pinctrl/usdhc2gpiogrp          $  õ/system-controller/reset-controller         ÿ/system-controller/rtc          /system-controller/ocotp          !  	/system-controller/ocotp/mac@1c4          !  /system-controller/ocotp/mac@1c6          "  /system-controller/thermal-sensor           !/thermal-zones        (  //thermal-zones/cpu0-thermal/trips/trip0       (  :/thermal-zones/cpu0-thermal/trips/trip1       (  D/thermal-zones/gpu0-thermal/trips/trip0       (  O/thermal-zones/gpu0-thermal/trips/trip1       (  Y/thermal-zones/gpu1-thermal/trips/trip0       (  d/thermal-zones/gpu1-thermal/trips/trip1       (  n/thermal-zones/drc0-thermal/trips/trip0       (  y/thermal-zones/drc0-thermal/trips/trip1       (  ƒ/thermal-zones/pmic-thermal/trips/trip0       (  �/thermal-zones/pmic-thermal/trips/trip1         š/clock-dummy            ¤/clock-esai1-rx         µ/clock-esai1-rx-hf          É/clock-esai1-tx         Ú/clock-esai1-tx-hf          î/clock-hdmi-rx-mclk         ÿ/clock-mlb-clk          /clock-sai5-rx-bclk         /clock-sai5-tx-bclk         -/clock-sai6-rx-bclk         >/clock-sai6-tx-bclk         O/clock-spdif1-rx            ]/clock-controller-lvds-ipg          j/clock-controller-dsi-ipg            v/clock-controller-mipi-div2-pll         ˆ/bus@55000000           —/bus@55000000/dsp@556e8000          Ÿ/bus@31400000           ¯/bus@31400000/crypto@31400000         '  ¶/bus@31400000/crypto@31400000/jr@30000        '  ¾/bus@31400000/crypto@31400000/jr@40000          Æ/clock-cm41-ipg         Ó/bus@38000000           Ù/bus@38000000/i2c@3b230000        #  ß/bus@38000000/i2c@3b230000/gpio@20        *  ç/bus@38000000/i2c@3b230000/audio-codec@48           ï/bus@38000000/intmux@3b400000         (  û/bus@38000000/clock-controller@3b630000         	/clock-audio-ipg            /clock-ext-aud-mclk0            )/clock-ext-aud-mclk1            ;/clock-esai0-rx         L/clock-esai0-rx-hf          `/clock-esai0-tx         q/clock-esai0-tx-hf          …/clock-spdif0-rx            “/clock-sai0-rx-bclk         ¤/clock-sai0-tx-bclk         µ/clock-sai1-rx-bclk         Æ/clock-sai1-tx-bclk         ×/clock-sai2-rx-bclk         è/clock-sai3-rx-bclk         ù/clock-sai4-rx-bclk         
/bus@59000000           /bus@59000000/asrc@59000000         ê/bus@59000000/esai@59010000         /bus@59000000/spdif@59020000            ë/bus@59000000/sai@59040000          Ž/bus@59000000/sai@59050000          $/bus@59000000/sai@59060000          )/bus@59000000/sai@59070000        &  ./bus@59000000/dma-controller@591f0000         (  4/bus@59000000/clock-controller@59400000       (  ?/bus@59000000/clock-controller@59410000       (  J/bus@59000000/clock-controller@59420000       (  @/bus@59000000/clock-controller@59440000       (  V/bus@59000000/clock-controller@59450000       (  `/bus@59000000/clock-controller@59460000       (  j/bus@59000000/clock-controller@59470000       (  t/bus@59000000/clock-controller@59580000       (  }/bus@59000000/clock-controller@59590000         Š/bus@59000000/asrc@59800000         �/bus@59000000/sai@59820000          •/bus@59000000/sai@59830000          š/bus@59000000/amix@59840000         Ÿ/bus@59000000/mqs@59850000        &  £/bus@59000000/dma-controller@599f0000         (  ©/bus@59000000/clock-controller@59d00000       (  ·/bus@59000000/clock-controller@59d10000       (  Å/bus@59000000/clock-controller@59d20000       (  ×/bus@59000000/clock-controller@59d30000       (  é/bus@59000000/clock-controller@59d50000       (  ÷/bus@59000000/clock-controller@59d60000         /bus@59000000/acm@59e00000        (  	/bus@59000000/clock-controller@59c00000       (  /bus@59000000/clock-controller@59c20000       (  /bus@59000000/clock-controller@59c30000       (  (/bus@59000000/clock-controller@59c40000       (  2/bus@59000000/clock-controller@59c50000         </bus@59000000/sai@59080000          A/bus@59000000/sai@59090000        (  F/bus@59000000/clock-controller@59480000       (  P/bus@59000000/clock-controller@59490000         Z/bus@59000000/esai@59810000       (  `/bus@59000000/clock-controller@59c10000         k/vpu@2c000000           o/vpu@2c000000/mailbox@2d000000          u/vpu@2c000000/mailbox@2d020000          |/vpu@2c000000/mailbox@2d040000           ƒ/vpu@2c000000/vpu-core@2d080000          �/vpu@2c000000/vpu-core@2d090000          —/vpu@2c000000/vpu-core@2d0a0000         ¡/bus@53000000           ­/bus@53000000/gpu@53100000          µ/bus@56220000         ,  Â/bus@56220000/interrupt-controller@56220000       (  Ñ/bus@56220000/clock-controller@56223000       (  à/bus@56220000/clock-controller@5622300c       (  ï/bus@56220000/clock-controller@56223014       (  /bus@56220000/clock-controller@56223018       (  !/bus@56220000/clock-controller@5622301c       (  5/bus@56220000/clock-controller@56223024       (  M/bus@56220000/clock-controller@56223028       (  g/bus@56220000/clock-controller@5622302c         {/bus@56220000/pwm@56224000          …/bus@56220000/i2c@56226000          �/bus@56240000         (  �/bus@56240000/clock-controller@56243000       (  ¯/bus@56240000/clock-controller@56243000       (  Â/bus@56240000/clock-controller@5624300c       (  Ô/bus@56240000/clock-controller@5624300c       (  ç/bus@56240000/clock-controller@56243010       (  ú/bus@56240000/clock-controller@56243010         /bus@56240000/pwm@56244000          /bus@56240000/pwm@56244000          ./bus@56240000/i2c@56246000          </bus@56240000/i2c@56246000        ,  P/bus@56240000/interrupt-controller@56240000       (  _/bus@56240000/clock-controller@56243014         o/bus@56240000/i2c@56247000          z/bus@57220000         ,  ‡/bus@57220000/interrupt-controller@57220000       (  ³/bus@57220000/clock-controller@57223000       (  Ø/bus@57220000/clock-controller@5722300c       (  –/bus@57220000/clock-controller@5722301c       (  ª/bus@57220000/clock-controller@57223014       (  Â/bus@57220000/clock-controller@57223018       (  Ü/bus@57220000/clock-controller@57223024       (  ô/bus@57220000/clock-controller@57223028       (  /bus@57220000/clock-controller@5722302c         "/bus@57220000/pwm@57224000          ,/bus@57220000/i2c@57226000          7/bus@57240000         ,  D/bus@57240000/interrupt-controller@57240000       (  S/bus@57240000/clock-controller@57243000       (  b/bus@57240000/clock-controller@5724300c       (  q/bus@57240000/clock-controller@57243010       (  �/bus@57240000/clock-controller@57243014         o/bus@57240000/pwm@57244000          ‘/bus@57240000/i2c@57246000          œ/bus@57240000/i2c@57247000          §/clock-img-ipg          ³/clock-img-pxl          ¿/bus@58000000           Ê/bus@58000000/isi@58100000        1  Î/bus@58000000/isi@58100000/ports/port@2/endpoint          1  ×/bus@58000000/isi@58100000/ports/port@3/endpoint             à/bus@58000000/irqsteer@58220000         î/bus@58000000/gpio@58222000       (  þ/bus@58000000/clock-controller@58223018       (  /bus@58000000/clock-controller@5822301c         t/bus@58000000/i2c@58226000          /bus@58000000/csi@58227000        1  &/bus@58000000/csi@58227000/ports/port@1/endpoint             4/bus@58000000/irqsteer@58240000         B/bus@58000000/gpio@58242000       (  R/bus@58000000/clock-controller@58243018       (  a/bus@58000000/clock-controller@5824301c         Š/bus@58000000/i2c@58246000          o/bus@58000000/csi@58247000        1  z/bus@58000000/csi@58247000/ports/port@1/endpoint             ˆ/bus@58000000/irqsteer@58260000       (  š/bus@58000000/clock-controller@58263004       (  §/bus@58000000/clock-controller@58263018       (  ´/bus@58000000/clock-controller@5826301c         Â/bus@58000000/i2c@58266000          Ð/bus@58000000/jpegdec@58400000          Ø/bus@58000000/jpegenc@58450000        (  à/bus@58000000/clock-controller@58500000       (  ë/bus@58000000/clock-controller@58510000       (  ö/bus@58000000/clock-controller@58520000       (  /bus@58000000/clock-controller@58530000       (  /bus@58000000/clock-controller@58540000       (  /bus@58000000/clock-controller@58550000       (  "/bus@58000000/clock-controller@58560000       (  -/bus@58000000/clock-controller@58570000       (  8/bus@58000000/clock-controller@58580000       (  F/bus@58000000/clock-controller@58590000       (  T/bus@58000000/clock-controller@585a0000       (  j/bus@58000000/clock-controller@585d0000       (  |/bus@58000000/clock-controller@585f0000         Ž/clock-dma-ipg          š/bus@5a000000           ¥/bus@5a000000/spi@5a000000          ¬/bus@5a000000/spi@5a010000          /bus@5a000000/spi@5a020000          ³/bus@5a000000/spi@5a030000          ¡/bus@5a000000/serial@5a060000           ±/bus@5a000000/serial@5a070000           Á/bus@5a000000/serial@5a080000           Ñ/bus@5a000000/serial@5a090000         &  º/bus@5a000000/dma-controller@5a1f0000         (  À/bus@5a000000/clock-controller@5a400000       (  Ê/bus@5a000000/clock-controller@5a410000       (  Ô/bus@5a000000/clock-controller@5a420000       (  Þ/bus@5a000000/clock-controller@5a430000       (  è/bus@5a000000/clock-controller@5a460000       (  ó/bus@5a000000/clock-controller@5a470000       (  þ/bus@5a000000/clock-controller@5a480000       (  	/bus@5a000000/clock-controller@5a490000          /bus@5a000000/i2c@5a800000        #  /bus@5a000000/i2c@5a800000/gpio@68        #  /bus@5a000000/i2c@5a800000/tcpc@51        -  $/bus@5a000000/i2c@5a800000/tcpc@51/connector          C  -/bus@5a000000/i2c@5a800000/tcpc@51/connector/ports/port@0/endpoint        C  9/bus@5a000000/i2c@5a800000/tcpc@51/connector/ports/port@1/endpoint          ­/bus@5a000000/i2c@5a810000          F/bus@5a000000/i2c@5a820000          K/bus@5a000000/i2c@5a830000          Ì/bus@5a000000/adc@5a880000          P/bus@5a000000/adc@5a890000          n/bus@5a000000/can@5a8d0000          /bus@5a000000/can@5a8e0000          �/bus@5a000000/can@5a8f0000        &  U/bus@5a000000/dma-controller@5a9f0000         (  ð/bus@5a000000/clock-controller@5ac00000       (  e/bus@5a000000/clock-controller@5ac10000       (  [/bus@5a000000/clock-controller@5ac20000       (  e/bus@5a000000/clock-controller@5ac30000       (  o/bus@5a000000/clock-controller@5ac80000       (  y/bus@5a000000/clock-controller@5ac90000       (  ƒ/bus@5a000000/clock-controller@5acd0000       (  �/bus@5a000000/clock-controller@5a4a0000         ˜/bus@5a000000/i2c@5a840000        (  �/bus@5a000000/clock-controller@5ac40000       (  §/bus@5a000000/clock-controller@5ace0000       (  ±/bus@5a000000/clock-controller@5acf0000         »/clock-conn-axi         È/clock-conn-ahb         Õ/clock-conn-ipg         â/clock-conn-bch         ï/bus@5b000000           »/bus@5b000000/usb@5b0d0000          û/bus@5b000000/usbmisc@5b0d0200          /bus@5b000000/usbphy@5b100000           Ë/bus@5b000000/mmc@5b010000          Ú/bus@5b000000/mmc@5b020000          /bus@5b000000/mmc@5b030000           ø/bus@5b000000/ethernet@5b040000       4  /bus@5b000000/ethernet@5b040000/mdio/ethernet-phy@0       4  /bus@5b000000/ethernet@5b040000/mdio/ethernet-phy@1          a/bus@5b000000/ethernet@5b050000         #/bus@5b000000/usb@5b110000        (  +/bus@5b000000/usb@5b110000/usb@5b120000       6  9/bus@5b000000/usb@5b110000/usb@5b120000/port/endpoint           E/bus@5b000000/usb-phy@5b160000        (  N/bus@5b000000/clock-controller@5b200000       (  Y/bus@5b000000/clock-controller@5b210000       (  d/bus@5b000000/clock-controller@5b220000       (  o/bus@5b000000/clock-controller@5b230000       (  z/bus@5b000000/clock-controller@5b240000       (  …/bus@5b000000/clock-controller@5b270000       (  �/bus@5b000000/clock-controller@5b280000       (  ™/bus@5b000000/clock-controller@5b290000       (  ¨/bus@5b000000/clock-controller@5b290004       &  ·/bus@5b000000/dma-controller@5b810000         '  À/bus@5b000000/nand-controller@5b812000          Å/bus@5c000000           Ð/bus@5c000000/ddr-pmu@5c020000          Ù/bus@5c000000/ddr-pmu@5c120000          â/clock-lsio-bus         ï/bus@5d000000           û/bus@5d000000/pwm@5d000000          /bus@5d000000/pwm@5d010000          /bus@5d000000/pwm@5d020000          /bus@5d000000/pwm@5d030000          #/bus@5d000000/gpio@5d080000         ./bus@5d000000/gpio@5d090000         9/bus@5d000000/gpio@5d0a0000         D/bus@5d000000/gpio@5d0b0000         O/bus@5d000000/gpio@5d0c0000         Z/bus@5d000000/gpio@5d0d0000         e/bus@5d000000/gpio@5d0e0000         p/bus@5d000000/gpio@5d0f0000         P/bus@5d000000/spi@5d120000        #  {/bus@5d000000/spi@5d120000/flash@0          ‚/bus@5d000000/mailbox@5d1b0000          ‹/bus@5d000000/mailbox@5d1c0000          ”/bus@5d000000/mailbox@5d1d0000          �/bus@5d000000/mailbox@5d1e0000          ¦/bus@5d000000/mailbox@5d1f0000          ¯/bus@5d000000/mailbox@5d200000          ¸/bus@5d000000/mailbox@5d210000          Á/bus@5d000000/mailbox@5d280000        (  Ë/bus@5d000000/clock-controller@5d400000       (  Õ/bus@5d000000/clock-controller@5d410000       (  ß/bus@5d000000/clock-controller@5d420000       (  é/bus@5d000000/clock-controller@5d430000       (  ó/bus@5d000000/clock-controller@5d440000       (  ý/bus@5d000000/clock-controller@5d450000       (  /bus@5d000000/clock-controller@5d460000       (  /bus@5d000000/clock-controller@5d470000         /clock-hsio-axi         (/clock-hsio-per         5/clock-hsio-refa            C/clock-hsio-refb            Q/clock-xtal100m         Z/bus@5f000000           f/bus@5f000000/pcie@5f010000         O/bus@5f000000/pcie@5f010000         l/bus@5f000000/pcie-ep@5f010000        (  u/bus@5f000000/clock-controller@5f060000       (  €/bus@5f000000/clock-controller@5f0b0000       (  �/bus@5f000000/clock-controller@5f0d0000       (   /bus@5f000000/clock-controller@5f0f0000         ¯/bus@5f000000/pcie@5f000000         //bus@5f000000/pcie@5f000000         µ/bus@5f000000/pcie-ep@5f000000          ¾/bus@5f000000/pcie-ep@5f000000          Ç/bus@5f000000/sata@5f020000       (  Ì/bus@5f000000/clock-controller@5f050000       (  ×/bus@5f000000/clock-controller@5f070000       (  á/bus@5f000000/clock-controller@5f080000       (  ì/bus@5f000000/clock-controller@5f090000       (  ÷/bus@5f000000/clock-controller@5f0a0000       (  /bus@5f000000/clock-controller@5f0c0000       (  /bus@5f000000/clock-controller@5f0e0000         &/bus@5f000000/phy@5f180000          //clock-xtal24m        !  7/reserved-memory/memory@90000000          !  C/reserved-memory/memory@90008000          !  O/reserved-memory/memory@90010000          !  [/reserved-memory/memory@90018000          !  g/reserved-memory/memory@900ff000          !  r/reserved-memory/memory@90100000          !  ~/reserved-memory/memory@90108000          !  Š/reserved-memory/memory@90110000          !  –/reserved-memory/memory@90118000          !  ¢/reserved-memory/memory@901ff000          !  ­/reserved-memory/memory@90400000          !  ¸/reserved-memory/memory@92400000          !  Å/reserved-memory/memory@942f0000          !  Õ/reserved-memory/memory@942f8000          !  å/reserved-memory/memory@94300000            õ/backlight-lvds0            /backlight-lvds1            /i2c-mux/i2c@0/audio-codec@1a           /i2c-mux/i2c@1/wm8962@1a            #/mux-controller/port/endpoint           0/regulator-1v5          8/regulator-1v8          @/regulator-2v8          H/regulator-3v3          P/usdhc2-vmmc            `/regulator-audio            j/regulator-fec2-nvcc            z/regulator-can01-gen            ‡/regulator-can2-gen         “/regulator-can01-stby           ¢/regulator-can2-stby            °/regulator-pcie         º/regulator-usbotg1-vbus         Ì/regulator-adc-vref         Ù/regulator-audio-pwr            æ/regulator-audio-3v3            ô/regulator-audio-1v8            /audio-codec-bt       $  /sound-bt-sco/simple-audio-card,cpu          	interrupt-parent #address-cells #size-cells model compatible mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 vpu-core2 device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts #global-interrupts #iommu-cells mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins #reset-cells read-only #thermal-sensor-cells timeout-sec polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device clock-frequency clock-output-names ranges clock-names power-domains firmware-name status memory-region fsl,sec-era assigned-clocks assigned-clock-rates gpio-controller #gpio-cells VA-supply VD-supply VLS-supply VLC-supply reset-gpios clock-indices dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map assigned-clock-parents #sound-dai-cells #dma-cells dma-channels dma-channel-mask fsl,sai-asynchronous dais fsl,dataline #mbox-cells fsl,channel fsl,num-irqs #pwm-cells remote-endpoint resets cs-gpios vdd-supply vddio-supply label power-role data-role try-power-role source-pdos sink-pdos op-sink-microwatt self-powered pinctrl-1 scl-gpios sda-gpios #io-channel-cells vref-supply fsl,clk-source fsl,scu-index xceiver-supply fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword vbus-supply srp-disable hnp-disable adp-disable disable-over-current #index-cells fsl,tuning-start-tap fsl,tuning-step iommus pinctrl-2 bus-width no-sd no-sdio non-removable vmmc-supply cd-gpios wp-gpios fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet phy-supply nvmem-cells nvmem-cell-names rx-internal-delay-ps reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode usb-role-switch #phy-cells gpio-ranges spi-max-frequency spi-tx-bus-width spi-rx-bus-width enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed reset-gpio num-ib-windows num-ob-windows vpcie-supply vpcie3v3aux-supply supports-clkreq fsl,hsio-cfg fsl,refclk-pad-mode stdout-path no-map alloc-ranges linux,cma-default reusable pwms brightness-levels num-interpolated-steps default-brightness-level mux-gpios i2c-parent wlf,shared-lrclk wlf,hp-cfg wlf,gpio-cfg AVDD-supply DBVDD-supply DCVDD-supply SPKVDD1-supply SPKVDD2-supply CPVDD-supply MICVDD-supply PLLVDD-supply select-gpios orientation-switch regulator-name regulator-min-microvolt regulator-max-microvolt enable-active-high off-on-delay-us vin-supply regulator-always-on regulator-boot-on simple-audio-card,name simple-audio-card,format simple-audio-card,bitclock-inversion simple-audio-card,frame-master simple-audio-card,bitclock-master sound-dai dai-tdm-slot-num dai-tdm-slot-width audio-cpu audio-codec audio-asrc audio-routing hp-det-gpios fsl,resource-id fsl,entry-address A53_0 A53_1 A53_2 A53_3 A53_L2 A72_L2 a53_opp_table a72_opp_table gic smmu pd iomuxc pinctrl_hog pinctrl_cs42888_reset pinctrl_i2c_mipi_csi0 pinctrl_i2c_mipi_csi1 pinctrl_i2c0 pinctrl_i2c1 pinctrl_i2c1_gpio pinctrl_adc0 pinctrl_cm41_i2c pinctrl_esai0 pinctrl_fec1 pinctrl_lpspi2 pinctrl_lpspi2_cs pinctrl_mipi0_lpi2c0 pinctrl_mipi1_lpi2c0 pinctrl_flexspi0 pinctrl_fec2 pinctrl_flexcan1 pinctrl_flexcan2 pinctrl_flexcan3 pinctrl_lpuart0 pinctrl_lpuart1 pinctrl_lpuart2 pinctrl_lpuart3 pinctrl_lvds0_lpi2c1 pinctrl_lvds1_lpi2c1 pinctrl_mipi_csi0 pinctrl_mipi_csi1 pinctrl_pciea pinctrl_pciea_reg pinctrl_pcieb pinctrl_pwm_lvds0 pinctrl_pwm_lvds1 pinctrl_sai0 pinctrl_sai1 pinctrl_typec pinctrl_typec_mux pinctrl_usbotg1 pinctrl_usdhc1 pinctrl_usdhc2 pinctrl_usdhc2_gpio scu_reset rtc ocotp fec_mac0 fec_mac1 tsens thermal_zones cpu_alert0 cpu_crit0 gpu_alert0 gpu_crit0 gpu_alert1 gpu_crit1 drc_alert0 drc_crit0 pmic_alert0 pmic_crit0 clk_dummy clk_esai1_rx_clk clk_esai1_rx_hf_clk clk_esai1_tx_clk clk_esai1_tx_hf_clk clk_hdmi_rx_mclk clk_mlb_clk clk_sai5_rx_bclk clk_sai5_tx_bclk clk_sai6_rx_bclk clk_sai6_tx_bclk clk_spdif1_rx lvds_ipg_clk dsi_ipg_clk mipi_pll_div2_clk vpu_subsys_dsp vpu_dsp security_subsys crypto sec_jr2 sec_jr3 cm41_ipg_clk cm41_subsys pca6416 cs42888 cm41_intmux cm41_i2c_lpcg audio_ipg_clk clk_ext_aud_mclk0 clk_ext_aud_mclk1 clk_esai0_rx_clk clk_esai0_rx_hf_clk clk_esai0_tx_clk clk_esai0_tx_hf_clk clk_spdif0_rx clk_sai0_rx_bclk clk_sai0_tx_bclk clk_sai1_rx_bclk clk_sai1_tx_bclk clk_sai2_rx_bclk clk_sai3_rx_bclk clk_sai4_rx_bclk audio_subsys asrc0 spdif0 sai2 sai3 edma0 asrc0_lpcg esai0_lpcg spdif0_lpcg sai1_lpcg sai2_lpcg sai3_lpcg dsp_lpcg dsp_ram_lpcg asrc1 sai6 sai7 amix mqs edma1 aud_rec0_lpcg aud_rec1_lpcg aud_pll_div0_lpcg aud_pll_div1_lpcg mclkout0_lpcg mclkout1_lpcg acm asrc1_lpcg sai6_lpcg sai7_lpcg amix_lpcg mqs0_lpcg sai4 sai5 sai4_lpcg sai5_lpcg esai1 esai1_lpcg vpu mu_m0 mu1_m0 mu2_m0 vpu_core0 vpu_core1 vpu_core2 gpu0_subsys gpu_3d0 mipi0_subsys irqsteer_mipi0 mipi0_lis_lpcg mipi0_pwm_lpcg mipi0_i2c0_lpcg_ipg_clk mipi0_i2c0_lpcg_ipg_s_clk mipi0_i2c0_lpcg_clk mipi0_i2c1_lpcg_ipg_clk mipi0_i2c1_lpcg_ipg_s_clk mipi0_i2c1_lpcg_clk pwm_mipi0 i2c0_mipi0 lvds0_subsys qm_lvds0_lis_lpcg qxp_mipi1_lis_lpcg qm_lvds0_pwm_lpcg qxp_mipi1_pwm_lpcg qm_lvds0_i2c0_lpcg qxp_mipi1_i2c0_lpcg qm_pwm_lvds0 qxp_pwm_mipi_lvds1 qm_i2c0_lvds0 qxp_i2c0_mipi_lvds1 irqsteer_lvds0 lvds0_i2c1_lpcg i2c1_lvds0 mipi1_subsys irqsteer_mipi1 mipi1_i2c0_lpcg_clk mipi1_i2c0_lpcg_ipg_clk mipi1_i2c0_lpcg_ipg_s_clk mipi1_i2c1_lpcg_ipg_clk mipi1_i2c1_lpcg_ipg_s_clk mipi1_i2c1_lpcg_clk pwm_mipi1 i2c0_mipi1 lvds1_subsys irqsteer_lvds1 lvds1_lis_lpcg lvds1_pwm_lpcg lvds1_i2c0_lpcg lvds1_i2c1_lpcg i2c0_lvds1 i2c1_lvds1 img_ipg_clk img_pxl_clk img_subsys isi isi_in_2 isi_in_3 irqsteer_csi0 gpio0_mipi_csi0 csi0_core_lpcg csi0_esc_lpcg mipi_csi_0 mipi_csi0_out irqsteer_csi1 gpio0_mipi_csi1 csi1_core_lpcg csi1_esc_lpcg mipi_csi_1 mipi_csi1_out irqsteer_parallel pi0_ipg_lpcg pi0_pxl_lpcg pi0_misc_lpcg i2c0_parallel jpegdec jpegenc pdma0_lpcg pdma1_lpcg pdma2_lpcg pdma3_lpcg pdma4_lpcg pdma5_lpcg pdma6_lpcg pdma7_lpcg csi0_pxl_lpcg csi1_pxl_lpcg hdmi_rx_pxl_link_lpcg img_jpeg_dec_lpcg img_jpeg_enc_lpcg dma_ipg_clk dma_subsys lpspi0 lpspi1 lpspi3 edma2 spi0_lpcg spi1_lpcg spi2_lpcg spi3_lpcg uart0_lpcg uart1_lpcg uart2_lpcg uart3_lpcg max7322 ptn5110 usb_con1 typec_dr_sw typec_con_ss i2c2 i2c3 adc1 edma3 i2c2_lpcg i2c3_lpcg adc0_lpcg adc1_lpcg can0_lpcg uart4_lpcg i2c4 i2c4_lpcg can1_lpcg can2_lpcg conn_axi_clk conn_ahb_clk conn_ipg_clk conn_bch_clk conn_subsys usbmisc1 usbphy1 usdhc3 ethphy0 ethphy1 usbotg3 usbotg3_cdns3 usb3_drd_sw usb3_phy sdhc0_lpcg sdhc1_lpcg sdhc2_lpcg enet0_lpcg enet1_lpcg usb2_lpcg usb3_lpcg rawnand_0_lpcg rawnand_4_lpcg dma_apbh gpmi ddr_subsys ddr_pmu0 ddr_pmu1 lsio_bus_clk lsio_subsys lsio_pwm0 lsio_pwm1 lsio_pwm2 lsio_pwm3 lsio_gpio0 lsio_gpio1 lsio_gpio2 lsio_gpio3 lsio_gpio4 lsio_gpio5 lsio_gpio6 lsio_gpio7 flash0 lsio_mu0 lsio_mu1 lsio_mu2 lsio_mu3 lsio_mu4 lsio_mu5 lsio_mu6 lsio_mu13 pwm0_lpcg pwm1_lpcg pwm2_lpcg pwm3_lpcg pwm4_lpcg pwm5_lpcg pwm6_lpcg pwm7_lpcg hsio_axi_clk hsio_per_clk hsio_refa_clk hsio_refb_clk xtal100m hsio_subsys pcie1 pcieb_ep pcieb_lpcg phyx1_crr1_lpcg pcieb_crr3_lpcg misc_crr5_lpcg pcie0 pcie0_ep pciea_ep sata pciea_lpcg sata_lpcg phyx2_lpcg phyx1_lpcg phyx2_crr0_lpcg pciea_crr2_lpcg sata_crr4_lpcg hsio_phy xtal24m vdev0vring0 vdev0vring1 vdev1vring0 vdev1vring1 rsc_table0 vdev2vring0 vdev2vring1 vdev3vring0 vdev3vring1 rsc_table1 vdevbuffer dsp_reserved dsp_vdev0vring0 dsp_vdev0vring1 dsp_vdev0buffer lvds_backlight0 lvds_backlight1 wm8960 wm8962 usb3_data_ss reg_1v5 reg_1v8 reg_2v8 reg_3v3 reg_usdhc2_vmmc reg_audio reg_fec2_supply reg_can01_en reg_can2_en reg_can01_stby reg_can2_stby reg_pciea reg_usb_otg1_vbus reg_vref_1v8 reg_audio_5v reg_audio_3v3 reg_audio_1v8 bt_sco_codec btcpu 