Ðþí  8×   8  4ì   (            ë  4´                             &    mediatek,mt7986b-rfb mediatek,mt7986b                                    +            7MediaTek MT7986b RFB          	   =embedded       cpus                         +       cpu@0             arm,cortex-a53           J             Ncpu          Zpsci             h         cpu@1             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@2             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@3             arm,cortex-a53           J            Ncpu          Zpsci             h            oscillator-40m            fixed-clock          wbZ          ‡             ”clkxtal          §         psci              arm,psci-0.2             asmc       reserved-memory                      +             ¯   secmon@43000000          J    C                    ¶      wmcpu-reserved@4fc00000           ¶         J    OÀ                  §   $      wo-emi@4fd00000          J    OÐ                   ¶         §         wo-emi@4fd40000          J    OÔ                   ¶         §         wo-ilm@151e0000          J            €           ¶         §         wo-ilm@151f0000          J            €           ¶         §         wo-data@4fd80000             J    OØ       $            ¶         §         wo-dlm@151e8000          J    €                   ¶         §         wo-dlm@151f8000          J    €                   ¶         §         wo-boot@15194000             J    @                  ¶         §            soc           simple-bus            ¯                     +      interrupt-controller@c000000              arm,gic-v3        P   J                               @              A             B                               ½      	             È         Ý            §         infracfg@10001000              mediatek,mt7986-infracfg syscon          J                      ‡            î            §         wed-pcie@10003000              mediatek,mt7986-wed-pcie syscon          J     0                 §         topckgen@1001b000              mediatek,mt7986-topckgen syscon          J    °                 ‡            §         watchdog@1001c000             mediatek,mt7986-wdt          J    À                 ½       n            î         	   ûdisabled             §   #      apmixedsys@1001e000           mediatek,mt7986-apmixedsys           J    à                 ‡            §         pinctrl@1001f000              mediatek,mt7986b-pinctrl          €   J    ð            Ã             Ä             â             ã             ð             ñ              °              @  gpio iocfg_rt iocfg_rb iocfg_lt iocfg_lb iocfg_tr iocfg_tl eint                              (              )      B   B   #          È         ½       á                        Ý            §      spi-flash-pins           §      mux         4spi         =spi0 spi0_wp_hold            spic-pins            §      mux         4spi         =spi1_2           wf-2g-5g-pins            §   %   mux         4wifi            =wf_2g wf_5g       conf          Ý  DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA WF1_HB1 WF1_HB2 WF1_HB3 WF1_HB4 WF1_HB0 WF1_HB5 WF1_HB6 WF1_HB7 WF1_HB8 WF1_TOP_CLK WF1_TOP_DATA            I            wf-dbdc-pins             §   &   mux         4wifi            =wf_dbdc       conf          |  DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA         I               pwm@10048000              mediatek,mt7986-pwm          J    €                X            ½       ‰            c                                jtop main pwm1 pwm2        	   ûdisabled          syscon@10060000       "    mediatek,mt7986-sgmiisys_0 syscon            J                      ‡            §         syscon@10070000       "    mediatek,mt7986-sgmiisys_1 syscon            J                      ‡            §         rng@1020f000          (    mediatek,mt7986-rng mediatek,mt7623-rng          J     ð                c      7        jrng       	   ûdisabled          crypto@10320000       7    mediatek,mt7986-crypto inside-secure,safexcel-eip97ies           J    2               0   ½       t          u          v          w           vring0 ring1 ring2 ring3         c              †      3        –               ûokay          serial@11002000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J                       ½       {           c                  	  jbaud bus            †                    –                      ûokay          serial@11003000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     0                 ½       |           c                  	  jbaud bus            †              –      6      	   ûdisabled          serial@11004000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     @                 ½       }           c                  	  jbaud bus            †              –      6      	   ûdisabled          i2c@11008000              mediatek,mt7986-i2c           J     €        �    !p€       €         ½       ˆ           ­           c                  	  jmain dma                         +          	   ûdisabled          spi@1100a000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                   +             ½       Œ            c                  #      %         jparent-clk sel-clk spi-clk hclk          ûokay            ·default         Å           Ï           flash@0       	    spi-nand             J            Ø ˜–€        ê           û            spi@1100b000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J     °                             +             ½       �            c                  $      &         jparent-clk sel-clk spi-clk hclk          ûokay            ·default         Å           Ï              thermal@1100c800              mediatek,mt7986-thermal          J     È                 ½       Š           c            ,        jtherm auxadc                       calibration-data            )           ?   	        O            §   '      adc@1100d000              mediatek,mt7986-auxadc           J     Ð                c      ,        jmain            c         	   ûdisabled             §   	      usb@11200000          '    mediatek,mt7986-xhci mediatek,mtk-xhci            J             .      >              	  mac ippc             ½       ­         (  c      1      2      /      0      ;      $  jsys_ck ref_ck mcu_ck dma_ck xhci_ck         u   
                        ûokay          mmc@11230000              mediatek,mt7986-mmc           J    #             Â                  ½       �           †      #      "        –                  (  c      #      )      (      *      +      %  jsource hclk source_cg bus_clk sys_cg          	   ûdisabled          pcie@11280000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            J    (        @       	  pcie-mac             ¯‚                                   Npci                      +            ½       ¨           z       ÿ         c      4      3      5      6      !  jpl_250m tl_26m peri_26m top_133m            u            	  „pcie-phy             Ý           Ž                     `  ¡                                                                                           	   ûdisabled       interrupt-controller                          Ý             È         §            t-phy@11c00000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2            ¯        À                          +         	   ûdisabled       pcie-phy@0           J               c           jref         ¯            §            efuse@11d00000        %    mediatek,mt7986-efuse mediatek,efuse             J    Ð                              +      soc-uuid@140             J  @         calib@274            J  t            §            t-phy@11e10000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2            ¯        á                          +            ûokay       usb-phy@0            J               c      <      =        jref da_ref          ¯            §   
      usb-phy@700          J     	         c      5        jref         ¯            §         usb-phy@1000             J              c      <      =        jref da_ref          ¯            §            syscon@15000000           mediatek,mt7986-ethsys syscon            J                       ‡            î            §         wed@15010000              mediatek,mt7986-wed syscon           J                                  ½       Í           º                     %  Èwo-emi wo-ilm wo-dlm wo-data wo-boot            Ü            §         wed@15011000              mediatek,mt7986-wed syscon           J                                 ½       Î           º                     %  Èwo-emi wo-ilm wo-dlm wo-data wo-boot            Ü            §          ethernet@15100000             mediatek,mt7986-eth          J                   `   ½       Ä          Å          Æ          Ç          ½          ¾          ¿          À         (  vfe0 fe1 fe2 fe3 pdma0 pdma1 pdma2 pdma3       x  c                                                                                       +      ,      —  jfe gp2 gp1 wocpu1 wocpu0 sgmii_tx250m sgmii_rx250m sgmii_cdr_ref sgmii_cdr_fb sgmii2_tx250m sgmii2_rx250m sgmii2_cdr_ref sgmii2_cdr_fb netsys0 netsys1          †      .      /        –                    í                        +            ò                                    &                ûokay       mac@0             mediatek,eth-mac             J            32500base-x           §   "   fixed-link          <  	Ä         B         N         mac@1             mediatek,eth-mac             J           3rgmii            §   !   fixed-link          <  è         B         N         mdio-bus                         +       switch@0              mediatek,mt7531          J           T             ports                        +       port@0           J            `lan0          port@1           J           `lan1          port@2           J           `lan2          port@3           J           `lan3          port@4           J           `lan4          port@5           J           f   !        3rgmii      fixed-link          <  è         B         N         port@6           J           `cpu         f   "        32500base-x     fixed-link          <  	Ä         B         N                     sram@15140000         
    mmio-sram            J                                  +            ¯                      §         syscon@151a5000           mediatek,mt7986-wo-ccif syscon           J    P                             ½       Ó            §         syscon@151ad000           mediatek,mt7986-wo-ccif syscon           J    Ð                             ½       Ô            §         wifi@18000000             mediatek,mt7986-wmac          0   J                   0            Ñ                 o   #           vconsys          c      2      >        jmcu ap2conn       0   ½       Õ          Ö          ×          Ø           º   $         ûokay            ·default dbdc            Å   %        ‚   &         thermal-zones      cpu-thermal         Œ  è        ¢  è        °   '       trips      crit            À èH        Ì  Ð      	   Ecritical          hot         À ÔÀ        Ì  Ð         Ehot       active-high         À Á8        Ì  Ð         Eactive        active-med          À L        Ì  Ð         Eactive        active-low          À  ê`        Ì  Ð         Eactive                 timer             arm,armv8-timer                   0   ½                                 
         aliases         ×/soc/serial@11002000          chosen          ßserial0:115200n8          memory@40000000          Nmemory           J    @       @            	compatible interrupt-parent #address-cells #size-cells model chassis-type reg device_type enable-method #cooling-cells clock-frequency #clock-cells clock-output-names phandle ranges no-map interrupts interrupt-controller #interrupt-cells #reset-cells status reg-names gpio-controller #gpio-cells gpio-ranges function groups pins drive-strength #pwm-cells clocks clock-names interrupt-names assigned-clocks assigned-clock-parents clock-div pinctrl-names pinctrl-0 cs-gpios spi-max-frequency spi-tx-bus-width spi-rx-bus-width nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys #io-channel-cells phys bus-range phy-names interrupt-map-mask interrupt-map #phy-cells memory-region memory-region-names mediatek,wo-ccif sram mediatek,ethsys mediatek,sgmiisys mediatek,wed-pcie mediatek,wed phy-mode speed full-duplex pause reset-gpios label ethernet resets reset-names pinctrl-1 polling-delay-passive polling-delay thermal-sensors temperature hysteresis serial0 stdout-path 