Ðþí >   8  ÿ�   (            ®  ÿX                             1    google,ponyta-sku1 google,ponyta mediatek,mt8186                                     +            7Google Ponyta sku1 board       aliases          =/soc/ovl@14005000            B/soc/ovl@14006000            J/soc/rdma@14007000           P/soc/rdma@1401f000           V/soc/i2c@11007000            [/soc/i2c@11008000            `/soc/i2c@11009000            e/soc/i2c@1100f000            j/soc/i2c@11016000            o/soc/mmc@11230000            t/soc/mmc@11240000            y/soc/serial@11002000          fhctl@1000ce00            mediatek,mt8186-fhctl            �               ˆ     Î              	   Œdisabled          cci           mediatek,mt8186-cci          �                     “cci intermediate             Ÿ            ³            ¿   "      opp-table-cci             operating-points-v2           Ç         ¿      opp-500000000            Ò    Íe          Ù 	'À         ¿         opp-560000000            Ò    !`ì          Ù 
L¸         ¿         opp-612000000            Ò    $za          Ù 
•ö         ¿         opp-682000000            Ò    (¦~€         Ù 
÷ž         ¿   	      opp-752000000            Ò    ,Òœ          Ù YF         ¿   
      opp-822000000            Ò    0þ¹€         Ù ºî         ¿         opp-875000000            Ò    4'pÀ         Ù ëÂ         ¿         opp-927000000            Ò    7@åÀ         Ù 5          ¿         opp-980000000            Ò    :i�          Ù ~>         ¿         opp-1050000000           Ò    >•º€         Ù ßæ         ¿         opp-1120000000           Ò    BÁØ          Ù )$         ¿         opp-1155000000           Ò    D×æÀ         Ù ŠÌ         ¿         opp-1190000000           Ò    Fíõ€         Ù Ô
         ¿         opp-1260000000           Ò    K          Ù ~ð         ¿         opp-1330000000           Ò    OF0€         Ù )Ö         ¿         opp-1400000000           Ò    SrN          Ù ¼R         ¿            opp-table-cluster0            operating-points-v2           Ç         ¿      opp-500000000            Ò    Íe          Ù 	'À         ç         opp-774000000            Ò    ."M€         Ù 
L¸         ç         opp-875000000            Ò    4'pÀ         Ù 
®`         ç         opp-975000000            Ò    :QÀ         Ù          ç   	      opp-1075000000           Ò    @2À         Ù q°         ç   
      opp-1175000000           Ò    F	À         Ù ÓX         ç         opp-1275000000           Ò    KþôÀ         Ù 5          ç         opp-1375000000           Ò    QôÕÀ         Ù –¨         ç         opp-1500000000           Ò    Yh/          Ù º         ç         opp-1618000000           Ò    `p¸€         Ù Yø         ç         opp-1666000000           Ò    cM$€         Ù »          ç         opp-1733000000           Ò    gK{@         Ù H         ç         opp-1800000000           Ò    kIÒ          Ù ~ð         ç         opp-1866000000           Ò    o8æ€         Ù ù         ç         opp-1933000000           Ò    s7=@         Ù Zª         ç         opp-2000000000           Ò    w5”          Ù ¼R         ç            opp-table-cluster1            operating-points-v2           Ç         ¿   #   opp-774000000            Ò    ."M€         Ù 
L¸         ç         opp-835000000            Ò    1ÅÀ         Ù 
•ö         ç         opp-919000000            Ò    6ÆÓÀ         Ù 
÷ž         ç         opp-1002000000           Ò    ;¹N€         Ù YF         ç   	      opp-1085000000           Ò    @«É@         Ù ÓX         ç   
      opp-1169000000           Ò    E­†@         Ù 5          ç         opp-1308000000           Ò    Mö          Ù ßæ         ç         opp-1419000000           Ò    T”8À         Ù Yø         ç         opp-1530000000           Ò    [1ò€         Ù ìt         ç         opp-1670000000           Ò    cŠ-€         Ù —Z         ç         opp-1733000000           Ò    gK{@         Ù ù         ç         opp-1796000000           Ò    kÉ          Ù s         ç         opp-1860000000           Ò    nÝY          Ù Ô¼         ç         opp-1923000000           Ò    rž¦À         Ù 6d         ç         opp-1986000000           Ò    v_ô€         Ù °v         ç         opp-2050000000           Ò    z0„€         Ù          ç            cpus                         +       cpu-map    cluster0       core0            õ         core1            õ         core2            õ         core3            õ         core4            õ         core5            õ         core6            õ         core7            õ               cpu@0            ùcpu           arm,cortex-a55           ˆ            psci            w5”          �                      “cpu intermediate             Ÿ           #   T        =  ~        P               `  €         m   @           €        Œ  €         ™   @        «   €        ¸   !        É           Ø   "         ³            ¿         cpu@100          ùcpu           arm,cortex-a55           ˆ           psci            w5”          �                      “cpu intermediate             Ÿ           #   T        =  ~        P               `  €         m   @           €        Œ  €         ™   @        «   €        ¸   !        É           Ø   "         ³            ¿         cpu@200          ùcpu           arm,cortex-a55           ˆ           psci            w5”          �                      “cpu intermediate             Ÿ           #   T        =  ~        P               `  €         m   @           €        Œ  €         ™   @        «   €        ¸   !        É           Ø   "         ³            ¿         cpu@300          ùcpu           arm,cortex-a55           ˆ           psci            w5”          �                      “cpu intermediate             Ÿ           #   T        =  ~        P               `  €         m   @           €        Œ  €         ™   @        «   €        ¸   !        É           Ø   "         ³            ¿         cpu@400          ùcpu           arm,cortex-a55           ˆ           psci            w5”          �                      “cpu intermediate             Ÿ           #   T        =  ~        P               `  €         m   @           €        Œ  €         ™   @        «   €        ¸   !        É           Ø   "         ³            ¿         cpu@500          ùcpu           arm,cortex-a55           ˆ           psci            w5”          �                      “cpu intermediate             Ÿ           #   T        =  ~        P               `  €         m   @           €        Œ  €         ™   @        «   €        ¸   !        É           Ø   "         ³            ¿         cpu@600          ùcpu           arm,cortex-a76           ˆ           psci            z0„€         �                     “cpu intermediate             Ÿ   #        #  O        =           P   $   %        `           m   @                   Œ           ™   @        «           ¸   &        É           Ø   "         ³   '         ¿         cpu@700          ùcpu           arm,cortex-a76           ˆ           psci            z0„€         �                     “cpu intermediate             Ÿ   #        #  O        =           P   $   %        `           m   @                   Œ           ™   @        «           ¸   &        É           Ø   "         ³   '         ¿         idle-states         åpsci       cpu-retention-l           arm,idle-state          ò           	           2        +   d        ;  @         ¿         cpu-retention-b           arm,idle-state          ò           	           2        +   d        ;  x         ¿   $      cpu-off-l             arm,idle-state          ò          	           d        +   ú        ;  4         ¿          cpu-off-b             arm,idle-state          ò          	           d        +   ú        ;  l         ¿   %         l2-cache0             cache           L           b           o   @        �           ¸   (         X         ¿   !      l2-cache1             cache           L           b           o   @        �           ¸   (         X         ¿   &      l3-cache              cache           L           b           o   @        �            X         ¿   (         fixed-factor-clock-13m            fixed-factor-clock          f             �   )        s           }           ˆclk13m           ¿   =      oscillator-26m            fixed-clock         f            Œº€        ˆclk26m           ¿   )      oscillator-32k            fixed-clock         f              €         ˆclk32k        opp-table-gpu             operating-points-v2          ¿   x   opp-299000000            Ò    Ò`À         Ù 	X”        ›   ÿ      opp-332000000            Ò    Éë          Ù 	‰h        ›   ÿ      opp-366000000            Ò    Ð·€         Ù 	º<        ›   ÿ      opp-400000000            Ò    ×„          Ù 	Ò¦        ›   ÿ      opp-434000000            Ò    ÞP€         Ù 
z        ›   ÿ      opp-484000000            Ò    ÙA          Ù 
4N        ›   ÿ      opp-535000000            Ò    ãsÀ         Ù 
}Œ        ›   ÿ      opp-586000000            Ò    "í¦€         Ù 
®`        ›   ÿ      opp-637000000            Ò    %÷Ù@         Ù 
ß4        ›   ÿ      opp-690000000            Ò    ) �€         Ù @Ü        ›   ÿ      opp-743000000            Ò    ,IGÀ         Ù Š        ›   ÿ      opp-796000000            Ò    /qÿ          Ù ëÂ        ›   ÿ      opp-850000000            Ò    2©ø€         Ù 5         ›   ÿ      opp-900000000-3          Ò    5¤é          Ù øP        ›   Ï      opp-900000000-4          Ò    5¤é          Ù Ç|        ›         opp-900000000-5          Ò    5¤é          Ù –¨        ›          opp-950000000-3          Ò    8ŸÙ€         Ù »         ›   Ï      opp-950000000-4          Ò    8ŸÙ€         Ù Yø        ›         opp-950000000-5          Ò    8ŸÙ€         Ù øP        ›          opp-1000000000-3             Ò    ;šÊ          Ù ~ð        ›   Ï      opp-1000000000-4             Ò    ;šÊ          Ù ìt        ›         opp-1000000000-5             Ò    ;šÊ          Ù Yø        ›             pmu-a55           arm,cortex-a55-pmu                      ¬            *      pmu-a76           arm,cortex-a76-pmu                      ¬            +      psci              arm,psci-1.0            smc       timer             arm,armv8-timer                   @  ¬                                             
             soc                      +             simple-bus          ·                                »   interrupt-controller@c000000              arm,gic-v3          Â           Ó                        ê          ˆ                                    ¬      	                ÿ         ¿      ppi-partitions     interrupt-partition-0                                      ¿   *      interrupt-partition-1                          ¿   +            syscon@c53a000            mediatek,mt8186-mcusys syscon            ˆ    S                 f            ¿         syscon@10000000            mediatek,mt8186-topckgen syscon          ˆ                      f            ¿   -      syscon@10001000       #    mediatek,mt8186-infracfg_ao syscon           ˆ                     f           (            ¿   /      syscon@10003000           mediatek,mt8186-pericfg syscon           ˆ     0                 ¿   j      pinctrl@10005000              mediatek,mt8186-pinctrl       €   ˆ     P                           "             $             &             *             ,             °              B  5iocfg0 iocfg_lt iocfg_lm iocfg_lb iocfg_bl iocfg_rb iocfg_rt eint            ?        O           [   ,           ¹         ê        ¬       º               Â        	ß  gTP TP TP I2S0_HP_DI I2S3_DP_SPKR_DO SAR_INT_ODL BT_WAKE_AP_ODL WIFI_INT_ODL DPBRDG_INT_ODL EDPBRDG_INT_ODL EC_AP_HPD_OD TCHPAD_INT_ODL TCHSCR_INT_1V8_ODL EC_AP_INT_ODL EC_IN_RW_ODL GSC_AP_INT_ODL AP_FLASH_WP_L HP_INT_ODL PEN_EJECT_OD WCAM_PWDN_L WCAM_RST_L UCAM_SEN_EN UCAM_RST_L LTE_RESET_L LTE_SAR_DETECT_L I2S2_DP_SPK_MCK I2S2_DP_SPKR_BCK I2S2_DP_SPKR_LRCK I2S2_DP_SPKR_DI (TP) EN_PP1000_EDPBRDG EN_PP1800_EDPBRDG EN_PP3300_EDPBRDG UART_GSC_TX_AP_RX UART_AP_TX_GSC_RX UART_DBGCON_TX_ADSP_RX UART_ADSP_TX_DBGCON_RX EN_PP1000_DPBRDG TCHSCR_REPORT_DISABLE EN_PP3300_DPBRDG EN_PP1800_DPBRDG SPI_AP_CLK_EC SPI_AP_CS_EC_L SPI_AP_DO_EC_DI SPI_AP_DI_EC_DO SPI_AP_CLK_GSC SPI_AP_CS_GSC_L SPI_AP_DO_GSC_DI SPI_AP_DI_GSC_DO UART_DBGCON_TX_SCP_RX UART_SCP_TX_DBGCON_RX EN_PP1200_CAM_X EN_PP2800A_VCM_X EN_PP2800A_UCAM_X EN_PP2800A_WCAM_X WLAN_MODULE_RST_L EN_PP1200_UCAM_X I2S1_HP_DO I2S1_HP_BCK I2S1_HP_LRCK I2S1_HP_MCK TCHSCR_RST_1V8_L SPI_AP_CLK_ROM SPI_AP_CS_ROM_L SPI_AP_DO_ROM_DI SPI_AP_DI_ROM_DO NC NC EMMC_STRB EMMC_CLK EMMC_CMD EMMC_RST_L EMMC_DATA0 EMMC_DATA1 EMMC_DATA2 EMMC_DATA3 EMMC_DATA4 EMMC_DATA5 EMMC_DATA6 EMMC_DATA7 AP_KPCOL0 NC NC NC TP SDIO_CLK SDIO_CMD SDIO_DATA0 SDIO_DATA1 SDIO_DATA2 SDIO_DATA3 NC NC NC NC NC NC EDPBRDG_PWREN BL_PWM_1V8 EDPBRDG_RST_L MIPI_DPI_CLK MIPI_DPI_VSYNC MIPI_DPI_HSYNC MIPI_DPI_DE MIPI_DPI_D0 MIPI_DPI_D1 MIPI_DPI_D2 MIPI_DPI_D3 MIPI_DPI_D4 MIPI_DPI_D5 MIPI_DPI_D6 MIPI_DPI_DA7 MIPI_DPI_D8 MIPI_DPI_D9 MIPI_DPI_D10 MIPI_DPI_D11 PCM_BT_CLK PCM_BT_SYNC PCM_BT_DI PCM_BT_DO JTAG_TMS_TP JTAG_TCK_TP JTAG_TDI_TP JTAG_TDO_TP JTAG_TRSTN_TP CLK_24M_WCAM CLK_24M_UCAM UCAM_DET_ODL AP_I2C_EDPBRDG_SCL_1V8 AP_I2C_EDPBRDG_SDA_1V8 AP_I2C_TCHSCR_SCL_1V8 AP_I2C_TCHSCR_SDA_1V8 AP_I2C_TCHPAD_SCL_1V8 AP_I2C_TCHPAD_SDA_1V8 AP_I2C_DPBRDG_SCL_1V8 AP_I2C_DPBRDG_SDA_1V8 AP_I2C_WLAN_SCL_1V8 AP_I2C_WLAN_SDA_1V8 AP_I2C_AUD_SCL_1V8 AP_I2C_AUD_SDA_1V8 AP_I2C_TPM_SCL_1V8 AP_I2C_UCAM_SDA_1V8 AP_I2C_UCAM_SCL_1V8 AP_I2C_UCAM_SDA_1V8 AP_I2C_WCAM_SCL_1V8 AP_I2C_WCAM_SDA_1V8 SCP_I2C_SENSOR_SCL_1V8 SCP_I2C_SENSOR_SDA_1V8 AP_EC_WARM_RST_REQ AP_XHCI_INIT_DONE USB3_HUB_RST_L EN_SPKR BEEP_ON AP_EDP_BKLTEN EN_PP3300_DISP_X EN_PP3300_SDBRDG_X BT_KILL_1V8_L WIFI_KILL_1V8_L PWRAP_SPI0_CSN PWRAP_SPI0_CK PWRAP_SPI0_MO PWRAP_SPI0_MI SRCLKENA0 SRCLKENA1 SCP_VREQ_VAO AP_RTC_CLK32K AP_PMIC_WDTRST_L AUD_CLK_MOSI AUD_SYNC_MOSI AUD_DAT_MOSI0 AUD_DAT_MOSI1 AUD_CLK_MISO AUD_SYNC_MISO AUD_DAT_MISO0 AUD_DAT_MISO1 NC NC DPBRDG_PWREN DPBRDG_RST_L LTE_W_DISABLE_L LTE_SAR_DETECT_L EN_PP3300_LTE_X LTE_PWR_OFF_L LTE_RESET_L TP TP           ¿   ,   aud-clk-mosi-off-pins            ¿   ¡   pins-clk-sync           w  ¦   §          ~         ‹         aud-clk-mosi-on-pins             ¿   ¢   pins-clk-sync           w  ¦  §         aud-clk-miso-off-pins            ¿   £   pins-clk-sync           w  ª   «          ~         ‹         aud-clk-miso-on-pins             ¿   ¤   pins-clk-sync           w  ª  «         aud-dat-mosi-off-pins            ¿   §   pins-dat            w  ¨   ©          ~         ‹         aud-dat-mosi-on-pins             ¿   ¨   pins-dat            w  ¨  ©         aud-dat-miso-off-pins            ¿   ¥   pins-dat            w  ¬   ­          ~         ‹         aud-dat-miso-on-pins             ¿   ¦   pins-dat            w  ¬  ­         š         ¯         aud-gpio-i2s0-off-pins           ¿   ©   pins-sdata          w            aud-gpio-i2s0-on-pins            ¿   ª   pins-sdata          w           aud-gpio-i2s-off-pins            ¿   «   pins-clk-sdata          w  8   9   :   ;          ¼         aud-gpio-i2s1-on-pins            ¿   ¬   pins-clk-sdata          w  8  9  :  ;         aud-gpio-i2s2-off-pins           ¿   ­   pins-cmd-dat            w               ¼         aud-gpio-i2s2-on-pins            ¿   ®   pins-clk            w            Ç            aud-gpio-i2s3-off-pins           ¿   ¯   pins-sdata          w            ¼         aud-gpio-i2s3-on-pins            ¿   °   pins-sdata          w          Ç            aud-gpio-pcm-off-pins            ¿   ±   pins-clk-sdata          w  s   t   u   v          ¼         aud-gpio-pcm-on-pins             ¿   ²   pins-clk-sdata          w  s  t  u  v         aud-gpio-dmic-sec-pins           ¿   ³   pins            w            ¼         bt-reset-pins            ¿   r   pins-bt-reset           w  ›          Ö         dpi-sleep-pins           ¿   }   pins-cmd-dat          @  w  g   h   i   j   k   l   m   n   o   p   q   r   e   d   f   c         Ç   
         ¼         dpi-default-pins             ¿   |   pins-cmd-dat          @  w  g  h  i  j  k  l  m  n  o  p  q  r  e  d  f  c        Ç   
         cros-ec-int-pins             ¿   d   pins-ec-ap-int-odl          w            ~         edp-panel-fixed-pins             ¿       pins-vreg-en            w  ™          Ö         en-pp1800-dpbrdg-pins            ¿   Ÿ   pins-vreg-en            w  '          ¼         gsc-int-pins             ¿   f   pins-gsc-ap-int-odl         w            ~         i2c0-pins            ¿   G   pins-bus            w  €           ¯        Ç            ~         i2c1-pins            ¿   Q   pins-bus            w  ‚  �         ¯        Ç            ~         i2c2-pins            ¿   T   pins-bus            w  „  ƒ         ¯        Ç            ~         i2c3-pins            ¿   V   pins-bus            w  †  …         ¯        Ç            ~         i2c5-pins            ¿   \   pins-bus            w  Š  ‰         ¯        Ç            ~         it6505-pins          ¿   W   pins-hpd            w  
          ~         â      pins-int            w            ~         â      pins-reset          w  ±          ¼         â         mmc0-default-pins            ¿   k   pins-clk            w  D        ‹   f      pins-cmd-dat          $  w  G  H  I  J  K  L  M  N  E         ~        â   e      pins-rst            w  F        â   e         mmc0-uhs-pins            ¿   l   pins-clk            w  D        Ç           ‹   f      pins-cmd-dat          $  w  G  H  I  J  K  L  M  N  E         ~        Ç           â   e      pins-ds         w  C        Ç           ‹   f      pins-rst            w  F        â   e         mmc1-default-pins            ¿   n   pins-clk            w  T        Ç           ‹   f      pins-cmd-dat            w  V  W  X  Y  U         ~        Ç           â   e         mmc1-uhs-pins            ¿   o   pins-clk            w  T        Ç           ‹   f      pins-cmd-dat            w  V  W  X  Y  U         ~        Ç           â   e         mmc1-eint-pins           ¿   p   pins-dat1           w  W          ~        â   e         nor-default-pins             ¿   E   pins-clk-dat            w  ?  =  @        Ç            ‹      pins-cs-dat         w  >  A  B        Ç            â         pen-eject-pins           ¿   ž   pins            w            ~         ¯         disp-pwm-pins            ¿   b   pins            w  a         Ö         speaker-codec-default-pins           ¿   ¹   pins-sdb            w  –          ¼         scp-default-pins             ¿   >   pins-scp-uart           w  0  1         spi1-pins            ¿   c   pins-bus            w  (  )  *  +         ¯         ~         spi2-pins            ¿   e   pins-bus            w  ,  -   .  /         ¯         ~         spmi-pins      pins-bus            w  ·  ¸         touchscreen-pins             ¿   R   pins-irq            w            ~         â      pins-reset          w  <          Ö      pins-report-sw          w  %          ¼         trackpad-default-pins            ¿   U   pins-int-n          w            ~         ¯         wifi-enable-pins             ¿   »   pins-wifi-enable            w  6          wifi-wakeup-pins             ¿   ¼   pins-wifi-wakeup            w            ~         anx7625-pins             ¿   H   pins-int            w  	          ~         ¯      pins-reset          w  b          ¼      pins-power-en           w  `          ¼         pp1000-edpbrdg-en-pins           ¿   ½   pins-vreg-en            w            ¼         pp1800-edpbrdg-en-pins           ¿   ¾   pins-vreg-en            w            ¼         pp3300-edpbrdg-en-pins           ¿   ¿   pins-vreg-en            w            ¼            syscon@10006000       )    mediatek,mt8186-scpsys syscon simple-mfd             ˆ     `           power-controller          !    mediatek,mt8186-power-controller                         +            ï            ¿   B   power-domain@0           ˆ             �   -            “mfg00                        +            ï              .   power-domain@1           ˆ              /                     +            ï              0   power-domain@2           ˆ           ï          power-domain@3           ˆ           ï                power-domain@17          ˆ            �   -      -         $   “subsys-csirx-top0 subsys-csirx-top1         ï          power-domain@4           ˆ            �   -      /   =         “sys_ck ref_ck           ï          power-domain@5           ˆ            �   /   B   /   ?         “sys_ck ref_ck           ï          power-domain@18          ˆ            �   -   /   -   >         “audioadsp subsys-adsp-bus                        +            ï      power-domain@19          ˆ                        +            ï      power-domain@20          ˆ              /        ï                power-domain@16          ˆ              /        ï          power-domain@6           ˆ         0   �   -   *   -   +   1   
   1      1      1         M   “disp mdp subsys-smi-infra subsys-smi-common subsys-smi-gals subsys-smi-iommu               /                     +            ï      power-domain@14          ˆ            �   -   )   2             “vdec0 larb             /        ï          power-domain@10          ˆ   
      8   �   -      -      -      -       3      -   #   -   %      6   “cam0 cam1 cam2 cam3 gals subsys-cam-tm subsys-cam-top              /                     +            ï      power-domain@12          ˆ           ï          power-domain@11          ˆ           ï             power-domain@7           ˆ            �   4      -   &         “gals subsys-img-top            /                     +            ï      power-domain@8           ˆ           ï             power-domain@9           ˆ   	      (   �   -   '   5       5      5      5         P   “subsys-ipe-top subsys-ipe-larb0 subsys-ipe-larb1 subsys-ipe-smi subsys-ipe-gals            /        ï          power-domain@13          ˆ            �   -   $   6            “venc0 subsys-larb              /        ï          power-domain@15          ˆ            �   -   :   7      7         %   “wpe0 subsys-larb-ck subsys-larb-pclk               /        ï                   watchdog@10007000             mediatek,mt8186-wdt          #         ˆ     p                (            ;         ¿   g      syscon@1000c000       "    mediatek,mt8186-apmixedsys syscon            ˆ     À                f            ¿         pwrap@1000d000            mediatek,mt8186-pwrap syscon             ˆ     Ð                5pwrap           ¬       Â                �   /      /          	   “spi wrap       pmic               mediatek,mt6366 mediatek,mt6358          ê        T   ,   É           Â      audio-codec       ,    mediatek,mt6366-sound mediatek,mt6358-sound         h   8        t         regulators        4    mediatek,mt6366-regulator mediatek,mt6358-regulator         ‡   9        ˜   9        ©   9        º   9        Ì   9        ß   9        ð   9           9           9        '   9        ;   9        K   9        [   :        k   ;        {   <        ‹   <   vcore           ›pp0750_dvdd_core            ª dp        Â 5         Ú  j        ï   È                        #      vdram1          ›pp1125_emi_vdd2         ª *ˆ        Â *ˆ        Ú  0Ô        ï                            #         ¿   ;      vgpu            ›ppvar_dvdd_vgpu         ª ¡         Â ~ð        Ú  j        ï   È                       7   .        N †          ¿   0      vproc11         ›ppvar_dvdd_proc_bc_mt6366           ª 	'À        Â O€        Ú  j        ï   È                        #         ¿   '      vproc12         ›ppvar_dvdd_proc_lc          ª 	'À        Â O€        Ú  j        ï   È                        #         ¿         vs1         ›pp2000_vs1          ª „€        Â „€        Ú  0Ô        ï             #         ¿   :      vs2         ›pp1350_vs2          ª ™p        Â ™p        Ú  0Ô        ï             #         ¿   <      va12            ›pp1200_va12         ª O€        Â O€        ï           #      vaud28          ›pp2800_vaud28           ª *¹€        Â *¹€        ï           ¿   8      vaux18          ›pp1840_vaux18           ª w@        Â €        ï        vbif28          ›pp2800_vbif28           ª *¹€        Â *¹€        ï        vcn18           ›pp1800_vcn18_x          ª w@        Â w@        ï        vcn28           ›pp2800_vcn28_x          ª *¹€        Â *¹€        ï        vefuse          ›pp1800_vefuse           ª w@        Â w@        ï        vfe28           ›pp2800_vfe28_x          ª *¹€        Â *¹€        ï        vemc            ›pp3000_vemc         ª -ÆÀ        Â -ÆÀ        ï   <         ¿   m      vibr            ›pp2800_vibr_x           ª *¹€        Â *¹€        ï   <      vio18           ›pp1800_vio18_s3         ª w@        Â w@        ï  
Œ         #         ¿   ]      vio28           ›pp2800_vio28_x          ª *¹€        Â *¹€        ï        vm18            ›pp1800_emi_vdd1         ª w@        Â €        ï  E         #      vmc         ›pp3000_vmc          ª -ÆÀ        Â -ÆÀ        ï   <      vmddr           ›pm0750_emi_vmddr            ª 
®`        Â q°        ï  E         #      vmch            ›pp3000_vmch         ª -ÆÀ        Â -ÆÀ        ï   <      vcn33           ›pp3300_vcn33_x          ª 2Z         Â 2Z         ï        vdram2          ›pp0600_emi_vddq         ª 	'À        Â 	'À        ï  ä         #      vrf12           ›pp1200_vrf12_x          ª O€        Â O€        ï   x      vrf18           ›pp1800_vrf18_x          ª w@        Â w@        ï   x      vsim1           ›pp1860_vsim1_x          ª w@        Â a         ï        vsim2           ›pp2760_vsim2_x          ª )2à        Â *@        ï           ¿   X      vsram-gpu           ›pp0900_dvdd_sram_gpu            ª øP        Â �        Ú  j        ï   ð        7   0        N †          ¿   .      vsram-others            ›pp0900_dvdd_sram_core           ª »         Â »         Ú  j        ï   ð         #      vsram-proc11            ›pp0900_dvdd_sram_bc         ª øP        Â          Ú  j        ï   ð         #      vsram-proc12            ›pp0900_dvdd_sram_lc         ª øP        Â          Ú  j        ï   ð         #      vusb            ›pp3070_vusb         ª -ÆÀ        Â .Ø0        ï           #      vxo22           ›pp2240_vxo22            ª !‘À        Â ".         ï   x         #         rtc       (    mediatek,mt6366-rtc mediatek,mt6358-rtc             spmi@10015000         *    mediatek,mt8186-spmi mediatek,mt8195-spmi             ˆ    P            °                5pmif spmimst             �   /      /       -   2      (   “pmif_sys_ck pmif_tmr_ck spmimst_clk_mux         k   -   2        {   -   t         ¬       í              ñ             	   Œdisabled          timer@10017000        ,    mediatek,mt8186-timer mediatek,mt6765-timer          ˆ    p                ¬       Ï                �   =      mailbox@1022c000              mediatek,mt8186-gce          ˆ    "À       @          �   /            “gce         ¬       ª               ’            ¿   y      scp@10500000              mediatek,mt8186-scp           ˆ    P             \       �€      	  5sram cfg            ¬       Í               ždefault         ¬   >        ¶mediatek/mt8186/scp.img         Ä   ?         Œokay             ¿   �   cros-ec-rpmsg             google,cros-ec-rpmsg            Òcros-ec-rpmsg            adsp@10680000             mediatek,mt8186-dsp       @   ˆ    h              €             h°            hð                5cfg sram sec bus             �   -   /   -   >         “audiodsp adsp_bus           k   -   /   -   >        {   )   -   E        ærx tx           ñ   @   A        ø   B            Œokay            Ä   C   D         ¿   ´      mailbox@10686100              mediatek,mt8186-adsp-mbox           ’             ˆ    ha                ¬      i                ¿   @      mailbox@10687100              mediatek,mt8186-adsp-mbox           ’             ˆ    hq                ¬      j                ¿   A      spi@11000000              mediatek,mt8186-nor          ˆ                        �   -   3   /   O   /   c   /   d         “spi sf axi axi_s            k   -   3        {   -   P        ¬      %                Œokay            ždefault         ¬   E                     +       flash@0           jedec,spi-nor            ˆ            SÀ         adc@11001000          .    mediatek,mt8186-auxadc mediatek,mt8173-auxadc            ˆ                                 �   /   "         “main          serial@11002000       *    mediatek,mt8186-uart mediatek,mt6577-uart            ˆ                      ¬       p                �   )   /         	   “baud bus             Œokay          serial@11003000       *    mediatek,mt8186-uart mediatek,mt6577-uart            ˆ     0                ¬       q                �   )   /         	   “baud bus          	   Œdisabled          i2c@11007000              mediatek,mt8186-i2c           ˆ     p                             ¬       i                �   F       /   '      	   “main dma            s                        +             Œokay            ždefault         ¬   G         €   anx7625@58            analogix,anx7625             ˆ   X        ždefault         ¬   H        *   ,   `            7   ,   b            C   I        P   J        ]   K        jp0          p0     ports                        +       port@0           ˆ       endpoint            ”   L        ¤                      ¿   €         port@1           ˆ      endpoint            ”   M         ¿   P            aux-bus    panel         
    edp-panel           ¯   N        ¼   O   port       endpoint            ”   P         ¿   M                     i2c@11008000              mediatek,mt8186-i2c           ˆ     €                             ¬       j                �   F      /   '      	   “main dma            s                        +             Œokay            ždefault         ¬   Q         €        Æ  @   touchscreen@5d            goodix,gt7375p           ˆ   ]        T   ,              ždefault         ¬   R        7   ,   <           i   S         à         i2c@11009000              mediatek,mt8186-i2c           ˆ     �                    €        ¬       k                �   F      /   '      	   “main dma            s                        +             Œokay            ždefault         ¬   T         €        Æ  Uð   trackpad@15           elan,ekth3000            ˆ           T   ,              ždefault         ¬   U        ÿ   S         
         Œfail-needs-probe          trackpad@2c           hid-over-i2c             ˆ   ,                    T   ,              ždefault         ¬   U        i   S         
      	   Œdisabled             i2c@1100f000              mediatek,mt8186-i2c           ˆ     ð             €               ¬       l                �   F      /   '      	   “main dma            s                        +             Œokay            ždefault         ¬   V         †    dp-bridge@5c              ite,it6505           ˆ   \        T   ,              ždefault         ¬   W        '            8   X        D   Y        7   ,   ±           Q   Z         ¿   ·   ports                        +       port@0           ˆ       endpoint            X    ðÑ€        ”   [         ¿   ~         port@1           ˆ                  i2c@11011000              mediatek,mt8186-i2c           ˆ                 €      €        ¬       m                �   F      /   '      	   “main dma            s                        +          	   Œdisabled          i2c@11016000              mediatek,mt8186-i2c           ˆ    `                             ¬      b                �   F      /   '      	   “main dma            s                        +             Œokay            ždefault         ¬   \   codec@1a              realtek,rt5682s          ˆ           T   ,              '           i   ]        u   ]        ‚   ]        ‘   ^        Ÿ            ¿   ¶         i2c@1100d000              mediatek,mt8186-i2c           ˆ     Ð                             ¬      c                �   F      /   '      	   “main dma            s                        +          	   Œdisabled          i2c@11004000              mediatek,mt8186-i2c           ˆ     @             	       €        ¬       n                �   F      /   '      	   “main dma            s                        +          	   Œdisabled          i2c@11005000              mediatek,mt8186-i2c           ˆ     P             
€      €        ¬       o                �   F      /   '      	   “main dma            s                        +          	   Œdisabled          spi@1100a000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             ˆ                      ¬       Š                �   -   K   -      /            “parent-clk sel-clk spi-clk        	   Œdisabled          thermal-sensor@1100b000           mediatek,mt8186-lvts             ˆ     °                ¬       c                �   /   	        ®   /            µ   _   `      $  Álvts-calib-data-1 lvts-calib-data-2         Ò            ¿   ”      svs@1100bc00              mediatek,mt8186-svs          ˆ     ¼                ¬       Ž                �   /   	         “main            µ   a   _      (  Ásvs-calibration-data t-calibration-data         ®   /           èsvs_rst       pwm@1100e000          2    mediatek,mt8186-disp-pwm mediatek,mt8183-disp-pwm            ˆ     à                ¬       �               ô            �   -      /   4         “main mm          Œokay            ždefault         ¬   b         ¿   œ      spi@11010000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             ˆ                     ¬       ‹                �   -   K   -      /   8         “parent-clk sel-clk spi-clk           Œokay            ždefault         ¬   c        ÿ       ec@0              google,cros-ec-spi           ˆ            T   ,              ždefault         ¬   d         B@   i2c-tunnel            google,cros-ec-i2c-tunnel           	                        +       sbs-battery@b             sbs,sbs-battery          ˆ           	%           	9            typec             google,cros-ec-typec                         +       connector@0           usb-c-connector          ˆ            	Nleft            	Tdual            	_host            	isource        connector@1           usb-c-connector          ˆ           	Nright           	Tdual            	_host            	isource        	   Œdisabled             extcon0           google,extcon-usbc-cros-ec          	x             ¿   Z      keyboard-controller           google,cros-ec-keyb         	‹           	›            	®     L  	È  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	 Ž + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i  ž ­t x c à á  ¤  ø	 q	 r s      0  	Õ                     	  	                spi@11012000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             ˆ                     ¬       ‘                �   -   K   -      /   ;         “parent-clk sel-clk spi-clk           Œokay            ždefault         ¬   e        	ê   ,   -           ÿ       tpm@0             google,cr50          ˆ            T   ,              ždefault         ¬   f         B@         spi@11013000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             ˆ    0                ¬       ’                �   -   K   -      /   <         “parent-clk sel-clk spi-clk        	   Œdisabled          spi@11014000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             ˆ    @                ¬       t                �   -   K   -      /   J         “parent-clk sel-clk spi-clk        	   Œdisabled          spi@11015000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             ˆ    P                ¬       u                �   -   K   -      /   K         “parent-clk sel-clk spi-clk        	   Œdisabled          clock-controller@11017000             mediatek,mt8186-imp_iic_wrap             ˆ    p                f            ¿   F      serial@11018000       *    mediatek,mt8186-uart mediatek,mt6577-uart            ˆ    €                ¬       ö                �   )   /         	   “baud bus          	   Œdisabled          i2c@11019000              mediatek,mt8186-i2c           ˆ    �                    €        ¬      d                �   F   	   /   '      	   “main dma            s                        +          	   Œdisabled          audio-controller@11210000             mediatek,mt8186-sound            ˆ    !                Ä   �   /   ,   /   6   -      -      -   F   -            -            -      -   e   -      -   h   -   ?   -   @   -   A   -   B   -   C   -   ƒ   -   „   -   …   -   †   -   ‡   -   ,   )     }   “aud_infra_clk mtkaif_26m_clk top_mux_audio top_mux_audio_int top_mainpll_d2_d4 top_mux_aud_1 top_apll1_ck top_mux_aud_2 top_apll2_ck top_mux_aud_eng1 top_apll1_d8 top_mux_aud_eng2 top_apll2_d8 top_i2s0_m_sel top_i2s1_m_sel top_i2s2_m_sel top_i2s4_m_sel top_tdm_m_sel top_apll12_div0 top_apll12_div1 top_apll12_div2 top_apll12_div4 top_apll12_div_tdm top_mux_audio_h top_clk26m_clk            ¬       ©               	ó              /        
   -        ®   g         	  èaudiosys             Œokay            Ä   h         ¿   µ      usb@11201000          #    mediatek,mt8186-mtu3 mediatek,mtu3            ˆ            -ÿ     >              	  5mac ippc          (   �   -      /   =   /   3   /      /   >      $   “sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¬      /               
   i           ø   B                        +            »         
        
   j               Œokay       usb@11200000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           ˆ                      5mac       (   �   -      /   =   /   3   /      /   >      $   “sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¬      &                Œokay            
5   S         mmc@11230000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           ˆ    #             Í                   �   -      /      /   U   /            “source hclk source_cg crypto            ¬       d               k   -           {               Œokay            ždefault state_uhs           ¬   k        
A   l        
K           
ëÂ          
U         
c         
u         
„         
“         
          
¦         
®        
¿         
Î           
å   m        
ñ   ]      mmc@11240000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           ˆ    $             É                  �   -      /      /   V         “source hclk source_cg           k   -           {   -   o         Œokay            ždefault state_uhs state_eint            ¬   n        
A   o        
þ   p        msdc sdio_wakeup             T          e          ,   W                        +            
K           
ëÂ                   )         7         D         
         Z         g         
         
å   S        
ñ   ]        n   q   bluetooth@2           mediatek,mt7921s-bluetooth           ˆ           ždefault         ¬   r        7   ,   ›            usb@11281000          #    mediatek,mt8186-mtu3 mediatek,mtu3            ˆ    (       -ÿ    (>              	  5mac ippc          $   �   /   B   /   ?   /   7   )   /   @      $   “sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¬      K               
   s      t           ø   B                        +            »         
        
   j  $            Œokay       usb@11280000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           ˆ    (                 5mac       $   �   /   B   /   ?   /   7   )   /   @      $   “sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¬      D                Œokay            
5   u         t-phy@11c80000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           »        È              Œokay       usb-phy@0            ˆ                �   )         “ref         y            ¿   s      usb-phy@700          ˆ     	          �   )         “ref         y            ¿   t         t-phy@11ca0000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           »        Ê              Œokay       usb-phy@0            ˆ                �   )         “ref         y           „            ¿   i         efuse@11cb0000        %    mediatek,mt8186-efuse mediatek,efuse             ˆ    Ë                              +      lvts1-calib@1cc          ˆ  Ì            ¿   _      lvts2-calib@2f8          ˆ  ø            ¿   `      calib@550            ˆ  P   P         ¿   a      gpu-speedbin@59c             ˆ  œ           ”                ¿   w      socinfo-data1@7a0            ˆ               dsi-phy@11cc0000              mediatek,mt8183-mipi-tx          ˆ    Ì                  �   )        f            y            ˆmipi_tx0_pll             Œokay             ¿         clock-controller@13000000             mediatek,mt8186-mfgsys           ˆ                      f            ¿   v      gpu@13040000          &    mediatek,mt8186-mali arm,mali-bifrost            ˆ            @          �   v          0  ¬                                               job mmu gpu         ø   B      B           ™core0 core1         É           µ   w      
  Áspeed-bin            Ÿ   x        #  O         Œokay            ¬   0         ¿   ™      syscon@14000000           mediatek,mt8186-mmsys syscon             ˆ                      f           (           ñ   y          y              ¸   y                   ¿   1      mutex@14001000            mediatek,mt8186-disp-mutex           ˆ                      �   1            ¬      '               ¸   y                 Ð  ²  ³        ø   B         smi@14002000              mediatek,mt8186-smi-common           ˆ                        �   1      1      1      1            “apb smi gals0 gals1         ø   B            ¿   z      smi@14003000              mediatek,mt8186-smi-larb             ˆ     0                 �   1      1            “apb smi         ä            õ   z        ø   B            ¿   �      smi@14004000              mediatek,mt8186-smi-larb             ˆ     @                 �   1      1            “apb smi         ä           õ   z        ø   B            ¿   ‚      ovl@14005000          2    mediatek,mt8186-disp-ovl mediatek,mt8192-disp-ovl            ˆ     P                 �   1           ¬      )                  {           ¸   y     P            ø   B         ovl@14006000          8    mediatek,mt8186-disp-ovl-2l mediatek,mt8192-disp-ovl-2l          ˆ     `                 �   1           ¬      *                  {   !        ¸   y     `            ø   B         rdma@14007000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          ˆ     p                 �   1           ¬      +                  {   "        ¸   y     p            ø   B         color@14009000        6    mediatek,mt8186-disp-color mediatek,mt8173-disp-color            ˆ     �                 �   1   	        ¬      -               ¸   y     €            ø   B         dpi@1400a000              mediatek,mt8186-dpi          ˆ                       �   -   ;   1                  “pixel engine pll            k   -   ;        {   -   j        ¬      5               ø   B         	   Œdisabled            ždefault sleep           ¬   |        
A   }   port       endpoint            ”   ~         ¿   [            ccorr@1400b000        6    mediatek,mt8186-disp-ccorr mediatek,mt8192-disp-ccorr            ˆ     °                 �   1           ¬      .               ¸   y     °            ø   B         aal@1400c000          2    mediatek,mt8186-disp-aal mediatek,mt8183-disp-aal            ˆ     À                 �   1           ¬      0               ¸   y     À            ø   B         gamma@1400d000        6    mediatek,mt8186-disp-gamma mediatek,mt8183-disp-gamma            ˆ     Ð                 �   1           ¬      1               ¸   y     Ð            ø   B         postmask@1400e000         <    mediatek,mt8186-disp-postmask mediatek,mt8192-disp-postmask          ˆ     à                 �   1           ¬      2               ¸   y     à            ø   B         dither@1400f000       8    mediatek,mt8186-disp-dither mediatek,mt8183-disp-dither          ˆ     ð                 �   1           ¬      3               ¸   y     ð            ø   B         dsi@14013000              mediatek,mt8186-dsi          ˆ    0                 �   1      1               “engine digital hs           ¬      7               ø   B           ®   1           
           	dphy             Œokay       port       endpoint            ”   €         ¿   L            iommu@14016000            mediatek,mt8186-iommu-mm             ˆ    `                 �   1            “bclk            ¬      9             8     �   ‚   ƒ   „   …   †   ‡   ˆ   ‰   Š   ‹   Œ   �   Ž        ø   B           "            ¿   {      rdma@1401f000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          ˆ    ð                 �   1           ¬      4                  {            ¸   y     ð            ø   B         clock-controller@14020000             mediatek,mt8186-wpesys           ˆ                     f            ¿   7      smi@14023000              mediatek,mt8186-smi-larb             ˆ    0                 �   7      7            “apb smi         ä           õ   z        ø   B            ¿   †      clock-controller@15020000             mediatek,mt8186-imgsys1          ˆ                     f            ¿   4      smi@1502e000              mediatek,mt8186-smi-larb             ˆ    à                 �   4      4             “apb smi         ä   	        õ   z        ø   B            ¿   ‡      clock-controller@15820000             mediatek,mt8186-imgsys2          ˆ    ‚                 f            ¿   �      smi@1582e000              mediatek,mt8186-smi-larb             ˆ    ‚à                 �   4       �             “apb smi         ä           õ   z        ø   B            ¿   ˆ      video-decoder@16000000            mediatek,mt8186-vcodec-dec           ˆ                       »                     +           ·           @       ÿð             {   €        /   �   video-codec@16025000              mediatek,mtk-vcodec-core             ˆ    P                ¬      W             `     {   €   {   �   {   ‚   {   ƒ   {   „   {   …   {   †   {   ‡   {   ˆ   {   ‰   {   Š   {   ‹          �   -   )   2      2       -   U      %   “vdec-sel vdec-soc-vdec vdec vdec-top            k   -   )        {   -   U        ø   B            smi@1602e000              mediatek,mt8186-smi-larb             ˆ    à                 �   2       2             “apb smi         ä           õ   z        ø   B            ¿   „      clock-controller@1602f000             mediatek,mt8186-vdecsys          ˆ    ð                f            ¿   2      clock-controller@17000000             mediatek,mt8186-vencsys          ˆ                      f            ¿   6      smi@17010000              mediatek,mt8186-smi-larb             ˆ                      �   6      6            “apb smi         ä           õ   z        ø   B            ¿   …      video-encoder@17020000        6    mediatek,mt8186-vcodec-enc mediatek,mt8183-vcodec-enc            ˆ                      ¬       ó             H     {   à   {   á   {   â   {   ã   {   ä   {   å   {   æ   {   ç   {   è         �   6         	   “venc_sel            k   -   $        {   -   U        ø   B           /   �      jpeg-encoder@17030000         +    mediatek,mt8186-jpgenc mediatek,mtk-jpgenc           ˆ                     ¬       õ                �   6            “jpgenc              {   é   {   ê   {   ë   {   ì        ø   B         clock-controller@1a000000             mediatek,mt8186-camsys           ˆ                      f            ¿   3      smi@1a001000              mediatek,mt8186-smi-larb             ˆ                      �   3      3             “apb smi         ä           õ   z        ø   B   
         ¿   ‰      smi@1a002000              mediatek,mt8186-smi-larb             ˆ                       �   3      3            “apb smi         ä           õ   z        ø   B   
         ¿   Š      smi@1a00f000              mediatek,mt8186-smi-larb             ˆ     ð                 �   3      ‘             “apb smi         ä           õ   z        ø   B            ¿   ‹      smi@1a010000              mediatek,mt8186-smi-larb             ˆ                      �   3       ’             “apb smi         ä           õ   z        ø   B            ¿   Œ      clock-controller@1a04f000             mediatek,mt8186-camsys_rawa          ˆ    ð                f            ¿   ‘      clock-controller@1a06f000             mediatek,mt8186-camsys_rawb          ˆ    ð                f            ¿   ’      clock-controller@1b000000             mediatek,mt8186-mdpsys           ˆ                      f            ¿   “      smi@1b002000              mediatek,mt8186-smi-larb             ˆ                       �   “      “            “apb smi         ä           õ   z        ø   B            ¿   ƒ      clock-controller@1c000000             mediatek,mt8186-ipesys           ˆ                      f            ¿   5      smi@1c00f000              mediatek,mt8186-smi-larb             ˆ     ð                 �   5      5            “apb smi         ä           õ   z        ø   B   	         ¿   Ž      smi@1c10f000              mediatek,mt8186-smi-larb             ˆ    ð                 �   5       5             “apb smi         ä           õ   z        ø   B   	         ¿   �         thermal-zones      cpu-little0-thermal         <  è        J   –        `   ”       trips      trip-alert0         p L        |  Ð         passive          ¿   •      trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical             cooling-maps       map0            ‡   •      H  Œ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         <  è        J   –        `   ”      trips      trip-alert0         p L        |  Ð         passive          ¿   –      trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical             cooling-maps       map0            ‡   –      H  Œ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         <  è        J   –        `   ”      trips      trip-alert0         p L        |  Ð         passive          ¿   —      trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical             cooling-maps       map0            ‡   —      H  Œ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cam-thermal         <  è        J   ú        `   ”      trips      trip-alert0         p L        |  Ð         passive       trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical                nna-thermal         <  è        J   ú        `   ”      trips      trip-alert0         p L        |  Ð         passive       trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical                adsp-thermal            <  è        J   ú        `   ”      trips      trip-alert0         p L        |  Ð         passive       trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical                gpu-thermal         <  è        J   ú        `   ”      trips      trip-alert0         p L        |  Ð         passive          ¿   ˜      trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical             cooling-maps       map0            ‡   ˜        Œ   ™ÿÿÿÿÿÿÿÿ            cpu-big0-thermal            <  è        J   d        `   ”      trips      trip-alert0         p L        |  Ð         passive          ¿   š      trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical             cooling-maps       map0            ‡   š        Œ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            <  è        J   d        `   ”      trips      trip-alert0         p L        |  Ð         passive          ¿   ›      trip-alert1         p s        |  Ð         hot       trip-crit           p †         |          	   critical             cooling-maps       map0            ‡   ›        Œ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               chosen          ›serial0:115200n8          memory@40000000          ùmemory           ˆ    @                 backlight-lcd0            pwm-backlight           §   œ     ¡         ¯   �        *   ,   ˜            ¬      ÿ        ¾  ÿ        Õ  @         ¿   O      bt-sco            linux,bt-sco            '          dmic-codec            dmic-codec          '            î           û   2      gpio-keys         
    gpio-keys           ždefault         ¬   ž   pen-insert-switch           	NPen Insert          1   ,                          
                   *            regulator-pp1800-dpbrdg-dx            regulator-fixed         ždefault         ¬   Ÿ        1   ,   '            ›pp1800_dpbrdg_dx             ;        N   ]         ¿   Y      regulator-pp3300-disp-x           regulator-fixed         ždefault         ¬            1   ,   ™            ›pp3300_disp_x            ;         Y        N   ^         ¿   N      regulator-pp3300-ldo-z5           regulator-fixed         ›pp3300_ldo_z5            #         Y        ª 2Z         Â 2Z         N   �      regulator-pp3300-s3           regulator-fixed       
  ›pp3300_s3            #         Y        N   ^         ¿   S      regulator-pp3300-z2           regulator-fixed       
  ›pp3300_z2            #         Y        ª 2Z         Â 2Z         N   �         ¿   ^      regulator-pp4200-z2           regulator-fixed       
  ›pp4200_z2            #         Y        ª @@        Â @@        N   �         ¿   9      regulator-pp5000-z2           regulator-fixed       
  ›pp5000_z2            #         Y        ª LK@        Â LK@        N   �         ¿   º      regulator-ppvar-sys           regulator-fixed       
  ›ppvar_sys            #         Y         ¿   �      reserved-memory                      +            »   audio-dma-pool            shared-dma-pool         h               k                u         ¿   h      memory@61000000           shared-dma-pool          ˆ    a                   u         ¿   C      memory@60000000           shared-dma-pool          ˆ    `                   u         ¿   D      memory@50000000           shared-dma-pool          ˆ    P       
           u         ¿   ?         sound         ,    mediatek,mt8186-mt6366-rt1019-rt5682s-sound      C  žaud_clk_mosi_off aud_clk_mosi_on aud_clk_miso_off aud_clk_miso_on aud_dat_miso_off aud_dat_miso_on aud_dat_mosi_off aud_dat_mosi_on aud_gpio_i2s0_off aud_gpio_i2s0_on aud_gpio_i2s1_off aud_gpio_i2s1_on aud_gpio_i2s2_off aud_gpio_i2s2_on aud_gpio_i2s3_off aud_gpio_i2s3_on aud_gpio_pcm_off aud_gpio_pcm_on aud_gpio_dmic_sec          ¬   ¡        
A   ¢        
þ   £        |   ¤        †   ¥        �   ¦        š   §        ¤   ¨        ®   ©        ¸   ª        Â   «        Í   ¬        Ø   ­        ã   ®        î   ¯        ù   °           ±           ²           ³        %   ´        3   µ      I  EHeadphone HPOL Headphone HPOR IN1P Headset Mic Speakers Speaker HDMI1 TX             7mt8186_rt1019_rt5682s      hs-playback-dai-link            SI2S0            ]i2s         hcpu    codec           ~   ¶             hs-capture-dai-link         SI2S1            ]i2s         hcpu    codec           ~   ¶             spk-share-dai-link          SI2S2            hcpu       spk-hdmi-playback-dai-link          SI2S3            ]i2s         hcpu    codec           ~   ·   ¸            speaker-codec             realtek,rt1019p         ždefault         ¬   ¹        '            ˆ   ,   –             ¿   ¸      regulator-usb-p1-vbus             regulator-fixed         ’   ,   ”            ›vbus1           ª LK@        Â LK@         ;        N   º         ¿   u      wifi-pwrseq           mmc-pwrseq-simple           ždefault         ¬   »        —   2        7   ,   6            ¿   q      wifi-wakeup       
    gpio-keys           ždefault         ¬   ¼   wowlan-event            	NWake on WiFi            1   ,                 �         
         regulator-pp1000-edpbrdg              regulator-fixed         ›pp1000_edpbrdg          ždefault         ¬   ½         ;         Y        ’   ,               N   ^         ¿   I      regulator-pp1800-edpbrdg-dx           regulator-fixed         ›pp1800_edpbrdg_dx           ždefault         ¬   ¾         ;         Y        ’   ,               N   ]         ¿   J      regulator-pp3300-edp-dx           regulator-fixed         ›pp3300_edp_dx           ždefault         ¬   ¿         ;         Y        ’   ,               N   ^         ¿   K         	compatible interrupt-parent #address-cells #size-cells model ovl0 ovl-2l0 rdma0 rdma1 i2c0 i2c1 i2c2 i2c3 i2c5 mmc0 mmc1 serial0 clocks reg status clock-names operating-points-v2 proc-supply phandle opp-shared opp-hz opp-microvolt required-opps cpu device_type enable-method clock-frequency dynamic-power-coefficient capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache #cooling-cells mediatek,cci entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-div clock-mult clock-output-names opp-supported-hw interrupts dma-ranges #interrupt-cells #redistributor-regions interrupt-controller mediatek,broken-save-restore-fw affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges gpio-line-names pinmux input-enable bias-pull-down input-schmitt-enable bias-disable output-low drive-strength output-high bias-pull-up #power-domain-cells domain-supply mediatek,infracfg mediatek,disable-extrst mediatek,reset-by-toprgu interrupts-extended Avdd-supply mediatek,dmic-mode vsys-ldo1-supply vsys-ldo2-supply vsys-ldo3-supply vsys-vcore-supply vsys-vdram1-supply vsys-vgpu-supply vsys-vmodem-supply vsys-vpa-supply vsys-vproc11-supply vsys-vproc12-supply vsys-vs1-supply vsys-vs2-supply vs1-ldo1-supply vs2-ldo1-supply vs2-ldo2-supply vs2-ldo3-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-allowed-modes regulator-always-on regulator-coupled-with regulator-coupled-max-spread assigned-clocks assigned-clock-parents #mbox-cells pinctrl-names pinctrl-0 firmware-name memory-region mediatek,rpmsg-name mbox-names mboxes power-domains spi-max-frequency #io-channel-cells enable-gpios reset-gpios vdd10-supply vdd18-supply vdd33-supply analogix,lane0-swing analogix,lane1-swing remote-endpoint data-lanes power-supply backlight i2c-scl-internal-delay-ns goodix,no-reset-during-suspend vcc-supply wakeup-source hid-descr-addr #sound-dai-cells ovdd-supply pwr18-supply extcon link-frequencies AVDD-supply DBVDD-supply LDO1-IN-supply MICVDD-supply realtek,jd-src resets nvmem-cells nvmem-cell-names #thermal-sensor-cells reset-names #pwm-cells mediatek,pad-select google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count label power-role data-role try-power-role google,usb-port-id keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap function-row-physmap cs-gpios mediatek,apmixedsys mediatek,topckgen phys mediatek,syscon-wakeup vbus-supply pinctrl-1 bus-width non-removable cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe no-sd no-sdio cap-mmc-hw-reset hs400-ds-delay mediatek,hs400-ds-dly3 vmmc-supply vqmmc-supply pinctrl-2 interrupt-names cap-sd-highspeed sd-uhs-sdr104 sd-uhs-sdr50 keep-power-in-suspend cap-sdio-irq no-mmc mmc-pwrseq #phy-cells mediatek,discth bits power-domain-names mali-supply mediatek,gce-client-reg mediatek,gce-events mediatek,larb-id mediatek,smi iommus phy-names mediatek,larbs #iommu-cells mediatek,scp polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device stdout-path pwms brightness-levels num-interpolated-steps default-brightness-level num-channels wakeup-delay-ms wakeup-event-action linux,code linux,input-type enable-active-high vin-supply regulator-boot-on alignment no-map pinctrl-3 pinctrl-4 pinctrl-5 pinctrl-6 pinctrl-7 pinctrl-8 pinctrl-9 pinctrl-10 pinctrl-11 pinctrl-12 pinctrl-13 pinctrl-14 pinctrl-15 pinctrl-16 pinctrl-17 pinctrl-18 mediatek,adsp mediatek,platform audio-routing link-name dai-format mediatek,clk-provider sound-dai sdb-gpios gpio post-power-on-delay-ms 