Ðþí    8  ÿd   (            »  ÿ,                             8    google,steelix-sku131073 google,steelix mediatek,mt8186                                  +            7Google Steelix board             =convertible    aliases          J/soc/ovl@14005000            O/soc/ovl@14006000            W/soc/rdma@14007000           ]/soc/rdma@1401f000           c/soc/i2c@11007000            h/soc/i2c@11008000            m/soc/i2c@11009000            r/soc/i2c@1100f000            w/soc/i2c@11016000            |/soc/mmc@11230000            �/soc/mmc@11240000            †/soc/serial@11002000          fhctl@1000ce00            mediatek,mt8186-fhctl            Ž               •     Î              	   ™disabled          cci           mediatek,mt8186-cci          Ž                      cci intermediate             ¬            À            Ì   "      opp-table-cci             operating-points-v2           Ô         Ì      opp-500000000            ß    Íe          æ 	'À         Ì         opp-560000000            ß    !`ì          æ 
L¸         Ì         opp-612000000            ß    $za          æ 
•ö         Ì         opp-682000000            ß    (¦~€         æ 
÷ž         Ì   	      opp-752000000            ß    ,Òœ          æ YF         Ì   
      opp-822000000            ß    0þ¹€         æ ºî         Ì         opp-875000000            ß    4'pÀ         æ ëÂ         Ì         opp-927000000            ß    7@åÀ         æ 5          Ì         opp-980000000            ß    :i�          æ ~>         Ì         opp-1050000000           ß    >•º€         æ ßæ         Ì         opp-1120000000           ß    BÁØ          æ )$         Ì         opp-1155000000           ß    D×æÀ         æ ŠÌ         Ì         opp-1190000000           ß    Fíõ€         æ Ô
         Ì         opp-1260000000           ß    K          æ ~ð         Ì         opp-1330000000           ß    OF0€         æ )Ö         Ì         opp-1400000000           ß    SrN          æ ¼R         Ì            opp-table-cluster0            operating-points-v2           Ô         Ì      opp-500000000            ß    Íe          æ 	'À         ô         opp-774000000            ß    ."M€         æ 
L¸         ô         opp-875000000            ß    4'pÀ         æ 
®`         ô         opp-975000000            ß    :QÀ         æ          ô   	      opp-1075000000           ß    @2À         æ q°         ô   
      opp-1175000000           ß    F	À         æ ÓX         ô         opp-1275000000           ß    KþôÀ         æ 5          ô         opp-1375000000           ß    QôÕÀ         æ –¨         ô         opp-1500000000           ß    Yh/          æ º         ô         opp-1618000000           ß    `p¸€         æ Yø         ô         opp-1666000000           ß    cM$€         æ »          ô         opp-1733000000           ß    gK{@         æ H         ô         opp-1800000000           ß    kIÒ          æ ~ð         ô         opp-1866000000           ß    o8æ€         æ ù         ô         opp-1933000000           ß    s7=@         æ Zª         ô         opp-2000000000           ß    w5”          æ ¼R         ô            opp-table-cluster1            operating-points-v2           Ô         Ì   #   opp-774000000            ß    ."M€         æ 
L¸         ô         opp-835000000            ß    1ÅÀ         æ 
•ö         ô         opp-919000000            ß    6ÆÓÀ         æ 
÷ž         ô         opp-1002000000           ß    ;¹N€         æ YF         ô   	      opp-1085000000           ß    @«É@         æ ÓX         ô   
      opp-1169000000           ß    E­†@         æ 5          ô         opp-1308000000           ß    Mö          æ ßæ         ô         opp-1419000000           ß    T”8À         æ Yø         ô         opp-1530000000           ß    [1ò€         æ ìt         ô         opp-1670000000           ß    cŠ-€         æ —Z         ô         opp-1733000000           ß    gK{@         æ ù         ô         opp-1796000000           ß    kÉ          æ s         ô         opp-1860000000           ß    nÝY          æ Ô¼         ô         opp-1923000000           ß    rž¦À         æ 6d         ô         opp-1986000000           ß    v_ô€         æ °v         ô         opp-2050000000           ß    z0„€         æ          ô            cpus                         +       cpu-map    cluster0       core0                    core1                    core2                    core3                    core4                    core5                    core6                    core7                          cpu@0           cpu           arm,cortex-a55           •            psci             w5”          Ž                       cpu intermediate             ¬           0   T        J  ~        ]               m  €         z   @        Œ   €        ™  €         ¦   @        ¸   €        Å   !        Ö           å   "         À            Ì         cpu@100         cpu           arm,cortex-a55           •           psci             w5”          Ž                       cpu intermediate             ¬           0   T        J  ~        ]               m  €         z   @        Œ   €        ™  €         ¦   @        ¸   €        Å   !        Ö           å   "         À            Ì         cpu@200         cpu           arm,cortex-a55           •           psci             w5”          Ž                       cpu intermediate             ¬           0   T        J  ~        ]               m  €         z   @        Œ   €        ™  €         ¦   @        ¸   €        Å   !        Ö           å   "         À            Ì         cpu@300         cpu           arm,cortex-a55           •           psci             w5”          Ž                       cpu intermediate             ¬           0   T        J  ~        ]               m  €         z   @        Œ   €        ™  €         ¦   @        ¸   €        Å   !        Ö           å   "         À            Ì         cpu@400         cpu           arm,cortex-a55           •           psci             w5”          Ž                       cpu intermediate             ¬           0   T        J  ~        ]               m  €         z   @        Œ   €        ™  €         ¦   @        ¸   €        Å   !        Ö           å   "         À            Ì         cpu@500         cpu           arm,cortex-a55           •           psci             w5”          Ž                       cpu intermediate             ¬           0   T        J  ~        ]               m  €         z   @        Œ   €        ™  €         ¦   @        ¸   €        Å   !        Ö           å   "         À            Ì         cpu@600         cpu           arm,cortex-a76           •           psci             z0„€         Ž                      cpu intermediate             ¬   #        0  O        J           ]   $   %        m           z   @        Œ           ™           ¦   @        ¸           Å   &        Ö           å   "         À   '         Ì         cpu@700         cpu           arm,cortex-a76           •           psci             z0„€         Ž                      cpu intermediate             ¬   #        0  O        J           ]   $   %        m           z   @        Œ           ™           ¦   @        ¸           Å   &        Ö           å   "         À   '         Ì         idle-states         òpsci       cpu-retention-l           arm,idle-state          ÿ                   '   2        8   d        H  @         Ì         cpu-retention-b           arm,idle-state          ÿ                   '   2        8   d        H  x         Ì   $      cpu-off-l             arm,idle-state          ÿ                  '   d        8   ú        H  4         Ì          cpu-off-b             arm,idle-state          ÿ                  '   d        8   ú        H  l         Ì   %         l2-cache0             cache           Y           o           |   @        Ž           Å   (         e         Ì   !      l2-cache1             cache           Y           o           |   @        Ž           Å   (         e         Ì   &      l3-cache              cache           Y           o           |   @        Ž            e         Ì   (         fixed-factor-clock-13m            fixed-factor-clock          s             Ž   )        €           Š           •clk13m           Ì   =      oscillator-26m            fixed-clock         s             Œº€        •clk26m           Ì   )      oscillator-32k            fixed-clock         s               €         •clk32k        opp-table-gpu             operating-points-v2          Ì   x   opp-299000000            ß    Ò`À         æ 	X”        ¨   ÿ      opp-332000000            ß    Éë          æ 	‰h        ¨   ÿ      opp-366000000            ß    Ð·€         æ 	º<        ¨   ÿ      opp-400000000            ß    ×„          æ 	Ò¦        ¨   ÿ      opp-434000000            ß    ÞP€         æ 
z        ¨   ÿ      opp-484000000            ß    ÙA          æ 
4N        ¨   ÿ      opp-535000000            ß    ãsÀ         æ 
}Œ        ¨   ÿ      opp-586000000            ß    "í¦€         æ 
®`        ¨   ÿ      opp-637000000            ß    %÷Ù@         æ 
ß4        ¨   ÿ      opp-690000000            ß    ) �€         æ @Ü        ¨   ÿ      opp-743000000            ß    ,IGÀ         æ Š        ¨   ÿ      opp-796000000            ß    /qÿ          æ ëÂ        ¨   ÿ      opp-850000000            ß    2©ø€         æ 5         ¨   ÿ      opp-900000000-3          ß    5¤é          æ øP        ¨   Ï      opp-900000000-4          ß    5¤é          æ Ç|        ¨         opp-900000000-5          ß    5¤é          æ –¨        ¨          opp-950000000-3          ß    8ŸÙ€         æ »         ¨   Ï      opp-950000000-4          ß    8ŸÙ€         æ Yø        ¨         opp-950000000-5          ß    8ŸÙ€         æ øP        ¨          opp-1000000000-3             ß    ;šÊ          æ ~ð        ¨   Ï      opp-1000000000-4             ß    ;šÊ          æ ìt        ¨         opp-1000000000-5             ß    ;šÊ          æ Yø        ¨             pmu-a55           arm,cortex-a55-pmu                      ¹            *      pmu-a76           arm,cortex-a76-pmu                      ¹            +      psci              arm,psci-1.0            smc       timer             arm,armv8-timer                   @  ¹                                             
             soc                      +             simple-bus          Ä                                È   interrupt-controller@c000000              arm,gic-v3          Ï           à                        ÷          •                                    ¹      	                         Ì      ppi-partitions     interrupt-partition-0           ,                           Ì   *      interrupt-partition-1           ,               Ì   +            syscon@c53a000            mediatek,mt8186-mcusys syscon            •    S                 s            Ì         syscon@10000000            mediatek,mt8186-topckgen syscon          •                      s            Ì   -      syscon@10001000       #    mediatek,mt8186-infracfg_ao syscon           •                     s           5            Ì   /      syscon@10003000           mediatek,mt8186-pericfg syscon           •     0                 Ì   j      pinctrl@10005000              mediatek,mt8186-pinctrl       €   •     P                           "             $             &             *             ,             °              B  Biocfg0 iocfg_lt iocfg_lm iocfg_lb iocfg_bl iocfg_rb iocfg_rt eint            L        \           h   ,           ¹         ÷        ¹       º               Ï        	ß  tTP TP TP I2S0_HP_DI I2S3_DP_SPKR_DO SAR_INT_ODL BT_WAKE_AP_ODL WIFI_INT_ODL DPBRDG_INT_ODL EDPBRDG_INT_ODL EC_AP_HPD_OD TCHPAD_INT_ODL TCHSCR_INT_1V8_ODL EC_AP_INT_ODL EC_IN_RW_ODL GSC_AP_INT_ODL AP_FLASH_WP_L HP_INT_ODL PEN_EJECT_OD WCAM_PWDN_L WCAM_RST_L UCAM_SEN_EN UCAM_RST_L LTE_RESET_L LTE_SAR_DETECT_L I2S2_DP_SPK_MCK I2S2_DP_SPKR_BCK I2S2_DP_SPKR_LRCK I2S2_DP_SPKR_DI (TP) EN_PP1000_EDPBRDG EN_PP1800_EDPBRDG EN_PP3300_EDPBRDG UART_GSC_TX_AP_RX UART_AP_TX_GSC_RX UART_DBGCON_TX_ADSP_RX UART_ADSP_TX_DBGCON_RX EN_PP1000_DPBRDG TCHSCR_REPORT_DISABLE EN_PP3300_DPBRDG EN_PP1800_DPBRDG SPI_AP_CLK_EC SPI_AP_CS_EC_L SPI_AP_DO_EC_DI SPI_AP_DI_EC_DO SPI_AP_CLK_GSC SPI_AP_CS_GSC_L SPI_AP_DO_GSC_DI SPI_AP_DI_GSC_DO UART_DBGCON_TX_SCP_RX UART_SCP_TX_DBGCON_RX EN_PP1200_CAM_X EN_PP2800A_VCM_X EN_PP2800A_UCAM_X EN_PP2800A_WCAM_X WLAN_MODULE_RST_L EN_PP1200_UCAM_X I2S1_HP_DO I2S1_HP_BCK I2S1_HP_LRCK I2S1_HP_MCK TCHSCR_RST_1V8_L SPI_AP_CLK_ROM SPI_AP_CS_ROM_L SPI_AP_DO_ROM_DI SPI_AP_DI_ROM_DO NC NC EMMC_STRB EMMC_CLK EMMC_CMD EMMC_RST_L EMMC_DATA0 EMMC_DATA1 EMMC_DATA2 EMMC_DATA3 EMMC_DATA4 EMMC_DATA5 EMMC_DATA6 EMMC_DATA7 AP_KPCOL0 NC NC NC TP SDIO_CLK SDIO_CMD SDIO_DATA0 SDIO_DATA1 SDIO_DATA2 SDIO_DATA3 NC NC NC NC NC NC EDPBRDG_PWREN BL_PWM_1V8 EDPBRDG_RST_L MIPI_DPI_CLK MIPI_DPI_VSYNC MIPI_DPI_HSYNC MIPI_DPI_DE MIPI_DPI_D0 MIPI_DPI_D1 MIPI_DPI_D2 MIPI_DPI_D3 MIPI_DPI_D4 MIPI_DPI_D5 MIPI_DPI_D6 MIPI_DPI_DA7 MIPI_DPI_D8 MIPI_DPI_D9 MIPI_DPI_D10 MIPI_DPI_D11 PCM_BT_CLK PCM_BT_SYNC PCM_BT_DI PCM_BT_DO JTAG_TMS_TP JTAG_TCK_TP JTAG_TDI_TP JTAG_TDO_TP JTAG_TRSTN_TP CLK_24M_WCAM CLK_24M_UCAM UCAM_DET_ODL AP_I2C_EDPBRDG_SCL_1V8 AP_I2C_EDPBRDG_SDA_1V8 AP_I2C_TCHSCR_SCL_1V8 AP_I2C_TCHSCR_SDA_1V8 AP_I2C_TCHPAD_SCL_1V8 AP_I2C_TCHPAD_SDA_1V8 AP_I2C_DPBRDG_SCL_1V8 AP_I2C_DPBRDG_SDA_1V8 AP_I2C_WLAN_SCL_1V8 AP_I2C_WLAN_SDA_1V8 AP_I2C_AUD_SCL_1V8 AP_I2C_AUD_SDA_1V8 AP_I2C_TPM_SCL_1V8 AP_I2C_UCAM_SDA_1V8 AP_I2C_UCAM_SCL_1V8 AP_I2C_UCAM_SDA_1V8 AP_I2C_WCAM_SCL_1V8 AP_I2C_WCAM_SDA_1V8 SCP_I2C_SENSOR_SCL_1V8 SCP_I2C_SENSOR_SDA_1V8 AP_EC_WARM_RST_REQ AP_XHCI_INIT_DONE USB3_HUB_RST_L EN_SPKR BEEP_ON AP_EDP_BKLTEN EN_PP3300_DISP_X EN_PP3300_SDBRDG_X BT_KILL_1V8_L WIFI_KILL_1V8_L PWRAP_SPI0_CSN PWRAP_SPI0_CK PWRAP_SPI0_MO PWRAP_SPI0_MI SRCLKENA0 SRCLKENA1 SCP_VREQ_VAO AP_RTC_CLK32K AP_PMIC_WDTRST_L AUD_CLK_MOSI AUD_SYNC_MOSI AUD_DAT_MOSI0 AUD_DAT_MOSI1 AUD_CLK_MISO AUD_SYNC_MISO AUD_DAT_MISO0 AUD_DAT_MISO1 NC NC DPBRDG_PWREN DPBRDG_RST_L LTE_W_DISABLE_L LTE_SAR_DETECT_L EN_PP3300_LTE_X LTE_PWR_OFF_L LTE_RESET_L TP TP           Ì   ,   aud-clk-mosi-off-pins            Ì   ¡   pins-clk-sync           „  ¦   §          ‹         ˜         aud-clk-mosi-on-pins             Ì   ¢   pins-clk-sync           „  ¦  §         aud-clk-miso-off-pins            Ì   £   pins-clk-sync           „  ª   «          ‹         ˜         aud-clk-miso-on-pins             Ì   ¤   pins-clk-sync           „  ª  «         aud-dat-mosi-off-pins            Ì   §   pins-dat            „  ¨   ©          ‹         ˜         aud-dat-mosi-on-pins             Ì   ¨   pins-dat            „  ¨  ©         aud-dat-miso-off-pins            Ì   ¥   pins-dat            „  ¬   ­          ‹         ˜         aud-dat-miso-on-pins             Ì   ¦   pins-dat            „  ¬  ­         §         ¼         aud-gpio-i2s0-off-pins           Ì   ©   pins-sdata          „            aud-gpio-i2s0-on-pins            Ì   ª   pins-sdata          „           aud-gpio-i2s-off-pins            Ì   «   pins-clk-sdata          „  8   9   :   ;          É         aud-gpio-i2s1-on-pins            Ì   ¬   pins-clk-sdata          „  8  9  :  ;         aud-gpio-i2s2-off-pins           Ì   ­   pins-cmd-dat            „               É         aud-gpio-i2s2-on-pins            Ì   ®   pins-clk            „            Ô            aud-gpio-i2s3-off-pins           Ì   ¯   pins-sdata          „            É         aud-gpio-i2s3-on-pins            Ì   °   pins-sdata          „          Ô            aud-gpio-pcm-off-pins            Ì   ±   pins-clk-sdata          „  s   t   u   v          É         aud-gpio-pcm-on-pins             Ì   ²   pins-clk-sdata          „  s  t  u  v         aud-gpio-dmic-sec-pins           Ì   ³   pins            „            É         bt-reset-pins            Ì   r   pins-bt-reset           „  ›          ã         dpi-sleep-pins           Ì   }   pins-cmd-dat          @  „  g   h   i   j   k   l   m   n   o   p   q   r   e   d   f   c         Ô   
         É         dpi-default-pins             Ì   |   pins-cmd-dat          @  „  g  h  i  j  k  l  m  n  o  p  q  r  e  d  f  c        Ô   
         cros-ec-int-pins             Ì   d   pins-ec-ap-int-odl          „            ‹         edp-panel-fixed-pins             Ì       pins-vreg-en            „  ™          ã         en-pp1800-dpbrdg-pins            Ì   Ÿ   pins-vreg-en            „  '          É         gsc-int-pins             Ì   f   pins-gsc-ap-int-odl         „            ‹         i2c0-pins            Ì   G   pins-bus            „  €           ¼        Ô            ‹         i2c1-pins            Ì   Q   pins-bus            „  ‚  �         ¼        Ô            ‹         i2c2-pins            Ì   T   pins-bus            „  „  ƒ         ¼        Ô            ‹         i2c3-pins            Ì   V   pins-bus            „  †  …         ¼        Ô            ‹         i2c5-pins            Ì   \   pins-bus            „  Š  ‰         ¼        Ô            ‹         it6505-pins          Ì   W   pins-hpd            „  
          ‹         ï      pins-int            „            ‹         ï      pins-reset          „  ±          É         ï         mmc0-default-pins            Ì   k   pins-clk            „  D        ˜   f      pins-cmd-dat          $  „  G  H  I  J  K  L  M  N  E         ‹        ï   e      pins-rst            „  F        ï   e         mmc0-uhs-pins            Ì   l   pins-clk            „  D        Ô           ˜   f      pins-cmd-dat          $  „  G  H  I  J  K  L  M  N  E         ‹        Ô           ï   e      pins-ds         „  C        Ô           ˜   f      pins-rst            „  F        ï   e         mmc1-default-pins            Ì   n   pins-clk            „  T        Ô           ˜   f      pins-cmd-dat            „  V  W  X  Y  U         ‹        Ô           ï   e         mmc1-uhs-pins            Ì   o   pins-clk            „  T        Ô           ˜   f      pins-cmd-dat            „  V  W  X  Y  U         ‹        Ô           ï   e         mmc1-eint-pins           Ì   p   pins-dat1           „  W          ‹        ï   e         nor-default-pins             Ì   E   pins-clk-dat            „  ?  =  @        Ô            ˜      pins-cs-dat         „  >  A  B        Ô            ï         pen-eject-pins           Ì   ž   pins            „            ‹         ¼         disp-pwm-pins            Ì   b   pins            „  a         ã         speaker-codec-default-pins           Ì   ¹   pins-sdb            „  –          É         scp-default-pins             Ì   >   pins-scp-uart           „  0  1         spi1-pins            Ì   c   pins-bus            „  (  )  *  +         ¼         ‹         spi2-pins            Ì   e   pins-bus            „  ,  -   .  /         ¼         ‹         spmi-pins      pins-bus            „  ·  ¸         touchscreen-pins             Ì   R   pins-irq            „            ‹         ï      pins-reset          „  <          ã      pins-report-sw          „  %          É         trackpad-default-pins            Ì   U   pins-int-n          „            ‹         ¼         wifi-enable-pins             Ì   »   pins-wifi-enable            „  6          wifi-wakeup-pins             Ì   ¼   pins-wifi-wakeup            „            ‹         anx7625-pins             Ì   H   pins-int            „  	          ‹         ¼      pins-reset          „  b          É      pins-power-en           „  `          É         pp1000-edpbrdg-en-pins           Ì   ½   pins-vreg-en            „            É         pp1800-edpbrdg-en-pins           Ì   ¾   pins-vreg-en            „            É         pp3300-edpbrdg-en-pins           Ì   ¿   pins-vreg-en            „            É            syscon@10006000       )    mediatek,mt8186-scpsys syscon simple-mfd             •     `           power-controller          !    mediatek,mt8186-power-controller                         +            ü            Ì   B   power-domain@0           •             Ž   -             mfg00                        +            ü              .   power-domain@1           •              /                     +            ü              0   power-domain@2           •           ü          power-domain@3           •           ü                power-domain@17          •            Ž   -      -         $    subsys-csirx-top0 subsys-csirx-top1         ü          power-domain@4           •            Ž   -      /   =          sys_ck ref_ck           ü          power-domain@5           •            Ž   /   B   /   ?          sys_ck ref_ck           ü          power-domain@18          •            Ž   -   /   -   >          audioadsp subsys-adsp-bus                        +            ü      power-domain@19          •                        +            ü      power-domain@20          •              /        ü                power-domain@16          •              /        ü          power-domain@6           •         0   Ž   -   *   -   +   1   
   1      1      1         M    disp mdp subsys-smi-infra subsys-smi-common subsys-smi-gals subsys-smi-iommu               /                     +            ü      power-domain@14          •            Ž   -   )   2              vdec0 larb             /        ü          power-domain@10          •   
      8   Ž   -      -      -      -       3      -   #   -   %      6    cam0 cam1 cam2 cam3 gals subsys-cam-tm subsys-cam-top              /                     +            ü      power-domain@12          •           ü          power-domain@11          •           ü             power-domain@7           •            Ž   4      -   &          gals subsys-img-top            /                     +            ü      power-domain@8           •           ü             power-domain@9           •   	      (   Ž   -   '   5       5      5      5         P    subsys-ipe-top subsys-ipe-larb0 subsys-ipe-larb1 subsys-ipe-smi subsys-ipe-gals            /        ü          power-domain@13          •            Ž   -   $   6             venc0 subsys-larb              /        ü          power-domain@15          •            Ž   -   :   7      7         %    wpe0 subsys-larb-ck subsys-larb-pclk               /        ü                   watchdog@10007000             mediatek,mt8186-wdt          0         •     p                5            H         Ì   g      syscon@1000c000       "    mediatek,mt8186-apmixedsys syscon            •     À                s            Ì         pwrap@1000d000            mediatek,mt8186-pwrap syscon             •     Ð                Bpwrap           ¹       Â                Ž   /      /          	    spi wrap       pmic               mediatek,mt6366 mediatek,mt6358          ÷        a   ,   É           Ï      audio-codec       ,    mediatek,mt6366-sound mediatek,mt6358-sound         u   8        �         regulators        4    mediatek,mt6366-regulator mediatek,mt6358-regulator         ”   9        ¥   9        ¶   9        Ç   9        Ù   9        ì   9        ý   9           9            9        4   9        H   9        X   9        h   :        x   ;        ˆ   <        ˜   <   vcore           ¨pp0750_dvdd_core            · dp        Ï 5         ç  j        ü   È                        0      vdram1          ¨pp1125_emi_vdd2         · *ˆ        Ï *ˆ        ç  0Ô        ü                            0         Ì   ;      vgpu            ¨ppvar_dvdd_vgpu         · ¡         Ï ~ð        ç  j        ü   È                       D   .        [ †          Ì   0      vproc11         ¨ppvar_dvdd_proc_bc_mt6366           · 	'À        Ï O€        ç  j        ü   È                        0         Ì   '      vproc12         ¨ppvar_dvdd_proc_lc          · 	'À        Ï O€        ç  j        ü   È                        0         Ì         vs1         ¨pp2000_vs1          · „€        Ï „€        ç  0Ô        ü             0         Ì   :      vs2         ¨pp1350_vs2          · ™p        Ï ™p        ç  0Ô        ü             0         Ì   <      va12            ¨pp1200_va12         · O€        Ï O€        ü           0      vaud28          ¨pp2800_vaud28           · *¹€        Ï *¹€        ü           Ì   8      vaux18          ¨pp1840_vaux18           · w@        Ï €        ü        vbif28          ¨pp2800_vbif28           · *¹€        Ï *¹€        ü        vcn18           ¨pp1800_vcn18_x          · w@        Ï w@        ü        vcn28           ¨pp2800_vcn28_x          · *¹€        Ï *¹€        ü        vefuse          ¨pp1800_vefuse           · w@        Ï w@        ü        vfe28           ¨pp2800_vfe28_x          · *¹€        Ï *¹€        ü        vemc            ¨pp3000_vemc         · -ÆÀ        Ï -ÆÀ        ü   <         Ì   m      vibr            ¨pp2800_vibr_x           · *¹€        Ï *¹€        ü   <      vio18           ¨pp1800_vio18_s3         · w@        Ï w@        ü  
Œ         0         Ì   ]      vio28           ¨pp2800_vio28_x          · *¹€        Ï *¹€        ü        vm18            ¨pp1800_emi_vdd1         · w@        Ï €        ü  E         0      vmc         ¨pp3000_vmc          · -ÆÀ        Ï -ÆÀ        ü   <      vmddr           ¨pm0750_emi_vmddr            · 
®`        Ï q°        ü  E         0      vmch            ¨pp3000_vmch         · -ÆÀ        Ï -ÆÀ        ü   <      vcn33           ¨pp3300_vcn33_x          · 2Z         Ï 2Z         ü        vdram2          ¨pp0600_emi_vddq         · 	'À        Ï 	'À        ü  ä         0      vrf12           ¨pp1200_vrf12_x          · O€        Ï O€        ü   x      vrf18           ¨pp1800_vrf18_x          · w@        Ï w@        ü   x      vsim1           ¨pp1860_vsim1_x          · w@        Ï a         ü        vsim2           ¨pp2760_vsim2_x          · )2à        Ï *@        ü           Ì   X      vsram-gpu           ¨pp0900_dvdd_sram_gpu            · øP        Ï �        ç  j        ü   ð        D   0        [ †          Ì   .      vsram-others            ¨pp0900_dvdd_sram_core           · »         Ï »         ç  j        ü   ð         0      vsram-proc11            ¨pp0900_dvdd_sram_bc         · øP        Ï          ç  j        ü   ð         0      vsram-proc12            ¨pp0900_dvdd_sram_lc         · øP        Ï          ç  j        ü   ð         0      vusb            ¨pp3070_vusb         · -ÆÀ        Ï .Ø0        ü           0      vxo22           ¨pp2240_vxo22            · !‘À        Ï ".         ü   x         0         rtc       (    mediatek,mt6366-rtc mediatek,mt6358-rtc             spmi@10015000         *    mediatek,mt8186-spmi mediatek,mt8195-spmi             •    P            °                Bpmif spmimst             Ž   /      /       -   2      (    pmif_sys_ck pmif_tmr_ck spmimst_clk_mux         x   -   2        ˆ   -   t         ¹       í              ñ             	   ™disabled          timer@10017000        ,    mediatek,mt8186-timer mediatek,mt6765-timer          •    p                ¹       Ï                Ž   =      mailbox@1022c000              mediatek,mt8186-gce          •    "À       @          Ž   /             gce         ¹       ª               Ÿ            Ì   y      scp@10500000              mediatek,mt8186-scp           •    P             \       �€      	  Bsram cfg            ¹       Í               «default         ¹   >        Ãmediatek/mt8186/scp.img         Ñ   ?         ™okay             Ì   �   cros-ec-rpmsg             google,cros-ec-rpmsg            ßcros-ec-rpmsg            adsp@10680000             mediatek,mt8186-dsp       @   •    h              €             h°            hð                Bcfg sram sec bus             Ž   -   /   -   >          audiodsp adsp_bus           x   -   /   -   >        ˆ   )   -   E        órx tx           þ   @   A           B            ™okay            Ñ   C   D         Ì   ´      mailbox@10686100              mediatek,mt8186-adsp-mbox           Ÿ             •    ha                ¹      i                Ì   @      mailbox@10687100              mediatek,mt8186-adsp-mbox           Ÿ             •    hq                ¹      j                Ì   A      spi@11000000              mediatek,mt8186-nor          •                        Ž   -   3   /   O   /   c   /   d          spi sf axi axi_s            x   -   3        ˆ   -   P        ¹      %                ™okay            «default         ¹   E                     +       flash@0           jedec,spi-nor            •            SÀ         adc@11001000          .    mediatek,mt8186-auxadc mediatek,mt8173-auxadc            •                     %            Ž   /   "          main          serial@11002000       *    mediatek,mt8186-uart mediatek,mt6577-uart            •                      ¹       p                Ž   )   /         	    baud bus             ™okay          serial@11003000       *    mediatek,mt8186-uart mediatek,mt6577-uart            •     0                ¹       q                Ž   )   /         	    baud bus          	   ™disabled          i2c@11007000              mediatek,mt8186-i2c           •     p                             ¹       i                Ž   F       /   '      	    main dma            €                        +             ™okay            «default         ¹   G          €   anx7625@58            analogix,anx7625             •   X        «default         ¹   H        7   ,   `            D   ,   b            P   I        ]   J        j   K        wp0          Œp0     ports                        +       port@0           •       endpoint            ¡   L        ±                      Ì   €         port@1           •      endpoint            ¡   M         Ì   P            aux-bus    panel         
    edp-panel           ¼   N        É   O   port       endpoint            ¡   P         Ì   M                     i2c@11008000              mediatek,mt8186-i2c           •     €                             ¹       j                Ž   F      /   '      	    main dma            €                        +             ™okay            «default         ¹   Q          €        Ó  @   touchscreen@5d            goodix,gt7375p           •   ]        a   ,              «default         ¹   R        D   ,   <           v   S         í         i2c@11009000              mediatek,mt8186-i2c           •     �                    €        ¹       k                Ž   F      /   '      	    main dma            €                        +             ™okay            «default         ¹   T          €        Ó  Uð   trackpad@15           elan,ekth3000            •           a   ,              «default         ¹   U           S                  ™fail-needs-probe          trackpad@2c           hid-over-i2c             •   ,        %            a   ,              «default         ¹   U        v   S                  ™fail-needs-probe             i2c@1100f000              mediatek,mt8186-i2c           •     ð             €               ¹       l                Ž   F      /   '      	    main dma            €                        +             ™okay            «default         ¹   V          †    dp-bridge@5c              ite,it6505           •   \        a   ,              «default         ¹   W        4            E   X        Q   Y        D   ,   ±           ^   Z         Ì   ·   ports                        +       port@0           •       endpoint            e    ðÑ€        ¡   [         Ì   ~         port@1           •                  i2c@11011000              mediatek,mt8186-i2c           •                 €      €        ¹       m                Ž   F      /   '      	    main dma            €                        +          	   ™disabled          i2c@11016000              mediatek,mt8186-i2c           •    `                             ¹      b                Ž   F      /   '      	    main dma            €                        +             ™okay            «default         ¹   \   codec@1a              realtek,rt5682s          •           a   ,              4           v   ]        ‚   ]        �   ]        ž   ^        ¬            Ì   ¶         i2c@1100d000              mediatek,mt8186-i2c           •     Ð                             ¹      c                Ž   F      /   '      	    main dma            €                        +          	   ™disabled          i2c@11004000              mediatek,mt8186-i2c           •     @             	       €        ¹       n                Ž   F      /   '      	    main dma            €                        +          	   ™disabled          i2c@11005000              mediatek,mt8186-i2c           •     P             
€      €        ¹       o                Ž   F      /   '      	    main dma            €                        +          	   ™disabled          spi@1100a000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             •                      ¹       Š                Ž   -   K   -      /             parent-clk sel-clk spi-clk        	   ™disabled          thermal-sensor@1100b000           mediatek,mt8186-lvts             •     °                ¹       c                Ž   /   	        »   /            Â   _   `      $  Îlvts-calib-data-1 lvts-calib-data-2         ß            Ì   ”      svs@1100bc00              mediatek,mt8186-svs          •     ¼                ¹       Ž                Ž   /   	          main            Â   a   _      (  Îsvs-calibration-data t-calibration-data         »   /           õsvs_rst       pwm@1100e000          2    mediatek,mt8186-disp-pwm mediatek,mt8183-disp-pwm            •     à                ¹       �               	            Ž   -      /   4          main mm          ™okay            «default         ¹   b         Ì   œ      spi@11010000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             •                     ¹       ‹                Ž   -   K   -      /   8          parent-clk sel-clk spi-clk           ™okay            «default         ¹   c        	       ec@0              google,cros-ec-spi           •            a   ,              «default         ¹   d         B@   i2c-tunnel            google,cros-ec-i2c-tunnel           	                         +       sbs-battery@b             sbs,sbs-battery          •           	2           	F            typec             google,cros-ec-typec                         +       connector@0           usb-c-connector          •            	[left            	adual            	lhost            	vsource        connector@1           usb-c-connector          •           	[right           	adual            	lhost            	vsource           extcon0           google,extcon-usbc-cros-ec          	…             Ì   Z      keyboard-controller           google,cros-ec-keyb         	˜           	¨            	»     D  	Õ  ž ­t x à á ø	 q	 r  s  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	 Ž + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i      (  	â               	  	                 spi@11012000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             •                     ¹       ‘                Ž   -   K   -      /   ;          parent-clk sel-clk spi-clk           ™okay            «default         ¹   e        	÷   ,   -           	       tpm@0             google,cr50          •            a   ,              «default         ¹   f         B@         spi@11013000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             •    0                ¹       ’                Ž   -   K   -      /   <          parent-clk sel-clk spi-clk        	   ™disabled          spi@11014000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             •    @                ¹       t                Ž   -   K   -      /   J          parent-clk sel-clk spi-clk        	   ™disabled          spi@11015000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             •    P                ¹       u                Ž   -   K   -      /   K          parent-clk sel-clk spi-clk        	   ™disabled          clock-controller@11017000             mediatek,mt8186-imp_iic_wrap             •    p                s            Ì   F      serial@11018000       *    mediatek,mt8186-uart mediatek,mt6577-uart            •    €                ¹       ö                Ž   )   /         	    baud bus          	   ™disabled          i2c@11019000              mediatek,mt8186-i2c           •    �                    €        ¹      d                Ž   F   	   /   '      	    main dma            €                        +          	   ™disabled          audio-controller@11210000             mediatek,mt8186-sound            •    !                Ä   Ž   /   ,   /   6   -      -      -   F   -            -            -      -   e   -      -   h   -   ?   -   @   -   A   -   B   -   C   -   ƒ   -   „   -   …   -   †   -   ‡   -   ,   )     }    aud_infra_clk mtkaif_26m_clk top_mux_audio top_mux_audio_int top_mainpll_d2_d4 top_mux_aud_1 top_apll1_ck top_mux_aud_2 top_apll2_ck top_mux_aud_eng1 top_apll1_d8 top_mux_aud_eng2 top_apll2_d8 top_i2s0_m_sel top_i2s1_m_sel top_i2s2_m_sel top_i2s4_m_sel top_tdm_m_sel top_apll12_div0 top_apll12_div1 top_apll12_div2 top_apll12_div4 top_apll12_div_tdm top_mux_audio_h top_clk26m_clk            ¹       ©               
               /        
   -        »   g         	  õaudiosys             ™okay            Ñ   h         Ì   µ      usb@11201000          #    mediatek,mt8186-mtu3 mediatek,mtu3            •            -ÿ     >              	  Bmac ippc          (   Ž   -      /   =   /   3   /      /   >      $    sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¹      /               
&   i              B                        +            È                 
+   j               ™okay       usb@11200000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           •                      Bmac       (   Ž   -      /   =   /   3   /      /   >      $    sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¹      &                ™okay            
B   S         mmc@11230000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           •    #             Í                   Ž   -      /      /   U   /             source hclk source_cg crypto            ¹       d               x   -           ˆ               ™okay            «default state_uhs           ¹   k        
N   l        
X           ëÂ          
b         
p         
‚         
‘         
          
­         
³         
»        
Ì         
Û           
ò   m        
þ   ]      mmc@11240000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           •    $             É                  Ž   -      /      /   V          source hclk source_cg           x   -           ˆ   -   o         ™okay            «default state_uhs state_eint            ¹   n        
N   o           p        msdc sdio_wakeup             a          e          ,   W                        +            
X           ëÂ          %         6         D         Q                  g         t         
­        
ò   S        
þ   ]        {   q   bluetooth@2           mediatek,mt7921s-bluetooth           •           «default         ¹   r        D   ,   ›            usb@11281000          #    mediatek,mt8186-mtu3 mediatek,mtu3            •    (       -ÿ    (>              	  Bmac ippc          $   Ž   /   B   /   ?   /   7   )   /   @      $    sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¹      K               
&   s      t              B                        +            È                 
+   j  $            ™okay       usb@11280000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           •    (                 Bmac       $   Ž   /   B   /   ?   /   7   )   /   @      $    sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¹      D                ™okay            
B   u         t-phy@11c80000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           È        È              ™okay       usb-phy@0            •                Ž   )          ref         †            Ì   s      usb-phy@700          •     	          Ž   )          ref         †            Ì   t         t-phy@11ca0000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           È        Ê              ™okay       usb-phy@0            •                Ž   )          ref         †           ‘            Ì   i         efuse@11cb0000        %    mediatek,mt8186-efuse mediatek,efuse             •    Ë                              +      lvts1-calib@1cc          •  Ì            Ì   _      lvts2-calib@2f8          •  ø            Ì   `      calib@550            •  P   P         Ì   a      gpu-speedbin@59c             •  œ           ¡                Ì   w      socinfo-data1@7a0            •               dsi-phy@11cc0000              mediatek,mt8183-mipi-tx          •    Ì                  Ž   )        s            †            •mipi_tx0_pll             ™okay             Ì         clock-controller@13000000             mediatek,mt8186-mfgsys           •                      s            Ì   v      gpu@13040000          &    mediatek,mt8186-mali arm,mali-bifrost            •            @          Ž   v          0  ¹                                               job mmu gpu            B      B           ¦core0 core1         Ö           Â   w      
  Îspeed-bin            ¬   x        0  O         ™okay            ¹   0         Ì   ™      syscon@14000000           mediatek,mt8186-mmsys syscon             •                      s           5           þ   y          y              Å   y                   Ì   1      mutex@14001000            mediatek,mt8186-disp-mutex           •                      Ž   1            ¹      '               Å   y                 Ý  ²  ³           B         smi@14002000              mediatek,mt8186-smi-common           •                        Ž   1      1      1      1             apb smi gals0 gals1            B            Ì   z      smi@14003000              mediatek,mt8186-smi-larb             •     0                 Ž   1      1             apb smi         ñ               z           B            Ì   �      smi@14004000              mediatek,mt8186-smi-larb             •     @                 Ž   1      1             apb smi         ñ              z           B            Ì   ‚      ovl@14005000          2    mediatek,mt8186-disp-ovl mediatek,mt8192-disp-ovl            •     P                 Ž   1           ¹      )                  {           Å   y     P               B         ovl@14006000          8    mediatek,mt8186-disp-ovl-2l mediatek,mt8192-disp-ovl-2l          •     `                 Ž   1           ¹      *                  {   !        Å   y     `               B         rdma@14007000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          •     p                 Ž   1           ¹      +                  {   "        Å   y     p               B         color@14009000        6    mediatek,mt8186-disp-color mediatek,mt8173-disp-color            •     �                 Ž   1   	        ¹      -               Å   y     €               B         dpi@1400a000              mediatek,mt8186-dpi          •                       Ž   -   ;   1                   pixel engine pll            x   -   ;        ˆ   -   j        ¹      5                  B         	   ™disabled            «default sleep           ¹   |        
N   }   port       endpoint            ¡   ~         Ì   [            ccorr@1400b000        6    mediatek,mt8186-disp-ccorr mediatek,mt8192-disp-ccorr            •     °                 Ž   1           ¹      .               Å   y     °               B         aal@1400c000          2    mediatek,mt8186-disp-aal mediatek,mt8183-disp-aal            •     À                 Ž   1           ¹      0               Å   y     À               B         gamma@1400d000        6    mediatek,mt8186-disp-gamma mediatek,mt8183-disp-gamma            •     Ð                 Ž   1           ¹      1               Å   y     Ð               B         postmask@1400e000         <    mediatek,mt8186-disp-postmask mediatek,mt8192-disp-postmask          •     à                 Ž   1           ¹      2               Å   y     à               B         dither@1400f000       8    mediatek,mt8186-disp-dither mediatek,mt8183-disp-dither          •     ð                 Ž   1           ¹      3               Å   y     ð               B         dsi@14013000              mediatek,mt8186-dsi          •    0                 Ž   1      1                engine digital hs           ¹      7                  B           »   1           
&           dphy             ™okay       port       endpoint            ¡   €         Ì   L            iommu@14016000            mediatek,mt8186-iommu-mm             •    `                 Ž   1             bclk            ¹      9             8      �   ‚   ƒ   „   …   †   ‡   ˆ   ‰   Š   ‹   Œ   �   Ž           B           /            Ì   {      rdma@1401f000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          •    ð                 Ž   1           ¹      4                  {            Å   y     ð               B         clock-controller@14020000             mediatek,mt8186-wpesys           •                     s            Ì   7      smi@14023000              mediatek,mt8186-smi-larb             •    0                 Ž   7      7             apb smi         ñ              z           B            Ì   †      clock-controller@15020000             mediatek,mt8186-imgsys1          •                     s            Ì   4      smi@1502e000              mediatek,mt8186-smi-larb             •    à                 Ž   4      4              apb smi         ñ   	           z           B            Ì   ‡      clock-controller@15820000             mediatek,mt8186-imgsys2          •    ‚                 s            Ì   �      smi@1582e000              mediatek,mt8186-smi-larb             •    ‚à                 Ž   4       �              apb smi         ñ              z           B            Ì   ˆ      video-decoder@16000000            mediatek,mt8186-vcodec-dec           •                       È                     +           Ä           @       ÿð             {   €        <   �   video-codec@16025000              mediatek,mtk-vcodec-core             •    P                ¹      W             `     {   €   {   �   {   ‚   {   ƒ   {   „   {   …   {   †   {   ‡   {   ˆ   {   ‰   {   Š   {   ‹          Ž   -   )   2      2       -   U      %    vdec-sel vdec-soc-vdec vdec vdec-top            x   -   )        ˆ   -   U           B            smi@1602e000              mediatek,mt8186-smi-larb             •    à                 Ž   2       2              apb smi         ñ              z           B            Ì   „      clock-controller@1602f000             mediatek,mt8186-vdecsys          •    ð                s            Ì   2      clock-controller@17000000             mediatek,mt8186-vencsys          •                      s            Ì   6      smi@17010000              mediatek,mt8186-smi-larb             •                      Ž   6      6             apb smi         ñ              z           B            Ì   …      video-encoder@17020000        6    mediatek,mt8186-vcodec-enc mediatek,mt8183-vcodec-enc            •                      ¹       ó             H     {   à   {   á   {   â   {   ã   {   ä   {   å   {   æ   {   ç   {   è         Ž   6         	    venc_sel            x   -   $        ˆ   -   U           B           <   �      jpeg-encoder@17030000         +    mediatek,mt8186-jpgenc mediatek,mtk-jpgenc           •                     ¹       õ                Ž   6             jpgenc              {   é   {   ê   {   ë   {   ì           B         clock-controller@1a000000             mediatek,mt8186-camsys           •                      s            Ì   3      smi@1a001000              mediatek,mt8186-smi-larb             •                      Ž   3      3              apb smi         ñ              z           B   
         Ì   ‰      smi@1a002000              mediatek,mt8186-smi-larb             •                       Ž   3      3             apb smi         ñ              z           B   
         Ì   Š      smi@1a00f000              mediatek,mt8186-smi-larb             •     ð                 Ž   3      ‘              apb smi         ñ              z           B            Ì   ‹      smi@1a010000              mediatek,mt8186-smi-larb             •                      Ž   3       ’              apb smi         ñ              z           B            Ì   Œ      clock-controller@1a04f000             mediatek,mt8186-camsys_rawa          •    ð                s            Ì   ‘      clock-controller@1a06f000             mediatek,mt8186-camsys_rawb          •    ð                s            Ì   ’      clock-controller@1b000000             mediatek,mt8186-mdpsys           •                      s            Ì   “      smi@1b002000              mediatek,mt8186-smi-larb             •                       Ž   “      “             apb smi         ñ              z           B            Ì   ƒ      clock-controller@1c000000             mediatek,mt8186-ipesys           •                      s            Ì   5      smi@1c00f000              mediatek,mt8186-smi-larb             •     ð                 Ž   5      5             apb smi         ñ              z           B   	         Ì   Ž      smi@1c10f000              mediatek,mt8186-smi-larb             •    ð                 Ž   5       5              apb smi         ñ              z           B   	         Ì   �         thermal-zones      cpu-little0-thermal         I  è        W   –        m   ”       trips      trip-alert0         } L        ‰  Ð         Epassive          Ì   •      trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical             cooling-maps       map0            ”   •      H  ™   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         I  è        W   –        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive          Ì   –      trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical             cooling-maps       map0            ”   –      H  ™   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         I  è        W   –        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive          Ì   —      trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical             cooling-maps       map0            ”   —      H  ™   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cam-thermal         I  è        W   ú        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive       trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical                nna-thermal         I  è        W   ú        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive       trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical                adsp-thermal            I  è        W   ú        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive       trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical                gpu-thermal         I  è        W   ú        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive          Ì   ˜      trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical             cooling-maps       map0            ”   ˜        ™   ™ÿÿÿÿÿÿÿÿ            cpu-big0-thermal            I  è        W   d        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive          Ì   š      trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical             cooling-maps       map0            ”   š        ™   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            I  è        W   d        m   ”      trips      trip-alert0         } L        ‰  Ð         Epassive          Ì   ›      trip-alert1         } s        ‰  Ð         Ehot       trip-crit           } †         ‰          	   Ecritical             cooling-maps       map0            ”   ›        ™   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               chosen          ¨serial0:115200n8          memory@40000000         memory           •    @                 backlight-lcd0            pwm-backlight           ´   œ     ¡         ¼   �        7   ,   ˜            ¹      ÿ        Ë  ÿ        â  @         Ì   O      bt-sco            linux,bt-sco            4          dmic-codec            dmic-codec          4            û              2      gpio-keys         
    gpio-keys           «default         ¹   ž   pen-insert-switch           	[Pen Insert          >   ,                                  ,           7            regulator-pp1800-dpbrdg-dx            regulator-fixed         «default         ¹   Ÿ        >   ,   '            ¨pp1800_dpbrdg_dx             H        [   ]         Ì   Y      regulator-pp3300-disp-x           regulator-fixed         «default         ¹            >   ,   ™            ¨pp3300_disp_x            H         f        [   ^         Ì   N      regulator-pp3300-ldo-z5           regulator-fixed         ¨pp3300_ldo_z5            0         f        · 2Z         Ï 2Z         [   �      regulator-pp3300-s3           regulator-fixed       
  ¨pp3300_s3            0         f        [   ^         Ì   S      regulator-pp3300-z2           regulator-fixed       
  ¨pp3300_z2            0         f        · 2Z         Ï 2Z         [   �         Ì   ^      regulator-pp4200-z2           regulator-fixed       
  ¨pp4200_z2            0         f        · @@        Ï @@        [   �         Ì   9      regulator-pp5000-z2           regulator-fixed       
  ¨pp5000_z2            0         f        · LK@        Ï LK@        [   �         Ì   º      regulator-ppvar-sys           regulator-fixed       
  ¨ppvar_sys            0         f         Ì   �      reserved-memory                      +            È   audio-dma-pool            shared-dma-pool         u               x                ‚         Ì   h      memory@61000000           shared-dma-pool          •    a                   ‚         Ì   C      memory@60000000           shared-dma-pool          •    `                   ‚         Ì   D      memory@50000000           shared-dma-pool          •    P       
           ‚         Ì   ?         sound         ,    mediatek,mt8186-mt6366-rt1019-rt5682s-sound      C  «aud_clk_mosi_off aud_clk_mosi_on aud_clk_miso_off aud_clk_miso_on aud_dat_miso_off aud_dat_miso_on aud_dat_mosi_off aud_dat_mosi_on aud_gpio_i2s0_off aud_gpio_i2s0_on aud_gpio_i2s1_off aud_gpio_i2s1_on aud_gpio_i2s2_off aud_gpio_i2s2_on aud_gpio_i2s3_off aud_gpio_i2s3_on aud_gpio_pcm_off aud_gpio_pcm_on aud_gpio_dmic_sec          ¹   ¡        
N   ¢           £        ‰   ¤        “   ¥        �   ¦        §   §        ±   ¨        »   ©        Å   ª        Ï   «        Ú   ¬        å   ­        ð   ®        û   ¯           °           ±           ²        '   ³        2   ´        @   µ      I  RHeadphone HPOL Headphone HPOR IN1P Headset Mic Speakers Speaker HDMI1 TX       hs-playback-dai-link            `I2S0            ji2s         ucpu    codec           ‹   ¶             hs-capture-dai-link         `I2S1            ji2s         ucpu    codec           ‹   ¶             spk-share-dai-link          `I2S2            ucpu       spk-hdmi-playback-dai-link          `I2S3            ji2s         ucpu    codec           ‹   ·   ¸            speaker-codec             realtek,rt1019p         «default         ¹   ¹        4            •   ,   –             Ì   ¸      regulator-usb-p1-vbus             regulator-fixed         Ÿ   ,   ”            ¨vbus1           · LK@        Ï LK@         H        [   º         Ì   u      wifi-pwrseq           mmc-pwrseq-simple           «default         ¹   »        ¤   2        D   ,   6            Ì   q      wifi-wakeup       
    gpio-keys           «default         ¹   ¼   wowlan-event            	[Wake on WiFi            >   ,              ,   �                  regulator-pp1000-edpbrdg              regulator-fixed         ¨pp1000_edpbrdg          «default         ¹   ½         H         f        Ÿ   ,               [   ^         Ì   I      regulator-pp1800-edpbrdg-dx           regulator-fixed         ¨pp1800_edpbrdg_dx           «default         ¹   ¾         H         f        Ÿ   ,               [   ]         Ì   J      regulator-pp3300-edp-dx           regulator-fixed         ¨pp3300_edp_dx           «default         ¹   ¿         H         f        Ÿ   ,               [   ^         Ì   K         	compatible interrupt-parent #address-cells #size-cells model chassis-type ovl0 ovl-2l0 rdma0 rdma1 i2c0 i2c1 i2c2 i2c3 i2c5 mmc0 mmc1 serial0 clocks reg status clock-names operating-points-v2 proc-supply phandle opp-shared opp-hz opp-microvolt required-opps cpu device_type enable-method clock-frequency dynamic-power-coefficient capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache #cooling-cells mediatek,cci entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-div clock-mult clock-output-names opp-supported-hw interrupts dma-ranges #interrupt-cells #redistributor-regions interrupt-controller mediatek,broken-save-restore-fw affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges gpio-line-names pinmux input-enable bias-pull-down input-schmitt-enable bias-disable output-low drive-strength output-high bias-pull-up #power-domain-cells domain-supply mediatek,infracfg mediatek,disable-extrst mediatek,reset-by-toprgu interrupts-extended Avdd-supply mediatek,dmic-mode vsys-ldo1-supply vsys-ldo2-supply vsys-ldo3-supply vsys-vcore-supply vsys-vdram1-supply vsys-vgpu-supply vsys-vmodem-supply vsys-vpa-supply vsys-vproc11-supply vsys-vproc12-supply vsys-vs1-supply vsys-vs2-supply vs1-ldo1-supply vs2-ldo1-supply vs2-ldo2-supply vs2-ldo3-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-allowed-modes regulator-always-on regulator-coupled-with regulator-coupled-max-spread assigned-clocks assigned-clock-parents #mbox-cells pinctrl-names pinctrl-0 firmware-name memory-region mediatek,rpmsg-name mbox-names mboxes power-domains spi-max-frequency #io-channel-cells enable-gpios reset-gpios vdd10-supply vdd18-supply vdd33-supply analogix,lane0-swing analogix,lane1-swing remote-endpoint data-lanes power-supply backlight i2c-scl-internal-delay-ns goodix,no-reset-during-suspend vcc-supply wakeup-source hid-descr-addr #sound-dai-cells ovdd-supply pwr18-supply extcon link-frequencies AVDD-supply DBVDD-supply LDO1-IN-supply MICVDD-supply realtek,jd-src resets nvmem-cells nvmem-cell-names #thermal-sensor-cells reset-names #pwm-cells mediatek,pad-select google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count label power-role data-role try-power-role google,usb-port-id keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap function-row-physmap cs-gpios mediatek,apmixedsys mediatek,topckgen phys mediatek,syscon-wakeup vbus-supply pinctrl-1 bus-width non-removable cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe no-sd no-sdio cap-mmc-hw-reset hs400-ds-delay mediatek,hs400-ds-dly3 vmmc-supply vqmmc-supply pinctrl-2 interrupt-names cap-sd-highspeed sd-uhs-sdr104 sd-uhs-sdr50 keep-power-in-suspend cap-sdio-irq no-mmc mmc-pwrseq #phy-cells mediatek,discth bits power-domain-names mali-supply mediatek,gce-client-reg mediatek,gce-events mediatek,larb-id mediatek,smi iommus phy-names mediatek,larbs #iommu-cells mediatek,scp polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device stdout-path pwms brightness-levels num-interpolated-steps default-brightness-level num-channels wakeup-delay-ms wakeup-event-action linux,code linux,input-type enable-active-high vin-supply regulator-boot-on alignment no-map pinctrl-3 pinctrl-4 pinctrl-5 pinctrl-6 pinctrl-7 pinctrl-8 pinctrl-9 pinctrl-10 pinctrl-11 pinctrl-12 pinctrl-13 pinctrl-14 pinctrl-15 pinctrl-16 pinctrl-17 pinctrl-18 mediatek,adsp mediatek,platform audio-routing link-name dai-format mediatek,clk-provider sound-dai sdb-gpios gpio post-power-on-delay-ms 