Ðþí    8  ü€   (            �  üH                             ’    google,tentacruel-sku262147 google,tentacruel-sku262146 google,tentacruel-sku262145 google,tentacruel-sku262144 google,tentacruel mediatek,mt8186                                    +            7Google Tentacruel board          =convertible    aliases          J/soc/ovl@14005000            O/soc/ovl@14006000            W/soc/rdma@14007000           ]/soc/rdma@1401f000           c/soc/i2c@11007000            h/soc/i2c@11008000            m/soc/i2c@11009000            r/soc/i2c@1100f000            w/soc/i2c@11016000            |/soc/mmc@11230000            �/soc/mmc@11240000            †/soc/serial@11002000             Ž/soc/i2c@11011000         fhctl@1000ce00            mediatek,mt8186-fhctl            “               š     Î              	   ždisabled          cci           mediatek,mt8186-cci          “                     ¥cci intermediate             ±            Å            Ñ   "      opp-table-cci             operating-points-v2           Ù         Ñ      opp-500000000            ä    Íe          ë 	'À         Ñ         opp-560000000            ä    !`ì          ë 
L¸         Ñ         opp-612000000            ä    $za          ë 
•ö         Ñ         opp-682000000            ä    (¦~€         ë 
÷ž         Ñ   	      opp-752000000            ä    ,Òœ          ë YF         Ñ   
      opp-822000000            ä    0þ¹€         ë ºî         Ñ         opp-875000000            ä    4'pÀ         ë ëÂ         Ñ         opp-927000000            ä    7@åÀ         ë 5          Ñ         opp-980000000            ä    :i�          ë ~>         Ñ         opp-1050000000           ä    >•º€         ë ßæ         Ñ         opp-1120000000           ä    BÁØ          ë )$         Ñ         opp-1155000000           ä    D×æÀ         ë ŠÌ         Ñ         opp-1190000000           ä    Fíõ€         ë Ô
         Ñ         opp-1260000000           ä    K          ë ~ð         Ñ         opp-1330000000           ä    OF0€         ë )Ö         Ñ         opp-1400000000           ä    SrN          ë ¼R         Ñ            opp-table-cluster0            operating-points-v2           Ù         Ñ      opp-500000000            ä    Íe          ë 	'À         ù         opp-774000000            ä    ."M€         ë 
L¸         ù         opp-875000000            ä    4'pÀ         ë 
®`         ù         opp-975000000            ä    :QÀ         ë          ù   	      opp-1075000000           ä    @2À         ë q°         ù   
      opp-1175000000           ä    F	À         ë ÓX         ù         opp-1275000000           ä    KþôÀ         ë 5          ù         opp-1375000000           ä    QôÕÀ         ë –¨         ù         opp-1500000000           ä    Yh/          ë º         ù         opp-1618000000           ä    `p¸€         ë Yø         ù         opp-1666000000           ä    cM$€         ë »          ù         opp-1733000000           ä    gK{@         ë H         ù         opp-1800000000           ä    kIÒ          ë ~ð         ù         opp-1866000000           ä    o8æ€         ë ù         ù         opp-1933000000           ä    s7=@         ë Zª         ù         opp-2000000000           ä    w5”          ë ¼R         ù            opp-table-cluster1            operating-points-v2           Ù         Ñ   #   opp-774000000            ä    ."M€         ë 
L¸         ù         opp-835000000            ä    1ÅÀ         ë 
•ö         ù         opp-919000000            ä    6ÆÓÀ         ë 
÷ž         ù         opp-1002000000           ä    ;¹N€         ë YF         ù   	      opp-1085000000           ä    @«É@         ë ÓX         ù   
      opp-1169000000           ä    E­†@         ë 5          ù         opp-1308000000           ä    Mö          ë ßæ         ù         opp-1419000000           ä    T”8À         ë Yø         ù         opp-1530000000           ä    [1ò€         ë ìt         ù         opp-1670000000           ä    cŠ-€         ë —Z         ù         opp-1733000000           ä    gK{@         ë ù         ù         opp-1796000000           ä    kÉ          ë s         ù         opp-1860000000           ä    nÝY          ë Ô¼         ù         opp-1923000000           ä    rž¦À         ë 6d         ù         opp-1986000000           ä    v_ô€         ë °v         ù         opp-2050000000           ä    z0„€         ë          ù            cpus                         +       cpu-map    cluster0       core0                    core1                    core2                    core3                    core4                    core5                    core6                    core7                          cpu@0           cpu           arm,cortex-a55           š            psci            %w5”          “                      ¥cpu intermediate             ±           5   T        O  ~        b               r  €            @        ‘   €        ž  €         «   @        ½   €        Ê   !        Û           ê   "         Å            Ñ         cpu@100         cpu           arm,cortex-a55           š           psci            %w5”          “                      ¥cpu intermediate             ±           5   T        O  ~        b               r  €            @        ‘   €        ž  €         «   @        ½   €        Ê   !        Û           ê   "         Å            Ñ         cpu@200         cpu           arm,cortex-a55           š           psci            %w5”          “                      ¥cpu intermediate             ±           5   T        O  ~        b               r  €            @        ‘   €        ž  €         «   @        ½   €        Ê   !        Û           ê   "         Å            Ñ         cpu@300         cpu           arm,cortex-a55           š           psci            %w5”          “                      ¥cpu intermediate             ±           5   T        O  ~        b               r  €            @        ‘   €        ž  €         «   @        ½   €        Ê   !        Û           ê   "         Å            Ñ         cpu@400         cpu           arm,cortex-a55           š           psci            %w5”          “                      ¥cpu intermediate             ±           5   T        O  ~        b               r  €            @        ‘   €        ž  €         «   @        ½   €        Ê   !        Û           ê   "         Å            Ñ         cpu@500         cpu           arm,cortex-a55           š           psci            %w5”          “                      ¥cpu intermediate             ±           5   T        O  ~        b               r  €            @        ‘   €        ž  €         «   @        ½   €        Ê   !        Û           ê   "         Å            Ñ         cpu@600         cpu           arm,cortex-a76           š           psci            %z0„€         “                     ¥cpu intermediate             ±   #        5  O        O           b   $   %        r              @        ‘           ž           «   @        ½           Ê   &        Û           ê   "         Å   '         Ñ         cpu@700         cpu           arm,cortex-a76           š           psci            %z0„€         “                     ¥cpu intermediate             ±   #        5  O        O           b   $   %        r              @        ‘           ž           «   @        ½           Ê   &        Û           ê   "         Å   '         Ñ         idle-states         ÷psci       cpu-retention-l           arm,idle-state                             ,   2        =   d        M  @         Ñ         cpu-retention-b           arm,idle-state                             ,   2        =   d        M  x         Ñ   $      cpu-off-l             arm,idle-state                            ,   d        =   ú        M  4         Ñ          cpu-off-b             arm,idle-state                            ,   d        =   ú        M  l         Ñ   %         l2-cache0             cache           ^           t           �   @        “           Ê   (         j         Ñ   !      l2-cache1             cache           ^           t           �   @        “           Ê   (         j         Ñ   &      l3-cache              cache           ^           t           �   @        “            j         Ñ   (         fixed-factor-clock-13m            fixed-factor-clock          x             “   )        …           �           šclk13m           Ñ   =      oscillator-26m            fixed-clock         x            %Œº€        šclk26m           Ñ   )      oscillator-32k            fixed-clock         x            %  €         šclk32k        opp-table-gpu             operating-points-v2          Ñ   y   opp-299000000            ä    Ò`À         ë 	X”        ­   ÿ      opp-332000000            ä    Éë          ë 	‰h        ­   ÿ      opp-366000000            ä    Ð·€         ë 	º<        ­   ÿ      opp-400000000            ä    ×„          ë 	Ò¦        ­   ÿ      opp-434000000            ä    ÞP€         ë 
z        ­   ÿ      opp-484000000            ä    ÙA          ë 
4N        ­   ÿ      opp-535000000            ä    ãsÀ         ë 
}Œ        ­   ÿ      opp-586000000            ä    "í¦€         ë 
®`        ­   ÿ      opp-637000000            ä    %÷Ù@         ë 
ß4        ­   ÿ      opp-690000000            ä    ) �€         ë @Ü        ­   ÿ      opp-743000000            ä    ,IGÀ         ë Š        ­   ÿ      opp-796000000            ä    /qÿ          ë ëÂ        ­   ÿ      opp-850000000            ä    2©ø€         ë 5         ­   ÿ      opp-900000000-3          ä    5¤é          ë øP        ­   Ï      opp-900000000-4          ä    5¤é          ë Ç|        ­         opp-900000000-5          ä    5¤é          ë –¨        ­          opp-950000000-3          ä    8ŸÙ€         ë »         ­   Ï      opp-950000000-4          ä    8ŸÙ€         ë Yø        ­         opp-950000000-5          ä    8ŸÙ€         ë øP        ­          opp-1000000000-3             ä    ;šÊ          ë ~ð        ­   Ï      opp-1000000000-4             ä    ;šÊ          ë ìt        ­         opp-1000000000-5             ä    ;šÊ          ë Yø        ­             pmu-a55           arm,cortex-a55-pmu                      ¾            *      pmu-a76           arm,cortex-a76-pmu                      ¾            +      psci              arm,psci-1.0            smc       timer             arm,armv8-timer                   @  ¾                                             
             soc                      +             simple-bus          É                                Í   interrupt-controller@c000000              arm,gic-v3          Ô           å                        ü          š                                    ¾      	                         Ñ      ppi-partitions     interrupt-partition-0           1                           Ñ   *      interrupt-partition-1           1               Ñ   +            syscon@c53a000            mediatek,mt8186-mcusys syscon            š    S                 x            Ñ         syscon@10000000            mediatek,mt8186-topckgen syscon          š                      x            Ñ   -      syscon@10001000       #    mediatek,mt8186-infracfg_ao syscon           š                     x           :            Ñ   /      syscon@10003000           mediatek,mt8186-pericfg syscon           š     0                 Ñ   k      pinctrl@10005000              mediatek,mt8186-pinctrl       €   š     P                           "             $             &             *             ,             °              B  Giocfg0 iocfg_lt iocfg_lm iocfg_lb iocfg_bl iocfg_rb iocfg_rt eint            Q        a           m   ,           ¹         ü        ¾       º               Ô        	ß  yTP TP TP I2S0_HP_DI I2S3_DP_SPKR_DO SAR_INT_ODL BT_WAKE_AP_ODL WIFI_INT_ODL DPBRDG_INT_ODL EDPBRDG_INT_ODL EC_AP_HPD_OD TCHPAD_INT_ODL TCHSCR_INT_1V8_ODL EC_AP_INT_ODL EC_IN_RW_ODL GSC_AP_INT_ODL AP_FLASH_WP_L HP_INT_ODL PEN_EJECT_OD WCAM_PWDN_L WCAM_RST_L UCAM_SEN_EN UCAM_RST_L LTE_RESET_L LTE_SAR_DETECT_L I2S2_DP_SPK_MCK I2S2_DP_SPKR_BCK I2S2_DP_SPKR_LRCK I2S2_DP_SPKR_DI (TP) EN_PP1000_EDPBRDG EN_PP1800_EDPBRDG EN_PP3300_EDPBRDG UART_GSC_TX_AP_RX UART_AP_TX_GSC_RX UART_DBGCON_TX_ADSP_RX UART_ADSP_TX_DBGCON_RX EN_PP1000_DPBRDG TCHSCR_REPORT_DISABLE EN_PP3300_DPBRDG EN_PP1800_DPBRDG SPI_AP_CLK_EC SPI_AP_CS_EC_L SPI_AP_DO_EC_DI SPI_AP_DI_EC_DO SPI_AP_CLK_GSC SPI_AP_CS_GSC_L SPI_AP_DO_GSC_DI SPI_AP_DI_GSC_DO UART_DBGCON_TX_SCP_RX UART_SCP_TX_DBGCON_RX EN_PP1200_CAM_X EN_PP2800A_VCM_X EN_PP2800A_UCAM_X EN_PP2800A_WCAM_X WLAN_MODULE_RST_L EN_PP1200_UCAM_X I2S1_HP_DO I2S1_HP_BCK I2S1_HP_LRCK I2S1_HP_MCK TCHSCR_RST_1V8_L SPI_AP_CLK_ROM SPI_AP_CS_ROM_L SPI_AP_DO_ROM_DI SPI_AP_DI_ROM_DO NC NC EMMC_STRB EMMC_CLK EMMC_CMD EMMC_RST_L EMMC_DATA0 EMMC_DATA1 EMMC_DATA2 EMMC_DATA3 EMMC_DATA4 EMMC_DATA5 EMMC_DATA6 EMMC_DATA7 AP_KPCOL0 NC NC NC TP SDIO_CLK SDIO_CMD SDIO_DATA0 SDIO_DATA1 SDIO_DATA2 SDIO_DATA3 NC NC NC NC NC NC EDPBRDG_PWREN BL_PWM_1V8 EDPBRDG_RST_L MIPI_DPI_CLK MIPI_DPI_VSYNC MIPI_DPI_HSYNC MIPI_DPI_DE MIPI_DPI_D0 MIPI_DPI_D1 MIPI_DPI_D2 MIPI_DPI_D3 MIPI_DPI_D4 MIPI_DPI_D5 MIPI_DPI_D6 MIPI_DPI_DA7 MIPI_DPI_D8 MIPI_DPI_D9 MIPI_DPI_D10 MIPI_DPI_D11 PCM_BT_CLK PCM_BT_SYNC PCM_BT_DI PCM_BT_DO JTAG_TMS_TP JTAG_TCK_TP JTAG_TDI_TP JTAG_TDO_TP JTAG_TRSTN_TP CLK_24M_WCAM CLK_24M_UCAM UCAM_DET_ODL AP_I2C_EDPBRDG_SCL_1V8 AP_I2C_EDPBRDG_SDA_1V8 AP_I2C_TCHSCR_SCL_1V8 AP_I2C_TCHSCR_SDA_1V8 AP_I2C_TCHPAD_SCL_1V8 AP_I2C_TCHPAD_SDA_1V8 AP_I2C_DPBRDG_SCL_1V8 AP_I2C_DPBRDG_SDA_1V8 AP_I2C_WLAN_SCL_1V8 AP_I2C_WLAN_SDA_1V8 AP_I2C_AUD_SCL_1V8 AP_I2C_AUD_SDA_1V8 AP_I2C_TPM_SCL_1V8 AP_I2C_UCAM_SDA_1V8 AP_I2C_UCAM_SCL_1V8 AP_I2C_UCAM_SDA_1V8 AP_I2C_WCAM_SCL_1V8 AP_I2C_WCAM_SDA_1V8 SCP_I2C_SENSOR_SCL_1V8 SCP_I2C_SENSOR_SDA_1V8 AP_EC_WARM_RST_REQ AP_XHCI_INIT_DONE USB3_HUB_RST_L EN_SPKR BEEP_ON AP_EDP_BKLTEN EN_PP3300_DISP_X EN_PP3300_SDBRDG_X BT_KILL_1V8_L WIFI_KILL_1V8_L PWRAP_SPI0_CSN PWRAP_SPI0_CK PWRAP_SPI0_MO PWRAP_SPI0_MI SRCLKENA0 SRCLKENA1 SCP_VREQ_VAO AP_RTC_CLK32K AP_PMIC_WDTRST_L AUD_CLK_MOSI AUD_SYNC_MOSI AUD_DAT_MOSI0 AUD_DAT_MOSI1 AUD_CLK_MISO AUD_SYNC_MISO AUD_DAT_MISO0 AUD_DAT_MISO1 NC NC DPBRDG_PWREN DPBRDG_RST_L LTE_W_DISABLE_L LTE_SAR_DETECT_L EN_PP3300_LTE_X LTE_PWR_OFF_L LTE_RESET_L TP TP           Ñ   ,   aud-clk-mosi-off-pins            Ñ   ¢   pins-clk-sync           ‰  ¦   §          �         �         aud-clk-mosi-on-pins             Ñ   £   pins-clk-sync           ‰  ¦  §         aud-clk-miso-off-pins            Ñ   ¤   pins-clk-sync           ‰  ª   «          �         �         aud-clk-miso-on-pins             Ñ   ¥   pins-clk-sync           ‰  ª  «         aud-dat-mosi-off-pins            Ñ   ¨   pins-dat            ‰  ¨   ©          �         �         aud-dat-mosi-on-pins             Ñ   ©   pins-dat            ‰  ¨  ©         aud-dat-miso-off-pins            Ñ   ¦   pins-dat            ‰  ¬   ­          �         �         aud-dat-miso-on-pins             Ñ   §   pins-dat            ‰  ¬  ­         ¬         Á         aud-gpio-i2s0-off-pins           Ñ   ª   pins-sdata          ‰            aud-gpio-i2s0-on-pins            Ñ   «   pins-sdata          ‰           aud-gpio-i2s-off-pins            Ñ   ¬   pins-clk-sdata          ‰  8   9   :   ;          Î         aud-gpio-i2s1-on-pins            Ñ   ­   pins-clk-sdata          ‰  8  9  :  ;         aud-gpio-i2s2-off-pins           Ñ   ®   pins-cmd-dat            ‰               Î         aud-gpio-i2s2-on-pins            Ñ   ¯   pins-clk            ‰            Ù            aud-gpio-i2s3-off-pins           Ñ   °   pins-sdata          ‰            Î         aud-gpio-i2s3-on-pins            Ñ   ±   pins-sdata          ‰          Ù            aud-gpio-pcm-off-pins            Ñ   ²   pins-clk-sdata          ‰  s   t   u   v          Î         aud-gpio-pcm-on-pins             Ñ   ³   pins-clk-sdata          ‰  s  t  u  v         aud-gpio-dmic-sec-pins           Ñ   ´   pins            ‰            Î         bt-reset-pins            Ñ   s   pins-bt-reset           ‰  ›          è         dpi-sleep-pins           Ñ   ~   pins-cmd-dat          @  ‰  g   h   i   j   k   l   m   n   o   p   q   r   e   d   f   c         Ù   
         Î         dpi-default-pins             Ñ   }   pins-cmd-dat          @  ‰  g  h  i  j  k  l  m  n  o  p  q  r  e  d  f  c        Ù   
         cros-ec-int-pins             Ñ   e   pins-ec-ap-int-odl          ‰            �         edp-panel-fixed-pins             Ñ   ¡   pins-vreg-en            ‰  ™          è         en-pp1800-dpbrdg-pins            Ñ       pins-vreg-en            ‰  '          Î         gsc-int-pins             Ñ   g   pins-gsc-ap-int-odl         ‰            �         i2c0-pins            Ñ   G   pins-bus            ‰  €           Á        Ù            �         i2c1-pins            Ñ   P   pins-bus            ‰  ‚  �         Á        Ù            �         i2c2-pins            Ñ   S   pins-bus            ‰  „  ƒ         Á        Ù            �         i2c3-pins            Ñ   U   pins-bus            ‰  †  …         Á        Ù            �         i2c5-pins            Ñ   ^   pins-bus            ‰  Š  ‰         Á        Ù            �         it6505-pins          Ñ   V   pins-hpd            ‰  
          �         ô      pins-int            ‰            �         ô      pins-reset          ‰  ±          Î         ô         mmc0-default-pins            Ñ   l   pins-clk            ‰  D        �   f      pins-cmd-dat          $  ‰  G  H  I  J  K  L  M  N  E         �        ô   e      pins-rst            ‰  F        ô   e         mmc0-uhs-pins            Ñ   m   pins-clk            ‰  D        Ù           �   f      pins-cmd-dat          $  ‰  G  H  I  J  K  L  M  N  E         �        Ù           ô   e      pins-ds         ‰  C        Ù           �   f      pins-rst            ‰  F        ô   e         mmc1-default-pins            Ñ   o   pins-clk            ‰  T        Ù           �   f      pins-cmd-dat            ‰  V  W  X  Y  U         �        Ù           ô   e         mmc1-uhs-pins            Ñ   p   pins-clk            ‰  T        Ù           �   f      pins-cmd-dat            ‰  V  W  X  Y  U         �        Ù           ô   e         mmc1-eint-pins           Ñ   q   pins-dat1           ‰  W          �        ô   e         nor-default-pins             Ñ   E   pins-clk-dat            ‰  ?  =  @        Ù            �      pins-cs-dat         ‰  >  A  B        Ù            ô         pen-eject-pins           Ñ   Ÿ   pins            ‰            �         Á         disp-pwm-pins            Ñ   c   pins            ‰  a         è         speaker-codec-default-pins           Ñ   º   pins-sdb            ‰  –          Î         scp-default-pins             Ñ   >   pins-scp-uart           ‰  0  1         spi1-pins            Ñ   d   pins-bus            ‰  (  )  *  +         Á         �         spi2-pins            Ñ   f   pins-bus            ‰  ,  -   .  /         Á         �         spmi-pins      pins-bus            ‰  ·  ¸         touchscreen-pins             Ñ   Q   pins-irq            ‰            �         ô      pins-reset          ‰  <          è      pins-report-sw          ‰  %          Î         trackpad-default-pins            Ñ   T   pins-int-n          ‰            �         Á         wifi-enable-pins             Ñ   ¼   pins-wifi-enable            ‰  6          wifi-wakeup-pins             Ñ   ½   pins-wifi-wakeup            ‰            �         i2c4-pins            Ñ   [   pins-bus            ‰  ˆ  ‡         Á        Ù            �         ps8640-pins          Ñ   H   pins-pwrdn-rst          ‰  `   b          Î         sar-sensor-pins          Ñ   \   pins-irq            ‰            �         ô            syscon@10006000       )    mediatek,mt8186-scpsys syscon simple-mfd             š     `           power-controller          !    mediatek,mt8186-power-controller                         +                        Ñ   B   power-domain@0           š             “   -            ¥mfg00                        +                          .   power-domain@1           š           #   /                     +                          0   power-domain@2           š                     power-domain@3           š                           power-domain@17          š            “   -      -         $   ¥subsys-csirx-top0 subsys-csirx-top1                   power-domain@4           š            “   -      /   =         ¥sys_ck ref_ck                     power-domain@5           š            “   /   B   /   ?         ¥sys_ck ref_ck                     power-domain@18          š            “   -   /   -   >         ¥audioadsp subsys-adsp-bus                        +                  power-domain@19          š                        +                  power-domain@20          š           #   /                        power-domain@16          š           #   /                  power-domain@6           š         0   “   -   *   -   +   1   
   1      1      1         M   ¥disp mdp subsys-smi-infra subsys-smi-common subsys-smi-gals subsys-smi-iommu            #   /                     +                  power-domain@14          š            “   -   )   2             ¥vdec0 larb          #   /                  power-domain@10          š   
      8   “   -      -      -      -       3      -   #   -   %      6   ¥cam0 cam1 cam2 cam3 gals subsys-cam-tm subsys-cam-top           #   /                     +                  power-domain@12          š                     power-domain@11          š                        power-domain@7           š            “   4      -   &         ¥gals subsys-img-top         #   /                     +                  power-domain@8           š                        power-domain@9           š   	      (   “   -   '   5       5      5      5         P   ¥subsys-ipe-top subsys-ipe-larb0 subsys-ipe-larb1 subsys-ipe-smi subsys-ipe-gals         #   /                  power-domain@13          š            “   -   $   6            ¥venc0 subsys-larb           #   /                  power-domain@15          š            “   -   :   7      7         %   ¥wpe0 subsys-larb-ck subsys-larb-pclk            #   /                           watchdog@10007000             mediatek,mt8186-wdt          5         š     p                :            M         Ñ   h      syscon@1000c000       "    mediatek,mt8186-apmixedsys syscon            š     À                x            Ñ         pwrap@1000d000            mediatek,mt8186-pwrap syscon             š     Ð                Gpwrap           ¾       Â                “   /      /          	   ¥spi wrap       pmic               mediatek,mt6366 mediatek,mt6358          ü        f   ,   É           Ô      audio-codec       ,    mediatek,mt6366-sound mediatek,mt6358-sound         z   8        †         regulators        4    mediatek,mt6366-regulator mediatek,mt6358-regulator         ™   9        ª   9        »   9        Ì   9        Þ   9        ñ   9           9           9        %   9        9   9        M   9        ]   9        m   :        }   ;        �   <        �   <   vcore           ­pp0750_dvdd_core            ¼ dp        Ô 5         ì  j           È                        5      vdram1          ­pp1125_emi_vdd2         ¼ *ˆ        Ô *ˆ        ì  0Ô                                    5         Ñ   ;      vgpu            ­ppvar_dvdd_vgpu         ¼ ¡         Ô ~ð        ì  j           È                       I   .        ` †          Ñ   0      vproc11         ­ppvar_dvdd_proc_bc_mt6366           ¼ 	'À        Ô O€        ì  j           È                        5         Ñ   '      vproc12         ­ppvar_dvdd_proc_lc          ¼ 	'À        Ô O€        ì  j           È                        5         Ñ         vs1         ­pp2000_vs1          ¼ „€        Ô „€        ì  0Ô                     5         Ñ   :      vs2         ­pp1350_vs2          ¼ ™p        Ô ™p        ì  0Ô                     5         Ñ   <      va12            ­pp1200_va12         ¼ O€        Ô O€                   5      vaud28          ­pp2800_vaud28           ¼ *¹€        Ô *¹€                   Ñ   8      vaux18          ­pp1840_vaux18           ¼ w@        Ô €                vbif28          ­pp2800_vbif28           ¼ *¹€        Ô *¹€                vcn18           ­pp1800_vcn18_x          ¼ w@        Ô w@                vcn28           ­pp2800_vcn28_x          ¼ *¹€        Ô *¹€                vefuse          ­pp1800_vefuse           ¼ w@        Ô w@                vfe28           ­pp2800_vfe28_x          ¼ *¹€        Ô *¹€                vemc            ­pp3000_vemc         ¼ -ÆÀ        Ô -ÆÀ           <         Ñ   n      vibr            ­pp2800_vibr_x           ¼ *¹€        Ô *¹€           <      vio18           ­pp1800_vio18_s3         ¼ w@        Ô w@          
Œ         5         Ñ   ]      vio28           ­pp2800_vio28_x          ¼ *¹€        Ô *¹€                vm18            ­pp1800_emi_vdd1         ¼ w@        Ô €          E         5      vmc         ­pp3000_vmc          ¼ -ÆÀ        Ô -ÆÀ           <      vmddr           ­pm0750_emi_vmddr            ¼ 
®`        Ô q°          E         5      vmch            ­pp3000_vmch         ¼ -ÆÀ        Ô -ÆÀ           <      vcn33           ­pp3300_vcn33_x          ¼ 2Z         Ô 2Z                    Ñ   J      vdram2          ­pp0600_emi_vddq         ¼ 	'À        Ô 	'À          ä         5      vrf12           ­pp1200_vrf12_x          ¼ O€        Ô O€           x         Ñ   I      vrf18           ­pp1800_vrf18_x          ¼ w@        Ô w@           x      vsim1           ­pp1860_vsim1_x          ¼ w@        Ô a                 vsim2           ­pp2760_vsim2_x          ¼ )2à        Ô *@                   Ñ   W      vsram-gpu           ­pp0900_dvdd_sram_gpu            ¼ øP        Ô �        ì  j           ð        I   0        ` †          Ñ   .      vsram-others            ­pp0900_dvdd_sram_core           ¼ »         Ô »         ì  j           ð         5      vsram-proc11            ­pp0900_dvdd_sram_bc         ¼ øP        Ô          ì  j           ð         5      vsram-proc12            ­pp0900_dvdd_sram_lc         ¼ øP        Ô          ì  j           ð         5      vusb            ­pp3070_vusb         ¼ -ÆÀ        Ô .Ø0                   5      vxo22           ­pp2240_vxo22            ¼ !‘À        Ô ".            x         5         rtc       (    mediatek,mt6366-rtc mediatek,mt6358-rtc             spmi@10015000         *    mediatek,mt8186-spmi mediatek,mt8195-spmi             š    P            °                Gpmif spmimst             “   /      /       -   2      (   ¥pmif_sys_ck pmif_tmr_ck spmimst_clk_mux         }   -   2        �   -   t         ¾       í              ñ             	   ždisabled          timer@10017000        ,    mediatek,mt8186-timer mediatek,mt6765-timer          š    p                ¾       Ï                “   =      mailbox@1022c000              mediatek,mt8186-gce          š    "À       @          “   /            ¥gce         ¾       ª               ¤            Ñ   z      scp@10500000              mediatek,mt8186-scp           š    P             \       �€      	  Gsram cfg            ¾       Í               °default         ¾   >        Èmediatek/mt8186/scp.img         Ö   ?         žokay             Ñ   ‘   cros-ec-rpmsg             google,cros-ec-rpmsg            äcros-ec-rpmsg            adsp@10680000             mediatek,mt8186-dsp       @   š    h              €             h°            hð                Gcfg sram sec bus             “   -   /   -   >         ¥audiodsp adsp_bus           }   -   /   -   >        �   )   -   E        ørx tx              @   A        
   B            žokay            Ö   C   D         Ñ   µ      mailbox@10686100              mediatek,mt8186-adsp-mbox           ¤             š    ha                ¾      i                Ñ   @      mailbox@10687100              mediatek,mt8186-adsp-mbox           ¤             š    hq                ¾      j                Ñ   A      spi@11000000              mediatek,mt8186-nor          š                        “   -   3   /   O   /   c   /   d         ¥spi sf axi axi_s            }   -   3        �   -   P        ¾      %                žokay            °default         ¾   E                     +       flash@0           jedec,spi-nor            š            SÀ         adc@11001000          .    mediatek,mt8186-auxadc mediatek,mt8173-auxadc            š                     *            “   /   "         ¥main          serial@11002000       *    mediatek,mt8186-uart mediatek,mt6577-uart            š                      ¾       p                “   )   /         	   ¥baud bus             žokay          serial@11003000       *    mediatek,mt8186-uart mediatek,mt6577-uart            š     0                ¾       q                “   )   /         	   ¥baud bus          	   ždisabled          i2c@11007000              mediatek,mt8186-i2c           š     p                             ¾       i                “   F       /   '      	   ¥main dma            …                        +             žokay            °default         ¾   G        % €   edp-bridge@8              parade,ps8640            š           °default         ¾   H        <   ,   `           L   ,   b           X   I        e   J   ports                        +       port@0           š       endpoint            r   K         Ñ   �         port@1           š      endpoint            r   L         Ñ   O            aux-bus    panel         
    edp-panel           ‚   M        �   N   port       endpoint            r   O         Ñ   L                     i2c@11008000              mediatek,mt8186-i2c           š     €                             ¾       j                “   F      /   '      	   ¥main dma            …                        +             žokay            °default         ¾   P        % €        ™  '   touchscreen@10            elan,ekth6a12nay             š           f   ,              °default         ¾   Q        L   ,   <           ³   R         À         i2c@11009000              mediatek,mt8186-i2c           š     �                    €        ¾       k                “   F      /   '      	   ¥main dma            …                        +             žokay            °default         ¾   S        % €        ™  '   trackpad@15           elan,ekth3000            š           f   ,              °default         ¾   T        Ö   R         á         i2c@1100f000              mediatek,mt8186-i2c           š     ð             €               ¾       l                “   F      /   '      	   ¥main dma            …                        +             žokay            °default         ¾   U        % †    dp-bridge@5c              ite,it6505           š   \        f   ,              °default         ¾   V        ï                W           X        L   ,   ±              Y         Ñ   ¸   ports                        +       port@0           š       endpoint                 ðÑ€        r   Z         Ñ            port@1           š                  i2c@11011000              mediatek,mt8186-i2c           š                 €      €        ¾       m                “   F      /   '      	   ¥main dma            …                        +             žokay            °default         ¾   [        % €   proximity@28              semtech,sx9324           š   (        *           f   ,              °default         ¾   \        {   ]        1   ]         i2c@11016000              mediatek,mt8186-i2c           š    `                             ¾      b                “   F      /   '      	   ¥main dma            …                        +             žokay            °default         ¾   ^   codec@1a              realtek,rt5682s          š           f   ,              ï           =   ]        I   ]        V   ]        e   _        s            Ñ   ·         i2c@1100d000              mediatek,mt8186-i2c           š     Ð                             ¾      c                “   F      /   '      	   ¥main dma            …                        +          	   ždisabled          i2c@11004000              mediatek,mt8186-i2c           š     @             	       €        ¾       n                “   F      /   '      	   ¥main dma            …                        +          	   ždisabled          i2c@11005000              mediatek,mt8186-i2c           š     P             
€      €        ¾       o                “   F      /   '      	   ¥main dma            …                        +          	   ždisabled          spi@1100a000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             š                      ¾       Š                “   -   K   -      /            ¥parent-clk sel-clk spi-clk        	   ždisabled          thermal-sensor@1100b000           mediatek,mt8186-lvts             š     °                ¾       c                “   /   	        ‚   /            ‰   `   a      $  •lvts-calib-data-1 lvts-calib-data-2         ¦            Ñ   •      svs@1100bc00              mediatek,mt8186-svs          š     ¼                ¾       Ž                “   /   	         ¥main            ‰   b   `      (  •svs-calibration-data t-calibration-data         ‚   /           ¼svs_rst       pwm@1100e000          2    mediatek,mt8186-disp-pwm mediatek,mt8183-disp-pwm            š     à                ¾       �               È            “   -      /   4         ¥main mm          žokay            °default         ¾   c         Ñ   �      spi@11010000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             š                     ¾       ‹                “   -   K   -      /   8         ¥parent-clk sel-clk spi-clk           žokay            °default         ¾   d        Ó       ec@0              google,cros-ec-spi           š            f   ,              °default         ¾   e         B@   i2c-tunnel            google,cros-ec-i2c-tunnel           ç                        +       sbs-battery@b             sbs,sbs-battery          š           ù           	            typec             google,cros-ec-typec                         +       connector@0           usb-c-connector          š            	"left            	(dual            	3host            	=source        connector@1           usb-c-connector          š           	"right           	(dual            	3host            	=source           extcon0           google,extcon-usbc-cros-ec          	L             Ñ   Y      keyboard-controller           google,cros-ec-keyb         	_           	o            	‚     D  	œ  ž ­t x c à á	 q	 r  s  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	 Ž + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i      (  	©               	  	                 spi@11012000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             š                     ¾       ‘                “   -   K   -      /   ;         ¥parent-clk sel-clk spi-clk           žokay            °default         ¾   f        	¾   ,   -           Ó       tpm@0             google,cr50          š            f   ,              °default         ¾   g         B@         spi@11013000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             š    0                ¾       ’                “   -   K   -      /   <         ¥parent-clk sel-clk spi-clk        	   ždisabled          spi@11014000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             š    @                ¾       t                “   -   K   -      /   J         ¥parent-clk sel-clk spi-clk        	   ždisabled          spi@11015000          (    mediatek,mt8186-spi mediatek,mt6765-spi                      +             š    P                ¾       u                “   -   K   -      /   K         ¥parent-clk sel-clk spi-clk        	   ždisabled          clock-controller@11017000             mediatek,mt8186-imp_iic_wrap             š    p                x            Ñ   F      serial@11018000       *    mediatek,mt8186-uart mediatek,mt6577-uart            š    €                ¾       ö                “   )   /         	   ¥baud bus          	   ždisabled          i2c@11019000              mediatek,mt8186-i2c           š    �                    €        ¾      d                “   F   	   /   '      	   ¥main dma            …                        +          	   ždisabled          audio-controller@11210000             mediatek,mt8186-sound            š    !                Ä   “   /   ,   /   6   -      -      -   F   -            -            -      -   e   -      -   h   -   ?   -   @   -   A   -   B   -   C   -   ƒ   -   „   -   …   -   †   -   ‡   -   ,   )     }   ¥aud_infra_clk mtkaif_26m_clk top_mux_audio top_mux_audio_int top_mainpll_d2_d4 top_mux_aud_1 top_apll1_ck top_mux_aud_2 top_apll2_ck top_mux_aud_eng1 top_apll1_d8 top_mux_aud_eng2 top_apll2_d8 top_i2s0_m_sel top_i2s1_m_sel top_i2s2_m_sel top_i2s4_m_sel top_tdm_m_sel top_apll12_div0 top_apll12_div1 top_apll12_div2 top_apll12_div4 top_apll12_div_tdm top_mux_audio_h top_clk26m_clk            ¾       ©               	Ç           #   /        	Û   -        ‚   h         	  ¼audiosys             žokay            Ö   i         Ñ   ¶      usb@11201000          #    mediatek,mt8186-mtu3 mediatek,mtu3            š            -ÿ     >              	  Gmac ippc          (   “   -      /   =   /   3   /      /   >      $   ¥sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¾      /               	í   j           
   B                        +            Í         á        	ò   k               žokay       usb@11200000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           š                      Gmac       (   “   -      /   =   /   3   /      /   >      $   ¥sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¾      &                žokay            
	   R         mmc@11230000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           š    #             Í                   “   -      /      /   U   /            ¥source hclk source_cg crypto            ¾       d               }   -           �               žokay            °default state_uhs           ¾   l        
   m        
           ëÂ          
)         
7         
I         
X         
g         
t         
z         
‚        
“         
¢           
¹   n        
Å   ]      mmc@11240000          (    mediatek,mt8186-mmc mediatek,mt8183-mmc           š    $             É                  “   -      /      /   V         ¥source hclk source_cg           }   -           �   -   o         žokay            °default state_uhs state_eint            ¾   o        
   p        
Ò   q        
Ümsdc sdio_wakeup             f          e          ,   W                        +            
           ëÂ          
ì         
ý                           á         .         ;         
t        
¹   R        
Å   ]        B   r   bluetooth@2           mediatek,mt7921s-bluetooth           š           °default         ¾   s        L   ,   ›            usb@11281000          #    mediatek,mt8186-mtu3 mediatek,mtu3            š    (       -ÿ    (>              	  Gmac ippc          $   “   /   B   /   ?   /   7   )   /   @      $   ¥sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¾      K               	í   t      u           
   B                        +            Í         á        	ò   k  $            žokay       usb@11280000          '    mediatek,mt8186-xhci mediatek,mtk-xhci           š    (                 Gmac       $   “   /   B   /   ?   /   7   )   /   @      $   ¥sys_ck ref_ck mcu_ck dma_ck xhci_ck         ¾      D                žokay            
	   v         t-phy@11c80000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           Í        È              žokay       usb-phy@0            š                “   )         ¥ref         M            Ñ   t      usb-phy@700          š     	          “   )         ¥ref         M            Ñ   u         t-phy@11ca0000        .    mediatek,mt8186-tphy mediatek,generic-tphy-v2                        +           Í        Ê              žokay       usb-phy@0            š                “   )         ¥ref         M           X            Ñ   j         efuse@11cb0000        %    mediatek,mt8186-efuse mediatek,efuse             š    Ë                              +      lvts1-calib@1cc          š  Ì            Ñ   `      lvts2-calib@2f8          š  ø            Ñ   a      calib@550            š  P   P         Ñ   b      gpu-speedbin@59c             š  œ           h                Ñ   x      socinfo-data1@7a0            š               dsi-phy@11cc0000              mediatek,mt8183-mipi-tx          š    Ì                  “   )        x            M            šmipi_tx0_pll             žokay             Ñ   €      clock-controller@13000000             mediatek,mt8186-mfgsys           š                      x            Ñ   w      gpu@13040000          &    mediatek,mt8186-mali arm,mali-bifrost            š            @          “   w          0  ¾                                               
Üjob mmu gpu         
   B      B           mcore0 core1         Û           ‰   x      
  •speed-bin            ±   y        5  O         žokay            €   0         Ñ   š      syscon@14000000           mediatek,mt8186-mmsys syscon             š                      x           :              z          z              Œ   z                   Ñ   1      mutex@14001000            mediatek,mt8186-disp-mutex           š                      “   1            ¾      '               Œ   z                 ¤  ²  ³        
   B         smi@14002000              mediatek,mt8186-smi-common           š                        “   1      1      1      1            ¥apb smi gals0 gals1         
   B            Ñ   {      smi@14003000              mediatek,mt8186-smi-larb             š     0                 “   1      1            ¥apb smi         ¸            É   {        
   B            Ñ   ‚      smi@14004000              mediatek,mt8186-smi-larb             š     @                 “   1      1            ¥apb smi         ¸           É   {        
   B            Ñ   ƒ      ovl@14005000          2    mediatek,mt8186-disp-ovl mediatek,mt8192-disp-ovl            š     P                 “   1           ¾      )               Ö   |           Œ   z     P            
   B         ovl@14006000          8    mediatek,mt8186-disp-ovl-2l mediatek,mt8192-disp-ovl-2l          š     `                 “   1           ¾      *               Ö   |   !        Œ   z     `            
   B         rdma@14007000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          š     p                 “   1           ¾      +               Ö   |   "        Œ   z     p            
   B         color@14009000        6    mediatek,mt8186-disp-color mediatek,mt8173-disp-color            š     �                 “   1   	        ¾      -               Œ   z     €            
   B         dpi@1400a000              mediatek,mt8186-dpi          š                       “   -   ;   1                  ¥pixel engine pll            }   -   ;        �   -   j        ¾      5               
   B         	   ždisabled            °default sleep           ¾   }        
   ~   port       endpoint            r            Ñ   Z            ccorr@1400b000        6    mediatek,mt8186-disp-ccorr mediatek,mt8192-disp-ccorr            š     °                 “   1           ¾      .               Œ   z     °            
   B         aal@1400c000          2    mediatek,mt8186-disp-aal mediatek,mt8183-disp-aal            š     À                 “   1           ¾      0               Œ   z     À            
   B         gamma@1400d000        6    mediatek,mt8186-disp-gamma mediatek,mt8183-disp-gamma            š     Ð                 “   1           ¾      1               Œ   z     Ð            
   B         postmask@1400e000         <    mediatek,mt8186-disp-postmask mediatek,mt8192-disp-postmask          š     à                 “   1           ¾      2               Œ   z     à            
   B         dither@1400f000       8    mediatek,mt8186-disp-dither mediatek,mt8183-disp-dither          š     ð                 “   1           ¾      3               Œ   z     ð            
   B         dsi@14013000              mediatek,mt8186-dsi          š    0                 “   1      1      €         ¥engine digital hs           ¾      7               
   B           ‚   1           	í   €        Ýdphy             žokay       port       endpoint            r   �         Ñ   K            iommu@14016000            mediatek,mt8186-iommu-mm             š    `                 “   1            ¥bclk            ¾      9             8  ç   ‚   ƒ   „   …   †   ‡   ˆ   ‰   Š   ‹   Œ   �   Ž   �        
   B           ö            Ñ   |      rdma@1401f000         4    mediatek,mt8186-disp-rdma mediatek,mt8183-disp-rdma          š    ð                 “   1           ¾      4               Ö   |            Œ   z     ð            
   B         clock-controller@14020000             mediatek,mt8186-wpesys           š                     x            Ñ   7      smi@14023000              mediatek,mt8186-smi-larb             š    0                 “   7      7            ¥apb smi         ¸           É   {        
   B            Ñ   ‡      clock-controller@15020000             mediatek,mt8186-imgsys1          š                     x            Ñ   4      smi@1502e000              mediatek,mt8186-smi-larb             š    à                 “   4      4             ¥apb smi         ¸   	        É   {        
   B            Ñ   ˆ      clock-controller@15820000             mediatek,mt8186-imgsys2          š    ‚                 x            Ñ   �      smi@1582e000              mediatek,mt8186-smi-larb             š    ‚à                 “   4       �             ¥apb smi         ¸           É   {        
   B            Ñ   ‰      video-decoder@16000000            mediatek,mt8186-vcodec-dec           š                       Í                     +           É           @       ÿð          Ö   |   €           ‘   video-codec@16025000              mediatek,mtk-vcodec-core             š    P                ¾      W             `  Ö   |   €   |   �   |   ‚   |   ƒ   |   „   |   …   |   †   |   ‡   |   ˆ   |   ‰   |   Š   |   ‹          “   -   )   2      2       -   U      %   ¥vdec-sel vdec-soc-vdec vdec vdec-top            }   -   )        �   -   U        
   B            smi@1602e000              mediatek,mt8186-smi-larb             š    à                 “   2       2             ¥apb smi         ¸           É   {        
   B            Ñ   …      clock-controller@1602f000             mediatek,mt8186-vdecsys          š    ð                x            Ñ   2      clock-controller@17000000             mediatek,mt8186-vencsys          š                      x            Ñ   6      smi@17010000              mediatek,mt8186-smi-larb             š                      “   6      6            ¥apb smi         ¸           É   {        
   B            Ñ   †      video-encoder@17020000        6    mediatek,mt8186-vcodec-enc mediatek,mt8183-vcodec-enc            š                      ¾       ó             H  Ö   |   à   |   á   |   â   |   ã   |   ä   |   å   |   æ   |   ç   |   è         “   6         	   ¥venc_sel            }   -   $        �   -   U        
   B              ‘      jpeg-encoder@17030000         +    mediatek,mt8186-jpgenc mediatek,mtk-jpgenc           š                     ¾       õ                “   6            ¥jpgenc           Ö   |   é   |   ê   |   ë   |   ì        
   B         clock-controller@1a000000             mediatek,mt8186-camsys           š                      x            Ñ   3      smi@1a001000              mediatek,mt8186-smi-larb             š                      “   3      3             ¥apb smi         ¸           É   {        
   B   
         Ñ   Š      smi@1a002000              mediatek,mt8186-smi-larb             š                       “   3      3            ¥apb smi         ¸           É   {        
   B   
         Ñ   ‹      smi@1a00f000              mediatek,mt8186-smi-larb             š     ð                 “   3      ’             ¥apb smi         ¸           É   {        
   B            Ñ   Œ      smi@1a010000              mediatek,mt8186-smi-larb             š                      “   3       “             ¥apb smi         ¸           É   {        
   B            Ñ   �      clock-controller@1a04f000             mediatek,mt8186-camsys_rawa          š    ð                x            Ñ   ’      clock-controller@1a06f000             mediatek,mt8186-camsys_rawb          š    ð                x            Ñ   “      clock-controller@1b000000             mediatek,mt8186-mdpsys           š                      x            Ñ   ”      smi@1b002000              mediatek,mt8186-smi-larb             š                       “   ”      ”            ¥apb smi         ¸           É   {        
   B            Ñ   „      clock-controller@1c000000             mediatek,mt8186-ipesys           š                      x            Ñ   5      smi@1c00f000              mediatek,mt8186-smi-larb             š     ð                 “   5      5            ¥apb smi         ¸           É   {        
   B   	         Ñ   �      smi@1c10f000              mediatek,mt8186-smi-larb             š    ð                 “   5       5             ¥apb smi         ¸           É   {        
   B   	         Ñ   Ž         thermal-zones      cpu-little0-thermal           è           –        4   •       trips      trip-alert0         D L        P  Ð         Epassive          Ñ   –      trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical             cooling-maps       map0            [   –      H  `   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal           è           –        4   •      trips      trip-alert0         D L        P  Ð         Epassive          Ñ   —      trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical             cooling-maps       map0            [   —      H  `   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal           è           –        4   •      trips      trip-alert0         D L        P  Ð         Epassive          Ñ   ˜      trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical             cooling-maps       map0            [   ˜      H  `   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cam-thermal           è           ú        4   •      trips      trip-alert0         D L        P  Ð         Epassive       trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical                nna-thermal           è           ú        4   •      trips      trip-alert0         D L        P  Ð         Epassive       trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical                adsp-thermal              è           ú        4   •      trips      trip-alert0         D L        P  Ð         Epassive       trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical                gpu-thermal           è           ú        4   •      trips      trip-alert0         D L        P  Ð         Epassive          Ñ   ™      trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical             cooling-maps       map0            [   ™        `   šÿÿÿÿÿÿÿÿ            cpu-big0-thermal              è           d        4   •      trips      trip-alert0         D L        P  Ð         Epassive          Ñ   ›      trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical             cooling-maps       map0            [   ›        `   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal              è           d        4   •      trips      trip-alert0         D L        P  Ð         Epassive          Ñ   œ      trip-alert1         D s        P  Ð         Ehot       trip-crit           D †         P          	   Ecritical             cooling-maps       map0            [   œ        `   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               chosen          oserial0:115200n8          memory@40000000         memory           š    @                 backlight-lcd0            pwm-backlight           {   �     ¡         ‚   ž        €   ,   ˜            �      ÿ        Ÿ  ÿ        ¶  @         Ñ   N      bt-sco            linux,bt-sco            ï          dmic-codec            dmic-codec          ï            Ï           Ü   2      gpio-keys         
    gpio-keys           °default         ¾   Ÿ   pen-insert-switch           	"Pen Insert          F   ,              ì            á                                regulator-pp1800-dpbrdg-dx            regulator-fixed         °default         ¾            F   ,   '            ­pp1800_dpbrdg_dx                     /   ]         Ñ   X      regulator-pp3300-disp-x           regulator-fixed         °default         ¾   ¡        F   ,   ™            ­pp3300_disp_x                     :        /   _         Ñ   M      regulator-pp3300-ldo-z5           regulator-fixed         ­pp3300_ldo_z5            5         :        ¼ 2Z         Ô 2Z         /   ž      regulator-pp3300-s3           regulator-fixed       
  ­pp3300_s3            5         :        /   _         Ñ   R      regulator-pp3300-z2           regulator-fixed       
  ­pp3300_z2            5         :        ¼ 2Z         Ô 2Z         /   ž         Ñ   _      regulator-pp4200-z2           regulator-fixed       
  ­pp4200_z2            5         :        ¼ @@        Ô @@        /   ž         Ñ   9      regulator-pp5000-z2           regulator-fixed       
  ­pp5000_z2            5         :        ¼ LK@        Ô LK@        /   ž         Ñ   »      regulator-ppvar-sys           regulator-fixed       
  ­ppvar_sys            5         :         Ñ   ž      reserved-memory                      +            Í   audio-dma-pool            shared-dma-pool         z               L                V         Ñ   i      memory@61000000           shared-dma-pool          š    a                   V         Ñ   C      memory@60000000           shared-dma-pool          š    `                   V         Ñ   D      memory@50000000           shared-dma-pool          š    P       
           V         Ñ   ?         sound         ,    mediatek,mt8186-mt6366-rt1019-rt5682s-sound      C  °aud_clk_mosi_off aud_clk_mosi_on aud_clk_miso_off aud_clk_miso_on aud_dat_miso_off aud_dat_miso_on aud_dat_mosi_off aud_dat_mosi_on aud_gpio_i2s0_off aud_gpio_i2s0_on aud_gpio_i2s1_off aud_gpio_i2s1_on aud_gpio_i2s2_off aud_gpio_i2s2_on aud_gpio_i2s3_off aud_gpio_i2s3_on aud_gpio_pcm_off aud_gpio_pcm_on aud_gpio_dmic_sec          ¾   ¢        
   £        
Ò   ¤        ]   ¥        g   ¦        q   §        {   ¨        …   ©        �   ª        ™   «        £   ¬        ®   ­        ¹   ®        Ä   ¯        Ï   °        Ú   ±        å   ²        ð   ³        û   ´           µ           ¶      I  &Headphone HPOL Headphone HPOR IN1P Headset Mic Speakers Speaker HDMI1 TX       hs-playback-dai-link            4I2S0            >i2s         Icpu    codec           _   ·             hs-capture-dai-link         4I2S1            >i2s         Icpu    codec           _   ·             spk-share-dai-link          4I2S2            Icpu       spk-hdmi-playback-dai-link          4I2S3            >i2s         Icpu    codec           _   ¸   ¹            speaker-codec             realtek,rt1019p         °default         ¾   º        ï            i   ,   –             Ñ   ¹      regulator-usb-p1-vbus             regulator-fixed         s   ,   ”            ­vbus1           ¼ LK@        Ô LK@                 /   »         Ñ   v      wifi-pwrseq           mmc-pwrseq-simple           °default         ¾   ¼        x   2        L   ,   6            Ñ   r      wifi-wakeup       
    gpio-keys           °default         ¾   ½   wowlan-event            	"Wake on WiFi            F   ,                  �         á            	compatible interrupt-parent #address-cells #size-cells model chassis-type ovl0 ovl-2l0 rdma0 rdma1 i2c0 i2c1 i2c2 i2c3 i2c5 mmc0 mmc1 serial0 i2c4 clocks reg status clock-names operating-points-v2 proc-supply phandle opp-shared opp-hz opp-microvolt required-opps cpu device_type enable-method clock-frequency dynamic-power-coefficient capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache #cooling-cells mediatek,cci entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-div clock-mult clock-output-names opp-supported-hw interrupts dma-ranges #interrupt-cells #redistributor-regions interrupt-controller mediatek,broken-save-restore-fw affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges gpio-line-names pinmux input-enable bias-pull-down input-schmitt-enable bias-disable output-low drive-strength output-high bias-pull-up #power-domain-cells domain-supply mediatek,infracfg mediatek,disable-extrst mediatek,reset-by-toprgu interrupts-extended Avdd-supply mediatek,dmic-mode vsys-ldo1-supply vsys-ldo2-supply vsys-ldo3-supply vsys-vcore-supply vsys-vdram1-supply vsys-vgpu-supply vsys-vmodem-supply vsys-vpa-supply vsys-vproc11-supply vsys-vproc12-supply vsys-vs1-supply vsys-vs2-supply vs1-ldo1-supply vs2-ldo1-supply vs2-ldo2-supply vs2-ldo3-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-allowed-modes regulator-always-on regulator-coupled-with regulator-coupled-max-spread assigned-clocks assigned-clock-parents #mbox-cells pinctrl-names pinctrl-0 firmware-name memory-region mediatek,rpmsg-name mbox-names mboxes power-domains spi-max-frequency #io-channel-cells powerdown-gpios reset-gpios vdd12-supply vdd33-supply remote-endpoint power-supply backlight i2c-scl-internal-delay-ns vcc33-supply no-reset-on-power-off vcc-supply wakeup-source #sound-dai-cells ovdd-supply pwr18-supply extcon link-frequencies svdd-supply AVDD-supply DBVDD-supply LDO1-IN-supply MICVDD-supply realtek,jd-src resets nvmem-cells nvmem-cell-names #thermal-sensor-cells reset-names #pwm-cells mediatek,pad-select google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count label power-role data-role try-power-role google,usb-port-id keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap function-row-physmap cs-gpios mediatek,apmixedsys mediatek,topckgen phys mediatek,syscon-wakeup vbus-supply pinctrl-1 bus-width non-removable cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe no-sd no-sdio cap-mmc-hw-reset hs400-ds-delay mediatek,hs400-ds-dly3 vmmc-supply vqmmc-supply pinctrl-2 interrupt-names cap-sd-highspeed sd-uhs-sdr104 sd-uhs-sdr50 keep-power-in-suspend cap-sdio-irq no-mmc mmc-pwrseq #phy-cells mediatek,discth bits power-domain-names mali-supply mediatek,gce-client-reg mediatek,gce-events mediatek,larb-id mediatek,smi iommus phy-names mediatek,larbs #iommu-cells mediatek,scp polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device stdout-path pwms enable-gpios brightness-levels num-interpolated-steps default-brightness-level num-channels wakeup-delay-ms wakeup-event-action linux,code linux,input-type enable-active-high vin-supply regulator-boot-on alignment no-map pinctrl-3 pinctrl-4 pinctrl-5 pinctrl-6 pinctrl-7 pinctrl-8 pinctrl-9 pinctrl-10 pinctrl-11 pinctrl-12 pinctrl-13 pinctrl-14 pinctrl-15 pinctrl-16 pinctrl-17 pinctrl-18 mediatek,adsp mediatek,platform audio-routing link-name dai-format mediatek,clk-provider sound-dai sdb-gpios gpio post-power-on-delay-ms 