Ðþí R[   8 D   (            W CÌ                             4    mediatek,mt8370-evk mediatek,mt8370 mediatek,mt8188                                  +            7MediaTek Genio-510 EVK     aliases          =/soc/dp-intf@1c015000            F/soc/dp-intf@1c113000            O/soc/dpi@1c112000            T/soc/dsc@1c009000            Y/soc/ethdr@1c114000          `/soc/mailbox@10320000            e/soc/mailbox@10330000            j/soc/merge0@1c014000             q/soc/merge@1c10c000          x/soc/merge@1c10d000          /soc/merge@1c10e000          †/soc/merge@1c10f000          �/soc/merge@1c110000          ”/soc/mutex@1c016000          ›/soc/mutex@1c101000          ¢/soc/padding@1c11d000            «/soc/padding@1c11e000            ´/soc/padding@1c11f000            ½/soc/padding@1c120000            Æ/soc/padding@1c121000            Ï/soc/padding@1c122000            Ø/soc/padding@1c123000            á/soc/padding@1c124000            ê/soc/rdma@1c104000           õ/soc/rdma@1c105000           /soc/rdma@1c106000          /soc/rdma@1c107000          /soc/rdma@1c108000          !/soc/rdma@1c109000          ,/soc/rdma@1c10a000          7/soc/rdma@1c10b000          B/soc/dsi@1c008000           G/soc/ethernet@11021000          Q/soc/i2c@11280000           V/soc/i2c@11e00000           [/soc/i2c@11281000           `/soc/i2c@11282000           e/soc/i2c@11e01000           j/soc/i2c@11ec0000           o/soc/i2c@11ec1000           t/soc/mmc@11230000           y/soc/mmc@11240000           ~/soc/serial@11001100          cpus                         +       cpu@0           †cpu           arm,cortex-a55          ’            –psci            ¤w5”         ´          Ç              ×  €         ä   @        ö   €          €            @        "   €        /           @               T           c   	      cpu@100         †cpu           arm,cortex-a55          ’           –psci            ¤w5”         ´          Ç              ×  €         ä   @        ö   €          €            @        "   €        /           @               T           c   
      cpu@200         †cpu           arm,cortex-a55          ’           –psci            ¤w5”         ´          Ç              ×  €         ä   @        ö   €          €            @        "   €        /           @               T           c         cpu@300         †cpu           arm,cortex-a55          ’           –psci            ¤w5”         ´          Ç              ×  €         ä   @        ö   €          €            @        "   €        /           @               T           c         cpu@600         †cpu           arm,cortex-a78          ’           –psci            ¤ƒ!V         ´           Ç              ×           ä   @        ö                         @        "           /           @              T           c         cpu@700         †cpu           arm,cortex-a78          ’           –psci            ¤ƒ!V         ´           Ç              ×           ä   @        ö                         @        "           /           @              T           c         cpu-map    cluster0       core0           k   	      core1           k   
      core2           k         core3           k         core6           k         core7           k               idle-states         opsci       cpu-off-l             arm,idle-state          |            “        ¤   2        µ   _        Å  D        c         cpu-off-b             arm,idle-state          |            “        ¤   -        µ   Œ        Å  ä        c         cluster-off-l             arm,idle-state          |          “        ¤   7        µ   ›        Å  H        c         cluster-off-b             arm,idle-state          |          “        ¤   2        µ   È        Å  è        c            l2-cache0             cache           Ö           Ù           æ   @        ø           /            â        c         l2-cache1             cache           Ö           Ù           æ   @        ø           /            â        c         l3-cache              cache           Ö           Ù            æ   @        ø            â        c            oscillator-13m            fixed-clock         ð            ¤ Æ]@        ýclk13m          c   8      oscillator-26m            fixed-clock         ð            ¤Œº€        ýclk26m          c   :      oscillator-32k            fixed-clock         ð            ¤  €         ýclk32k        opp-table-gpu             operating-points-v2                  c   ‚   opp-390000000               >í€        " Æ        0   ÿ      opp-431000000               °‰À        " öì        0   ÿ      opp-473000000               1h@        " 	'À        0   ÿ      opp-515000000               ²FÀ        " 	X”        0   ÿ      opp-556000000               !#ã         " 	‰h        0   ÿ      opp-598000000               #¤Á€        " 	º<        0   ÿ      opp-640000000               &%          " 	ë        0   ÿ      opp-670000000               'ïc€        " 
ä        0   ÿ      opp-700000000               )¹'         " 
L¸        0   ÿ      opp-730000000               +‚ê€        " 
}Œ        0   ÿ      opp-760000000               -L®         " 
®`        0   ÿ      opp-790000000               /q€        " 
ß4        0   ÿ      opp-835000000               1ÅÀ        " (r        0   ÿ      opp-880000000               4s¼         " q°        0   ÿ      opp-915000000               6‰ÊÀ        " ÓX        0   �      opp-915000000-5             6‰ÊÀ        " ¢„        0   0      opp-915000000-6             6‰ÊÀ        " q°        0   p      opp-950000000               8ŸÙ€        " 5         0   �      opp-950000000-5             8ŸÙ€        " ÓX        0   0      opp-950000000-6             8ŸÙ€        " q°        0   p         pmu-a55           arm,cortex-a55-pmu                      A                  pmu-a78           arm,cortex-a78-pmu                      A                  psci              arm,psci-1.0            �smc       sound           L           ^okay          6    mediatek,mt8390-mt6359-evk mediatek,mt8188-mt6359-evb            7mt8390-evk          edefault         s         t  }Headphone Headphone L Headphone Headphone R DMIC_INPUT AP DMIC AP DMIC AUDGLB AP DMIC MIC_BIAS_0 AP DMIC MIC_BIAS_2         ‹      dai-link-0        
  ™DL_SRC_BE      codec           £                dai-link-1          ™DMIC_BE    codec           £            dai-link-2          ™ETDM3_OUT_BE       codec           £                   thermal-zones      cpu-little0-thermal         ­  è        »   –        Ñ          trips      trip-alert0         á L        í  Ð        �passive         c         trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø         0  ý   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         ­  è        »   –        Ñ         trips      trip-alert0         á L        í  Ð        �passive         c         trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø         0  ý   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         ­  è        »   –        Ñ         trips      trip-alert0         á L        í  Ð        �passive         c         trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø         0  ý   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little3-thermal         ­  è        »   –        Ñ         trips      trip-alert0         á L        í  Ð        �passive         c         trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø         0  ý   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big0-thermal            ­  è        »   d        Ñ         trips      trip-alert0         á L        í  Ð        �passive         c         trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø           ý   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            ­  è        »   d        Ñ         trips      trip-alert0         á L        í  Ð        �passive         c         trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø           ý   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            apu-thermal         ­  è        »   ú        Ñ          trips      trip-alert0         á L        í  Ð        �passive       trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical                gpu-thermal         ­  è        »   ú        Ñ         trips      trip-alert0         á L        í  Ð        �passive         c          trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø            ý   !ÿÿÿÿÿÿÿÿ            gpu1-thermal            ­  è        »   ú        Ñ         trips      trip-alert0         á L        í  Ð        �passive         c   "      trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical             cooling-maps       map0            ø   "        ý   !ÿÿÿÿÿÿÿÿ            adsp-thermal            ­  è        »   ú        Ñ         trips      trip-alert0         á L        í  Ð        �passive       trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical                vdo-thermal         ­  è        »   ú        Ñ         trips      trip-alert0         á L        í  Ð        �passive       trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical                infra-thermal           ­  è        »   ú        Ñ         trips      trip-alert0         á L        í  Ð        �passive       trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical                cam1-thermal            ­  è        »   ú        Ñ         trips      trip-alert0         á L        í  Ð        �passive       trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical                cam2-thermal            ­  è        »   ú        Ñ         trips      trip-alert0         á L        í  Ð        �passive       trip-alert1         á s        í  Ð        �hot       trip-crit           á †         í          	  �critical                   timer             arm,armv8-timer                   @  A                                             
               ¤ Æ]@      soc                      +             simple-bus                                             performance-controller@11bc10             mediatek,cpufreq-hw          ’     ¼            ½0                          c         interrupt-controller@c000000              arm,gic-v3          1           B                        Y         ’                                    A      	               c      ppi-partitions     interrupt-partition-0           n   	   
              c         interrupt-partition-1           n              c               syscon@10000000            mediatek,mt8188-topckgen syscon         ’                      ð           c   &      syscon@10001000       #    mediatek,mt8188-infracfg-ao syscon          ’                     ð           w           c   '      syscon@10003000           mediatek,mt8188-pericfg syscon          ’     0                ð           c   J      pinctrl@10005000              mediatek,mt8188-pinctrl       `  ’     P            À             á             â             ê              °              0  „iocfg0 iocfg_rm iocfg_lt iocfg_lm iocfg_rt eint          Ž        ž           ª   #           °         Y        A       ë               1           c   #   audio-default-pins          c      pins-cmd-dat          X  ¶  e  f  g  h  i  j  k  l  m  n  r  s  t  u  v  y  z  |  }  ~  €  �         disp-pwm1-pins          c   F   pins-pwm            ¶           dptx-pins      pins-cmd-dat            ¶  .         ½         edp-panel-3v3-en-pins           c   ¿   pins1           ¶            Ê         eth-default-pins            c   V   pins-cc         ¶  ‹  Œ  �  Ž        Ö         pins-mdio           ¶  �  �        Ö            å      pins-power          ¶  ‘   ’          Ê      pins-rxd            ¶  ‡  ˆ  ‰  Š        Ö         pins-txd            ¶  ƒ  „  …  †        Ö            eth-sleep-pins          c   W   pins-cc         ¶  ‹   Œ   �   Ž       pins-mdio           ¶  �   �          ò                pins-rxd            ¶  ‡   ˆ   ‰   Š       pins-txd            ¶  ƒ   „   …   †          hdmi-vreg-pins          c   r   pins-pwr            ¶  2                   hdmi-pins           c   ·   pins-hotplug            ¶  3               pins-cec            ¶  4                pins-ddc            ¶  5  6        Ö   
         i2c0-pins           c   a   pins            ¶  8  7        ½   Ë          è         i2c1-pins           c   t   pins            ¶  :  9        ½   Ë          è         i2c2-pins           c   e   pins            ¶  <  ;        ½   Ë          è         i2c3-pins           c   f   pins            ¶  >  =        ½   Ë          è         i2c4-pins           c   w   pins            ¶  @  ?        ½   Ë          è         i2c5-pins           c   ~   pins            ¶  B  A        ½   Ë          è         i2c6-pins           c      pins            ¶  D  C        ½   Ë          è         gpio-key-pins      pins            ¶  *  +  ,         mmc0-default-pins           c   X   pins-clk            ¶  �        Ö              f      pins-cmd-dat          $  ¶  ¡     Ÿ  ž  š  ™  ˜  —  œ         å        Ö           ½   e      pins-rst            ¶  ›        Ö           ½   e         mmc0-uhs-pins           c   Y   pins-clk            ¶  �        Ö              f      pins-cmd-dat          $  ¶  ¡     Ÿ  ž  š  ™  ˜  —  œ         å        Ö           ½   e      pins-ds         ¶  ¢        Ö              f      pins-rst            ¶  ›        Ö           ½   e         mmc1-default-pins           c   \   pins-clk            ¶  ¤        Ö              f      pins-cmd-dat            ¶  £  ¥  ¦  §  ¨         å        Ö           ½   e      pins-insert         ¶            ½         mmc1-uhs-pins           c   ]   pins-clk            ¶  ¤        Ö              f      pins-cmd-dat            ¶  £  ¥  ¦  §  ¨         å        Ö           ½   e         mmc2-default-pins      pins-clk            ¶  ª        Ö              f      pins-cmd-dat            ¶  ©  «  ¬  ­  ®         å        Ö           ½   e      pins-pcm            ¶  {         mmc2-uhs-pins      pins-clk            ¶  ª        Ö              f      pins-cmd-dat            ¶  ©  «  ¬  ­  ®         å        Ö           ½   e         mmc2-eint-pins     pins-dat1           ¶  ¬          å        ½   e         mmc2-dat1-pins     pins-dat1           ¶  ¬         å        Ö           ½   e         dsi0-vreg-en-pins           c   Á   pins-pwr-en         ¶  o          4         panel-default-pins          c   ¢   pins-rst            ¶            4      pins-en         ¶  -          4         pcie-default-pins           c   q   pins            ¶  /  0  1         ½         rt1715-int-pins    pins_cmd0_dat           ¶            ½         å         spi0-pins      pins-spi            ¶  E  F  G  H                   spi1-pins      pins-spi            ¶  K  L  M  N                   spi2-pins           c   G   pins-spi            ¶  O  P  Q  R                   touch-avdd-pins         c   À   pins-power          ¶  x          Ê         touch-pins          c   d   pins-irq            ¶            å                pins-reset          ¶            Ê         tcpci-int-pins          c   x   pins-int-n          ¶            ½         å         uart0-pins          c   B   pins            ¶              ½         uart1-pins          c   C   pins            ¶  !  "         ½         uart2-pins          c   D   pins            ¶  #  $         ½         usb-default-pins            c   l   pins-iddig          ¶  S          å         ½      pins-valid          ¶  U         å      pins-vbus           ¶  T         Ê         usb1-default-pins           c   L   pins-valid          ¶  X         å      pins-usb-hub-3v3-en         ¶  p          Ê         usb2-default-pins           c   h   pins-iddig          ¶  Y          å         ½         wifi-pwrseq-pins       pins-wifi-enable            ¶            4            syscon@10006000       )    mediatek,mt8188-scpsys syscon simple-mfd            ’     `           power-controller          !    mediatek,mt8188-power-controller                         +            ?           c   ;   power-domain@0          ’                         +            ?           S   $   power-domain@1          ’           a   %      &           hmfg alt         t   '                     +            ?           S   (   power-domain@2          ’           ?          power-domain@3          ’           ?          power-domain@4          ’           ?                power-domain@15         ’         à  a   &      &      &      &   
   &   3   &   4   &   =   &   ¹   &   ¾   )      )      )      )      )      )      )      )      )      )      )      )      )      )      )      )      )      )      )          û  htop cam ccu img venc vdec wpe cfgck cfgxo ss-sram-cmn ss-sram-v0l0 ss-sram-v0l1 ss-sram-ve0 ss-sram-ve1 ss-sram-ifa ss-sram-cam ss-sram-v1l5 ss-sram-v1l6 ss-sram-rdr ss-iommu ss-imgcam ss-emi ss-subcmn-rdr ss-rsi ss-cmn-l4 ss-vdec1 ss-wpe ss-cvdo-ve1          t   '                     +            ?      power-domain@16         ’         H  a   &   »   &   À   *      *      *      *      *      *      *         A  hcfgck cfgxo ss-gals ss-cmn ss-emi ss-iommu ss-larb ss-rsi ss-bus            t   '                     +            ?      power-domain@20         ’         0  a   &   º   &   ¿   +      +      +      +         8  hcfgck cfgxo ss-vpp1-g5 ss-vpp1-g6 ss-vpp1-l5 ss-vpp1-l6         t   '        ?          power-domain@22         ’           a   ,            hss-vdec1-soc-l1         t   '                     +            ?      power-domain@23         ’           a   -            hss-vdec2-l1         t   '        ?             power-domain@29         ’            a   &      &      &   	   &   ½        hcam ccu bus cfgck           t   '                     +            ?      power-domain@30         ’         (  a   .       .      .      .      .         6  hss-cam-l13 ss-cam-l14 ss-cam-mm0 ss-cam-mm1 ss-camsys           t   '                     +            ?      power-domain@32         ’            a   .      /       0          $  hss-camb-sub ss-camb-raw ss-camb-yuv         ?          power-domain@31         ’           a   .      1       2          $  hss-cama-sub ss-cama-raw ss-cama-yuv         ?                power-domain@17         ’         (  a   &   ¼   &   Á   3       3      3         &  hcfgck cfgxo ss-larb2 ss-larb3 ss-gals           t   '                     +            ?      power-domain@9          ’   	        a   &   @   &   ?      	  hbus hdcp            t   '        ?          power-domain@18         ’           t   '        ?          power-domain@19         ’           t   '        ?             power-domain@24         ’            a   4       4      4      4         0  hss-ve1-larb ss-ve1-core ss-ve1-gals ss-ve1-sram         t   '        ?          power-domain@21         ’           a   5      5           hss-wpe-l7 ss-wpe-l7pce          t   '        ?                power-domain@5          ’           t   '        a   6           hss-pextp-fmem           ?          power-domain@7          ’           a   &   0   &   1        hseninf0 seninf1         ?          power-domain@6          ’           ?          power-domain@10         ’   
        a   &   E   &   D      	  hbus main            t   '                     +            ?      power-domain@11         ’           t   '                     +            ?      power-domain@14         ’           a   &   F        hasm         t   '        ?          power-domain@13         ’           a   &   S   &      7            ha1sys intbus adspck         t   '        ?          power-domain@12         ’           t   '        ?                power-domain@8          ’           a   6         	  hethermac            t   '        ?                watchdog@10007000             mediatek,mt8188-wdt         ’     p                 †        w           c   <      syscon@1000c000       "    mediatek,mt8188-apmixedsys syscon           ’     À                ð           c   %      timer@10017000        ,    mediatek,mt8188-timer mediatek,mt6765-timer         ’    p                A      	               a   8      pwrap@10024000        3    mediatek,mt8188-pwrap mediatek,mt8195-pwrap syscon          ’    @                „pwrap           A       ó               a   '      '          	  hspi wrap       pmic              mediatek,mt6359          Y        1           ž               #        A   Þ           c      adc           mediatek,mt6359-auxadc          ¯         audio-codec           mediatek,mt6359-codec           Á           Õ         regulators            mediatek,mt6359-regulator      buck_vs1            évs1         ø 5          !‘À        (             D      buck_vgpu11       
  édvdd_core           ø €         7        X  ˆ        (   È        m                   D      buck_vmodem         évmodem          ø €         Èà        X  *        (   È      buck_vpu          
  édvdd_adsp           ø €         7        X  ˆ        (   È        m                   D      buck_vcore          édvdd_proc_l         ø €         Ö         X  ˆ        (   È        m                   D      buck_vs2            évs2         ø 5          j         (             D      buck_vpa            évpa_pmu         ø ¡          /M`        (  ,        c   ^      buck_vproc2         évgpu            ø dp         5         X  L        (   È        m                  …   (        œ  j        c   $      buck_vproc1         évproc1          ø €         7        X  L        (   È        m                buck_vcore_sshub            évcore_sshub         ø €         7      buck_vgpu11_sshub           évgpu11_sshub            ø €         7      ldo_vaud18          évaud18          ø w@         w@        (   ð      ldo_vsim1         
  évsim1_pmu           ø ð          /M`        (  à        c   _      ldo_vibr            évibr            ø O€         2Z       ldo_vrf12           éva12_abb2_pmu           ø Èà         Ö          D      ldo_vusb            évusb            ø -ÆÀ         -ÆÀ        (  À         D        c   K      ldo_vsram_proc2         évsram_proc2         ø ¡          ½¶        X  L        (   ð         D      ldo_vio18           évio18           ø ð          ýà        (  À         D        c   c      ldo_vcamio          évcamio          ø ð          ýà      ldo_vcn18         
  évcn18_pmu           ø w@         w@        (   ð         D      ldo_vfe28           évfe28           ø *¹€         *¹€        (   x      ldo_vcn13           évcn13           ø »          Ö       ldo_vcn33_1_bt          évcn33_1_bt          ø *¹€         5gà        c   u      ldo_vcn33_1_wifi            évcn33_1_wifi            ø *¹€         5gà      ldo_vaux18          évaux18          ø w@         w@        (   ð         D      ldo_vsram_others          
  évsram_gpu           ø q°         5         X  ˆ        (   ð        …   $        œ  j        c   (      ldo_vefuse          évefuse          ø ð          „€      ldo_vxo22           évxo22           ø w@         !‘À         D      ldo_vrfck           évrfck           ø ã`         ð       ldo_vrfck_1         évrfck_1         ø ëÀ         j       ldo_vbif28          évbif28          ø *¹€         *¹€        (   ð      ldo_vio28           évio28           ø *¹€         2Z          D      ldo_vemc            évemc            ø ,@          2Z       ldo_vemc_1          évemc_1          ø &%          2Z         c   Z      ldo_vcn33_2_bt          évcn33_2_pmu         ø *¹€         5gà         D      ldo_vcn33_2_wifi            évcn33_2_wifi            ø *¹€         5gà      ldo_va12            éva12            ø O€         Ö          D      ldo_va09            éva09            ø 5          O€      ldo_vrf18           évrf18           ø ð          žP      ldo_vsram_md          	  évsram_md            ø ¡          ½¶        X  *        (   ð      ldo_vufs            évufs18_pmu          ø ð          ýà         D        c   [      ldo_vm18            évm18            ø ð          ýà         D      ldo_vbbck           évbbck           ø Èà         O€         D      ldo_vsram_proc1         évsram_proc1         ø ¡          ½¶        X  L        (   ð         D      ldo_vsim2           évsim2           ø ð          /M`      ldo_vsram_others_sshub          évsram_others_sshub          ø ¡          ½¶         rtc           mediatek,mt6358-rtc       keys              mediatek,mt6359-keys            ¹           Ò       power-key           å   t         ô      home            å   f               spmi@10027000         *    mediatek,mt8188-spmi mediatek,mt8195-spmi            ’    p            �                „pmif spmimst               &   8           &   ¬        a   '      '       &   8      (  hpmif_sys_ck pmif_tmr_ck spmimst_clk_mux       iommu@10315000            mediatek,mt8188-iommu-infra         ’    1P                A                     )           c   o      mailbox@10320000              mediatek,mt8188-gce         ’    2        @         A       â               6           a   '           c   ƒ      mailbox@10330000              mediatek,mt8188-gce         ’    3        @         A       ä               6           a   '           c   …      scp@10720000              mediatek,mt8188-scp-dual            ’    r                 „cfg                      +                   P             ^okay       scp@0             mediatek,scp-core           ’               „sram            A      Î               ^okay            B   9        c   †      scp@d0000             mediatek,scp-core           ’    ð         „sram            A      Ï             	  ^disabled             audio-controller@10b10000             mediatek,mt8188-afe         ’    ±                    &   S           &   „      ´  a   :   %   	   %   
   &   ³   &   ´   &   µ   &   ¶   &   ¸   &   S   &      &       &   E   &   Q   &   M   &   N   &   O   &   P   7       &   „   &   †   &   ·   &   T   &   R      ÿ  hclk26m apll1 apll2 apll12_div0 apll12_div1 apll12_div2 apll12_div3 apll12_div9 top_a1sys_hp top_aud_intbus top_audio_h top_audio_local_bus top_dptx top_i2so1 top_i2so2 top_i2si1 top_i2si2 adsp_audio_26m apll1_d4 apll2_d4 apll12_div4 top_a2sys top_aud_iec          A      6               P   ;           ^   <         	  eaudiosys            t   '        q   &        ^okay            B   =        c         adsp@10b80000             mediatek,mt8188-dsp       @  ’    ¸              Ð             ¸°            ¸ð                „cfg sram sec bus               &   D        a   &   D   &   E        haudiodsp adsp_bus           ƒ   >   ?        Šrx tx           P   ;           ^okay            B   @   A        c         mailbox@10b86100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         ’    ¸a                A      Þ               6            c   >      mailbox@10b87100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         ’    ¸q                A      ß               6            c   ?      clock-controller@10b91100             mediatek,mt8188-adsp-audio26m           ’    ¹                ð           c   7      serial@11001100       *    mediatek,mt8188-uart mediatek,mt6577-uart           ’                     A       �               a   :   '         	  hbaud bus            ^okay            s   B        edefault       serial@11001200       *    mediatek,mt8188-uart mediatek,mt6577-uart           ’                     A       Ž               a   :   '         	  hbaud bus            ^okay            s   C        edefault       serial@11001300       *    mediatek,mt8188-uart mediatek,mt6577-uart           ’                     A       �               a   :   '         	  hbaud bus            ^okay            s   D        edefault       serial@11001400       *    mediatek,mt8188-uart mediatek,mt6577-uart           ’                     A      Ó               a   :   '         	  hbaud bus          	  ^disabled          adc@11002000          .    mediatek,mt8188-auxadc mediatek,mt8173-auxadc           ’                      a   '           hmain            ¯         	  ^disabled          syscon@11003000       "    mediatek,mt8188-pericfg-ao syscon           ’     0                ð           c   6      spi@1100a000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ’                      A       ¿               a   &   y   &      '           hparent-clk sel-clk spi-clk        	  ^disabled          thermal-sensor@1100b000           mediatek,mt8188-lvts-ap         ’     °                A       È               a   '           ^   '           •   E        ¡lvts-calib-data-1           ²           c         pwm@1100e000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           ’     à                a   &   '   '   /        hmain mm         A       Ë               È         	  ^disabled          pwm@1100f000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           ’     ð                a   &   (   '   F        hmain mm         A                     È           ^okay            edefault         s   F        c   ¼      spi@11010000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ’                     A       À               a   &   y   &      '   2        hparent-clk sel-clk spi-clk        	  ^disabled          spi@11012000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ’                     A       Á               a   &   y   &      '   3        hparent-clk sel-clk spi-clk          ^okay            s   G        edefault         Ó          spi@11013000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ’    0                A       Â               a   &   y   &      '   4        hparent-clk sel-clk spi-clk        	  ^disabled          spi@11018000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ’    €                A       Ã               a   &   y   &      '   8        hparent-clk sel-clk spi-clk        	  ^disabled          spi@11019000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ’    �                A       Ä               a   &   y   &      '   9        hparent-clk sel-clk spi-clk        	  ^disabled          usb@11201000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ’            -ÿ     >              	  „mac ippc                                 ?                      +           A       €                  &   )           &   v        a   6   	   &   Å   6   
        hsys_ck ref_ck mcu_ck            ç   H      I            ô        ì   J  h           ^okay            otg                     K        s   L        edefault    usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ’                       „mac         A       �                  &   *           &   v        a   6   
        hsys_ck          ^okay               K                     +       hub@1             usb451,8025         ’           )   M        2   #               >   N        c   O      hub@2             usb451,8027         ’           )   O        2   #               >   N        c   M      port       endpoint            I   P        c   {            port       endpoint            I   Q        c   z            ethernet@11021000         ;    mediatek,mt8188-gmac mediatek,mt8195-gmac snps,dwmac-5.10a          ’           @         A      Ì               Ymacirq        0  a   6       6      &   A   &   B   &   C   6         .  haxi apb mac_main ptp_ref rmii_internal mac_cg              &   A   &   B   &   C           &       &   ¢   &   £        P   ;           i   '        z   R        Š   S        �   T        °           »           Æ            ^okay          	  Órgmii-id            Ü   U        edefault sleep           s   V        ç   W         ñ        	   #   “            	      '  '   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-id001c.c916            ’           c   U         stmmac-axi-config           	'                                 	1           	A           c   R      rx-queues-config            	Q            	g        c   S   queue0           	x        	‹          queue1           	x        	‹          queue2           	x        	‹          queue3           	x        	‹             tx-queues-config            	£            	¹        c   T   queue0           	x        	Ë            	Ù         queue1           	x        	Ë           	Ù         queue2           	x        	Ë           	Ù         queue3           	x        	Ë           	Ù               mmc@11230000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ’    #             õ                 	å          ƒ                a   &      '      '      '   M      !  hsource hclk source_cg crypto_clk            ^okay            edefault state_uhs           s   X        ç   Y        	ù           
ëÂ          
         
#         
2         
A         
N         
_         
g        
m H        
|   Z        
ˆ   [         
•      mmc@11240000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ’    $             ë                 	å          ‡               a   &      '      '   $        hsource hclk source_cg              &              &   �        ^okay            edefault state_uhs           s   \        ç   ]        	ù           
ëÂ          
£         
´         
Á         
Ï         
_        
Ö   #              
|   ^        
ˆ   _      mmc@11250000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ’    %             æ                 	å          ˆ               a   &      '      '   A        hsource hclk source_cg              &              &   �      	  ^disabled          thermal-sensor@11278000           mediatek,mt8188-lvts-mcu            ’    '€                A       Ê               a   '           ^   '            •   E        ¡lvts-calib-data-1           ²           c         i2c@11280000              mediatek,mt8188-i2c          ’    (             " €       €        A       —               
ß           a   `       '   7      	  hmain dma                         +            ^okay            edefault         s   a        ¤ €   touchscreen@5d            goodix,gt9271           ’   ]            #        	å   #              
é   #               2   #               
ó   b           c        edefault         s   d         i2c@11281000              mediatek,mt8188-i2c          ’    (            "€       €        A       ’               
ß           a   `      '   7      	  hmain dma                         +            ^okay            edefault         s   e        ¤ €      i2c@11282000              mediatek,mt8188-i2c          ’    (             "€       €        A       “               
ß           a   `      '   7      	  hmain dma                         +            ^okay            edefault         s   f        ¤ €      clock-controller@11283000             mediatek,mt8188-imp-iic-wrap-c          ’    (0                ð           c   `      usb@112a1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ’    *       -ÿ    *>              	  „mac ippc                        *        ?                      +           A                        &   -           &   v        a   6      &   Ë   6           hsys_ck ref_ck mcu_ck            ç   g            ô        ì   J  p           ^okay            otg         high-speed          host                        K        edefault         s   h   usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ’                       „mac         A                        &   .           &   v        a   6           hsys_ck          ^okay               K        5   i      connector         %    gpio-usb-b-connector usb-b-connector            �micro           A   #   Y           5   j         usb@112b1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ’    +       -ÿ    +>              	  „mac ippc                        +        ?                      +           A                        &   ,           &   v        a   6      &   É   6           hsys_ck ref_ck mcu_ck            ç   k            ô        ì   J  `           ^okay            otg         high-speed                      K        s   l        edefault    usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ’                       „mac         A                        &   +           &   v        a   6           hsys_ck          ^okay          connector         %    gpio-usb-b-connector usb-b-connector            �micro           A   #   S            5   m         pcie@112f0000         *    mediatek,mt8188-pcie mediatek,mt8192-pcie           ’    /                	  „pcie-mac            ‚                                  J       ÿ        †pci         T                         +         0  a   '   L   '   #   '   &   '   +   '   C   6         /  hpl_250m tl_26m tl_96m tl_32k peri_26m peri_mem          1           A                   `  e                  n                      n                     n                     n           s                       †       o      ÿÿ        �            ç   p         	  Ÿpcie-phy            P   ;           ^   <           emac         ^okay            edefault         s   q   interrupt-controller                         1            Y        c   n         spi@1132c000          (    mediatek,mt8188-nor mediatek,mt8186-nor         ’    2À                a   &   X   6      6           hspi sf axi             &   X        A      9                            +          	  ^disabled          t-phy@11c20700        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                   Â                         +           P   ;           ^okay       pcie-phy@0          ’               a   &   Ä        href         ©           c   p         hdmi-phy@11d5f000         2    mediatek,mt8188-hdmi-phy mediatek,mt8195-hdmi-phy           ’    Õð                a   '           hpll_ref         ýhdmi_txpll          ð            ©            ´   
        Ã           ^okay            edefault         s   r        c   ¶      dsi-phy@11c80000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         ’    È                 a   :        ýmipi_tx0_pll            ð            ©            ^okay            c   ž      dsi-phy@11c90000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         ’    É                 a   :        ýmipi_tx0_pll            ð            ©          	  ^disabled            c   ¦      i2c@11e00000              mediatek,mt8188-i2c          ’    à             "        €        A       ˜               
ß           a   s       '   7      	  hmain dma                         +            ^okay            edefault         s   t        ¤ €   typec-mux@48              ite,it5205          ’   H         Õ         á        ô   u   port       endpoint            I   v        c   |               i2c@11e01000              mediatek,mt8188-i2c          ’    à            "€       €        A       ”               
ß           a   s      '   7      	  hmain dma                         +            ^okay            edefault         s   w        ¤ B@   rt1715@4e             richtek,rt1715          ’   N        	å   #              edefault         s   x        5   y   connector             usb-c-connector         ÿUSB-C           dual             ˜–€        !dual            ,sink            ;         G"�È        Q"�È   altmodes       displayport         ]ÿ          b G         ports                        +       port@0          ’       endpoint            I   z        c   Q         port@1          ’      endpoint            I   {        c   P         port@2          ’      endpoint            I   |        c   v                     clock-controller@11e02000             mediatek,mt8188-imp-iic-wrap-w          ’    à                 ð           c   s      t-phy@11e30000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +                   ã             ^okay       usb-phy@0           ’               a   &   Ê   %           href da_ref          ©           c   k         t-phy@11e40000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +                   ä             ^okay       usb-phy@0           ’               a   &   Æ   %           href da_ref          ©           c   H      usb-phy@700         ’              a   %      :        href da_ref          ©           c   I         t-phy@11e80000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +                   è             ^okay       usb-phy@0           ’               a   &   Ì   %           href da_ref          ©           c   g         i2c@11ec0000              mediatek,mt8188-i2c          ’    ì             "€       €        A       •               
ß           a   }       '   7      	  hmain dma                         +            ^okay            edefault         s   ~        ¤ €      i2c@11ec1000              mediatek,mt8188-i2c          ’    ì            "        €        A       –               
ß           a   }      '   7      	  hmain dma                         +            ^okay            edefault         s           ¤ €      clock-controller@11ec2000              mediatek,mt8188-imp-iic-wrap-en         ’    ì                 ð           c   }      efuse@11f20000        ,    mediatek,mt8188-efuse mediatek,mt8186-efuse         ’    ò                              +      dp-calib@1a0            ’              c   º      lvts1-calib@1ac         ’  ¬   @        c   E      gpu-speedbin@581            ’  �           f               c   �      socinfo-data1@7a0           ’            socinfo-data2@7e0           ’  à            gpu@13000000          )    mediatek,mt8370-mali arm,mali-valhall-jm            ’             @         a   €          0  A                   ~             }               Yjob mmu gpu         •   �      
  ¡speed-bin           k   ‚        P   ;      ;           core0 core1         T           ^okay            ’   $        c   !      clock-controller@13fbf000             mediatek,mt8188-mfgcfg          ’    ûð                ð           c   €      syscon@14000000           mediatek,mt8188-vppsys0 syscon          ’                      ð           c   )      dma-controller@14001000           mediatek,mt8188-mdp3-rdma           ’                     ž           a   )         <  ƒ   ƒ         ƒ         ƒ         ƒ         ƒ              ©   „   €        P   ;           °   …                  È              Ü   †      display@14002000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ’                      a   )            °   …                 display@14004000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ’     @                a   )   "        °   …      @          display@14005000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ’     P                A      F               a   )   
        P   ;           °   …      P          display@14006000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ’     `                a   )           °   …      `            È    %      display@14007000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ’     p                a   )   #        °   …      p          display@14008000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ’     €                A      I               a   )   $        P   ;           °   …      €          display@14009000          2    mediatek,mt8188-mdp3-ovl mediatek,mt8195-mdp3-ovl           ’     �                A      J               a   )   %        P   ;           °   …      �            ©   „   ‚      display@1400a000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ’                      a   )           P   ;           °   …                 display@1400b000          2    mediatek,mt8188-mdp3-tcc mediatek,mt8195-mdp3-tcc           ’     °                a   )           °   …      °          display@1400c000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ’     À                ž           a   )           ©   „   ƒ        P   ;           °   …      À            È    +      mutex@1400f000            mediatek,mt8188-vpp-mutex           ’     ð                A      P               a   )           P   ;           °   …      ð          smi@14012000              mediatek,mt8188-smi-common-vpp          ’                     a   )      )           hapb smi         P   ;           c   ‡      smi@14013000              mediatek,mt8188-smi-larb            ’    0                a   )      )           hapb smi         P   ;           é           ú   ‡        c   Š      iommu@14018000            mediatek,mt8188-iommu-vpp           ’    €       P         a   )           hbclk            A      R               P   ;           )              ˆ   ‰   Š   ‹   Œ   �        c   „      dma-controller@14f09000           mediatek,mt8188-mdp3-rdma           ’    ð�                ž           a   +   
        ©   Ž   ¤        P   ;           °   …   	  �            È  …  ©      dma-controller@14f0a000           mediatek,mt8188-mdp3-rdma           ’    ð                 ž           a   +           ©   „   À        P   ;           °   …   	               È  †  ª      display@14f0c000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ’    ðÀ                a   +           °   …   	  À          display@14f0d000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ’    ðÐ                a   +           °   …   	  Ð          display@14f0f000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ’    ðð                a   +   "        °   …   	  ð          display@14f10000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ’    ñ                 a   +   $        °   …   
             display@14f12000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ’    ñ                 A      j               a   +   #        P   ;           °   …   
             display@14f13000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ’    ñ0                A      k               a   +   %        P   ;           °   …   
  0          display@14f15000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ’    ñP                a   +           °   …   
  P            È  ‘  °      display@14f16000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ’    ñ`                a   +           °   …   
  `            È  ’  ±      display@14f18000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ’    ñ€                a   +           °   …   
  €          display@14f19000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ’    ñ�                a   +           °   …   
  �          display@14f1a000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           ’    ñ                 a   +           P   ;           °   …   
             display@14f1b000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           ’    ñ°                a   +           P   ;           °   …   
  °          display@14f1d000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ’    ñÐ                A      u               a   +           P   ;           °   …   
  Ð          display@14f1e000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ’    ñà                A      v               a   +           P   ;           °   …   
  à          display@14f21000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ’    ò                a   +           P   ;           °   …               display@14f22000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ’    ò                 a   +           P   ;           °   …                display@14f24000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ’    ò@                ž           a   +           ©   Ž   ¦        P   ;           °   …     @            È     ¬      display@14f25000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ’    òP                ž           a   +           ©   „   Â        P   ;           °   …     P            È  ¡  ­      clock-controller@14e00000             mediatek,mt8188-wpesys          ’    à                 ð           c   5      clock-controller@14e02000             mediatek,mt8188-wpesys-vpp0         ’    à                 ð         smi@14e04000              mediatek,mt8188-smi-larb            ’    à@                a   5      5           hapb smi         P   ;           é           ú   ‡        c   Œ      syscon@14f00000           mediatek,mt8188-vppsys1 syscon          ’    ð                 ð           c   +      mutex@14f01000            mediatek,mt8188-vpp-mutex           ’    ð                A      {               a   +   &        P   ;           °   …   	            smi@14f02000              mediatek,mt8188-smi-larb            ’    ð                 a   +      +           hapb smi         P   ;           é           ú   �        c   ¬      smi@14f03000              mediatek,mt8188-smi-larb            ’    ð0                a   +      +           hapb smi         P   ;           é           ú   ‡        c   ‹      clock-controller@15000000             mediatek,mt8188-imgsys          ’                      ð         clock-controller@15110000              mediatek,mt8188-imgsys1-dip-top         ’                     ð           w         clock-controller@15130000             mediatek,mt8188-imgsys1-dip-nr          ’                     ð           w         clock-controller@15220000             mediatek,mt8188-imgsys-wpe1         ’    "                 ð           w         clock-controller@15330000             mediatek,mt8188-ipesys          ’    3                 ð           w         clock-controller@15520000             mediatek,mt8188-imgsys-wpe2         ’    R                 ð           w         clock-controller@15620000             mediatek,mt8188-imgsys-wpe3         ’    b                 ð           w         clock-controller@16000000             mediatek,mt8188-camsys          ’                      ð           c   .      clock-controller@1604f000             mediatek,mt8188-camsys-rawa         ’    ð                ð           w           c   1      clock-controller@1606f000             mediatek,mt8188-camsys-yuva         ’    ð                ð           w           c   2      clock-controller@1608f000             mediatek,mt8188-camsys-rawb         ’    ð                ð           w           c   /      clock-controller@160af000             mediatek,mt8188-camsys-yuvb         ’    
ð                ð           w           c   0      clock-controller@17200000             mediatek,mt8188-ccusys          ’                      ð         video-decoder@18000000            mediatek,mt8188-vcodec-dec           ’                   @                                    `         ©   „  æ                     +           Ü   †   video-codec@10000             mediatek,mtk-vcodec-lat         ’                         &   4           &   x         a   &   4   ,      ,      &   x        hsel vdec lat top            A      Ä             H  ©   „  à   „  á   „  â   „  ã   „  ä   „  å   „  æ   „  ç   „  è        P   ;         video-codec@25000             mediatek,mtk-vcodec-core            ’     P                   &   4           &   x         a   &   4   -      -      &   x        hsel vdec lat top            A      Ã             X  ©   Ž  À   Ž  Á   Ž  Â   Ž  Ã   Ž  Ä   Ž  Å   Ž  Æ   Ž  Ç   Ž  È   Ž  É   Ž  Ê        P   ;            smi@1800d000              mediatek,mt8188-smi-larb            ’     Ð                a   ,       ,            hapb smi         P   ;           é           ú   ‡        c   �      clock-controller@1800f000             mediatek,mt8188-vdecsys-soc         ’     ð                ð           c   ,      smi@1802e000              mediatek,mt8188-smi-larb            ’    à                a   -       -            hapb smi         P   ;           é           ú   �        c   ®      clock-controller@1802f000             mediatek,mt8188-vdecsys         ’    ð                ð           c   -      clock-controller@1a000000             mediatek,mt8188-vencsys         ’                      ð           c   4      smi@1a010000              mediatek,mt8188-smi-larb            ’                     a   4      4           hapb smi         P   ;           é           ú   �        c   ­      video-encoder@1a020000            mediatek,mt8188-vcodec-enc          ’                                  +              &   3           &   p        a   4         	  hvenc_sel            A      a             X  ©   Ž      Ž  ¡   Ž  ¢   Ž  £   Ž  ¤   Ž  ¶   Ž  ·   Ž  ¸   Ž  ¹   Ž  ª   Ž  º        P   ;           Ü   †      jpeg-encoder@1a030000         +    mediatek,mt8188-jpgenc mediatek,mtk-jpgenc          ’                     a   4           hjpgenc          A      b                ©   Ž  §   Ž  ¨   Ž  ©   Ž  ¬        P   ;         jpeg-decoder@1a040000         .    mediatek,mt8188-jpgdec mediatek,mt2701-jpgdec           ’                     a   4       4           hjpgdec-smi jpgdec           A      c             0  ©   Ž  ­   Ž  ®   Ž  ²   Ž  ³   Ž  ´   Ž  µ        P   ;         ovl@1c000000          2    mediatek,mt8188-disp-ovl mediatek,mt8195-disp-ovl           ’                      a   *            A      |               ©   Ž           P   ;           °   ƒ             ports                        +       port@0          ’       endpoint            I   �        c   ©         port@1          ’      endpoint            I   ‘        c   ’               rdma@1c002000         4    mediatek,mt8188-disp-rdma mediatek,mt8195-disp-rdma         ’                      a   *           A      ~               ©   „            P   ;           °   ƒ             ports                        +       port@0          ’       endpoint            I   ’        c   ‘         port@1          ’      endpoint            I   “        c   ”               color@1c003000        6    mediatek,mt8188-disp-color mediatek,mt8173-disp-color           ’     0                a   *           A                     P   ;           °   ƒ     0       ports                        +       port@0          ’       endpoint            I   ”        c   “         port@1          ’      endpoint            I   •        c   –               ccorr@1c004000        6    mediatek,mt8188-disp-ccorr mediatek,mt8192-disp-ccorr           ’     @                a   *           A      €               P   ;           °   ƒ     @       ports                        +       port@0          ’       endpoint            I   –        c   •         port@1          ’      endpoint            I   —        c   ˜               aal@1c005000          2    mediatek,mt8188-disp-aal mediatek,mt8183-disp-aal           ’     P                a   *           A      �               P   ;           °   ƒ     P       ports                        +       port@0          ’       endpoint            I   ˜        c   —         port@1          ’      endpoint            I   ™        c   š               gamma@1c006000        6    mediatek,mt8188-disp-gamma mediatek,mt8195-disp-gamma           ’     `                a   *           A      ‚               P   ;           °   ƒ     `       ports                        +       port@0          ’       endpoint            I   š        c   ™         port@1          ’      endpoint            I   ›        c   §               dither@1c007000       8    mediatek,mt8188-disp-dither mediatek,mt8183-disp-dither         ’     p                a   *           A      ƒ               P   ;           °   ƒ     p       ports                        +       port@0          ’       endpoint            I   œ        c   ¨         port@1          ’      endpoint            I   �        c   ¤               dsi@1c008000              mediatek,mt8188-dsi         ’     €                a   *      *      ž        hengine digital hs           A      „               ç   ž        Ÿdphy            P   ;           ^   *           ^okay                         +       panel@0       #    startek,kd070fhfid078 himax,hx8279          ’               Ÿ            #   -            2   #               -            >   ¡        edefault         s   ¢   port       endpoint            I   £        c   ¥            ports                        +       port@0          ’       endpoint            I   ¤        c   �         port@1          ’      endpoint            I   ¥        c   £               dsc@1c009000          2    mediatek,mt8188-disp-dsc mediatek,mt8195-disp-dsc           ’     �                a   *   
        A      …               P   ;           °   ƒ     �          dsi@1c012000              mediatek,mt8188-dsi         ’                     a   *   	   *      ¦        hengine digital hs           A      Ž               ç   ¦        Ÿdphy            P   ;           ^   *   	      	  ^disabled          merge0@1c014000       6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ’    @                a   *      3           hmerge merge_async           A      �               P   ;           °   ƒ     @          dp-intf@1c015000              mediatek,mt8188-dp-intf         ’    P                a   *       *      %           hpixel engine pll            A      ‘               P   ;         	  ^disabled          mutex@1c016000            mediatek,mt8188-disp-mutex          ’    `                a   *           A      ’               P   ;           °   ƒ     `            È  >      postmask@1c01a000         <    mediatek,mt8188-disp-postmask mediatek,mt8192-disp-postmask         ’                     a   *           A      •               P   ;           °   ƒ             ports                        +       port@0          ’       endpoint            I   §        c   ›         port@1          ’      endpoint            I   ¨        c   œ               syscon@1c01d000           mediatek,mt8188-vdosys0 syscon          ’    Ð                ð           w           ƒ   ƒ               °   ƒ     Ð            c   *   port                         +       endpoint@0          ’            I   ©        c   �            smi@1c022000              mediatek,mt8188-smi-larb            ’                     a   *      *           hapb smi         P   ;           é            ú   �        c   ª      smi@1c023000              mediatek,mt8188-smi-larb            ’    0                a   *      *           hapb smi         P   ;           é           ú   ‡        c   ˆ      smi@1c024000              mediatek,mt8188-smi-common-vdo          ’    @                a   *      *           hapb smi         P   ;           c   �      iommu@1c028000            mediatek,mt8188-iommu-vdo           ’    €       P         a   *           hbclk            A      ¡               P   ;           )              ª   «   ¬   ­   ®        c   Ž      syscon@1c100000           mediatek,mt8188-vdosys1 syscon          ’                     ð           w           ƒ   ƒ              °   ƒ                  c   3   port                         +       endpoint@1          ’           I   ¯        c   ´            mutex@1c101000            mediatek,mt8188-disp-mutex          ’                    a   3           A      î               P   ;           °   ƒ                 È  Å      smi@1c102000              mediatek,mt8188-smi-larb            ’                     a   3       3            hapb smi         P   ;           é           ú   �        c   «      smi@1c103000              mediatek,mt8188-smi-larb            ’    0                a   3      3           hapb smi         P   ;           é           ú   ‡        c   ‰      rdma@1c104000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’    @                a   3           A      ï               ©   Ž   @        P   ;           ž           °   ƒ     @          rdma@1c105000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’    P                a   3           A      ð               ©   „   `        P   ;           ž           °   ƒ     P          rdma@1c106000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’    `                a   3           A      ñ               ©   Ž   A        P   ;           ž           °   ƒ     `          rdma@1c107000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’    p                a   3           A      ò               ©   „   a        P   ;           ž           °   ƒ     p          rdma@1c108000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’    €                a   3           A      ó               ©   Ž   B        P   ;           ž           °   ƒ     €          rdma@1c109000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’    �                a   3           A      ô               ©   „   b        P   ;           ž           °   ƒ     �          rdma@1c10a000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’                     a   3           A      õ               ©   Ž   C        P   ;           ž           °   ƒ                rdma@1c10b000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ’    °                a   3           A      ö               ©   „   c        P   ;           ž           °   ƒ     °          merge@1c10c000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ’    À                a   3   	   3           hmerge merge_async           A      ÷               P   ;           ^   3           °   ƒ     À             :      merge@1c10d000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ’    Ð                a   3   
   3           hmerge merge_async           A      ø               P   ;           ^   3           °   ƒ     Ð             :      merge@1c10e000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ’    à                a   3      3           hmerge merge_async           A      ù               P   ;           ^   3           °   ƒ     à             :      merge@1c10f000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ’    ð                a   3      3           hmerge merge_async           A      ú               P   ;           ^   3           °   ƒ     ð             :      merge@1c110000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ’                     a   3      3           hmerge merge_async           A      û               P   ;           ^   3           °   ƒ                   N   ports                        +       port@0                       +            ’       endpoint@1          ’           I   °        c   µ         port@1                       +            ’      endpoint@1          ’           I   ±        c   ²               dpi@1c112000          (    mediatek,mt8188-dpi mediatek,mt8195-dpi         ’                     a   3   8   3      3   =        hpixel engine pll            A                     P   ;           ^   3           ^okay       ports                        +       port@0          ’       endpoint            I   ²        c   ±         port@1          ’      endpoint            I   ³        c   ¸               dp-intf@1c113000              mediatek,mt8188-dp-intf         ’    0                a   3   :   3      %           hpixel engine pll            A                     P   ;         	  ^disabled          ethdr@1c114000        6    mediatek,mt8188-disp-ethdr mediatek,mt8195-disp-ethdr         p  ’    @            P            p            �                         °            À              4  „mixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds       h  a   3   0   3   +   3   .   3   ,   3   /   3   -   3   <   3   1   3   2   3   3   3   4   3   5   &         ƒ  hmixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds vdo_fe0_async vdo_fe1_async gfx_fe0_async gfx_fe1_async vdo_be_async ethdr_top          A      6               ©   „   d   „   e        P   ;         (  ^   3   1   3   2   3   3   3   4   3   5      p  °   ƒ     @       ƒ     P       ƒ     p       ƒ     �       ƒ             ƒ     °       ƒ     À       ports                        +       port@0                       +            ’       endpoint@1          ’           I   ´        c   ¯         port@1                       +            ’      endpoint@1          ’           I   µ        c   °               padding@1c11d000              mediatek,mt8188-disp-padding            ’    Ð                a   3           P   ;           °   ƒ     Ð          padding@1c11e000              mediatek,mt8188-disp-padding            ’    à                a   3            P   ;           °   ƒ     à          padding@1c11f000              mediatek,mt8188-disp-padding            ’    ð                a   3   !        P   ;           °   ƒ     ð          padding@1c120000              mediatek,mt8188-disp-padding            ’                     a   3   "        P   ;           °   ƒ                padding@1c121000              mediatek,mt8188-disp-padding            ’                    a   3   #        P   ;           °   ƒ               padding@1c122000              mediatek,mt8188-disp-padding            ’                     a   3   $        P   ;           °   ƒ                padding@1c123000              mediatek,mt8188-disp-padding            ’    0                a   3   %        P   ;           °   ƒ     0          padding@1c124000              mediatek,mt8188-disp-padding            ’    @                a   3   &        P   ;           °   ƒ     @          hdmi@1c300000             mediatek,mt8188-hdmi-tx         ž           ’    0                  a   &   @   &   >   &   ?   +   .        hbus hdcp hdcp24m hdmi-split            &   >           &   s        A      ®               P   ;   	        ç   ¶        Ÿhdmi            ^okay            edefault         s   ·        c      i2c       2    mediatek,mt8188-hdmi-ddc mediatek,mt8195-hdmi-ddc           a   :        c   ½      ports                        +       port@0          ’       endpoint            I   ¸        c   ³         port@1          ’      endpoint            I   ¹        c   ¾               edp-tx@1c500000           mediatek,mt8188-edp-tx          ’    P        €         A      ¤               •   º        ¡dp_calibration_data         P   ;           e  ¤      	  ^disabled          dp-tx@1c600000            mediatek,mt8188-dp-tx           ’    `        €         A      Ê               •   º        ¡dp_calibration_data         P   ;           e        	  ^disabled             backlight-lcm1            pwm-backlight           v      ÿ        ˆ  @        ¡  ÿ        ¸   »        Å   ¼     ¡         c   Ÿ      chosen          Êserial0:921600n8          dmic-codec          ž              dmic-codec          Ö           ã           c         connector             hdmi-connector          ÿhdmi            �a           ó   ½        ÿ   ¶   port       endpoint            I   ¾        c   ¹            firmware       optee             linaro,optee-tz         �smc          reserved-memory                      +               optee@43200000                   ’    C        À        memory@50000000           shared-dma-pool         ’    P       �                   c   9      memory@54600000                  ’    T`                memory@55000000           shared-dma-pool         ’    U       @        memory@57000000           shared-dma-pool         ’    W       @        memory@60000000           shared-dma-pool         ’    `        ð                   c   A      memory@60f00000           shared-dma-pool         ’    `ð                          c   =      memory@61000000           shared-dma-pool         ’    a                           c   @         regulator-0           regulator-fixed         évdd_5v          ø LK@         LK@        	   #   
                      D        )   »      regulator-1           regulator-fixed       	  évedp_3v3            ø 2Z          2Z                  	   #               edefault         s   ¿        )   »      regulator-2           regulator-fixed         éext_3v3         ø 2Z          2Z         	   #   	                      D        )   »      regulator-vsys            regulator-fixed         évsys             D         4        c   »      regulator-3           regulator-fixed         évio18_conn          ø w@         w@                  D      regulator-4           regulator-fixed       	  éwifi_3v3            ø 2Z          2Z         	   #   J                      D        )   »        c   i      regulator-5           regulator-fixed       
  évio33_tp1           ø 2Z          2Z         	   #   w                     )   »        edefault         s   À        c   b      regulator-6           regulator-fixed       	  évhub_3v3            ø 2Z          2Z         	   #   p            F  '                 )   »        c   N      regulator-7           regulator-fixed         évbus_p0         ø LK@         LK@        	   #   T                     )   »        c   m      regulator-8           regulator-fixed         évbus_p1         ø LK@         LK@        	   #   W                     )   »        c   y      regulator-9           regulator-fixed         évbus_p2         ø LK@         LK@                 c   j      regulator-vio18-lcm1              regulator-fixed         évio18_lcm1          ø w@         w@                 	   #   o            edefault         s   Á        )   »        c          regulator-vsys-lcm1           regulator-fixed       
  évsys_lcm1           ø @@         @@         D         4        )   »        c   ¡      memory@40000000         †memory          ’    @                   	compatible interrupt-parent #address-cells #size-cells model dp-intf0 dp-intf1 dpi1 dsc0 ethdr0 gce0 gce1 merge0 merge1 merge2 merge3 merge4 merge5 mutex0 mutex1 padding0 padding1 padding2 padding3 padding4 padding5 padding6 padding7 vdo1-rdma0 vdo1-rdma1 vdo1-rdma2 vdo1-rdma3 vdo1-rdma4 vdo1-rdma5 vdo1-rdma6 vdo1-rdma7 dsi0 ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 mmc0 mmc1 serial0 device_type reg enable-method clock-frequency capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache performance-domains #cooling-cells phandle cpu entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-output-names opp-shared opp-hz opp-microvolt opp-supported-hw interrupts mediatek,platform status pinctrl-names pinctrl-0 audio-routing mediatek,adsp link-name sound-dai polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device dma-ranges #performance-domain-cells #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-up output-high drive-strength input-enable input-disable bias-disable bias-pull-down drive-strength-microamp output-low #power-domain-cells domain-supply clocks clock-names mediatek,infracfg mediatek,disable-extrst #sound-dai-cells #io-channel-cells mediatek,mic-type-0 mediatek,mic-type-1 regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-always-on regulator-ramp-delay regulator-allowed-modes regulator-coupled-with regulator-coupled-max-spread mediatek,long-press-mode power-off-time-sec linux,keycodes wakeup-source assigned-clocks assigned-clock-parents #iommu-cells #mbox-cells memory-region power-domains resets reset-names mediatek,topckgen mboxes mbox-names nvmem-cells nvmem-cell-names #thermal-sensor-cells #pwm-cells mediatek,pad-select phys mediatek,syscon-wakeup dr_mode usb-role-switch vusb33-supply peer-hub reset-gpios vdd-supply remote-endpoint interrupt-names mediatek,pericfg snps,axi-config snps,mtl-rx-config snps,mtl-tx-config snps,txpbl snps,rxpbl snps,clk-csr phy-mode phy-handle pinctrl-1 mediatek,mac-wol snps,reset-gpio snps,reset-delays-us snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,rx-sched-sp snps,dcb-algorithm snps,map-to-dma-channel snps,tx-queues-to-use snps,tx-sched-wrr snps,priority snps,weight interrupts-extended bus-width max-frequency cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe cap-mmc-hw-reset no-sdio no-sd hs400-ds-delay vmmc-supply vqmmc-supply non-removable cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 no-mmc cd-gpios clock-div irq-gpios AVDD28-supply VDDIO-supply maximum-speed role-switch-default-mode vbus-supply id-gpios bus-range linux,pci-domain interrupt-map interrupt-map-mask iommu-map iommu-map-mask phy-names #phy-cells mediatek,ibias mediatek,ibias_up mode-switch orientation-switch vcc-supply label data-role op-sink-microwatt power-role try-power-role pd-revision sink-pdos source-pdos svid vdo bits operating-points-v2 power-domain-names mali-supply #dma-cells iommus mediatek,gce-client-reg mediatek,gce-events mediatek,scp mediatek,larb-id mediatek,smi mediatek,larbs backlight enable-gpios iovcc-supply mediatek,merge-mute mediatek,merge-fifo-en max-linkrate-mhz brightness-levels default-brightness-level num-interpolated-steps power-supply pwms stdout-path num-channels wakeup-delay-ms ddc-i2c-bus hdmi-pwr-supply no-map enable-active-high vin-supply regulator-boot-on startup-delay-us 