Ðþí  •g   8  ŠÄ   (            
£  ŠŒ                             &    firefly,roc-rk3328-cc rockchip,rk3328                                    +            7Firefly ROC-RK3328-CC      aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            �/ethernet@ff540000           ‹/mmc@ff500000            �/mmc@ff520000         cpus                         +       cpu@0            •cpu           arm,cortex-a53           ¡                 ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {   	      cpu@1            •cpu           arm,cortex-a53           ¡                ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {   
      cpu@2            •cpu           arm,cortex-a53           ¡                ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {         cpu@3            •cpu           arm,cortex-a53           ¡                ¥               ¬            »            Ë   x         åpsci             ó             €            @        &           3  €         @   @        R   €        _           p           {         idle-states         ƒpsci       cpu-sleep             arm,idle-state           �        ¡           ¸   x        É   ú        Ù  „        {            l2-cache              cache           ê            ö        	              @        (           {            opp-table-0           operating-points-v2                  {      opp-408000000               Q–          ~ð        $  œ@         5      opp-600000000               #ÃF          ~ð        $  œ@      opp-816000000               0£,          B@        $  œ@      opp-1008000000              <Ü          Èà        $  œ@      opp-1200000000              G†Œ          ±(        $  œ@      opp-1296000000              M?d          Ö         $  œ@         analog-sound              simple-audio-card           Ai2s         Z           tAnalog          ‹okay       simple-audio-card,cpu           ’         simple-audio-card,codec         ’            arm-pmu           arm,cortex-a53-pmu        0  œ       d          e          f          g           §   	   
            display-subsystem             rockchip,display-subsystem          º         hdmi-sound            simple-audio-card           Ai2s         Z   €        tHDMI            ‹okay       simple-audio-card,cpu           ’         simple-audio-card,codec         ’            psci              arm,psci-1.0 arm,psci-0.2            ìsmc       timer             arm,armv8-timer       0  œ                              
        xin24m            fixed-clock         À            Ín6         Ýxin24m          {   H      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ¡    ÿ                  œ                   ¥      )     7        ði2s_clk i2s_hclk            ü                    tx rx                       ‹okay            {         i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ¡    ÿ                 œ                   ¥      *     8        ði2s_clk i2s_hclk            ü                    tx rx                       ‹okay            {         i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ¡    ÿ                 œ                   ¥      +     9        ði2s_clk i2s_hclk            ü                     tx rx                     	  ‹disabled          spdif@ff030000            rockchip,rk3328-spdif            ¡    ÿ                 œ                   ¥      .     :      
  ðmclk hclk           ü      
        tx          default         *                     	  ‹disabled          pdm@ff040000              rockchip,pdm             ¡    ÿ                  ¥      =     R        ðpdm_clk pdm_hclk            ü              rx          default sleep           *                       4                     	  ‹disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd            ¡    ÿ                 {   F   io-domains        "    rockchip,rk3328-io-voltage-domain           ‹okay            >           L           Z           h           v           „           ’         gpio              rockchip,rk3328-grf-gpio             Ÿ        ¯           {   h      power-controller          !    rockchip,rk3328-power-controller            »                        +            {   <   power-domain@1           ¡            ¥      ‡        »          power-domain@6           ¡            ¥      D        »          power-domain@5           ¡             ¥      ‹     B      A      B        »          power-domain@8           ¡            ¥      �     F        »             reboot-mode           syscon-reboot-mode          Ï  È        ÖRBÃ         âRBÃ        ðRBÃ	         RBÃ         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart            ¡    ÿ                 œ       7            ¥      &      Ò        ðbaudclk apb_pclk            ü                    tx rx           default         *       !   "                            	  ‹disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart            ¡    ÿ                 œ       8            ¥      '      Ó        ðbaudclk apb_pclk            ü                    tx rx           default         *   #   $   %                            	  ‹disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart            ¡    ÿ                 œ       9            ¥      (      Ô        ðbaudclk apb_pclk            ü                    tx rx           default         *   &                              ‹okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       $                        +             ¥      7      Í      	  ði2c pclk            default         *   '      	  ‹disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       %                        +             ¥      8      Î      	  ði2c pclk            default         *   (        ‹okay       pmic@18           rockchip,rk805           ¡           À           Ýxin32k rk805-clkout2             Ÿ        ¯           default         *   )         #         ;        I   *        U   *        a   *        m   *        y           …               +        œ              {   m   regulators     DCDC_REG1         
  ‘vdd_logic             
ß4        ¸           Ð         ä        {   =   regulator-state-mem          ö         B@         DCDC_REG2           ‘vdd_arm           
ß4        ¸           Ð         ä        {      regulator-state-mem          ö         ~ð         DCDC_REG3           ‘vcc_ddr          Ð         ä   regulator-state-mem          ö         DCDC_REG4           ‘vcc_io            2Z         ¸ 2Z          Ð         ä        {      regulator-state-mem          ö         2Z          LDO_REG1            ‘vcc_18            w@        ¸ w@         Ð         ä        {      regulator-state-mem          ö         w@         LDO_REG2            ‘vcc18_emmc            w@        ¸ w@         Ð         ä        {      regulator-state-mem          ö         w@         LDO_REG3            ‘vdd_10            B@        ¸ B@         Ð         ä   regulator-state-mem          ö         B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       &                        +             ¥      9      Ï      	  ði2c pclk            default         *   ,      	  ‹disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ¡    ÿ                 œ       '                        +             ¥      :      Ð      	  ði2c pclk            default         *   -      	  ‹disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi          ¡    ÿ                 œ       1                        +             ¥             Ñ        ðspiclk apb_pclk         ü            	        tx rx           default         *   .   /   0   1      	  ‹disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt          ¡    ÿ                 œ       (            ¥      ì      pwm@ff1b0000              rockchip,rk3328-pwm          ¡    ÿ                  ¥      <      Ö      	  ðpwm pclk            default         *   2        *         	  ‹disabled          pwm@ff1b0010              rockchip,rk3328-pwm          ¡    ÿ                 ¥      <      Ö      	  ðpwm pclk            default         *   3        *         	  ‹disabled          pwm@ff1b0020              rockchip,rk3328-pwm          ¡    ÿ                  ¥      <      Ö      	  ðpwm pclk            default         *   4        *         	  ‹disabled          pwm@ff1b0030              rockchip,rk3328-pwm          ¡    ÿ 0                ¥      <      Ö      	  ðpwm pclk            default         *   5        *         	  ‹disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell          ¡    ÿ        @         œ                              5         ¥      †      	  ðapb_pclk            L           {         thermal-zones      soc-thermal         W           m  è        {  è        �   6       trips      trip-point0         � p        ©  Ð         œpassive       trip-point1         � L        ©  Ð         œpassive         {   7      soc-crit            � s        ©  Ð      	   œcritical             cooling-maps       map0            ´   7      0  ¹   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        È         map1            ´   7        ¹   8ÿÿÿÿÿÿÿÿ        È                  tsadc@ff250000            rockchip,rk3328-tsadc            ¡    ÿ%                 œ       :           Õ      $        å  ÃP         ¥      $      Õ        ðtsadc apb_pclk          init default sleep          *   9        4   :        ú   9              B      
  tsadc-apb            †         .           ‹okay            {   6      efuse@ff260000            rockchip,rk3328-efuse            ¡    ÿ&         P                     +            ¥      >        ðpclk_efuse          D       id@7             ¡            cpu-leakage@17           ¡            logic-leakage@19             ¡            cpu-version@1a           ¡              X              {   I         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc            ¡    ÿ(                 œ       P           ]            ¥      %      ê        ðsaradc apb_pclk               V        saradc-apb        	  ‹disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450            ¡    ÿ0               T  œ       Z          W          ]          X          Y          [          \         "  ogp gpmmu pp pp0 ppmmu0 pp1 ppmmu1            ¥      ‡      ‡      	  ðbus core             ó   ;           <                 f         ¬           �   =        {   8      opp-table-gpu             operating-points-v2         {   ;   opp-200000000               ëÂ          g8      opp-300000000               á£          g8      opp-400000000               ×„          g8      opp-500000000               Íe          Œ0      	  ‹disabled             iommu@ff330200            rockchip,iommu           ¡    ÿ3                œ       `            ¥      “      Ý        ðaclk iface          ™          	  ‹disabled          iommu@ff340800            rockchip,iommu           ¡    ÿ4        @        œ       b            ¥      �     F        ðaclk iface          ™          	  ‹disabled          video-codec@ff350000              rockchip,rk3328-vpu          ¡    ÿ5                 œ       	           ovdpu             ¥      �     F      
  ðaclk hclk           ¦   >           <         iommu@ff350800            rockchip,iommu           ¡    ÿ5        @        œ                   ¥      �     F        ðaclk iface          ™               <           {   >      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec            ¡    ÿ6        €        œ                    ¥      ‹     B      A      B        ðaxi ahb cabac core          Õ      ‹      A      B        å×„ ×„ á£         ¦   ?           <         iommu@ff360480            rockchip,iommu            ¡    ÿ6€       @    ÿ6À       @        œ       J            ¥      ‹     B        ðaclk iface          ™               <           {   ?      vop@ff370000              rockchip,rk3328-vop          ¡    ÿ7        >ü        œ                    ¥      ‘      x     ;        ðaclk_vop dclk_vop hclk_vop                …      †      ‡        axi ahb dclk            ¦   @        ‹okay       port            {      endpoint            ­   A        {   G            iommu@ff373f00            rockchip,iommu           ¡    ÿ7?                œ                    ¥      ‘     ;        ðaclk iface          ™            ‹okay            {   @      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi          ¡    ÿ<                            œ       #            ¥      ç      F              ðiahb isfr cec           ½   B        Âhdmi            default         *   C   D   E        Ì   F                    ‹okay            {      ports                        +       port@0           ¡       endpoint            ­   G        {   A         port@1           ¡               codec@ff410000            rockchip,rk3328-codec            ¡    ÿA                  ¥      ë      *      
  ðpclk mclk           Ì   F                    ‹okay            {         phy@ff430000              rockchip,rk3328-hdmi-phy             ¡    ÿC                 œ       S            ¥      ä   H      y        ðsysclk refoclk refpclk        	  Ýhdmi_phy            À            Ù   I        åcpu-version         ö            ‹okay            {   B      clock-controller@ff440000             rockchip,rk3328-cru          ¡    ÿD                  ¥   H        ðxin24m          Ì   F        À                    ø  Õ      x      =            &      '      (      ˆ      ‰      Ž      …      ƒ      Š      Œ      �      A      B      D      C      "      \      5                        ˆ     H      Ø      ‰     4      æ            $        z               H   H   H      |  å    ©€     n6 n6 n6  äáÀ äáÀá£ õá ×„ õá úð€õá õá õá úð€úð€úð€úð€n6 #ÃF L  G†Œ ðÑ€xhÀxhÀðÑ€xhÀxhÀ  €         {         syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd            ¡    ÿE                              +      usb2phy@100           rockchip,rk3328-usb2phy          ¡               ¥   H        ðphyclk          Ýusb480m_phy         À            Õ      {           J        ‹okay            {   J   otg-port            ö          $  œ       ;          <          =           ootg-bvalid otg-id linestate         ‹okay            {   Y      host-port           ö            œ       >         
  olinestate           ‹okay            {   Z            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿP        @         œ                    ¥     =      !      J      N        ðbiu ciu ciu-drive ciu-sample            %           0ðÑ€              m        reset           ‹okay            >            H         Z         k        default         *   K   L   M   N         v         ƒ         �         �        «   O        ·         mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿQ        @         œ                    ¥     >      "      K      O        ðbiu ciu ciu-drive ciu-sample            %           0ðÑ€              n        reset         	  ‹disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿR        @         œ                    ¥     ?      #      L      P        ðbiu ciu ciu-drive ciu-sample            %           0ðÑ€              o        reset           ‹okay            >            H         Ä         Ñ         à        default         *   P   Q   R        «           ·         ethernet@ff540000             rockchip,rk3328-gmac             ¡    ÿT                 œ                  omacirq        8   ¥      d      W      X      Z      Y      –      ß      M  ðstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth           Ì   F        î           ü           
           ‹okay            Õ      d      f           S   S        input           "   T        -rgmii           default         *   U         6        ?   +               O        e      '  ÃP        z           …   $        Ž         ethernet@ff550000             rockchip,rk3328-gmac             ¡    ÿU                 Ì   F        œ                  omacirq        8   ¥      T      S      S      U      •      Þ      V      I  ðstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           -rmii            —   V        î           ü           
           output        	  ‹disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22          ¡             ¥      V              d        default         *   W   X         ¢        {   V            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2            ¡    ÿX                 œ                   ¥     M        ðotg         ´host            ¼           Î          Ý      €   €   @               ½   Y      	  Âusb2-phy            ‹okay          usb@ff5c0000              generic-ehci             ¡    ÿ\                 œ                   ¥     N   J        ½   Z        Âusb         ‹okay          usb@ff5d0000              generic-ohci             ¡    ÿ]                 œ                   ¥     N   J        ½   Z        Âusb         ‹okay          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ¡    ÿ_        @         œ                    ¥     @            M      Q        ðbiu ciu ciu-drive ciu-sample            %           0ðÑ€              h        reset         	  ‹disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3           ¡    ÿ`                 œ       C            ¥      `      a      „        ðref_clk suspend_clk bus_clk         ´host          
  ìutmi_wide            õ         	         	.         	P         	q         	Š        ‹okay          interrupt-controller@ff811000             arm,gic-400         	£                         	´      @   ¡    ÿ�            ÿ�              ÿ�@             ÿ�`                 œ      	          {         crypto@ff060000           rockchip,rk3328-crypto           ¡    ÿ        @         œ                   ¥     P     Q      ;        ðhclk_master hclk_slave sclk               D        crypto-rst        pinctrl           rockchip,rk3328-pinctrl         Ì   F                     +            	É   gpio@ff210000             rockchip,gpio-bank           ¡    ÿ!                 œ       3            ¥      È         Ÿ        ¯            	´        	£           {   f      gpio@ff220000             rockchip,gpio-bank           ¡    ÿ"                 œ       4            ¥      É         Ÿ        ¯            	´        	£           {   +      gpio@ff230000             rockchip,gpio-bank           ¡    ÿ#                 œ       5            ¥      Ê         Ÿ        ¯            	´        	£           {   k      gpio@ff240000             rockchip,gpio-bank           ¡    ÿ$                 œ       6            ¥      Ë         Ÿ        ¯            	´        	£         pcfg-pull-up             	Ð        {   ]      pcfg-pull-down           	Ý        {   e      pcfg-pull-none           	ì        {   [      pcfg-pull-none-2ma           	ì        	ù           {   d      pcfg-pull-up-2ma             	Ð        	ù         pcfg-pull-up-4ma             	Ð        	ù           {   ^      pcfg-pull-none-4ma           	ì        	ù           {   a      pcfg-pull-down-4ma           	Ý        	ù         pcfg-pull-none-8ma           	ì        	ù           {   _      pcfg-pull-up-8ma             	Ð        	ù           {   `      pcfg-pull-none-12ma          	ì        	ù           {   b      pcfg-pull-up-12ma            	Ð        	ù           {   c      pcfg-output-high             
      pcfg-output-low          
      pcfg-input-high          	Ð         
        {   \      pcfg-input           
      i2c0       i2c0-xfer            
,            [            [        {   '         i2c1       i2c1-xfer            
,            [            [        {   (         i2c2       i2c2-xfer            
,            [            [        {   ,         i2c3       i2c3-xfer            
,             [             [        {   -      i2c3-pins            
,              [              [         hdmi_i2c       hdmii2c-xfer             
,             [             [        {   D         pdm-0      pdmm0-clk           
,            [        {         pdmm0-fsync         
,            [      pdmm0-sdi0          
,            [        {         pdmm0-sdi1          
,            [        {         pdmm0-sdi2          
,            [        {         pdmm0-sdi3          
,            [        {         pdmm0-clk-sleep         
,             \        {         pdmm0-sdi0-sleep            
,             \        {         pdmm0-sdi1-sleep            
,             \        {         pdmm0-sdi2-sleep            
,             \        {         pdmm0-sdi3-sleep            
,             \        {         pdmm0-fsync-sleep           
,             \         tsadc      otp-pin         
,             [        {   9      otp-out         
,            [        {   :         uart0      uart0-xfer           
,      	      [            ]        {          uart0-cts           
,            [        {   !      uart0-rts           
,      
      [        {   "      uart0-rts-pin           
,      
       [         uart1      uart1-xfer           
,            [            ]        {   #      uart1-cts           
,            [        {   $      uart1-rts           
,            [        {   %      uart1-rts-pin           
,             [         uart2-0    uart2m0-xfer             
,             [            ]         uart2-1    uart2m1-xfer             
,             [            ]        {   &         spi0-0     spi0m0-clk          
,            ]      spi0m0-cs0          
,            ]      spi0m0-tx           
,      	      ]      spi0m0-rx           
,      
      ]      spi0m0-cs1          
,            ]         spi0-1     spi0m1-clk          
,            ]      spi0m1-cs0          
,            ]      spi0m1-tx           
,            ]      spi0m1-rx           
,            ]      spi0m1-cs1          
,            ]         spi0-2     spi0m2-clk          
,             ]        {   .      spi0m2-cs0          
,            ]        {   1      spi0m2-tx           
,            ]        {   /      spi0m2-rx           
,            ]        {   0         i2s1       i2s1-mclk           
,            [      i2s1-sclk           
,            [      i2s1-lrckrx         
,            [      i2s1-lrcktx         
,            [      i2s1-sdi            
,            [      i2s1-sdo            
,            [      i2s1-sdio1          
,            [      i2s1-sdio2          
,            [      i2s1-sdio3          
,            [      i2s1-sleep        �  
,             \             \             \             \             \             \             \             \             \         i2s2-0     i2s2m0-mclk         
,            [      i2s2m0-sclk         
,            [      i2s2m0-lrckrx           
,            [      i2s2m0-lrcktx           
,            [      i2s2m0-sdi          
,            [      i2s2m0-sdo          
,            [      i2s2m0-sleep          `  
,             \             \             \             \             \             \         i2s2-1     i2s2m1-mclk         
,            [      i2s2m1-sclk         
,             [      i2sm1-lrckrx            
,            [      i2s2m1-lrcktx           
,            [      i2s2m1-sdi          
,            [      i2s2m1-sdo          
,            [      i2s2m1-sleep          P  
,             \              \             \             \             \         spdif-0    spdifm0-tx          
,             [         spdif-1    spdifm1-tx          
,            [         spdif-2    spdifm2-tx          
,             [        {            sdmmc0-0       sdmmc0m0-pwren          
,            ^      sdmmc0m0-pin            
,             ^         sdmmc0-1       sdmmc0m1-pwren          
,             ^      sdmmc0m1-pin            
,              ^        {   g         sdmmc0     sdmmc0-clk          
,            _        {   K      sdmmc0-cmd          
,            `        {   L      sdmmc0-dectn            
,            ^        {   M      sdmmc0-wrprt            
,            ^      sdmmc0-bus1         
,             `      sdmmc0-bus4       @  
,             `            `            `            `        {   N      sdmmc0-pins       €  
,             ^             ^             ^             ^             ^             ^             ^              ^         sdmmc0ext      sdmmc0ext-clk           
,            a      sdmmc0ext-cmd           
,             ^      sdmmc0ext-wrprt         
,            ^      sdmmc0ext-dectn         
,            ^      sdmmc0ext-bus1          
,            ^      sdmmc0ext-bus4        @  
,            ^            ^            ^            ^      sdmmc0ext-pins        €  
,              ^             ^             ^             ^             ^             ^             ^             ^         sdmmc1     sdmmc1-clk          
,            _      sdmmc1-cmd          
,            `      sdmmc1-pwren            
,            `      sdmmc1-wrprt            
,            `      sdmmc1-dectn            
,            `      sdmmc1-bus1         
,            `      sdmmc1-bus4       @  
,            `            `            `            `      sdmmc1-pins       �  
,             ^             ^             ^             ^             ^             ^             ^             ^             ^         emmc       emmc-clk            
,            b        {   P      emmc-cmd            
,            c        {   Q      emmc-pwren          
,            [      emmc-rstnout            
,            [      emmc-bus1           
,             c      emmc-bus4         @  
,             c            c            c            c      emmc-bus8         €  
,             c            c            c            c            c            c            c            c        {   R         pwm0       pwm0-pin            
,            [        {   2         pwm1       pwm1-pin            
,            [        {   3         pwm2       pwm2-pin            
,            [        {   4         pwmir      pwmir-pin           
,            [        {   5         gmac-1     rgmiim1-pins         `  
,            _            a            a            _            a            a            a      
      a            a            _      	      _            a            a            _            _             _             _             a             _             _             _             _        {   U      rmiim1-pins         
,            d            b            d            d            d            d      
      d            d            b      	      b             [             [             [             [             [             [         gmac2phy       fephyled-speed10            
,             [      fephyled-duplex         
,             [      fephyled-rxm1           
,            [        {   W      fephyled-txm1           
,            [      fephyled-linkm1         
,            [        {   X         tsadc_pin      tsadc-int           
,            [      tsadc-pin           
,             [         hdmi_pin       hdmi-cec            
,             [        {   C      hdmi-hpd            
,             e        {   E         cif-0      dvp-d2d9-m0       À  
,            [            [            [            [            [      	      [      
      [            [            [             [            [            [         cif-1      dvp-d2d9-m1       À  
,            [            [            [            [            [            [            [            [            [             [            [            [         ir     ir-int          
,             [        {   l         pmic       pmic-int-l          
,             ]        {   )         usb2       usb20-host-drv          
,             [        {   i            chosen          
:serial2:1500000n8         external-gmac-clock           fixed-clock         ÍsY@        Ýgmac_clkin          À            {   S      regulator-dc-12v              regulator-fixed         ‘dc_12v           Ð         ä          ·         ¸ ·         {   j      regulator-sdmmc           regulator-fixed         J   f              default         *   g         ä        ‘vcc_sd            2Z         ¸ 2Z         
F           {   O      regulator-sdmmcio             regulator-gpio           Ä w@    2Z           	  ‘vcc_sdio            
Qvoltage           w@        ¸ 2Z          Ð        
F   *        
`   h                {         regulator-vcc-host1-5v            regulator-fixed          
f        default         *   i        ‘vcc_host1_5v             Ð        
F   *        J   +             regulator-vcc-sys             regulator-fixed         ‘vcc_sys          Ð         ä          LK@        ¸ LK@        
F   j        {   *      regulator-vcc-phy             regulator-fixed         ‘vcc_phy          Ð         ä        {   T      ir-receiver           gpio-ir-receiver            
`   k              *   l        default       leds          
    gpio-leds      led-0           
yfirefly:blue:power        
  
heartbeat           
`   m              
•on        led-1           
yfirefly:yellow:user         
mmc1            
`   m               
•off             	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 mmc0 mmc1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply pmuio-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells interrupt-names power-domains mali-supply #iommu-cells iommus remote-endpoint phys phy-names rockchip,grf nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-ddr-1_8v mmc-hs200-1_8v non-removable tx-fifo-depth rx-fifo-depth snps,txpbl clock_in_out phy-supply phy-mode snps,aal snps,reset-gpio snps,reset-active-low snps,reset-delays-us snps,rxpbl tx_delay rx_delay phy-handle phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path vin-supply regulator-type gpios enable-active-high label linux,default-trigger default-state 