<88@(m8D-Link DNS-327L6dlink,dns327lmarvell,armada370marvell,armada-370-xp aliases ,/soc/internal-regs/serial@12000 4/soc/internal-regs/serial@12100  disableddevbus-cs1marvell,mvebu-devbus Z=  disableddevbus-cs2marvell,mvebu-devbus Z;  disableddevbus-cs3marvell,mvebu-devbus Z 7  disabledinternal-regs simple-bus rtc@10300marvell,orion-rtcZ 2i2c@11000marvell,mv64xxx-i2c okayZ i2c@11100marvell,mv64xxx-i2c   disabledZ serial@12000snps,dw-apb-uartZ )okaydefaultserial@12100snps,dw-apb-uartZ!*okaydefaultpin-ctrl@18000Z8marvell,mv88f6710-pinctrlspi0-pins1mpp33mpp34mpp35mpp36spi0. spi0_pins2mpp32mpp63mpp64mpp65spi0spi1-pinsmpp49mpp50mpp51mpp52spi1. uart0-pins mpp0mpp1uart0.uart1-pins mpp60mpp61uart1.sdio-pins1#mpp9mpp11mpp12mpp13mpp14mpp15sd0sdio-pins2$mpp47mpp48mpp49mpp50mpp51mpp52sd0sdio-pins3$mpp48mpp49mpp50mpp51mpp52mpp53sd0i2c0-pins mpp2mpp3i2c0i2s-pins1+mpp5mpp6mpp7mpp8mpp9mpp10mpp12mpp13audioi2s-pins26mpp49mpp47mpp50mpp59mpp57mpp61mpp62mpp60mpp58audiomdio-pins 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okaymarvell,armada-370-neta rgmii-idsata@a0000marvell,armada-370-sataZ P701okaynand-controller@d0000"marvell,armada370-nand-controllerZ T q okaynand@0Zpxa3xx_nand-0 partitionsfixed-partitions partition@0u-bootZpartition@100000 u-boot-envZpartition@120000uImageZppartition@820000ubifsZNpartition@5d00000failsafe-uImageZPpartition@6200000 failsafe-fsZ partition@7f00000bbtZmvsdio@d4000marvell,orion-sdioZ @6&0=N disabledl2-cache@8000marvell,aurora-outer-cacheZ`nzgpio@18100+marvell,armada-370-gpiomarvell,orion-gpioZ@ gpiopwm gVRSTU.gpio@18140+marvell,armada-370-gpiomarvell,orion-gpioZ@@ gpiopwm gVWXYZ.gpio@18180+marvell,armada-370-gpiomarvell,orion-gpioZ@gV[.system-controller@18200(marvell,armada-370-xp-system-controllerZclock-gating-control@18220 marvell,armada-370-gating-clockZ 6.mvebu-sar@18230marvell,armada-370-core-clockZ06.thermal@18300marvell,armada370-thermalZokaysscg@18330Z0cpu-config@21000marvell,armada-370-cpu-configZaudio-controller@30000marvell,armada370-audioZ@] internal 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Wregulator-3regulator-fixeddefault SATA-L PowerLK@LK@\= C1 W modelcompatible#address-cells#size-cellsserial0serial1gpio0gpio1gpio2device_typereginterrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesclocksstatusinterruptsclock-frequencyreg-shiftreg-io-widthpinctrl-0pinctrl-namesmarvell,pinsmarvell,functionphandle#clock-cellsclock-output-names#interrupt-cellsinterrupt-controllermsi-controllermarvell,reg-initphyphy-modeclock-namesnr-portslabelnand-rbmarvell,nand-keep-confignand-on-flash-bbtnand-ecc-strengthnand-ecc-step-sizeread-onlybus-widthcap-sdio-irqcap-sd-highspeedcap-mmc-highspeedcache-id-partcache-levelcache-unifiedwt-overridereg-namesngpiosgpio-controller#gpio-cells#pwm-cells#sound-dai-cellsdmacap,memcpydmacap,xordmacap,memsetmarvell,crypto-sramsmarvell,crypto-sram-sizecell-indexmsi-parentbus-rangeassigned-addressesinterrupt-namesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-lanestdout-pathlinux,codedefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highregulator-boot-onregulator-always-ongpiostartup-delay-us