Ðþí  @�   8  <´   (            Ü  <|                                                      $   Marvell Armada 385 Reference Design       F   !marvell,a385-rd marvell,armada388 marvell,armada385 marvell,armada380      aliases          ,/soc/internal-regs/gpio@18100            2/soc/internal-regs/gpio@18140             8/soc/internal-regs/serial@12000           @/soc/internal-regs/serial@12100       pmu          !arm,cortex-a9-pmu            H            soc       "   !marvell,armada380-mbus simple-bus                                     \            g            xà               Šè            @   ›ð      ñ            ÿð     	      ñ     	      ñ        bootrom          !marvell,bootrom          ¢                devbus-bootcs            !marvell,mvebu-devbus             ¢ð                ›    /      ÿÿÿÿ                                  ¦             	   ­disabled          devbus-cs0           !marvell,mvebu-devbus             ¢ð               ›    >      ÿÿÿÿ                                  ¦             	   ­disabled          devbus-cs1           !marvell,mvebu-devbus             ¢ð               ›    =      ÿÿÿÿ                                  ¦             	   ­disabled          devbus-cs2           !marvell,mvebu-devbus             ¢ð               ›    ;      ÿÿÿÿ                                  ¦             	   ­disabled          devbus-cs3           !marvell,mvebu-devbus             ¢ð                ›    7      ÿÿÿÿ                                  ¦             	   ­disabled          internal-regs            !simple-bus                                    ›    ð            sdramc@1400       #   !marvell,armada-xp-sdram-controller           ¢            cache-controller@8000            !arm,pl310-cache          ¢  €              ´         Â            Î             ç                                  scu@c000             !arm,cortex-a9-scu            ¢  À    X      timer@c200           !arm,cortex-a9-global-timer           ¢  Â             "                 ¦            timer@c600           !arm,cortex-a9-twd-timer          ¢  Æ             "                 ¦            interrupt-controller@d000            !arm,cortex-a9-gic           -                         >         ¢  Ð      Á            S         i2c@11000         +   !marvell,mv78230-a0-i2c marvell,mv64xxx-i2c           ¢                                        "                   ¦                ­okay            [ †       i2c@11100         +   !marvell,mv78230-a0-i2c marvell,mv64xxx-i2c           ¢                                        "                   ¦             	   ­disabled          serial@12000          !   !marvell,armada-38x-uart ns16550a             ¢              k           "                  u            ¦                ­okay          serial@12100          !   !marvell,armada-38x-uart ns16550a             ¢ !            k           "                  u            ¦             	   ­disabled          pinctrl@18000            ¢ €              !marvell,mv88f6828-pinctrl           S      ge-rgmii-pins-0       D  ‚mpp6 mpp7 mpp8 mpp9 mpp10 mpp11 mpp12 mpp13 mpp14 mpp15 mpp16 mpp17         �ge0       ge-rgmii-pins-1       H  ‚mpp21 mpp27 mpp28 mpp29 mpp30 mpp31 mpp32 mpp37 mpp38 mpp39 mpp40 mpp41         �ge1       i2c-pins-0        
  ‚mpp2 mpp3           �i2c0          mdio-pins         
  ‚mpp4 mpp5           �ge        ref-clk-pins-0          ‚mpp45           �ref       ref-clk-pins-1          ‚mpp46           �ref       spi-pins-0          ‚mpp22 mpp23 mpp24 mpp25         �spi0          spi-pins-1          ‚mpp56 mpp57 mpp58 mpp59         �spi1          nand-pins         N  ‚mpp22 mpp34 mpp23 mpp33 mpp38 mpp28 mpp40 mpp42 mpp35 mpp36 mpp25 mpp30 mpp32           �dev       nand-rb-pins            ‚mpp41           �nand          uart-pins-0       
  ‚mpp0 mpp1           �ua0       uart-pins-1         ‚mpp19 mpp20         �ua1       sdhci-pins        <  ‚mpp48 mpp49 mpp50 mpp52 mpp53 mpp54 mpp55 mpp57 mpp58 mpp59         �sd0         S         sata-pins-0         ‚mpp20           �sata0         sata-pins-1         ‚mpp19           �sata1         sata-pins-2         ‚mpp47           �sata2         sata-pins-3         ‚mpp44           �sata3         i2s-pins          $  ‚mpp48 mpp49 mpp50 mpp51 mpp52 mpp53         �audio         spdif-pins          ‚mpp51           �audio            gpio@18100        +   !marvell,armada-370-gpio marvell,orion-gpio           ¢ �    @ �À         	   gpio pwm            ª             ±        Á                       Í           Ù            >        -         0  "       5          6          7          8            ¦             gpio@18140        +   !marvell,armada-370-gpio marvell,orion-gpio           ¢ �@   @ �È         	   gpio pwm            ª            ±        Á                      Í           Ù            >        -         0  "       :          ;          <          =            ¦             system-controller@18200       M   !marvell,armada-380-system-controller marvell,armada-370-xp-system-controller             ¢ ‚          clock-gating-control@18220            !marvell,armada-380-gating-clock          ¢ ‚             ¦               ä           S         phy@18300            !marvell,armada-380-comphy            comphy conf          ¢ ƒ     „`                                phy@0            ¢            ñ         phy@1            ¢           ñ         phy@2            ¢           ñ         phy@3            ¢           ñ         phy@4            ¢           ñ         phy@5            ¢           ñ            mvebu-sar@18600          !marvell,armada-380-core-clock            ¢ †            ä           S         mbus-controller@20000            !marvell,mbus-controller          ¢       €     P           S         interrupt-controller@20a00           !marvell,mpic             ¢ 
   Ð p   X        -            >         ü        "                 S         timer@20300       1   !marvell,armada-380-timer marvell,armada-xp-timer             ¢     0 @   0      P   H                       	             
                                     ¦                 nbclk fixed       watchdog@20300           !marvell,armada-380-wdt           ¢     4     ‚`            ¦                 nbclk fixed           H          @             	         cpurst@20800             !marvell,armada-370-cpu-reset             ¢           mpcore-soc-ctrl@20d20         #   !marvell,armada-380-mpcore-soc-ctrl           ¢     l      coherency-fabric@21010        $   !marvell,armada-380-coherency-fabric          ¢          pmsu@22000           !marvell,armada-380-pmsu          ¢            ethernet@70000           !marvell,armada-370-neta          ¢     @          H               ¦                &H         ­okay            %         	  )rgmii-id          ethernet@30000           !marvell,armada-370-neta          ¢     @          H      
         ¦               ­okay            %   	      	  )rgmii-id          ethernet@34000           !marvell,armada-370-neta          ¢ @   @          H               ¦            	   ­disabled          usb@58000            !marvell,orion-ehci           ¢ €            "                   ¦            	   ­disabled          xor@60800         )   !marvell,armada-380-xor marvell,orion-xor             ¢      
             ¦               ­okay       xor00           "                   2         @      xor01           "                   2         @         K         xor@60900         )   !marvell,armada-380-xor marvell,orion-xor             ¢ 	                  ¦               ­okay       xor10           "       A            2         @      xor11           "       B            2         @         K         mdio@72004                                     !marvell,orion-mdio           ¢              ¦         ethernet-phy@0           ¢            S   	      ethernet-phy@1           ¢           S            crypto@90000             !marvell,armada-38x-crypto            ¢ 	              regs            "                              ¦                                cesa0 cesa1 cesaz0 cesaz1           Y   
           n         rtc@a3800            !marvell,armada-380-rtc           ¢ 
8      „             rtc rtc-soc         "                sata@a8000           !marvell,armada-380-ahci          ¢ 
€             "                   ¦            	   ­disabled          bm@c8000             !marvell,armada-380-neta-bm           ¢ €    ¬         ¦              ‡         	   ­disabled          sata@e0000           !marvell,armada-380-ahci          ¢               "                   ¦            	   ­disabled          clock@e4250       !   !marvell,armada-380-corediv-clock             ¢ BP           ä            ¦           ”nand            S         thermal@e8078            !marvell,armada380-thermal            ¢ @x    @p            ­okay          nand-controller@d0000         "   !marvell,armada370-nand-controller            ¢      T                                  "       T            ¦             	   ­disabled          sdhci@d8000          !marvell,armada-380-sdhci             sdhci mbus conf-sdio3            ¢ €     À     „T           "                   ¦              §            ­okay            ½default         Ë            Õ         ß         è        ô         audio-controller@e8000          þ            !marvell,armada-380-audio             ¢ €   @  „    ‚            i2s_regs pll_regs soc_ctrl          "       K            ¦             	  internal          	   ­disabled          usb3@f0000           !marvell,armada-380-xhci          ¢     @  @   @         "                   ¦      	         ­okay          usb3@f8000           !marvell,armada-380-xhci          ¢ €   @  À   @         "                   ¦      
      	   ­disabled             sa-sram0          
   !mmio-sram            ¢	                  ¦                                        ›    	                 S   
      sa-sram1          
   !mmio-sram            ¢	                  ¦                                        ›    	                 S         bm-bppi       
   !mmio-sram            ¢                  ›                                               ¦                     	   ­disabled            S         spi@10600         )   !marvell,armada-380-spi marvell,orion-spi             ¢ð       P                                              "                   ¦                ­okay       flash@0                                   !st,m25p128 jedec,spi-nor             ¢            'oó          spi@10680         )   !marvell,armada-380-spi marvell,orion-spi             ¢ð   €   P                                             "       ?            ¦             	   ­disabled          pcie             !marvell,armada-370-pcie          ­okay            9pci                                  E           P       ÿ     P   ›‚          ð             ‚          ð             ‚        @ ð   @         ‚        € ð   €         ‚          è             �          à             ‚          è             �          à             ‚          Ø             �          Ð             ‚          ¸             �          °                pcie@1,0            9pci         Z‚                          ¢                                                    mintx             H                     -         @   ›‚           ‚                 �           �                         P       ÿ        }                     `  �                                                                                             ž            °             ¦               ­okay       interrupt-controller             >        -           S            pcie@2,0            9pci         Z‚                          ¢                                                    mintx             H          !           -         @   ›‚           ‚                 �           �                         P       ÿ        }                     `  �                                                                                             ž           °             ¦            	   ­disabled       interrupt-controller             >        -           S            pcie@3,0            9pci         Z‚       @                  ¢                                                    mintx             H          F           -         @   ›‚           ‚                 �           �                         P       ÿ        }                     `  �                                                                                             ž           °             ¦            	   ­disabled       interrupt-controller             >        -           S            pcie@4,0            9pci         Z‚        €                  ¢                                                     mintx             H          G           -         @   ›‚           ‚                 �           �                         P       ÿ        }                     `  �                                                                                             ž           °             ¦            	   ­disabled       interrupt-controller             >        -           S                  clocks     mainpll          !fixed-clock         ä            [;šÊ         S         oscillator           !fixed-clock         ä            [}x@        S            cpus                                      Âmarvell,armada-380-smp     cpu@0           9cpu          !arm,cortex-a9            ¢          cpu@1           9cpu          !arm,cortex-a9            ¢            chosen          Ðserial0:115200n8          memory          9memory           ¢                	#address-cells #size-cells model compatible gpio0 gpio1 serial0 serial1 interrupts-extended controller interrupt-parent pcie-mem-aperture pcie-io-aperture ranges reg clocks status cache-unified cache-level arm,double-linefill-incr arm,double-linefill-wrap arm,double-linefill prefetch-data interrupts #interrupt-cells interrupt-controller phandle clock-frequency reg-shift reg-io-width marvell,pins marvell,function reg-names ngpios gpio-controller gpio-ranges #gpio-cells #pwm-cells #clock-cells #phy-cells msi-controller clock-names tx-csum-limit phy phy-mode dmacap,memcpy dmacap,xor dmacap,memset marvell,crypto-srams marvell,crypto-sram-size internal-mem clock-output-names mrvl,clk-delay-cycles pinctrl-names pinctrl-0 broken-cd no-1-8-v wp-inverted bus-width #sound-dai-cells no-memory-wc cell-index spi-max-frequency device_type msi-parent bus-range assigned-addresses interrupt-names interrupt-map-mask interrupt-map marvell,pcie-port marvell,pcie-lane enable-method stdout-path 