Ðþí  6e   8  3   (            a  2Ì                                                         marvell,dove-db marvell,dove          *   &Marvell DB-MV88AP510-BP Development Board            ,      aliases       9   =/mbus/internal-regs/power-management@d0000/gpio-ctrl@400          9   C/mbus/internal-regs/power-management@d0000/gpio-ctrl@420          $   I/mbus/internal-regs/gpio-ctrl@e8400       cpus                                 cpu@0            marvell,pj4a marvell,sheeva-v7           Ocpu          [            l             l2-cache             marvell,tauros2-cache            p             �         gpu-subsystem            marvell,dove-gpu-subsystem           —         	   �disabled          i2c-mux          i2c-mux-pinctrl                                    ¤            ¯i2c0 i2c1 i2c2           ½            Ç            Ñ      i2c@0            l                                       �okay          i2c@1            l                                   	   �disabled          i2c@2            l                                   	   �disabled             mbus          *   marvell,dove-mbus marvell,mbus simple-bus                                     Û            æà               øò             P  	ð      ñ      ð      ñ€     ý      ø            È             ð         pcie             marvell,dove-pcie         	   �disabled             Opci                                                    ÿ      ¨  	‚          ð             ‚          ð             ‚          è             �          à             ‚          è             �          à                pcie@1           Opci       	   �disabled            %‚                          l                           8   	           ?                                   @  	‚           ‚                 �           �                                ÿ        Q           bintx error          r              }                     `  �                  
                      
                     
                     
      interrupt-controller             ž        Q            �   
         pcie@2           Opci       	   �disabled            %‚                          l                           8   	           ?                                  @  	‚           ‚                 �           �                                ÿ        Q           bintx error          r              }                     `  �                                                                                        interrupt-controller             ž        Q            �               internal-regs            simple-bus                                 @  	    ð          €  ð         ÿÿà          ÿÿð              spi@10600            marvell,orion-spi                                     ³            r            l     (        8                ½            ¯default          �okay       flash@0       
   st,m25p32           ¾1-          l             i2c@11000            marvell,mv64xxx-i2c          l                                        r           Ð €        8                �okay             �         serial@12000          	   ns16550a             l              à           r           8                �okay          serial@12100          	   ns16550a             l !            à           r           8                ½            ¯default          �okay          serial@12200          	   ns16550a             l "            à           r   	        8             	   �disabled          serial@12300          	   ns16550a             l #            à           r   
        8             	   �disabled          spi@14600            marvell,orion-spi                                     ³           r            l F    (        8             	   �disabled          mbus-ctrl@20000          marvell,mbus-controller          l      € €             �         system-ctrl@20000             marvell,orion-system-controller          l           bridge-interrupt-ctrl@20110          marvell,orion-bridge-intc            ž        Q            l            r            ê            �         interrupt-controller@20200           marvell,orion-intc           ž        Q            l                  �         timer@20300          marvell,orion-timer          l               ,           r              8             watchdog@20300           marvell,orion-wdt            l     (             ,           r           8             crypto-engine@30000          marvell,dove-crypto          l              þregs            r           8   	                                  �okay          usb-host@50000           marvell,orion-ehci           l              r           8   	             �okay          usb-host@51000           marvell,orion-ehci           l             r           8   	            �okay          dma-engine@60800             marvell,orion-xor            l      
            8   	            �okay       channel0            r   '         6         D      channel1            r   (         6         D         dma-engine@60900             marvell,orion-xor            l 	                 8   	            �okay       channel0            r   *         6         D      channel1            r   +         6         D         sdio-host@90000          marvell,dove-sdhci           l 	             r   $   &        8   	   	         ½            ¯default          �okay          ethernet-ctrl@72000          marvell,orion-eth                                      l     @         8   	           O  @      	   �disabled       ethernet-port@0          marvell,orion-eth-port           l            r           i                 mdio-bus@72004           marvell,orion-mdio                                     l     „        r           8   	         	   �disabled          sdio-host@92000          marvell,dove-sdhci           l 	             r   #   %        8   	            ½            ¯default          �okay          sata-host@a0000          marvell,orion-sata           l 
    $         r   >        8   	           {           €port0           Š            �okay          sata-phy@a2000           marvell,mvebu-sata-phy           l 
    4        8   	           “sata            Ÿ             �okay             �         audio-controller@b0000           marvell,dove-audio           l     "        r              8   	         	  “internal          	   �disabled          audio-controller@b4000           marvell,dove-audio           l @   "        r              8   	         	  “internal          	   �disabled          power-management@d0000           marvell,dove-pmu simple-bus          l     €  €   €         	         €   €  €   €         r   !         ž                                 Q           ª            �      domains    vpu-domain          ·            Ë           à           õ            gpu-domain          ·            Ë           à           õ               �            thermal-diode@1c             marvell,dove-thermal             l         \         clock-gating-ctrl@38             marvell,dove-gating-clock            l   8           8               ü            �   	      core-clock@64            marvell,dove-divider-clock           l   d           ü            �         pin-ctrl@200             marvell,dove-pinctrl             l        @           8   	      pmx-gpio-0          	mpp0            gpio          pmx-gpio-1          	mpp1            gpio          pmx-gpio-2          	mpp2            gpio          pmx-gpio-3          	mpp3            gpio          pmx-gpio-4          	mpp4            gpio          pmx-gpio-5          	mpp5            gpio          pmx-gpio-6          	mpp6            gpio          pmx-gpio-7          	mpp7            gpio          pmx-gpio-8          	mpp8            gpio          pmx-gpio-9          	mpp9            gpio          pmx-pcie1-clkreq            	mpp9            pex1          pmx-gpio-10         	mpp10           gpio          pmx-gpio-11         	mpp11           gpio          pmx-pcie0-clkreq            	mpp11           pex0          pmx-gpio-12         	mpp12           gpio          pmx-gpio-13         	mpp13           gpio          pmx-audio1-extclk           	mpp13           audio1        pmx-gpio-14         	mpp14           gpio          pmx-gpio-15         	mpp15           gpio          pmx-gpio-16         	mpp16           gpio          pmx-gpio-17         	mpp17           gpio          pmx-gpio-18         	mpp18           gpio          pmx-gpio-19         	mpp19           gpio          pmx-gpio-20         	mpp20           gpio          pmx-gpio-21         	mpp21           gpio          pmx-camera          	mpp_camera          camera        pmx-camera-gpio         	mpp_camera          gpio          pmx-sdio0         
  	mpp_sdio0           sdio0            �         pmx-sdio0-gpio        
  	mpp_sdio0           gpio          pmx-sdio1         
  	mpp_sdio1           sdio1            �         pmx-sdio1-gpio        
  	mpp_sdio1           gpio          pmx-audio1-gpio         	mpp_audio1          gpio          pmx-audio1-i2s1-spdifo          	mpp_audio1          i2s1/spdifo       pmx-spi0          	  	mpp_spi0            spi0             �         pmx-spi0-gpio         	  	mpp_spi0            gpio          pmx-spi1-4-7            	mpp4 mpp5 mpp6 mpp7         spi1          pmx-spi1-20-23          	mpp20 mpp21 mpp22 mpp23         spi1          pmx-uart1         
  	mpp_uart1           uart1            �         pmx-uart1-gpio        
  	mpp_uart1           gpio          pmx-nand          	  	mpp_nand            nand          pmx-nand-gpo          	  	mpp_nand            gpo       pmx-i2c1            	mpp17 mpp19         twsi          pmx-i2c2            	mpp_audio1          twsi          pmx-ssp-i2c2            	mpp_audio1        	  ssp/twsi          pmx-i2cmux-0            	twsi          
  twsi-opt1            �         pmx-i2cmux-1            	twsi          
  twsi-opt2            �         pmx-i2cmux-2            	twsi          
  twsi-opt3            �            core-clocks@214          marvell,dove-core-clock          l             ü            �         gpio-ctrl@400            marvell,orion-gpio          '            3         l               C             ž        Q            ,           r            <      gpio-ctrl@420            marvell,orion-gpio          '            3         l               C             ž        Q            ,           r   =      real-time-clock@8500             marvell,orion-rtc            l  …             r            global-config@e802c       "   marvell,dove-global-config syscon            l €,         gpio-ctrl@e8400          marvell,orion-gpio          '            3         l „            C         lcd-controller@810000            marvell,dove-lcd             l �             r   .      	   �disabled          lcd-controller@820000            marvell,dove-lcd             l ‚             r   /      	   �disabled          sram@ffffe000         
   mmio-sram            lÿÿà            8   	                                     �         gpu@840000          8              “core             vivante,gc          r   0        J            l „    @       	   �disabled             �               memory           Omemory           l    @         chosen        #  Xconsole=ttyS0,115200n8 earlyprintk           	#address-cells #size-cells compatible model interrupt-parent gpio0 gpio1 gpio2 device_type next-level-cache reg marvell,tauros2-cache-features phandle cores status i2c-parent pinctrl-names pinctrl-0 pinctrl-1 pinctrl-2 controller pcie-mem-aperture pcie-io-aperture ranges msi-parent bus-range assigned-addresses clocks marvell,pcie-port #interrupt-cells interrupt-names interrupts interrupt-map-mask interrupt-map interrupt-controller cell-index spi-max-frequency clock-frequency reg-shift marvell,#interrupts reg-names marvell,crypto-srams marvell,crypto-sram-size dmacap,memcpy dmacap,xor marvell,tx-checksum-limit local-mac-address phys phy-names nr-ports clock-names #phy-cells #reset-cells #power-domain-cells marvell,pmu_pwr_mask marvell,pmu_iso_mask resets #clock-cells marvell,pins marvell,function #gpio-cells gpio-controller ngpios power-domains bootargs 