l8ct( c<Cvariscite,var-stk-om44variscite,var-som-om44ti,omap4460ti,omap4 +7Variscite VAR-STK-OM44chosenaliases?=/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0?B/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0?G/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0EL/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0?Q/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0?V/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0?[/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0?`/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0?e/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0Bj/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0Br/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0Bz/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0B/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0 /ocp/dsp/ocp/ipu@55020000 /connectorcpus+cpu@0arm,cortex-a9cpucpuW0 `O cpu@1arm,cortex-a9cpusram@40304000 mmio-sram@0@interrupt-controller@48241000arm,cortex-a9-gic  H$H$ cache-controller@48242000arm,pl310-cacheH$ 1?local-timer@48240600arm,cortex-a9-twd-timerH$  K  interrupt-controller@48281000ti,omap4-wugen-mpu  H( ocpsimple-pm-busV$ +dl3-noc@44000000ti,omap4-l3-nocDD EK  interconnect@4a300000ti,omap4-l4-wkupsimple-pm-busV  fckJ0J0J0 kaplaia0+$dJ0J1J2segment@0simple-pm-bus+d`` @@PPtarget-module@4000ti,sysc-omap2ti,sysc@@ krevsyscu 0fck+ d@counter@0ti,omap-counter32k target-module@6000ti,sysc-omap4ti,sysc`krev+ d` prm@0ti,omap4-prmsimple-bus  K + d clocks+sys_clkin_ck@110 ti,mux-clock sys_clkin_ck abe_dpll_bypass_clk_mux_ck@108 ti,mux-clockabe_dpll_bypass_clk_mux_ck=abe_dpll_refclk_mux_ck@10c ti,mux-clockabe_dpll_refclk_mux_ck <dbgclk_mux_ckfixed-factor-clockdbgclk_mux_ckl4_wkup_clk_mux_ck@108 ti,mux-clockl4_wkup_clk_mux_cksyc_clk_div_ck@100ti,divider-clocksyc_clk_div_ckusim_ck@1858ti,divider-clockusim_ckXusim_fclk@1858ti,gate-clock usim_fclkXtrace_clk_div_ckti,clkdm-gate-clocktrace_clk_div_ck div_ts_ck@1888ti,divider-clock div_ts_ck  bandgap_ts_fclk@1888ti,gate-clockbandgap_ts_fclkclockdomainsemu_sys_clkdmti,clockdomainemu_sys_clkdml4_wkup_cm@1800 ti,omap4-cm l4_wkup_cm+ dclk@20 ti,clkctrll4_wkup_clkctrl \ emu_sys_cm@1a00 ti,omap4-cm emu_sys_cm+ dclk@20 ti,clkctrlemu_sys_clkctrl prm@300#ti,omap4-prm-instti,omap-prm-instprm@400#ti,omap4-prm-instti,omap-prm-insthprm@500#ti,omap4-prm-instti,omap-prm-instprm@600#ti,omap4-prm-instti,omap-prm-instprm@700#ti,omap4-prm-instti,omap-prm-inst8prm@f00#ti,omap4-prm-instti,omap-prm-instprm@1000#ti,omap4-prm-instti,omap-prm-instprm@1100#ti,omap4-prm-instti,omap-prm-inst@prm@1200#ti,omap4-prm-instti,omap-prm-instprm@1300#ti,omap4-prm-instti,omap-prm-instprm@1400#ti,omap4-prm-instti,omap-prm-instprm@1600#ti,omap4-prm-instti,omap-prm-instprm@1700#ti,omap4-prm-instti,omap-prm-inst prm@1900#ti,omap4-prm-instti,omap-prm-instprm@1b00#ti,omap4-prm-instti,omap-prm-inst@target-module@a000ti,sysc-omap4ti,sysckrev+ dscrm@0ti,omap4-scrm clocks+auxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockauxclk0_src_gate_ckauxclk0_src_mux_ck@310ti,composite-mux-clockauxclk0_src_mux_ck auxclk0_src_ckti,composite-clockauxclk0_src_ck auxclk0_ck@310ti,divider-clock auxclk0_ck 0auxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockauxclk1_src_gate_ck!auxclk1_src_mux_ck@314ti,composite-mux-clockauxclk1_src_mux_ck "auxclk1_src_ckti,composite-clockauxclk1_src_ck!"#auxclk1_ck@314ti,divider-clock auxclk1_ck#1auxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockauxclk2_src_gate_ck$auxclk2_src_mux_ck@318ti,composite-mux-clockauxclk2_src_mux_ck %auxclk2_src_ckti,composite-clockauxclk2_src_ck$%&auxclk2_ck@318ti,divider-clock auxclk2_ck&2auxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockauxclk3_src_gate_ck'auxclk3_src_mux_ck@31cti,composite-mux-clockauxclk3_src_mux_ck (auxclk3_src_ckti,composite-clockauxclk3_src_ck'()auxclk3_ck@31cti,divider-clock auxclk3_ck)3auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clockauxclk4_src_gate_ck *auxclk4_src_mux_ck@320ti,composite-mux-clockauxclk4_src_mux_ck  +auxclk4_src_ckti,composite-clockauxclk4_src_ck*+,auxclk4_ck@320ti,divider-clock auxclk4_ck, 4auxclk5_src_gate_ck@324 ti,composite-no-wait-gate-clockauxclk5_src_gate_ck$-auxclk5_src_mux_ck@324ti,composite-mux-clockauxclk5_src_mux_ck $.auxclk5_src_ckti,composite-clockauxclk5_src_ck-./auxclk5_ck@324ti,divider-clock auxclk5_ck/$5auxclkreq0_ck@210 ti,mux-clockauxclkreq0_ck012345auxclkreq1_ck@214 ti,mux-clockauxclkreq1_ck012345auxclkreq2_ck@218 ti,mux-clockauxclkreq2_ck012345auxclkreq3_ck@21c ti,mux-clockauxclkreq3_ck012345auxclkreq4_ck@220 ti,mux-clockauxclkreq4_ck012345 auxclkreq5_ck@224 ti,mux-clockauxclkreq5_ck012345$clockdomainstarget-module@c000ti,sysc-omap4ti,sysc krevsyscu+ dscm@c000ti,omap4-scm-wkupsegment@10000simple-pm-bus+xd@@PPtarget-module@0ti,sysc-omap2ti,sysckrevsyscsyssu!   fckdbclk+ dgpio@0ti,omap4-gpio K.@P  target-module@4000ti,sysc-omap2ti,sysc@@@krevsyscsyss"u! fck+ d@watchdog@0ti,omap4-wdtti,omap3-wdt KPtarget-module@8000ti,sysc-omap2-timerti,sysckrevsyscsyss' u! fck+ d\ptimer@0ti,omap3430-timer fcktimer_sys_ck K%{  target-module@c000ti,sysc-omap2ti,sysckrevsyscsyss' u! Xfck+ dkeypad@0ti,omap4-keypad Kxkmpu disabledtarget-module@e000ti,sysc-omap4ti,sysc krevsyscu+ dpinmux@40 ti,omap4-padconfpinctrl-single@8+  default67hsusbb1-phy-clk-pinshsusbb1-hub-rst-pins6lan7500-rst-pins7twl6030-wkup-pins{segment@20000simple-pm-bus+d``  00@@PPpptarget-module@0ti,sysc disabled+ dtarget-module@2000ti,sysc disabled+ d target-module@4000ti,sysc disabled+ d@target-module@6000ti,sysc disabled+0d`p 0interconnect@4a000000ti,omap4-l4-cfgsimple-pm-busV8 9fckJJJ kaplaia0+TdJJJJ J (J(0J0segment@0simple-pm-bus+d 00@@PP``pp@  00 ``pp @@PPtarget-module@2000ti,sysc-omap4ti,sysc   krevsyscu+ d scm@0ti,omap4-scm-coresimple-bus+ dscm_conf@0syscon+control-phy@300ti,control-phy-usb2kpowerkcontrol-phy@33cti,control-phy-otghs<kotghs_controljtarget-module@4000ti,sysc-omap4ti,sysc@krev+ d@cm1@0ti,omap4-cm1simple-bus + d clocks+extalt_clkin_ck fixed-clockextalt_clkin_ck.Dpad_clks_src_ck fixed-clockpad_clks_src_ck.:pad_clks_ck@108ti,gate-clock pad_clks_ck:pad_slimbus_core_clks_ck fixed-clockpad_slimbus_core_clks_ck.secure_32k_clk_src_ck fixed-clocksecure_32k_clk_src_ck.slimbus_src_clk fixed-clockslimbus_src_clk.;slimbus_clk@108ti,gate-clock slimbus_clk; sys_32k_ck fixed-clock sys_32k_ck.virt_12000000_ck fixed-clockvirt_12000000_ck. virt_13000000_ck fixed-clockvirt_13000000_ck.]@ virt_16800000_ck fixed-clockvirt_16800000_ck.Yvirt_19200000_ck fixed-clockvirt_19200000_ck.$virt_26000000_ck fixed-clockvirt_26000000_ck.virt_27000000_ck fixed-clockvirt_27000000_ck.virt_38400000_ck fixed-clockvirt_38400000_ck.Itie_low_clock_ck fixed-clocktie_low_clock_ck.utmi_phy_clkout_ck fixed-clockutmi_phy_clkout_ck.xclk60mhsp1_ck fixed-clockxclk60mhsp1_ck.dxclk60mhsp2_ck fixed-clockxclk60mhsp2_ck.exclk60motg_ck fixed-clockxclk60motg_ck.dpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock dpll_abe_ck<=>dpll_abe_x2_ck@1f0ti,omap4-dpll-x2-clockdpll_abe_x2_ck>?dpll_abe_m2x2_ck@1f0ti,divider-clockdpll_abe_m2x2_ck?>P@abe_24m_fclkfixed-factor-clock abe_24m_fclk@abe_clk@108ti,divider-clockabe_clk@gdpll_abe_m3x2_ck@1f4ti,divider-clockdpll_abe_m3x2_ck?>PAcore_hsd_byp_clk_mux_ck@12c ti,mux-clockcore_hsd_byp_clk_mux_ckA,Bdpll_core_ck@120ti,omap4-dpll-core-clock dpll_core_ckB $,(Cdpll_core_x2_ckti,omap4-dpll-x2-clockdpll_core_x2_ckCDdpll_core_m6x2_ck@140ti,divider-clockdpll_core_m6x2_ckD>@Pdpll_core_m2_ck@130ti,divider-clockdpll_core_m2_ckC>0PEddrphy_ckfixed-factor-clock ddrphy_ckEdpll_core_m5x2_ck@13cti,divider-clockdpll_core_m5x2_ckD><PFdiv_core_ck@100ti,divider-clock div_core_ckFQdiv_iva_hs_clk@1dcti,divider-clockdiv_iva_hs_clkFgJdiv_mpu_hs_clk@19cti,divider-clockdiv_mpu_hs_clkFgPdpll_core_m4x2_ck@138ti,divider-clockdpll_core_m4x2_ckD>8PGdll_clk_div_ckfixed-factor-clockdll_clk_div_ckGdpll_abe_m2_ck@1f0ti,divider-clockdpll_abe_m2_ck>Tdpll_core_m3x2_gate_ck@134 ti,composite-no-wait-gate-clockdpll_core_m3x2_gate_ckD4Hdpll_core_m3x2_div_ck@134ti,composite-divider-clockdpll_core_m3x2_div_ckD4Idpll_core_m3x2_ckti,composite-clockdpll_core_m3x2_ckHIdpll_core_m7x2_ck@144ti,divider-clockdpll_core_m7x2_ckD>DPiva_hsd_byp_clk_mux_ck@1ac ti,mux-clockiva_hsd_byp_clk_mux_ckJKdpll_iva_ck@1a0ti,omap4-dpll-clock dpll_iva_ckKL}7Ldpll_iva_x2_ckti,omap4-dpll-x2-clockdpll_iva_x2_ckLMdpll_iva_m4x2_ck@1b8ti,divider-clockdpll_iva_m4x2_ckM>PN}~Ndpll_iva_m5x2_ck@1bcti,divider-clockdpll_iva_m5x2_ckM>PO}] Odpll_mpu_ck@160ti,omap4-dpll-clock dpll_mpu_ckP`dlhdpll_mpu_m2_ck@170ti,divider-clockdpll_mpu_m2_ck>pPper_hs_clk_div_ckfixed-factor-clockper_hs_clk_div_ckAUusb_hs_clk_div_ckfixed-factor-clockusb_hs_clk_div_ckA[l3_div_ck@100ti,divider-clock l3_div_ckQRl4_div_ck@100ti,divider-clock l4_div_ckRlp_clk_div_ckfixed-factor-clocklp_clk_div_ck@mpu_periphclkfixed-factor-clockmpu_periphclkocp_abe_iclk@528ti,divider-clock ocp_abe_iclk S(per_abe_24m_fclkfixed-factor-clockper_abe_24m_fclkTdummy_ck fixed-clock dummy_ck.clockdomainsmpuss_cm@300 ti,omap4-cm mpuss_cm+ dclk@20 ti,clkctrlmpuss_clkctrl tesla_cm@400 ti,omap4-cm tesla_cm+ dclk@20 ti,clkctrltesla_clkctrl gabe_cm@500 ti,omap4-cmabe_cm+ dclk@20 ti,clkctrl abe_clkctrl lStarget-module@8000ti,sysc-omap4ti,sysckrev+ d cm2@0ti,omap4-cm2simple-bus + d clocks+per_hsd_byp_clk_mux_ck@14c ti,mux-clockper_hsd_byp_clk_mux_ckULVdpll_per_ck@140ti,omap4-dpll-clock dpll_per_ckV@DLHWdpll_per_m2_ck@150ti,divider-clockdpll_per_m2_ckWP_dpll_per_x2_ck@150ti,omap4-dpll-x2-clockdpll_per_x2_ckWPXdpll_per_m2x2_ck@150ti,divider-clockdpll_per_m2x2_ckX>PP^dpll_per_m3x2_gate_ck@154 ti,composite-no-wait-gate-clockdpll_per_m3x2_gate_ckXTYdpll_per_m3x2_div_ck@154ti,composite-divider-clockdpll_per_m3x2_div_ckXTZdpll_per_m3x2_ckti,composite-clockdpll_per_m3x2_ckYZdpll_per_m4x2_ck@158ti,divider-clockdpll_per_m4x2_ckX>XPdpll_per_m5x2_ck@15cti,divider-clockdpll_per_m5x2_ckX>\Pdpll_per_m6x2_ck@160ti,divider-clockdpll_per_m6x2_ckX>`P]dpll_per_m7x2_ck@164ti,divider-clockdpll_per_m7x2_ckX>dPdpll_usb_ck@180ti,omap4-dpll-j-type-clock dpll_usb_ck[\dpll_usb_clkdcoldo_ck@1b4ti,fixed-factor-clockdpll_usb_clkdcoldo_ck\>Pdpll_usb_m2_ck@190ti,divider-clockdpll_usb_m2_ck\>P`ducati_clk_mux_ck@100 ti,mux-clockducati_clk_mux_ckQ]func_12m_fclkfixed-factor-clockfunc_12m_fclk^func_24m_clkfixed-factor-clock func_24m_clk_func_24mc_fclkfixed-factor-clockfunc_24mc_fclk^func_48m_fclk@108ti,divider-clockfunc_48m_fclk^func_48mc_fclkfixed-factor-clockfunc_48mc_fclk^func_64m_fclk@108ti,divider-clockfunc_64m_fclkfunc_96m_fclk@108ti,divider-clockfunc_96m_fclk^init_60m_fclk@104ti,divider-clockinit_60m_fclk`cper_abe_nc_fclk@108ti,divider-clockper_abe_nc_fclkTusb_phy_cm_clk32k@640ti,gate-clockusb_phy_cm_clk32k@lclockdomainsl3_init_clkdmti,clockdomainl3_init_clkdm\l4_ao_cm@600 ti,omap4-cm l4_ao_cm+ dclk@20 ti,clkctrll4_ao_clkctrl nl3_1_cm@700 ti,omap4-cml3_1_cm+ dclk@20 ti,clkctrl l3_1_clkctrl l3_2_cm@800 ti,omap4-cml3_2_cm+ dclk@20 ti,clkctrl l3_2_clkctrl ducati_cm@900 ti,omap4-cm ducati_cm + d clk@20 ti,clkctrlducati_clkctrl l3_dma_cm@a00 ti,omap4-cm l3_dma_cm + d clk@20 ti,clkctrll3_dma_clkctrl al3_emif_cm@b00 ti,omap4-cm l3_emif_cm + d clk@20 ti,clkctrll3_emif_clkctrl d2d_cm@c00 ti,omap4-cmd2d_cm + d clk@20 ti,clkctrl d2d_clkctrl ml4_cfg_cm@d00 ti,omap4-cm l4_cfg_cm + d clk@20 ti,clkctrll4_cfg_clkctrl 9l3_instr_cm@e00 ti,omap4-cm l3_instr_cm+ dclk@20 ti,clkctrll3_instr_clkctrl $ ivahd_cm@f00 ti,omap4-cm ivahd_cm+ dclk@20 ti,clkctrlivahd_clkctrl iss_cm@1000 ti,omap4-cmiss_cm+ dclk@20 ti,clkctrl iss_clkctrl ql3_dss_cm@1100 ti,omap4-cm l3_dss_cm+ dclk@20 ti,clkctrll3_dss_clkctrl l3_gfx_cm@1200 ti,omap4-cm l3_gfx_cm+ dclk@20 ti,clkctrll3_gfx_clkctrl l3_init_cm@1300 ti,omap4-cm l3_init_cm+ dclk@20 ti,clkctrll3_init_clkctrl bclock@1400 ti,omap4-cm l4_per_cm+ dclock@20 ti,clkctrll4_per_clkctrl Drclock@1a0 ti,clkctrll4_secure_clkctrl<target-module@56000ti,sysc-omap2ti,sysc``,`(krevsyscsyss#  u! afck+ d`dma-controller@0ti,omap4430-sdmati,omap-sdma0K   target-module@58000ti,sysc-omap2ti,sysckrevsyscsyss#u! bfck+ dPhsi@0 ti,omap4-hsi@Pksysgdd bhsi_fck KGgdd_mpu+ d@hsi-port@2000ti,omap4-hsi-port (ktxrx KChsi-port@3000ti,omap4-hsi-port08ktxrx KDtarget-module@5e000ti,sysc disabled+ d target-module@62000ti,sysc-omap2ti,sysc   krevsyscsyss u bHfck+ d usbhstll@0 ti,usbhs-tll KNtarget-module@64000ti,sysc-omap4ti,sysc@@@krevsyscsyssu b8fck+ d@usbhshost@0ti,usbhs-host+ d cde3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-phyusb@800ti,ohci-omap3 KLusb@c00 ti,ehci-omap  KMftarget-module@66000ti,sysc-omap2ti,sysc```krevsyscsyss u gfckVhhrstctrl+ d`mmu@0ti,omap4-iommu K+segment@80000simple-pm-bus+d      @@PP``pp` `p p        target-module@29000ti,sysc disabled+ dtarget-module@2b000ti,sysc-omap2ti,sysckrevsyscsyss u! b@fck+ dusb_otg_hs@0ti,omap4-musbK\]mcdma8ii @usb2-phyJU] fjr2target-module@2d000ti,sysc-omap2ti,sysckrevsyscsyss u! bfck+ docp2scp@0ti,omap-ocp2scp+ dusb2phy@80 ti,omap-usb2Xfklwkupclkitarget-module@36000ti,sysc-omap2ti,sysc```krevsyscsyssu! mfck+ d`target-module@4d000ti,sysc-omap2ti,sysckrevsyscsyssu! mfck+ dtarget-module@59000ti,sysc-omap4-srti,sysc8ksyscu nfck+ dsmartreflex@0ti,omap4-smartreflex-mpu Ktarget-module@5b000ti,sysc-omap4-srti,sysc8ksyscu nfck+ dsmartreflex@0ti,omap4-smartreflex-iva Kftarget-module@5d000ti,sysc-omap4-srti,sysc8ksyscu nfck+ dsmartreflex@0ti,omap4-smartreflex-core Ktarget-module@60000ti,sysc disabled+ dtarget-module@74000ti,sysc-omap4ti,sysc@@ krevsysc u 9fck+ d@mailbox@0ti,omap4-mailbox Kmbox-ipu  mbox-dsp  target-module@76000ti,sysc-omap2ti,sysc```krevsyscsyss u! 9fck+ d`spinlock@0ti,omap4-hwspinlocksegment@100000simple-pm-bus+`d  00target-module@0ti,sysc-omap4ti,sysc krevsyscu+ dpinmux@40 ti,omap4-padconfpinctrl-single@+  defaultomcpdm-pins(twl6040-pins\`}tsc2004-pinsPRuuart3-pins shsusbb1-pins`           ohsusbb1-phy-rst-pinsLi2c1-pinsyi2c3-pinstmmc1-pins0twl6030-pins^Azuart2-pins xwl12xx-ctrl-pins"$&mmc4-pins0uart1-pins wmcspi1-pins mcsasp-pinsdss-dpi-pins"$&(*,.0246tvxz|~dss-hdmi-pinsZ\^i2c4-pinsmmc5-pins8  gpio-led-pins>@gpio-key-pinsbks8851-irq-pins<hdmi-hpd-pinsX backlight-pinsomap4_padconf_global@5a0sysconsimple-busp+ dpppbias_regulator@60ti,pbias-omap4ti,pbias-omap`ppbias_mmc_omap4pbias_mmc_omap4w@-target-module@2000ti,sysc disabled+ d target-module@8000ti,sysc disabled+ dtarget-module@a000ti,sysc-omap4ti,sysc krevsysc  u, qfck+ dsegment@180000simple-pm-bus+segment@200000simple-pm-bus+hd!!  @ @P P` `p p ! 0!0  !!`!`p!p@!@P!P!!""`"`p"p""""!!target-module@4000ti,sysc disabled+ d@target-module@6000ti,sysc disabled+ d`target-module@a000ti,sysc disabled+ dtarget-module@c000ti,sysc disabled+ dtarget-module@10000ti,sysc disabled+ dtarget-module@12000ti,sysc disabled+ d target-module@14000ti,sysc disabled+ d@target-module@16000ti,sysc disabled+ d`target-module@18000ti,sysc disabled+ dtarget-module@1c000ti,sysc disabled+ dtarget-module@1e000ti,sysc disabled+ dtarget-module@20000ti,sysc disabled+ dtarget-module@26000ti,sysc disabled+ d`target-module@28000ti,sysc disabled+ dtarget-module@2a000ti,sysc disabled+ dsegment@280000simple-pm-bus+segment@300000simple-pm-bus+d042@@2@ `2`p2p2232 2@11@1 1 target-module@0ti,sysc disabled+d@  @@@ ``pp @interconnect@48000000ti,omap4-l4-persimple-pm-busV rfck0HHHHHHkaplaia0ia1ia2ia3+dH H segment@0simple-pm-bus+d  00@@PP``ppPP``pp  00 ` ` p p``pp``pp             @ @ ` ` @     0 0 @ @ P P        P P ` `  0 0 P Ptarget-module@20000ti,sysc-omap2ti,syscPTXkrevsyscsyssu! r0fck+ dserial@0ti,omap4-uart=J.ldefaultsokaytarget-module@32000ti,sysc-omap2-timerti,sysc   krevsyscsyss' u! rfck+ d timer@0ti,omap3430-timerrfcktimer_sys_ck K&target-module@34000ti,sysc-omap4-timerti,sysc@@ krevsyscu r fck+ d@timer@0ti,omap4430-timerr fcktimer_sys_ck K'target-module@36000ti,sysc-omap4-timerti,sysc`` krevsyscu r(fck+ d`timer@0ti,omap4430-timerr(fcktimer_sys_ck K(target-module@3e000ti,sysc-omap4-timerti,sysc krevsyscu r0fck+ dtimer@0ti,omap4430-timerr0fcktimer_sys_ck K-Qtarget-module@40000ti,sysc disabled+ dtarget-module@55000ti,sysc-omap2ti,syscPPQkrevsyscsyssu!r@r@ fckdbclk+ dPgpio@0ti,omap4-gpio K@P  target-module@57000ti,sysc-omap2ti,syscppqkrevsyscsyssu!rHrH fckdbclk+ dpgpio@0ti,omap4-gpio K@P  target-module@59000ti,sysc-omap2ti,sysckrevsyscsyssu!rPrP fckdbclk+ dgpio@0ti,omap4-gpio K @P  vtarget-module@5b000ti,sysc-omap2ti,sysckrevsyscsyssu!rXrX fckdbclk+ dgpio@0ti,omap4-gpio K!@P  target-module@5d000ti,sysc-omap2ti,sysckrevsyscsyssu!r`r` fckdbclk+ dgpio@0ti,omap4-gpio K"@P  ~target-module@60000ti,sysc-omap2ti,sysckrevsyscsyssu! rfck+ di2c@0 ti,omap4-i2c K=+defaulttokay.tsc2004@48 ti,tsc2004Hdefaultu vK disabledtmp105@49 ti,tmp105Ieeprom@50microchip,24c32atmel,24c32Ptarget-module@6a000ti,sysc-omap2ti,syscPTXkrevsyscsyssu! r fck+ dserial@0ti,omap4-uart=H.lokaydefaultwtarget-module@6c000ti,sysc-omap2ti,syscPTXkrevsyscsyssu! r(fck+ dserial@0ti,omap4-uart=I.lokaydefaultxtarget-module@6e000ti,sysc-omap2ti,syscPTXkrevsyscsyssu! r8fck+ dserial@0ti,omap4-uart=F.l disabledtarget-module@70000ti,sysc-omap2ti,sysckrevsyscsyssu! rfck+ di2c@0 ti,omap4-i2c K8+defaultyokay.twl@48H K ti,twl6030  defaultz{rtcti,twl4030-rtcK regulator-vaux1ti,twl6030-vaux1B@-regulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO-regulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusim--^regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxio^regulator-vusbti,twl6030-vusb|regulator-v1v8ti,twl6030-v1v8^regulator-v2v1ti,twl6030-v2v1^usb-comparatorti,twl6030-usbK r|pwmti,twl6030-pwm}pwmledti,twl6030-pwmled}gpadcti,twl6030-gpadcKtwl@4b ti,twl6040Kdefault} Kw ~target-module@72000ti,sysc-omap2ti,sysc   krevsyscsyssu! rfck+ d i2c@0 ti,omap4-i2c K9+ disabledtarget-module@76000ti,sysc-omap4ti,sysc`` krevsyscu rfck+ d`target-module@78000ti,sysc-omap2ti,sysckrevsyscsyss u! r8fck+ delm@0ti,am3352-elm  K disabledtarget-module@86000ti,sysc-omap2-timerti,sysc```krevsyscsyss' u! rfck+ d`timer@0ti,omap3430-timerrfcktimer_sys_ck K.Qtarget-module@88000ti,sysc-omap4-timerti,sysc krevsyscu rfck+ dtimer@0ti,omap4430-timerrfcktimer_sys_ck K/Qtarget-module@90000ti,sysc-omap2ti,sysc   krevsyscu fck+ d rng@0 ti,omap4-rng  K4target-module@96000ti,sysc-omap2ti,sysc `ksysc u rfck+ d `mcbsp@0ti,omap4-mcbspkmpu rfck Kcommon txrx disabledtarget-module@98000ti,sysc-omap4ti,sysc   krevsyscu rfck+ d spi@0ti,omap4-mcspi KA+@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3okaydefaultethernet@0ks8851defaultn6 ~K target-module@9a000ti,sysc-omap4ti,sysc   krevsyscu rfck+ d spi@0ti,omap4-mcspi KB+ +,-.tx0rx0tx1rx1 disabledtarget-module@9c000ti,sysc-omap4ti,sysc   krevsyscu bfck+ d mmc@0ti,omap4-hsmmc KS =>txrx7defaultDPZokaytarget-module@9e000ti,sysc disabled+ d target-module@a2000ti,sysc disabled+ d target-module@a4000ti,sysc disabled+d @ Ptarget-module@a5000ti,sysc-omap2ti,sysc P0 P4 P8krevsyscsyssu! fck+ d Pdes@0 ti,omap4-des KRuttxrxtarget-module@a8000ti,sysc disabled+ d @target-module@ad000ti,sysc-omap4ti,sysc   krevsyscu rfck+ d mmc@0ti,omap4-hsmmc K^ MNtxrx disabledtarget-module@b0000ti,sysc disabled+ d target-module@b2000ti,sysc-omap2ti,sysc   krevsyscsyss!\ rhfck+ d 1w@0 ti,omap3-1w K:target-module@b4000ti,sysc-omap4ti,sysc @ @ krevsyscu bfck+ d @mmc@0ti,omap4-hsmmc KV /0txrx disabledtarget-module@b8000ti,sysc-omap4ti,sysc   krevsyscu rfck+ d spi@0ti,omap4-mcspi K[+tx0rx0 disabledtarget-module@ba000ti,sysc-omap4ti,sysc   krevsyscu rfck+ d spi@0ti,omap4-mcspi K0+FGtx0rx0 disabledtarget-module@d1000ti,sysc-omap4ti,sysc   krevsyscu rfck+ d mmc@0ti,omap4-hsmmc K` 9:txrxokaydefaultD]Pk+wlcore@2 ti,wl1271 K ~Itarget-module@d5000ti,sysc-omap4ti,sysc P P krevsyscu r@fck+ d Pmmc@0ti,omap4-hsmmc K; ;<txrxokaydefaultDP vsegment@200000simple-pm-bus+d55target-module@150000ti,sysc-omap2ti,sysckrevsyscsyssu! rfck+ di2c@0 ti,omap4-i2c K>+okaydefault.target-module@48210000ti,sysc-omap4-simpleti,syscV fck+ dH!mpu ti,omap4-mpuinterconnect@40100000ti,omap4-l4-abesimple-pm-bus@@klaapV+d@IIsegment@0simple-pm-bus+0d  00@@PP``pp  00      IIIII I I0I0I@I@IPIPI`I`IpIpIIIIIIIIIIIIIIIII I I0I0IIIIIIIIIIIIIIIIIIIII I I I I I I I III I target-module@22000ti,sysc-omap2ti,sysc ksysc u S(fck+d I I mcbsp@0ti,omap4-mcbspI kmpudma S(fck Kcommon!"txrx disabledtarget-module@24000ti,sysc-omap2ti,sysc@ksysc u S0fck+d@I@I@mcbsp@0ti,omap4-mcbspI@kmpudma S0fck Kcommontxrx disabledtarget-module@26000ti,sysc-omap2ti,sysc`ksysc u S8fck+d`I`I`mcbsp@0ti,omap4-mcbspI`kmpudma S8fck Kcommontxrx disabledtarget-module@28000ti,sysc-mcaspti,sysc krevsysc u S fck+0dII IImcasp@0ti,omap4-mcasp-audio Ikmpudat Kmtxtx S fck disabledtarget-module@2e000ti,sysc-omap4ti,sysc krevsyscu Sfck+dIIdmic@0ti,omap4-dmicIkmpudma KrCup_link disabledtarget-module@30000ti,sysc-omap2ti,sysckrevsyscsyss"u! Shfck+dIIwatchdog@0ti,omap4-wdtti,omap3-wdt KPtarget-module@32000ti,sysc-omap4ti,sysc   krevsyscu Sfck+d I I okaydefaultmcpdm@0ti,omap4-mcpdmI kmpudma KpABup_linkdn_linkpdmclktarget-module@38000ti,sysc-omap4-timerti,sysc krevsyscu SHfck+dIItimer@0ti,omap4430-timerISHfcktimer_sys_ck K)target-module@3a000ti,sysc-omap4-timerti,sysc krevsyscu SPfck+dIItimer@0ti,omap4430-timerISPfcktimer_sys_ck K*target-module@3c000ti,sysc-omap4-timerti,sysc krevsyscu SXfck+dIItimer@0ti,omap4430-timerISXfcktimer_sys_ck K+target-module@3e000ti,sysc-omap4-timerti,sysc krevsyscu S`fck+dIItimer@0ti,omap4430-timerIS`fcktimer_sys_ck K,Qtarget-module@80000ti,sysc disabled+dIItarget-module@a0000ti,sysc disabled+d I I target-module@c0000ti,sysc disabled+d I I target-module@f1000ti,sysc-omap4ti,sysc krevsysc u Sfck+dIItarget-module@50000000ti,sysc-omap2ti,syscPPPkrevsyscsyss u! fck+dPP@gpmc@50000000ti,omap4430-gpmcP+ KrxtxRfck  @P disabledtarget-module@52000000ti,sysc-omap4ti,syscRR krevsyscu,V qfck+ dRtarget-module@54000000ti,sysc-omap4-simpleti,syscV fck+ dTpmuarm,cortex-a9-pmuK67target-module@55082000ti,sysc-omap2ti,syscU U U krevsyscsyss u fck8rstctrl dU +mmu@0ti,omap4-iommu Kd+target-module@4012c000ti,sysc-omap4ti,sysc@@ krevsyscu S@fck+d@IItarget-module@4e000000ti,sysc-omap2ti,syscNN krevsysc u dN+dmm@0 ti,omap4-dmm Kqtarget-module@4c000000ti,sysc-omap4-simpleti,syscLkrev fckp+ dLemif@0 ti,emif-4d Kn'<target-module@4d000000ti,sysc-omap4-simpleti,syscMkrev fckp+ dMemif@0 ti,emif-4d Ko'<dsp ti,omap4-dsp OZh gaomap4-dsp-fw.xe64To disabledipu@55020000 ti,omap4-ipuUkl2ramZ88 aomap4-ipu-fw.xem3o disabledtarget-module@4b501000ti,sysc-omap2ti,syscKPKPKPkrevsyscsyssu! fck+ dKPaes@0 ti,omap4-aes KUontxrxtarget-module@4b701000ti,sysc-omap2ti,syscKpKpKpkrevsyscsyssu! fck+ dKpaes@0 ti,omap4-aes K@rqtxrxtarget-module@4b100000ti,sysc-omap3-shamti,syscKKKkrevsyscsyss u! (fck+ dKsham@0ti,omap4-sham K3wrxregulator-abb-mpu ti,abb-v2abb_mpu+v2okayJ0{J0`J"h'kbase-addressint-addressefuse-addressxO1regulator-abb-iva ti,abb-v2abb_iva+v2okayJ0{J0`J"h'kbase-addressint-addressefuse-addressx~e  target-module@56000000ti,sysc-omap4ti,syscVV krevsyscuV fck+ dVgpu@0#ti,omap4430-gpuimg,powervr-sgx540 Ktarget-module@58000000ti,sysc-omap2ti,syscXX krevsyss!V0 fckhdmi_clksys_clktv_clk+ dXdss@0 ti,omap4-dssokay fck+ dtarget-module@1000ti,sysc-omap2ti,sysckrevsyscsyss u !  fcksys_clk+ ddispc@0ti,omap4-dispc K fcktarget-module@2000ti,sysc-omap2ti,sysc   krevsyscsyss u!  fcksys_clk+ d encoder@0 disabledRfckicktarget-module@3000ti,sysc-omap2ti,sysc0krev sys_clk+ d0encoder@0ti,omap4-venc disabled fcktarget-module@4000ti,sysc-omap2ti,sysc@@@krevsyscsyss u!+ d@encoder@0 ti,omap4-dsi@ kprotophypll K5 disabled  fcksys_clk+target-module@5000ti,sysc-omap2ti,syscPPPkrevsyscsyss u!+ dPencoder@0 ti,omap4-dsi@ kprotophypll KT disabled  fcksys_clk+target-module@6000ti,sysc-omap4ti,sysc`` krevsyscu  fckdss_clk+ d` encoder@0ti,omap4-hdmi kwppllphycore Keokay  fcksys_clkL audio_txdefaultportendpointtarget-module@5a000000ti,sysc-omap4ti,syscZZ krevsysc  uVrstctrl fck+dZZ[[iva ti,ivahdbandgap@4a002260J"`J#,J#xti,omap4460-bandgap K~ thermal-zonescpu_thermal"\۫tripscpu_alert/;passivecpu_crit/H; criticalcooling-mapsmap0F Kmemory@80000000memory@soundti,abe-twl6040 ZVAR-SOM-OM44cIpyLHeadset StereophoneHSOLHeadset StereophoneHSORAFMLLine InAFMRLine Inhsusb1_phyusb-nop-xceivdefault ~3 main_clk.$ffixedregulator-vbatregulator-fixedVBAT2Z2Z^wl12xx_vmmcdefaultregulator-fixedvwl1271w@w@  pleds gpio-ledsdefaultled0var:green:led0 ~  heartbeatled1var:green:led1 ~ gpio-keys gpio-keysdefault+user-key@184user ~connectorhdmi-connectordefaulthdmia portendpoint compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3mmc0mmc1mmc2mmc3mmc4serial0serial1serial2serial3rproc0rproc1display0device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-points#cooling-cellsphandleinterrupt-controller#interrupt-cellscache-unifiedcache-levelinterruptspower-domainsrangesreg-namesti,sysc-sidle#clock-cellsclock-output-namesti,index-starts-at-oneti,bit-shiftclock-multclock-divti,max-divti,dividers#power-domain-cells#reset-cellsti,sysc-maskti,syss-maskti,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsstatus#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsclock-frequencyti,autoidle-shiftti,invert-autoidle-bitti,index-power-of-twoassigned-clock-ratesti,clock-divti,clock-multti,sysc-midle#dma-cellsdma-channelsdma-requestsinterrupt-namesport1-moderemote-wakeup-connectedphysresetsreset-names#iommu-cellsusb-phyphy-namesmultipointnum-epsram-bitsctrl-moduleinterface-typepower#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellssysconregulator-nameregulator-min-microvoltregulator-max-microvoltti,sysc-delay-usinterrupts-extendedti,timer-pwmregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,buffer-sizedmasdma-namesti,spi-num-csspi-max-frequencyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardref-clock-frequencycd-gpiossramop-modeserial-dirti,timer-dspti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsti,iommu-bus-err-backphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertti,bootregiommusfirmware-namemboxesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdda-supplyremote-endpoint#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosvcc-supplyregulator-boot-onstartup-delay-uslabellinux,default-triggerlinux,codewakeup-sourcehpd-gpios