Ðþí  Å   8  ·ð   (            &  ·¸                                                      µ   google,veyron-mighty-rev5 google,veyron-mighty-rev4 google,veyron-mighty-rev3 google,veyron-mighty-rev2 google,veyron-mighty-rev1 google,veyron-mighty google,veyron rockchip,rk3288             &            7Google Mighty      aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            ‚/i2c@ff140000            ‡/i2c@ff660000            Œ/i2c@ff150000            ‘/i2c@ff160000            –/i2c@ff170000            ›/serial@ff180000             £/serial@ff190000             «/serial@ff690000             ³/serial@ff1b0000             »/serial@ff1c0000             Ã/spi@ff110000            È/spi@ff120000            Í/spi@ff130000            Ò/mmc@ff0f0000            ×/mmc@ff0c0000            Ü/spi@ff110000/ec@0/i2c-tunnel         arm-pmu          arm,cortex-a12-pmu        0   â       —          ˜          ™          š            í                  cpus                                       rockchip,rk3066-smp               cpu@500         cpu          arm,cortex-a12          '           +               2           F           U              \  r        v   	        ‚         cpu@501         cpu          arm,cortex-a12          '          +              2           F           U              \  r        ‚         cpu@502         cpu          arm,cortex-a12          '          +              2           F           U              \  r        ‚         cpu@503         cpu          arm,cortex-a12          '          +              2           F           U              \  r        ‚            opp-table-0          operating-points-v2          Š        ‚      opp-126000000           •    ‚›€        œ »         ª  œ@      opp-216000000           •    ßæ         œ »       opp-408000000           •    Q–         œ »       opp-600000000           •    #ÃF         œ »       opp-696000000           •    )|         œ ~ð      opp-816000000           •    0£,         œ B@      opp-1008000000          •    <Ü         œ �      opp-1200000000          •    G†Œ         œ Èà      opp-1416000000          •    Tfr         œ O€      opp-1512000000          •    ZJ         œ Ð      opp-1608000000          •    _Ø"         œ Ö       opp-1704000000          •    e�ú         œ ™p      opp-1800000000          •    kIÒ         œ \À         reserved-memory                                   »   dma-unusable@fe000000           '    þ                   oscillator           fixed-clock         Ân6         Òxin24m          å            ‚   
      timer            arm,armv7-timer          ò      0   â                              
          Ân6                timer@ff810000           rockchip,rk3288-timer           '    ÿ�                   â       H           U     a   
        -pclk timer        display-subsystem            rockchip,display-subsystem          9            mmc@ff0c0000             rockchip,rk3288-dw-mshc         ?ðÑ€         U     È      D      r      v        -biu ciu ciu-drive ciu-sample            M            â                   '    ÿ        @         +      €        Xreset           dokay            k            u         ‡        ˜   È        ª                 ³   Z         Ñ         Þ         ë         ø                              default         -                          7      
          mmc@ff0d0000             rockchip,rk3288-dw-mshc         ?ðÑ€         U     É      E      s      w        -biu ciu ciu-drive ciu-sample            M            â       !           '    ÿ        @         +      �        Xreset           dokay            k            ‡         @         M        c            n        default         -                  Ñ         Þ         ë         ø                                                   btmrvl@2             marvell,sd8897-bt           '            &            â              |           default         -            mmc@ff0e0000             rockchip,rk3288-dw-mshc         ?ðÑ€         U     Ê      F      t      x        -biu ciu ciu-drive ciu-sample            M            â       "           '    ÿ        @         +      ‚        Xreset         	  ddisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         ?ðÑ€         U     Ë      G      u      y        -biu ciu ciu-drive ciu-sample            M            â       #           '    ÿ        @         +      ƒ        Xreset           dokay            k            u        ³   ž         �         š        c            n        default         -          !      saradc@ff100000          rockchip,saradc         '    ÿ                  â       $           ©           U      I     [        -saradc apb_pclk         +      W        Xsaradc-apb        	  ddisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         U      A     R        -spiclk apb_pclk         »   "      "           Àtx rx            â       ,           default         -   #   $   %   &        '    ÿ                                           dokay       ec@0             google,cros-ec-spi          '            Ê            &            â              default         -   '        ç -ÆÀ   i2c-tunnel           google,cros-ec-i2c-tunnel           ù                                 sbs-battery@b            sbs,sbs-battery         '                                  keyboard-controller          google,cros-ec-keyb         4           D            W     D  q  ; < = > ? @ A	 B	 C  D  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	 Ž + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i            spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         U      B     S        -spiclk apb_pclk         »   "      "           Àtx rx            â       -           default         -   (   )   *   +        '    ÿ                                         	  ddisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         U      C     T        -spiclk apb_pclk         »   "      "           Àtx rx            â       .           default         -   ,   -   .   /        '    ÿ                                           dokay            ~      flash@0          jedec,spi-nor           çúð€        '             i2c@ff140000             rockchip,rk3288-i2c         '    ÿ                  â       >                                     -i2c         U     M        default         -   0        dokay            Â €        ‘   2        ©   d   tpm@20           infineon,slb9645tt          '             À         i2c@ff150000             rockchip,rk3288-i2c         '    ÿ                  â       ?                                     -i2c         U     O        default         -   1      	  ddisabled          i2c@ff160000             rockchip,rk3288-i2c         '    ÿ                  â       @                                     -i2c         U     P        default         -   2        dokay            Â €        ‘   2        ©  ,   ts3a227e@3b          ti,ts3a227e         '   ;         &   3         â              default         -   4        Ø           ‚   £      trackpad@15          elan,ekth3000           '            &            â              default         -   5        ã   6         î         i2c@ff170000             rockchip,rk3288-i2c         '    ÿ                  â       A                                     -i2c         U     Q        default         -   7      	  ddisabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart           '    ÿ                  â       7           ü                      U      M     U        -baudclk apb_pclk            »   "      "           Àtx rx           default         -   8   9   :        dokay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart           '    ÿ                  â       8           ü                      U      N     V        -baudclk apb_pclk            »   "      "           Àtx rx           default         -   ;        dokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart           '    ÿi                  â       9           ü                      U      O     W        -baudclk apb_pclk            default         -   <        dokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart           '    ÿ                  â       :           ü                      U      P     X        -baudclk apb_pclk            »   "      "           Àtx rx           default         -   =      	  ddisabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart           '    ÿ                  â       ;           ü                      U      Q     Y        -baudclk apb_pclk            »   "   	   "   
        Àtx rx           default         -   >      	  ddisabled          dma-controller@ff250000          arm,pl330 arm,primecell         '    ÿ%        @          â                                                 9        U      Â      	  -apb_pclk            ‚   "      thermal-zones      reserve-thermal         P  è        f  ˆ        t   ?          cpu-thermal         P   d        f  ˆ        t   ?      trips      cpu_alert0          „ p        �  Ð        "passive         ‚   @      cpu_alert1          „ $ø        �  Ð        "passive         ‚   A      cpu_crit            „ †         �  Ð      	  "critical             cooling-maps       map0            ›   @      0      ÿÿÿÿ      ÿÿÿÿ      ÿÿÿÿ      ÿÿÿÿ         map1            ›   A      0      ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            gpu-thermal         P   d        f  ˆ        t   ?      trips      gpu_alert0          „ 4        �  Ð        "passive         ‚   B      gpu_crit            „ †         �  Ð      	  "critical             cooling-maps       map0            ›   B            Cÿÿÿÿÿÿÿÿ               tsadc@ff280000           rockchip,rk3288-tsadc           '    ÿ(                  â       %           U      H     Z        -tsadc apb_pclk          +      Ÿ      
  Xtsadc-apb           init default sleep          -   D        ¯   E        ¹   D        Ã           Ù   F        æ èH        dokay            ý                      ‚   ?      ethernet@ff290000            rockchip,rk3288-gmac            '    ÿ)                  â                            /macirq eth_wake_irq         Ù   F      8  U      —      f      g      c      ˜      Ä     ]      M  -stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            +      B      
  Xstmmaceth         	  ddisabled          usb@ff500000             generic-ehci            '    ÿP                  â                  U     Â        ?   G        Dusb         dokay             N      usb@ff520000             generic-ohci            '    ÿR                  â       )           U     Â        ?   G        Dusb       	  ddisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           '    ÿT                  â                  U     Ã        -otg         dhost            ?   H      	  Dusb2-phy             l        dokay             ƒ      usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2           '    ÿX                  â                  U     Á        -otg         dhost            š           ¬          »      €   €   @   @            ?   I      	  Dusb2-phy            dokay            Ê      z        Ú   I         ƒ      usb@ff5c0000             generic-ehci            '    ÿ\                  â                  U     Ä      	  ddisabled          dma-controller@ff600000          arm,pl330 arm,primecell         '    ÿ`        @          â                                                  9        U      Á      	  -apb_pclk          	  ddisabled          i2c@ff650000             rockchip,rk3288-i2c         '    ÿe                  â       <                                     -i2c         U     L        default         -   J        dokay            Â €        ‘   2        ©   d   pmic@1b          rockchip,rk808          '           Òxin32k wifibt_32kin          &   3         â              default         -   K   L   M         ñ         î        å                                 *           6           B   N        N           Z           f           s   6        €           �   N        ™   N        ¦                            ‚   ˜   regulators     DCDC_REG1           °vdd_arm          ¿         Ó        å q°        ý            q        ‚   	   regulator-state-mem          *         DCDC_REG2           °vdd_gpu          ¿         Ó        å 5         ý Ð          q        ‚   …   regulator-state-mem          *         DCDC_REG3           °vcc135_ddr           ¿         Ó   regulator-state-mem          C         DCDC_REG4           °vcc_18           ¿         Ó        å w@        ý w@        ‚      regulator-state-mem          C        [ w@         LDO_REG1          	  °vcc33_io             ¿         Ó        å 2Z         ý 2Z         ‚   6   regulator-state-mem          C        [ 2Z          LDO_REG3            °vdd_10           ¿         Ó        å B@        ý B@   regulator-state-mem          C        [ B@         LDO_REG7            °vdd10_lcd_pwren_h            ¿         Ó        å &%         ý &%    regulator-state-mem          *         SWITCH_REG1       
  °vcc33_lcd            ¿         Ó        ‚   d   regulator-state-mem          *         LDO_REG6            °vcc18_codec          ¿         Ó        å w@        ý w@        ‚   e   regulator-state-mem          *         LDO_REG4          	  °vccio_sd            å w@        ý 2Z         ‚      regulator-state-mem          *         LDO_REG5          	  °vcc33_sd            å 2Z         ý 2Z         ‚      regulator-state-mem          *         LDO_REG8          
  °vcc33_ccd            ¿         Ó        å 2Z         ý 2Z    regulator-state-mem          *         LDO_REG2            °mic_vcc          ¿         Ó        å w@        ý w@   regulator-state-mem          *                  i2c@ff660000             rockchip,rk3288-i2c         '    ÿf                  â       =                                     -i2c         U     N        default         -   O        dokay            Â †         ‘   2        ©      max98090@10          maxim,max98090          '            &   P         â              -mclk            U      q        default         -   Q        ‚   ¢         pwm@ff680000             rockchip,rk3288-pwm         '    ÿh                 w           default         -   R        U     _        dokay            ‚   ©      pwm@ff680010             rockchip,rk3288-pwm         '    ÿh                w           default         -   S        U     _        dokay            ‚   ž      pwm@ff680020             rockchip,rk3288-pwm         '    ÿh                 w           default         -   T        U     _      	  ddisabled          pwm@ff680030             rockchip,rk3288-pwm         '    ÿh 0               w           default         -   U        U     _      	  ddisabled          sram@ff700000         
   mmio-sram           '    ÿp       €                                  »        ÿp   €    smp-sram@0           rockchip,rk3066-smp-sram            '                sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram          '    ÿr               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd           '    ÿs                 ‚      power-controller          !   rockchip,rk3288-power-controller            ‚                                     ‚   i   power-domain@9          '   	      È  U      Ê      Í      È      Ì      Å      Æ      ¾      ¿     Ô     Õ     Ö     Ù     Ñ     Ò     c     h     g     f     d     e      h      i      l      k      j      $  –   V   W   X   Y   Z   [   \   ]   ^        ‚          power-domain@11         '           U      Ï      o      p        –   _   `        ‚          power-domain@12         '           U      Ð     Ü        –   a        ‚          power-domain@13         '           U      À        –   b   c        ‚             reboot-mode          syscon-reboot-mode          �   ”        ¤RBÃ         °RBÃ        ¾RBÃ	        ÎRBÃ         syscon@ff740000          rockchip,rk3288-sgrf syscon         '    ÿt               clock-controller@ff760000            rockchip,rk3288-cru         '    ÿv                 U   
        -xin24m          Ù   F        å           Ú         H  Ê                        Ñ     Ý     j      Ò     Þ     k      $  ç#g¸€×„ Íe á£ ðÑ€xhÀá£ ðÑ€xhÀ        ‚         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd           '    ÿw                 ‚   F   edp-phy          rockchip,rk3288-dp-phy          U      h        -24m         ü            dokay            ‚   y      io-domains        "   rockchip,rk3288-io-voltage-domain           dokay            	   6        	           	           	*   6        	:   6        	H   d        	T           	`   e        	m         usbphy           rockchip,rk3288-usb-phy                                   dokay       usb-phy@320         ü            '           U      ]        -phyclk          å            +      …      
  Xphy-reset           ‚   I      usb-phy@334         ü            '  4        U      ^        -phyclk          å            +      ˆ      
  Xphy-reset           ‚   G      usb-phy@348         ü            '  H        U      _        -phyclk          å            +      ‹      
  Xphy-reset           ‚   H            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt         '    ÿ€                 U     p         â       O           dokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif         '    ÿ‹                 	{            U      T     Ð      
  -mclk hclk           »   f           Àtx           â       6           default         -   g        Ù   F      	  ddisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s         '    ÿ‰                 	{             â       5           U      R     Î        -i2s_clk i2s_hclk            »   f       f           Àtx rx           default         -   h        	Œ           	§           dokay            ‚   ¡      crypto@ff8a0000          rockchip,rk3288-crypto          '    ÿŠ        @          â       0            U      Ç     Í      }      Á        -aclk hclk sclk apb_pclk         +      ®        Xcrypto-rst        iommu@ff900800           rockchip,iommu          '    ÿ�        @         â                  U      Ê     Ô        -aclk iface          	Á          	  ddisabled          iommu@ff914000           rockchip,iommu           '    ÿ‘@            ÿ‘P                 â                  U      Í     Õ        -aclk iface          	Á             	Î      	  ddisabled          rga@ff920000             rockchip,rk3288-rga         '    ÿ’        €         â                  U      È     Ö      j        -aclk hclk sclk          	é   i   	        +      i      l      m        Xcore axi ahb          vop@ff930000             rockchip,rk3288-vop          '    ÿ“        œ    ÿ“                 â                  U      Å      ¾     Ñ        -aclk_vop dclk_vop hclk_vop          	é   i   	        +      d      e      f        Xaxi ahb dclk            	÷   j        dokay       port                                      ‚      endpoint@0          '            	þ   k        ‚   €      endpoint@1          '           	þ   l        ‚   {      endpoint@2          '           	þ   m        ‚   t      endpoint@3          '           	þ   n        ‚   w            iommu@ff930300           rockchip,iommu          '    ÿ“                 â                  U      Å     Ñ        -aclk iface          	é   i   	        	Á            dokay            ‚   j      vop@ff940000             rockchip,rk3288-vop          '    ÿ”        œ    ÿ”                 â                  U      Æ      ¿     Ò        -aclk_vop dclk_vop hclk_vop          	é   i   	        +      °      ±      ²        Xaxi ahb dclk            	÷   o        dokay       port                                      ‚      endpoint@0          '            	þ   p        ‚   �      endpoint@1          '           	þ   q        ‚   |      endpoint@2          '           	þ   r        ‚   u      endpoint@3          '           	þ   s        ‚   x            iommu@ff940300           rockchip,iommu          '    ÿ”                 â                  U      Æ     Ò        -aclk iface          	é   i   	        	Á            dokay            ‚   o      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi           '    ÿ–        @          â                  U      ~     d      	  -ref pclk            	é   i   	        Ù   F      	  ddisabled       ports                                port@0          '                                 endpoint@0          '            	þ   t        ‚   m      endpoint@1          '           	þ   u        ‚   r         port@1          '               lvds@ff96c000            rockchip,rk3288-lvds            '    ÿ–À       @         U     g      
  -pclk_lvds           lcdc            -   v        	é   i   	        Ù   F      	  ddisabled       ports                                port@0          '                                 endpoint@0          '            	þ   w        ‚   n      endpoint@1          '           	þ   x        ‚   s         port@1          '               dp@ff970000          rockchip,rk3288-dp          '    ÿ—        @          â       b           Ê      h        Ú   
        U      i     c        -dp pclk         ?   y        Ddp          	é   i   	        +      o        Xdp          Ù   F        dokay            default         -   z   ports                                port@0          '                                 endpoint@0          '            	þ   {        ‚   l      endpoint@1          '           	þ   |        ‚   q         port@1          '                                endpoint@0          '            	þ   }        ‚   ­               hdmi@ff980000            rockchip,rk3288-dw-hdmi         '    ÿ˜                             â       g           U     h      m      n        -iahb isfr cec           	é   i   	        Ù   F        	{            dokay            default unwedge         -   ~        ¯           ‚   ¤   ports                                port@0          '                                 endpoint@0          '            	þ   €        ‚   k      endpoint@1          '           	þ   �        ‚   p         port@1          '               video-codec@ff9a0000             rockchip,rk3288-vpu         '    ÿš                  â       	          
         
  /vepu vdpu           U      Ð     Ü      
  -aclk hclk           	÷   ‚        	é   i         iommu@ff9a0800           rockchip,iommu          '    ÿš                 â                  U      Ð     Ü        -aclk iface          	Á            	é   i           ‚   ‚      video-codec@ff9c0000             rockchip,rk3288-vdec            '    ÿœ        @         â                   U      Ï     Û      o      p        -axi ahb cabac core           Ê      Ï     Û      o      p        ç×„ õá á£ á£         	÷   ƒ        	é   i         iommu@ff9c0440           rockchip,iommu           '    ÿœ@       @    ÿœ€       @         â       o           U      Ï     Û        -aclk iface          	Á            	é   i           ‚   ƒ      gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760          '    ÿ£               $   â                                      /job mmu gpu         U      À        2   „        F           	é   i           dokay            
   …        ‚   C      opp-table-1          operating-points-v2         ‚   „   opp-100000000           •    õá         œ ~ð      opp-200000000           •    ëÂ         œ ~ð      opp-300000000           •    á£         œ B@      opp-400000000           •    ×„         œ Èà      opp-600000000           •    #ÃF         œ Ð         qos@ffaa0000             rockchip,rk3288-qos syscon          '    ÿª                  ‚   b      qos@ffaa0080             rockchip,rk3288-qos syscon          '    ÿª €                ‚   c      qos@ffad0000             rockchip,rk3288-qos syscon          '    ÿ­                  ‚   W      qos@ffad0100             rockchip,rk3288-qos syscon          '    ÿ­                 ‚   X      qos@ffad0180             rockchip,rk3288-qos syscon          '    ÿ­€                ‚   Y      qos@ffad0400             rockchip,rk3288-qos syscon          '    ÿ­                 ‚   Z      qos@ffad0480             rockchip,rk3288-qos syscon          '    ÿ­€                ‚   [      qos@ffad0500             rockchip,rk3288-qos syscon          '    ÿ­                 ‚   V      qos@ffad0800             rockchip,rk3288-qos syscon          '    ÿ­                 ‚   \      qos@ffad0880             rockchip,rk3288-qos syscon          '    ÿ­€                ‚   ]      qos@ffad0900             rockchip,rk3288-qos syscon          '    ÿ­	                 ‚   ^      qos@ffae0000             rockchip,rk3288-qos syscon          '    ÿ®                  ‚   a      qos@ffaf0000             rockchip,rk3288-qos syscon          '    ÿ¯                  ‚   _      qos@ffaf0080             rockchip,rk3288-qos syscon          '    ÿ¯ €                ‚   `      dma-controller@ffb20000          arm,pl330 arm,primecell         '    ÿ²        @          â                                                  9        U      Á      	  -apb_pclk            ‚   f      efuse@ffb40000           rockchip,rk3288-efuse           '    ÿ´                                           U     q        -pclk_efuse     cpu-id@7            '            cpu_leakage@17          '               interrupt-controller@ffc01000            arm,gic-400          
        
/                       @  '    ÿÀ            ÿÀ              ÿÀ@             ÿÀ`                  â      	          ‚         pinctrl          rockchip,rk3288-pinctrl         Ù   F                                             »        default sleep           -   †   ‡   ˆ   ‰   Š        ¯   †   ‡   ˆ   ‹   Œ   gpio@ff750000            rockchip,gpio-bank          '    ÿu                  â       Q           U     @         
@        
P            
        
/         ç  
\PMIC_SLEEP_AP DDRIO_PWROFF DDRIO_RETEN TS3A227E_INT_L PMIC_INT_L PWR_KEY_L AP_LID_INT_L EC_IN_RW AC_PRESENT_AP RECOVERY_SW_L OTP_OUT HOST1_PWR_EN USBOTG_PWREN_H AP_WARM_RESET_H nFALUT2 I2C0_SDA_PMIC I2C0_SCL_PMIC SUSPEND_L USB_INT          ‚   3      gpio@ff780000            rockchip,gpio-bank          '    ÿx                  â       R           U     A         
@        
P            
        
/         gpio@ff790000            rockchip,gpio-bank          '    ÿy                  â       S           U     B         
@        
P            
        
/         M  
\CONFIG0 CONFIG1 CONFIG2     CONFIG3  EMMC_RST_L   BL_PWR_EN AVDD_1V8_DISP_EN            ‚   —      gpio@ff7a0000            rockchip,gpio-bank          '    ÿz                  â       T           U     C         
@        
P            
        
/         ‚  
\FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7         FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO         gpio@ff7b0000            rockchip,gpio-bank          '    ÿ{                  â       U           U     D         
@        
P            
        
/         ³  
\                UART0_RXD UART0_TXD UART0_CTS UART0_RTS SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE          ‚         gpio@ff7c0000            rockchip,gpio-bank          '    ÿ|                  â       V           U     E         
@        
P            
        
/         A  
\            SPI0_CLK SPI0_CS0 SPI0_TXD SPI0_RXD    VCC50_HDMI_EN            ‚   œ      gpio@ff7d0000            rockchip,gpio-bank          '    ÿ}                  â       W           U     F         
@        
P            
        
/         °  
\I2S0_SCLK I2S0_LRCK_RX I2S0_LRCK_TX I2S0_SDI I2S0_SDO0 HP_DET_H ALS_INT INT_CODEC I2S0_CLK I2C2_SDA I2C2_SCL MICDET     SDMMC_D0 SDMMC_D1 SDMMC_D2 SDMMC_D3 SDMMC_CLK SDMMC_CMD         ‚   P      gpio@ff7e0000            rockchip,gpio-bank          '    ÿ~                  â       X           U     G         
@        
P            
        
/         â  
\LCDC_BL PWM_LOG BL_EN TRACKPAD_INT TPM_INT_H SDMMC_DET_L AP_FLASH_WP_L EC_INT CPU_NMI DVSOK SDMMC_WP EDP_HPD DVS1 nFALUT1 LCD_EN DVS2 VCC5V_GOOD_H I2C4_SDA_TP I2C4_SCL_TP I2C5_SDA_HDMI I2C5_SCL_HDMI 5V_DRV UART2_RXD UART2_TXD           ‚         gpio@ff7f0000            rockchip,gpio-bank          '    ÿ                  â       Y           U     H         
@        
P            
        
/         ^  
\RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         
l            �      hdmi-cec-c7         
l            �      hdmi-ddc             
l            �            �        ‚   ~      hdmi-ddc-unwedge             
l             Ž            �        ‚         vcc50-hdmi-en           
l             �        ‚   �         pcfg-output-low          
z        ‚   Ž      pcfg-pull-up             
…        ‚   �      pcfg-pull-down           
’        ‚   ‘      pcfg-pull-none           
¡        ‚   �      pcfg-pull-none-12ma          
¡        
®           ‚   “      suspend    global-pwroff           
l              �        ‚   ˆ      ddrio-pwroff            
l             �        ‚   ‡      ddr0-retention          
l             �        ‚   †      ddr1-retention          
l             �      suspend-l-wake          
l              Ž        ‚   ‰      suspend-l-sleep         
l              �        ‚   ‹         edp    edp-hpd         
l            ‘        ‚   z         i2c0       i2c0-xfer            
l             �             �        ‚   J         i2c1       i2c1-xfer            
l            �            �        ‚   0         i2c2       i2c2-xfer            
l      	      �      
      �        ‚   O         i2c3       i2c3-xfer            
l            �            �        ‚   1         i2c4       i2c4-xfer            
l            �            �        ‚   2         i2c5       i2c5-xfer            
l            �            �        ‚   7         i2s0       i2s0-bus          `  
l             �            �            �            �            �            �        ‚   h         lcdc       lcdc-ctl          @  
l            �            �            �            �        ‚   v         sdmmc      sdmmc-clk           
l            ’        ‚         sdmmc-cmd           
l            ’        ‚         sdmmc-cd            
l            �      sdmmc-bus1          
l            �      sdmmc-bus4        @  
l            ’            ’            ’            ’        ‚         sdmmc-cd-disabled           
l             �        ‚         sdmmc-cd-pin            
l             �        ‚         sdmmc-wp-pin            
l      
       �        ‚            sdio0      sdio0-bus1          
l            �      sdio0-bus4        @  
l            ’            ’            ’            ’        ‚         sdio0-cmd           
l            ’        ‚         sdio0-clk           
l            ’        ‚         sdio0-cd            
l            �      sdio0-wp            
l            �      sdio0-pwr           
l            �      sdio0-bkpwr         
l            �      sdio0-int           
l            �      wifienable-h            
l             �        ‚   ™      bt-enable-l         
l             �      bt-host-wake            
l             ‘      bt-host-wake-l          
l             �        ‚         bt-dev-wake-sleep           
l             Ž        ‚   Œ      bt-dev-wake-awake           
l             �        ‚   Š      bt-dev-wake         
l             �         sdio1      sdio1-bus1          
l            �      sdio1-bus4        @  
l            �            �            �            �      sdio1-cd            
l            �      sdio1-wp            
l            �      sdio1-bkpwr         
l            �      sdio1-int           
l            �      sdio1-cmd           
l            �      sdio1-clk           
l            �      sdio1-pwr           
l      	      �         emmc       emmc-clk            
l            ’        ‚         emmc-cmd            
l            ’        ‚          emmc-pwr            
l      	      �      emmc-bus1           
l             �      emmc-bus4         @  
l             �            �            �            �      emmc-bus8         €  
l             ’            ’            ’            ’            ’            ’            ’            ’        ‚   !      emmc-reset          
l      	       �        ‚   –         spi0       spi0-clk            
l            �        ‚   #      spi0-cs0            
l            �        ‚   &      spi0-tx         
l            �        ‚   $      spi0-rx         
l            �        ‚   %      spi0-cs1            
l            �         spi1       spi1-clk            
l            �        ‚   (      spi1-cs0            
l            �        ‚   +      spi1-rx         
l            �        ‚   *      spi1-tx         
l            �        ‚   )         spi2       spi2-cs1            
l            �      spi2-clk            
l            �        ‚   ,      spi2-cs0            
l            �        ‚   /      spi2-rx         
l            �        ‚   .      spi2-tx         
l      	      �        ‚   -         uart0      uart0-xfer           
l            �            �        ‚   8      uart0-cts           
l            �        ‚   9      uart0-rts           
l            �        ‚   :         uart1      uart1-xfer           
l            �      	      �        ‚   ;      uart1-cts           
l      
      �      uart1-rts           
l            �         uart2      uart2-xfer           
l            �            �        ‚   <         uart3      uart3-xfer           
l            �            �        ‚   =      uart3-cts           
l      	      �      uart3-rts           
l      
      �         uart4      uart4-xfer           
l            �            �        ‚   >      uart4-cts           
l            �      uart4-rts           
l            �         tsadc      otp-pin         
l       
       �        ‚   D      otp-out         
l       
      �        ‚   E         pwm0       pwm0-pin            
l             �        ‚   R         pwm1       pwm1-pin            
l            �        ‚   S         pwm2       pwm2-pin            
l            �        ‚   T         pwm3       pwm3-pin            
l            �        ‚   U         gmac       rgmii-pins        ð  
l            �            �            �            �            “            “            “            “             �            �            �      	      “            “            �            �      rmii-pins            
l            �            �            �            �             �            �            �            �            �            �         spdif      spdif-tx            
l            �        ‚   g         pcfg-pull-none-drv-8ma           
¡        
®           ‚   ’      pcfg-pull-up-drv-8ma             
…        
®         pcfg-output-high             
½        ‚   �      buttons    pwr-key-l           
l              �        ‚   ”      ap-lid-int-l            
l              �        ‚   ¯         pmic       pmic-int-l          
l              �        ‚   K      dvs-1           
l             ‘        ‚   L      dvs-2           
l             ‘        ‚   M         reboot     ap-warm-reset-h         
l              �        ‚   •         recovery-switch    rec-mode-l          
l       	       �         tpm    tpm-int-h           
l             �         write-protect      fw-wp-ap            
l             �         codec      hp-det          
l             �        ‚          int-codec           
l             ‘        ‚   Q      mic-det         
l             �        ‚   Ÿ         headset    ts3a227e-int-l          
l              �        ‚   4         backlight      bl_pwr_en           
l             �        ‚   ¥      bl-en           
l             �        ‚   ¨         lcd    lcd-en          
l             �        ‚   ¦      avdd-1v8-disp-en            
l             �        ‚   §         charger    ac-present-ap           
l              �        ‚   ®         cros-ec    ec-int          
l             �        ‚   '         trackpad       trackpad-int            
l             �        ‚   5         usb-host       host1-pwr-en            
l              �        ‚   °      usbotg-pwren-h          
l              �        ‚   ±         buck-5v    drv-5v          
l             �        ‚   ›            chosen          
Éserial2:115200n8          memory          memory          '            €         power-button          
   gpio-keys           default         -   ”   key-power           
ÕPower           ­   3              
Û   t        
æ   d         î         gpio-restart             gpio-restart            ­   3               default         -   •        
ø   È      emmc-pwrseq          mmc-pwrseq-emmc         -   –        default            —   	            ‚         sdio-pwrseq          mmc-pwrseq-simple           U   ˜         
  -ext_clock           default         -   ™                         ‚         regulator-vcc-5v             regulator-fixed         °vcc_5v           ¿         Ó        å LK@        ý LK@           š                 +                  default         -   ›        ‚   N      regulator-vcc33-sys          regulator-fixed       
  °vcc33_sys            ¿         Ó        å 2Z         ý 2Z            š        ‚         regulator-vcc50-hdmi             regulator-fixed         °vcc50_hdmi           ¿         Ó           N                 +   œ               default         -   �      regulator-vdd-logic          pwm-regulator         
  °vdd_logic           0   ž      Ê            5           @   {            T   ”         ¿         Ó        å ~ð        ý ™p                 sound         !   rockchip,rockchip-audio-max98090            default         -   Ÿ            gVEYRON-I2S          v   ¡        Ž   ¢        £   P               ¹   P              Ð   £        ç   ¤      regulator-backlight          regulator-fixed                  +   —               default         -   ¥        °backlight_regulator                    û  :˜        ‚   ª      regulator-panel          regulator-fixed                  +                  default         -   ¦        °panel_regulator                    ‚   «      vcc18-lcd            regulator-fixed                  +   —               default         -   §      
  °vcc18_lcd            ¿         Ó                 backlight            pwm-backlight                 ÿ           ÷        5   €        N                  default         -   ¨        0   ©     B@            [   
        p   
        �   ª        ‚   ¬      panel            innolux,n116bge         dokay            �   «        Ž   ¬   panel-timing            Âl÷        ˜  V            ˆ        ­   <        ¹           Ã            Ð           Ø           å           ñ           û          ports      port       endpoint            	þ   ­        ‚   }               gpio-charger             gpio-charger            mains           ­   3               default         -   ®      lid-switch        
   gpio-keys           default         -   ¯   switch-lid          
ÕLid         ­   3               î        
Û                       
æ            regulator-vccsys             regulator-fixed         °vccsys           Ó         ¿        ‚   š      regulator-vcc5-host1             regulator-fixed                  +   3               default         -   °        °vcc5_host1           ¿         Ó      regulator-vcc5v-otg          regulator-fixed                  +   3               default         -   ±        °vcc5_host2           ¿         Ó         	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 i2c20 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay cd-gpios rockchip,default-sample-phase sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply pinctrl-names pinctrl-0 wp-gpios cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable marvell,wakeup-pin disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names google,cros-ec-spi-pre-delay spi-max-frequency google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap rx-sample-delay-ns i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended ti,micbias vcc-supply wakeup-source reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size assigned-clocks assigned-clock-parents rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply vcc10-supply vcc9-supply vcc11-supply dvs-gpios regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply audio-supply sdcard-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios vin-supply enable-active-high gpio pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,i2s-controller rockchip,audio-codec rockchip,hp-det-gpios rockchip,mic-det-gpios rockchip,headset-codec rockchip,hdmi-codec startup-delay-us brightness-levels num-interpolated-steps default-brightness-level enable-gpios post-pwm-on-delay-ms pwm-off-delay-ms power-supply backlight hactive hfront-porch hback-porch hsync-len hsync-active vactive vfront-porch vback-porch vsync-len vsync-active charger-type linux,input-type 