Ðþí  i�   8  aì   (            ±  a´                                                      S   edgeble,neural-compute-module-2-io edgeble,neural-compute-module-2 rockchip,rv1126           &            7Edgeble Neu2 IO Board      aliases          =/i2c@ff3f0000            B/i2c@ff400000            G/i2c@ff520000            L/serial@ff560000             T/serial@ff410000             \/serial@ff570000             d/serial@ff580000             l/serial@ff590000             t/serial@ff5a0000             |/mmc@ffc50000         cpus                                 cpu@f00          �cpu          arm,cortex-a7            �            ‘psci             Ÿ               ¦            ±         cpu@f01          �cpu          arm,cortex-a7            �           ‘psci             Ÿ               ±         cpu@f02          �cpu          arm,cortex-a7            �           ‘psci             Ÿ               ±         cpu@f03          �cpu          arm,cortex-a7            �           ‘psci             Ÿ               ±            arm-pmu          arm,cortex-a7-pmu         0   ¹       {          |          }          ~            Ä                  psci             arm,psci-1.0             ˜smc       timer            arm,armv7-timer       0   ¹                              
           ×n6       display_subsystem            rockchip,display-subsystem           ç         oscillator           fixed-clock          ×n6          íxin24m                        ±   *      syscon@fe000000       &   rockchip,rv1126-grf syscon simple-mfd            �þ               ±   )      syscon@fe020000       )   rockchip,rv1126-pmugrf syscon simple-mfd             �þ              ±      io-domains        &   rockchip,rv1126-pmu-io-voltage-domain           okay               	        "   
        0           >           L           Z           h           v           „            qos@fe860000             rockchip,rv1126-qos syscon           �þ†               ±         qos@fe860080             rockchip,rv1126-qos syscon           �þ† €             ±         qos@fe860200             rockchip,rv1126-qos syscon           �þ†              ±         qos@fe86c000             rockchip,rv1126-qos syscon           �þ†À              ±         qos@fe8a0000             rockchip,rv1126-qos syscon           �þŠ               ±         qos@fe8a0080             rockchip,rv1126-qos syscon           �þŠ €             ±         qos@fe8a0100             rockchip,rv1126-qos syscon           �þŠ              ±         qos@fe8a0180             rockchip,rv1126-qos syscon           �þŠ€             ±         interrupt-controller@feff0000            arm,gic-400          ’        §                           �þÿ    þÿ      þÿ@     þÿ`              ¹      	           ±         power-management@ff3e0000         &   rockchip,rv1126-pmu syscon simple-mfd            �ÿ>        power-controller          !   rockchip,rv1126-power-controller            ¸                                      ±   E   power-domain@15          �         8   Ÿ      è      r      é      u      ê      ë      v        Ì                 ¸          power-domain@16          �            Ÿ      æ      o        Ì           ¸          power-domain@10          �   
      P   Ÿ      ®      Ù      Z      ¯      Ú      š           °      Û      [        Ì                    ¸                i2c@ff3f0000          (   rockchip,rv1126-i2c rockchip,rk3399-i2c          �ÿ?              ¹                  Ó            Ÿ            !      	  ài2c pclk            ìdefault         ú                                     okay             × €   pmic@20          rockchip,rk809           �             &            ¹   	                        írk808-clkout1 rk808-clkout2         ìdefault         ú                     %        3           ?           K           W           c           o           {           ‡   
        “            ±   3   regulators     DCDC_REG1           Ÿvdd_npu_vepu             ®         Â        Ô           ë 	ë         ~ð          q   regulator-state-mem          0         DCDC_REG2           Ÿvdd_arm          ®         Â        Ô           ë          ™p          q         ±      regulator-state-mem          0         DCDC_REG3           Ÿvcc_ddr          ®         Â        Ô      regulator-state-mem          I         DCDC_REG4           Ÿvcc3v3_sys           ®         Â        Ô           ë 2Z          2Z          ±   
   regulator-state-mem          I        a 2Z          DCDC_REG5         
  Ÿvcc_buck5            ®         Â        ë !‘À         !‘À         ±      regulator-state-mem          I        a !‘À         LDO_REG1            Ÿvcc_0v8          ®         Â        ë 5          5    regulator-state-mem          0         LDO_REG2            Ÿvcc1v8_pmu           ®         Â        ë w@         w@         ±   	   regulator-state-mem          I        a w@         LDO_REG3            Ÿvcc0v8_pmu           ®         Â        ë 5          5    regulator-state-mem          I        a 5          LDO_REG4            Ÿvcc_1v8          ®         Â        ë w@         w@         ±      regulator-state-mem          I        a w@         LDO_REG5          
  Ÿvcc_dovdd            Â        ë w@         w@         ±      regulator-state-mem          0         LDO_REG6          	  Ÿvcc_dvdd            ë O€         O€   regulator-state-mem          0         LDO_REG7          	  Ÿvcc_avdd            ë *¹€         *¹€   regulator-state-mem          0         LDO_REG8          	  Ÿvccio_sd             ®         Â        ë w@         2Z          ±      regulator-state-mem          0         LDO_REG9          
  Ÿvcc3v3_sd            ®         Â        ë 2Z          2Z    regulator-state-mem          0         SWITCH_REG1         Ÿvcc_5v0       SWITCH_REG2         Ÿvcc_3v3          ®         Â         ±   J               i2c@ff400000          (   rockchip,rv1126-i2c rockchip,rk3399-i2c          �ÿ@              ¹                  Ó            Ÿ            "      	  ài2c pclk            ìdefault         ú                                   	  disabled          serial@ff410000       &   rockchip,rv1126-uart snps,dw-apb-uart            �ÿA              ¹                   ×n6          Ÿ                     àbaudclk apb_pclk            }                    ‚tx rx           ìdefault         ú            Œ           –         	  disabled          pwm@ff430000          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿC           	  àpwm pclk             Ÿ            #        ìdefault         ú   !        £         	  disabled          pwm@ff430010          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿC          	  àpwm pclk             Ÿ            #        ìdefault         ú   "        £         	  disabled          pwm@ff430020          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿC           	  àpwm pclk             Ÿ            #        ìdefault         ú   #        £         	  disabled          pwm@ff430030          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿC 0         	  àpwm pclk             Ÿ            #        ìdefault         ú   $        £         	  disabled          pwm@ff440000          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿD           	  àpwm pclk             Ÿ            $        ìdefault         ú   %        £         	  disabled          pwm@ff440010          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿD          	  àpwm pclk             Ÿ            $        ìdefault         ú   &        £         	  disabled          pwm@ff440020          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿD           	  àpwm pclk             Ÿ            $        ìdefault         ú   '        £         	  disabled          pwm@ff440030          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿD 0         	  àpwm pclk             Ÿ            $        ìdefault         ú   (        £         	  disabled          clock-controller@ff480000            rockchip,rv1126-pmucru           �ÿH             Ó   )                    ®            ±         clock-controller@ff490000            rockchip,rv1126-cru          �ÿI              Ÿ   *        àxin24m          Ó   )                    ®            ±         dma-controller@ff4e0000          arm,pl330 arm,primecell          �ÿN    @          ¹                            »            Æ         Ÿ      ¡      	  àapb_pclk             ±         i2c@ff520000          (   rockchip,rv1126-i2c rockchip,rk3399-i2c          �ÿR              ¹                   Ÿ      "            	  ài2c pclk            ìdefault         ú   +        Ó                                   	  disabled          pwm@ff550000          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿU           	  àpwm pclk             Ÿ      '             ú   ,        ìdefault         £         	  disabled          pwm@ff550010          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿU          	  àpwm pclk             Ÿ      '             ú   -        ìdefault         £         	  disabled          pwm@ff550020          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿU           	  àpwm pclk             Ÿ      '             ú   .        ìdefault         £         	  disabled          pwm@ff550030          (   rockchip,rv1126-pwm rockchip,rk3328-pwm          �ÿU 0         	  àpwm pclk             Ÿ      '             ú   /        ìdefault         £           okay          serial@ff560000       &   rockchip,rv1126-uart snps,dw-apb-uart            �ÿV              ¹                   ×n6          Ÿ            ú        àbaudclk apb_pclk            }                    ‚tx rx           ìdefault         ú   0   1   2        Œ           –           okay       bluetooth            qcom,qca9377-bt          Ÿ   3           Ý   4               ê „€        ìdefault         ú   5        ô   
                    serial@ff570000       &   rockchip,rv1126-uart snps,dw-apb-uart            �ÿW              ¹                   ×n6          Ÿ            û        àbaudclk apb_pclk            }      	              ‚tx rx           ìdefault         ú   6        Œ           –           okay          serial@ff580000       &   rockchip,rv1126-uart snps,dw-apb-uart            �ÿX              ¹                   ×n6          Ÿ            ü        àbaudclk apb_pclk            }            
        ‚tx rx           ìdefault         ú   7        Œ           –         	  disabled          serial@ff590000       &   rockchip,rv1126-uart snps,dw-apb-uart            �ÿY              ¹                   ×n6          Ÿ            ý        àbaudclk apb_pclk            }                    ‚tx rx           ìdefault         ú   8        Œ           –         	  disabled          serial@ff5a0000       &   rockchip,rv1126-uart snps,dw-apb-uart            �ÿZ              ¹                   ×n6          Ÿ             þ        àbaudclk apb_pclk            }                    ‚tx rx           ìdefault         ú   9        Œ           –         	  disabled          adc@ff5e0000          .   rockchip,rv1126-saradc rockchip,rk3399-saradc            �ÿ^              ¹       (                       Ÿ      ,     
        àsaradc apb_pclk                ;        'saradc-apb          okay            3         timer@ff660000        ,   rockchip,rv1126-timer rockchip,rk3288-timer          �ÿf               ¹                   Ÿ           -        àpclk timer        watchdog@ff680000             rockchip,rv1126-wdt snps,dw-wdt          �ÿh              ¹                    Ÿ      ø      	  disabled          i2s@ff800000             rockchip,rv1126-i2s-tdm          �ÿ€              ¹       .            Ÿ      =      A      Í        àmclk_tx mclk_rx hclk            }                    ‚tx rx           ìdefault       (  ú   :   ;   <   =   >   ?   @   A   B   C               c      d      
  'tx-m rx-m           Ó   )        ?          	  disabled          vop@ffb00000             rockchip,rv1126-vop          �ÿ°     ÿ°
             ¹       ;           àaclk_vop dclk_vop hclk_vop           Ÿ      ¯      š      Ú        'axi ahb dclk                   †      ‡      ˆ        P   D        W   E   
      	  disabled       port                                       ±      endpoint@0           �          endpoint@1           �               iommu@ffb00f00           rockchip,iommu           �ÿ°             ¹       ;           àaclk iface           Ÿ      ¯      Ú        e            W   E   
      	  disabled             ±   D      ethernet@ffc40000         &   rockchip,rv1126-gmac snps,dwmac-4.20a            �ÿÄ    @          ¹       _          `           rmacirq eth_wake_irq         Ó   )      @   Ÿ      ~      ˆ      ˆ            ¿           ˆ      ‰      T  àstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_mac_speed ptp_ref                ¾      
  'stmmaceth            ‚         “        œ   F        ¬   G        ¿   H        okay            Ò      ~      ˆ      Š        â      }      ƒ        ùsY@    }x@        input              I        &rgmii           /   J        ìdefault         ú   K   L   M   N        :   *        C      mdio             snps,dwmac-mdio                              ethernet-phy@0           ethernet-phy-id001c.c916             �            ìdefault         ú   O        L  N         \ †         n                  ±   I         stmmac-axi-config           z           Š           š                                  ±   F      rx-queues-config            ¤            ±   G   queue0           tx-queues-config            º            ±   H   queue0              mmc@ffc50000          0   rockchip,rv1126-dw-mshc rockchip,rk3288-dw-mshc          �ÿÅ    @          ¹       N             Ÿ      è      r      s      t        àbiu ciu ciu-drive ciu-sample            Ð           ÛëÂ         W   E           okay            é            ó        ìdefault         ú   P   Q   R           Z           J        +         mmc@ffc60000          0   rockchip,rv1126-dw-mshc rockchip,rk3288-dw-mshc          �ÿÆ    @          ¹       L             Ÿ      ä      l      m      n        àbiu ciu ciu-drive ciu-sample            Ð           ÛëÂ         okay            é            8         J        [   È        ìdefault         ú   S   T   U   V           Z         m         z         ‡        +         mmc@ffc70000          0   rockchip,rv1126-dw-mshc rockchip,rk3288-dw-mshc          �ÿÇ    @          ¹       M             Ÿ      æ      o      p      q        àbiu ciu ciu-drive ciu-sample            Ð           Ûõá         W   E           okay            é            J         •         ¢        ¸   W         ó        ìdefault         ú   X   Y   Z           Z         ‡           
        +                                   spi@ffc90000             rockchip,sfc             �ÿÉ    @          ¹       P           Ò      v        ùÄ´         àclk_sfc hclk_sfc             Ÿ      v      ê        W   E           okay            ìdefault         ú   [                             flash@0          jedec,spi-nor            �            Ãúð€        Õ           æ            pinctrl          rockchip,rv1126-pinctrl         Ó   )        ÷                                        gpio@ff460000            rockchip,gpio-bank           �ÿF              ¹       "            Ÿ      &                                   ’        §            ±         gpio@ff620000            rockchip,gpio-bank           �ÿb              ¹       #            Ÿ           (                             ’        §            ±   d      gpio@ff630000            rockchip,gpio-bank           �ÿc              ¹       $            Ÿ           )                             ’        §         gpio@ff640000            rockchip,gpio-bank           �ÿd              ¹       %            Ÿ           *                             ’        §            ±   4      gpio@ff650000            rockchip,gpio-bank           �ÿe              ¹       &            Ÿ     	      +                             ’        §         pcfg-pull-up             '         ±   _      pcfg-pull-down           4         ±   ^      pcfg-pull-none           C         ±   \      pcfg-pull-none-drv-level-3           C        P            ±   a      pcfg-pull-up-drv-level-2             '        P            ±   ]      pcfg-pull-none-drv-level-0-smt           C        P             _         ±   `      clk_out_ethernet       clk-out-ethernetm1-pins         t            \         ±   N         emmc       emmc-bus8         €  t             ]             ]             ]             ]             ]             ]             ]             ]         ±   P      emmc-clk            t             ]         ±   R      emmc-cmd            t             ]         ±   Q         fspi       fspi-pins         `  t            ^             _             _            _             _            _         ±   [         i2c0       i2c0-xfer            t             `             `         ±            i2c2       i2c2-xfer            t             `             `         ±            i2c3       i2c3m0-xfer          t            \            \         ±   +         i2s0       i2s0m0-lrck-tx          t            \         ±   =      i2s0m0-lrck-rx          t            \         ±   >      i2s0m0-mclk         t            \         ±   <      i2s0m0-sclk-rx          t            \         ±   ;      i2s0m0-sclk-tx          t            \         ±   :      i2s0m0-sdi0         t            \         ±   ?      i2s0m0-sdo0         t            \         ±   @      i2s0m0-sdo1-sdi3            t            \         ±   A      i2s0m0-sdo2-sdi2            t             \         ±   B      i2s0m0-sdo3-sdi1            t            \         ±   C      i2s0m1-lrck-tx          t            \      i2s0m1-lrck-rx          t      
      \      i2s0m1-mclk         t            \      i2s0m1-sclk-rx          t      	      \      i2s0m1-sclk-tx          t            \      i2s0m1-sdi0         t            \      i2s0m1-sdo0         t            \      i2s0m1-sdo1-sdi3            t            \      i2s0m1-sdo2-sdi2            t            \      i2s0m1-sdo3-sdi1            t            \         pwm0       pwm0m0-pins         t             \         ±   !         pwm1       pwm1m0-pins         t             \         ±   "         pwm2       pwm2m0-pins         t             \         ±   #         pwm3       pwm3m0-pins         t             \         ±   $         pwm4       pwm4m0-pins         t             \         ±   %         pwm5       pwm5m0-pins         t             \         ±   &         pwm6       pwm6m0-pins         t       
      \         ±   '         pwm7       pwm7m0-pins         t       	      \         ±   (         pwm8       pwm8m0-pins         t            \         ±   ,         pwm9       pwm9m0-pins         t            \         ±   -         pwm10      pwm10m0-pins            t            \         ±   .         pwm11      pwm11m0-pins            t            \         ±   /         rgmii      rgmiim1-miim             t            \            \         ±   K      rgmiim1-bus2          `  t            \            \            \            a            a            a         ±   L      rgmiim1-bus4          `  t            \            \            \            a            a            a         ±   M         sdmmc0     sdmmc0-bus4       @  t            ]            ]            ]            ]         ±   U      sdmmc0-clk          t            ]         ±   S      sdmmc0-cmd          t      	      ]         ±   T      sdmmc0-det          t             \         ±   V         sdmmc1     sdmmc1-bus4       @  t            ]            ]            ]            ]         ±   Z      sdmmc1-clk          t      
      ]         ±   X      sdmmc1-cmd          t            ]         ±   Y         uart0      uart0-xfer           t            _            _         ±   0      uart0-ctsn          t            \         ±   1      uart0-rtsn          t            \         ±   2         uart1      uart1m0-xfer             t             _             _         ±             uart2      uart2m1-xfer             t            _            _         ±   6         uart3      uart3m0-xfer             t            _            _         ±   7         uart4      uart4m0-xfer             t            _            _         ±   8         uart5      uart5m0-xfer             t            _            _         ±   9         bt     bt-enable           t             \         ±   5         flash      flash-vol-sel           t              \         ±   b         pmic       pmic-int-l          t       	       _         ±            wifi       wifi-enable-h           t             \         ±   c         ethernet       eth-phy-rst         t              ^         ±   O            regulator-vccio-flash            regulator-fixed          ‚        •                  ìdefault         ú   b        Ÿvccio_flash          ®         Â        ë w@         w@        š   J         ±         pwrseq-sdio          mmc-pwrseq-simple            Ÿ   3         
  àext_clock           ìdefault         ú   c        n   d               ±   W      chosen          ¥serial2:1500000n8         regulator-vcc12v-dcin            regulator-fixed         Ÿvcc12v_dcin          ®         Â        ë ·          ·          ±   e      regulator-vcc5v0-sys             regulator-fixed         Ÿvcc5v0_sys           ®         Â        ë LK@         LK@        š   e         ±         regulator-v3v3-sys           regulator-fixed       	  Ÿv3v3_sys             ®         Â        ë 2Z          2Z         š            	#address-cells #size-cells compatible interrupt-parent model i2c0 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 mmc0 device_type reg enable-method clocks cpu-supply phandle interrupts interrupt-affinity clock-frequency ports clock-output-names #clock-cells status pmuio0-supply pmuio1-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply interrupt-controller #interrupt-cells #power-domain-cells pm_qos rockchip,grf clock-names pinctrl-names pinctrl-0 rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-initial-mode regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt dmas dma-names reg-shift reg-io-width #pwm-cells #reset-cells #dma-cells arm,pl330-periph-burst enable-gpios max-speed vddxo-supply vddio-supply #io-channel-cells resets reset-names vref-supply #sound-dai-cells iommus power-domains #iommu-cells interrupt-names snps,mixed-burst snps,tso snps,axi-config snps,mtl-rx-config snps,mtl-tx-config assigned-clocks assigned-clock-parents assigned-clock-rates clock_in_out phy-handle phy-mode phy-supply tx_delay rx_delay reset-assert-us reset-deassert-us reset-gpios snps,wr_osr_lmt snps,rd_osr_lmt snps,blen snps,rx-queues-to-use snps,tx-queues-to-use fifo-depth max-frequency bus-width non-removable rockchip,default-sample-phase vmmc-supply vqmmc-supply cap-mmc-highspeed cap-sd-highspeed card-detect-delay sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr104 cap-sdio-irq keep-power-in-suspend mmc-pwrseq spi-max-frequency spi-rx-bus-width spi-tx-bus-width rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins enable-active-high gpio vin-supply stdout-path 