Ðþí  Xô   8  TŒ   (            h  TT                                                                     ,Iteaduino Plus A10        -   2itead,iteaduino-plus-a10 allwinner,sun4i-a10       aliases          =/soc/ethernet@1c0b000            G/soc/serial@1c28000       chosen                                     O         Vserial0:115200n8       framebuffer-lcd0-hdmi         0   2allwinner,simple-framebuffer simple-framebuffer          bde_be0-lcd0-hdmi          0   u      8      <      >      �      ›      Œ      	   |disabled          framebuffer-fe0-lcd0-hdmi         0   2allwinner,simple-framebuffer simple-framebuffer          bde_fe0-de_be0-lcd0-hdmi       P   u      8      <      >      @      �      ’      ›      ¤      ‹      Œ      	   |disabled          framebuffer-fe0-lcd0          0   2allwinner,simple-framebuffer simple-framebuffer          bde_fe0-de_be0-lcd0        @   u      8      >      @      �      ’      •      ‹      Œ      	   |disabled          framebuffer-fe0-lcd0-tve0         0   2allwinner,simple-framebuffer simple-framebuffer          bde_fe0-de_be0-lcd0-tve0       P   u      6      8      >      @      �      ’      ›      ‡      ‹      Œ      	   |disabled             cpus                                 cpu@0            ƒcpu          2arm,cortex-a8            �             u               “ ¹°          ¡ a€ \À ê€ ™p /  Ö  	…€ Ð         ²            Á            Ì            thermal-zones      cpu-thermal          Ô   ú         ê  è         ø      cooling-maps       map0                          ÿÿÿÿÿÿÿÿ         trips      cpu-alert0           L        (  Ð         Špassive          Ì         cpu-crit             †         (  Ð      	   Šcritical                   clocks                                     O   clk-24M         3             2fixed-clock         @n6         Posc24M           Ì   "      clk-32k         3             2fixed-clock         @  €         Posc32k           Ì   #         display-engine        #   2allwinner,sun4i-a10-display-engine          c            	   |disabled          pmu          2arm,cortex-a8-pmu           w         reserved-memory                                    O   default-pool             2shared-dma-pool         ‚           ‡@               ”         �         soc          2simple-bus                                     O   system-control@1c00000        #   2allwinner,sun4i-a10-system-control           �À     0                                   O   sram@0        
   2mmio-sram            �      À                                   O          À    sram-section@8000            2allwinner,sun4i-a10-sram-a3-a4           �  €   @          |okay             Ì            sram@10000        
   2mmio-sram            �                                        O             sram-section@0           2allwinner,sun4i-a10-sram-d           �             	   |disabled             Ì            sram@1d00000          
   2mmio-sram            �Ð                                       O    Ð        sram-section@0           2allwinner,sun4i-a10-sram-c1          �                Ì               dma-controller@1c02000           2allwinner,sun4i-a10-dma          �À             w            u               ¯            Ì   	      nand-controller@1c03000          2allwinner,sun4i-a10-nand             �À0            w   %         u      '      `        ºahb mod         Æ   	              Ërxtx          	   |disabled                                    spi@1c05000          2allwinner,sun4i-a10-spi          �ÀP            w   
         u      ,      p        ºahb mod         Æ   	         	              Ërx tx            |okay                                      Õdefault         ã   
         spi@1c06000          2allwinner,sun4i-a10-spi          �À`            w            u      -      q        ºahb mod         Æ   	      	   	              Ërx tx           Õdefault         ã            	   |disabled                                    ethernet@1c0b000             2allwinner,sun4i-a10-emac             �À°            w   7         u      *        í              Õdefault         ã            |okay            ü         mdio@1c0b080             2allwinner,sun4i-a10-mdio             �À°€            |okay                                 ethernet-phy@1           �            Ì            lcd-controller@1c0c000           2allwinner,sun4i-a10-tcon             �ÀÀ            w   ,                      lcd          u      8      •      ›        ºahb tcon-ch0 tcon-ch1           Ptcon0-pixel-clock           3            Æ   	         ports                                port@0                                     �       endpoint@0           �                        Ì   3      endpoint@1           �                       Ì   /         port@1                                     �      endpoint@1           �                      *            Ì                  lcd-controller@1c0d000           2allwinner,sun4i-a10-tcon             �ÀÐ            w   -                      lcd          u      9      –      �        ºahb tcon-ch0 tcon-ch1           Ptcon1-pixel-clock           3            Æ   	         ports                                port@0                                     �       endpoint@0           �                        Ì   4      endpoint@1           �                       Ì   0         port@1                                     �      endpoint@1           �                      *            Ì                   video-codec@1c0e000       !   2allwinner,sun4i-a10-video-engine             �Àà             u      4      ¡      ‚        ºahb mod ram                       w   5        í            mmc@1c0f000          2allwinner,sun4i-a10-mmc          �Àð             u      "      b        ºahb mmc         w            Õdefault         ã            |okay                                      A           M           W                  mmc@1c10000          2allwinner,sun4i-a10-mmc          �Á              u      #      e        ºahb mmc         w   !      	   |disabled                                    mmc@1c11000          2allwinner,sun4i-a10-mmc          �Á             u      $      h        ºahb mmc         w   "      	   |disabled                                    mmc@1c12000          2allwinner,sun4i-a10-mmc          �Á              u      %      k        ºahb mmc         w   #      	   |disabled                                    usb@1c13000          2allwinner,sun4i-a10-musb             �Á0             u              w   &        `mc          p               uusb                        í              †otg       	   |disabled          phy@1c13400         Ž            2allwinner,sun4i-a10-usb-phy          �Á4    ÁH    ÁÈ            ™phy_ctrl pmu1 pmu2           u      }        ºusb_phy                                 !  usb0_reset usb1_reset usb2_reset             |okay            £           ´            Ì         usb@1c14000       &   2allwinner,sun4i-a10-ehci generic-ehci            �Á@            w   '         u              p              uusb          |okay          usb@1c14400       &   2allwinner,sun4i-a10-ohci generic-ohci            �ÁD            w   @         u      {              p              uusb          |okay          crypto-engine@1c15000            2allwinner,sun4i-a10-crypto           �ÁP            w   V         u            o        ºahb mod       hdmi@1c16000             2allwinner,sun4i-a10-hdmi             �Á`            w   :          u      <      ¤      	              ºahb mod pll-0 pll-1       $  Æ   	          	          	              Ëddc-tx ddc-rx audio-tx        	   |disabled       ports                                port@0                                     �       endpoint@0           �                        Ì         endpoint@1           �                        Ì            port@1           �               spi@1c17000          2allwinner,sun4i-a10-spi          �Áp            w            u      .      r        ºahb mod         Æ   	         	              Ërx tx         	   |disabled                                    sata@1c18000             2allwinner,sun4i-a10-ahci             �Á€            w   8         u      1      z         |okay            Å   !      usb@1c1c000       &   2allwinner,sun4i-a10-ehci generic-ehci            �ÁÀ            w   (         u              p              uusb          |okay          usb@1c1c400       &   2allwinner,sun4i-a10-ohci generic-ohci            �ÁÄ            w   A         u      |              p              uusb          |okay          csi@1c1d000          2allwinner,sun4i-a10-csi1             �ÁÐ            w   +         u      ;      „        ºbus ram                     	   |disabled          spi@1c1f000          2allwinner,sun4i-a10-spi          �Áð            w   2         u      /              ºahb mod         Æ   	         	              Ërx tx         	   |disabled                                    clock@1c20000            2allwinner,sun4i-a10-ccu          �Â              u   "   #      
  ºhosc losc           3           Ó            Ì         interrupt-controller@1c20400             2allwinner,sun4i-a10-ic           �Â             à        õ            Ì         pinctrl@1c20800          2allwinner,sun4i-a10-pinctrl          �Â            w            u      J   "   #        ºapb hosc losc                     à        õ                       Ì      can0-ph-pins          
  "PH20 PH21           'can       emac0-pins        K  "PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16          'emac             Ì         i2c0-pins           "PB0 PB1         'i2c0             Ì   &      i2c1-pins         
  "PB18 PB19           'i2c1             Ì   '      i2c2-pins         
  "PB20 PB21           'i2c2             Ì   (      ir0-rx-pin          "PB4         'ir0          Ì   $      ir0-tx-pin          "PB3         'ir0       ir1-rx-pin          "PB23            'ir1       ir1-tx-pin          "PB22            'ir1       mmc0-pins           "PF0 PF1 PF2 PF3 PF4 PF5         'mmc0            0            ?         Ì         ps2-ch0-pins          
  "PI20 PI21           'ps2       ps2-ch1-ph-pins       
  "PH12 PH13           'ps2       pwm0-pin            "PB2         'pwm       pwm1-pin            "PI3         'pwm       spdif-tx-pin            "PB13            'spdif            ?      spi0-pi-pins            "PI11 PI12 PI13          'spi0             Ì   
      spi0-cs0-pi-pin         "PI10            'spi0             Ì         spi1-pins           "PI17 PI18 PI19          'spi1             Ì         spi1-cs0-pin            "PI16            'spi1             Ì         spi2-pb-pins            "PB15 PB16 PB17          'spi2          spi2-pc-pins            "PC20 PC21 PC22          'spi2          spi2-cs0-pb-pin         "PB14            'spi2          spi2-cs0-pc-pin         "PC19            'spi2          uart0-pb-pins         
  "PB22 PB23           'uart0            Ì   %      uart0-pf-pins           "PF2 PF4         'uart0         uart1-pins        
  "PA10 PA11           'uart1            timer@1c20c00            2allwinner,sun4i-a10-timer            �Â    �        w               C   D         u   "      watchdog@1c20c90             2allwinner,sun4i-a10-wdt          �Â�           w            u   "      rtc@1c20d00          2allwinner,sun4i-a10-rtc          �Â             w         pwm@1c20e00          2allwinner,sun4i-a10-pwm          �Â             u   "        L         	   |disabled          spdif@1c21000           W             2allwinner,sun4i-a10-spdif            �Â            w            u      F      x      
  ºapb spdif           Æ   	          	               Ërx tx         	   |disabled          ir@1c21800           2allwinner,sun4i-a10-ir           u      K      t        ºapb ir          w            �Â    @         |okay            Õdefault         ã   $      ir@1c21c00           2allwinner,sun4i-a10-ir           u      L      u        ºapb ir          w            �Â    @      	   |disabled          i2s@1c22400         W             2allwinner,sun4i-a10-i2s          �Â$            w            u      G      v        ºapb mod         Æ   	          	               Ërx tx         	   |disabled          lradc@1c22800            2allwinner,sun4i-a10-lradc-keys           �Â(            w         	   |disabled          codec@1c22c00           W             2allwinner,sun4i-a10-codec            �Â,    @        w            u      E             
  ºapb codec           Æ   	          	               Ërx tx         	   |disabled          eeprom@1c23800           2allwinner,sun4i-a10-sid          �Â8          rtp@1c25000          2allwinner,sun4i-a10-ts           �ÂP            w           h             Ì         serial@1c28000           2snps,dw-apb-uart             �Â€            w           ~           ˆ            u      X         |okay            Õdefault         ã   %      serial@1c28400           2snps,dw-apb-uart             �Â„            w           ~           ˆ            u      Y      	   |disabled          serial@1c28800           2snps,dw-apb-uart             �Âˆ            w           ~           ˆ            u      Z      	   |disabled          serial@1c28c00           2snps,dw-apb-uart             �ÂŒ            w           ~           ˆ            u      [      	   |disabled          serial@1c29000           2snps,dw-apb-uart             �Â�            w           ~           ˆ            u      \      	   |disabled          serial@1c29400           2snps,dw-apb-uart             �Â”            w           ~           ˆ            u      ]      	   |disabled          serial@1c29800           2snps,dw-apb-uart             �Â˜            w           ~           ˆ            u      ^      	   |disabled          serial@1c29c00           2snps,dw-apb-uart             �Âœ            w           ~           ˆ            u      _      	   |disabled          ps2@1c2a000          2allwinner,sun4i-a10-ps2          �Â             w   >         u      U      	   |disabled          ps2@1c2a400          2allwinner,sun4i-a10-ps2          �Â¤            w   ?         u      V      	   |disabled          i2c@1c2ac00          2allwinner,sun4i-a10-i2c          �Â¬            w            u      O        Õdefault         ã   &         |okay                                 pmic@34          �   4         2x-powers,axp209          à        õ           w       ac-power              2x-powers,axp202-ac-power-supply       	   |disabled          adc          2x-powers,axp209-adc         •            Ì   5      gpio             2x-powers,axp209-gpio                              battery-power         %   2x-powers,axp209-battery-power-supply          	   |disabled          regulators          §  Ü   dcdc2           ºvdd-cpu          É        Ý B@        õ \À         Ì         dcdc3           ºvdd-int-dll          É        Ý B@        õ \À      ldo1             É        Ý Ö         õ Ö         ºvdd-rtc       ldo2            ºavcc             É        Ý -ÆÀ        õ -ÆÀ      ldo3            ºldo3          ldo4            ºldo4          ldo5            ºldo5          	   |disabled             usb-power         !   2x-powers,axp202-usb-power-supply          	   |disabled                i2c@1c2b000          2allwinner,sun4i-a10-i2c          �Â°            w            u      P        Õdefault         ã   '         |okay                                    i2c@1c2b400          2allwinner,sun4i-a10-i2c          �Â´            w   	         u      Q        Õdefault         ã   (         |okay                                    can@1c2bc00          2allwinner,sun4i-a10-can          �Â¼            w            u      S      	   |disabled          gpu@1c40000       &   2allwinner,sun4i-a10-mali arm,mali-400            �Ä             w   E   F   G   H   I        `gp gpmmu pp0 ppmmu0 pmu          u      D      ¥      	  ºbus core                                ¥        ã`       display-frontend@1e00000          %   2allwinner,sun4i-a10-display-frontend             �à             w   /         u      @      ’      ‹        ºahb mod ram                        Ì      ports                                port@1                                     �      endpoint@0           �               )         Ì   1      endpoint@1           �              *         Ì   -               display-frontend@1e20000          %   2allwinner,sun4i-a10-display-frontend             �â             w   0         u      A      “      Š        ºahb mod ram                        Ì      ports                                port@1                                     �      endpoint@0           �               +         Ì   2      endpoint@1           �              ,         Ì   .               display-backend@1e40000       $   2allwinner,sun4i-a10-display-backend          �ä             w   0         u      ?      ‘      �        ºahb mod ram                  ports                                port@0                                     �       endpoint@0           �               -         Ì   *      endpoint@1           �              .         Ì   ,         port@1                                     �      endpoint@0           �               /         Ì         endpoint@1           �              0         Ì                  display-backend@1e60000       $   2allwinner,sun4i-a10-display-backend          �æ             w   /         u      >      �      Œ        ºahb mod ram                  ports                                port@0                                     �       endpoint@0           �               1         Ì   )      endpoint@1           �              2         Ì   +         port@1                                     �      endpoint@0           �               3         Ì         endpoint@1           �              4         Ì                     ahci-5v          2regulator-fixed         ºahci-5v         Ý LK@        õ LK@         2         D        W                      |okay             Ì   !      usb0-vbus            2regulator-fixed       
  ºusb0-vbus           Ý LK@        õ LK@         D        W         	          	   |disabled          usb1-vbus            2regulator-fixed       
  ºusb1-vbus           Ý LK@        õ LK@         2         D        W                      |okay             Ì         usb2-vbus            2regulator-fixed       
  ºusb2-vbus           Ý LK@        õ LK@         2         D        W                      |okay             Ì         vcc3v0           2regulator-fixed         ºvcc3v0          Ý -ÆÀ        õ -ÆÀ      vcc3v3           2regulator-fixed         ºvcc3v3          Ý 2Z         õ 2Z          Ì         vcc5v0           2regulator-fixed         ºvcc5v0          Ý LK@        õ LK@      pmic-temp         
   2iio-hwmon           \   5            	#address-cells #size-cells interrupt-parent model compatible ethernet0 serial0 ranges stdout-path allwinner,pipeline clocks status device_type reg clock-latency operating-points #cooling-cells cpu-supply phandle polling-delay-passive polling-delay thermal-sensors trip cooling-device temperature hysteresis #clock-cells clock-frequency clock-output-names allwinner,pipelines interrupts size alloc-ranges reusable linux,cma-default #dma-cells clock-names dmas dma-names pinctrl-names pinctrl-0 allwinner,sram phy-handle resets reset-names remote-endpoint allwinner,tcon-channel vmmc-supply bus-width cd-gpios interrupt-names phys phy-names extcon dr_mode #phy-cells reg-names usb1_vbus-supply usb2_vbus-supply target-supply #reset-cells interrupt-controller #interrupt-cells gpio-controller #gpio-cells pins function drive-strength bias-pull-up #pwm-cells #sound-dai-cells #thermal-sensor-cells reg-shift reg-io-width #io-channel-cells x-powers,dcdc-freq regulator-name regulator-always-on regulator-min-microvolt regulator-max-microvolt assigned-clocks assigned-clock-rates regulator-boot-on enable-active-high gpio io-channels 