Ðþí Dz   8 H   (            )2                                                       :   ti,am572x-beagle-x15 ti,am5728 ti,dra742 ti,dra74 ti,dra7            &            7TI AM5728 BeagleBoard-X15      chosen        B   =/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0         aliases       ?   I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0        ?   N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0        ?   S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0        ?   X/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0        ?   ]/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0        B   b/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0         B   j/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0         B   r/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0         B   z/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0         B   ‚/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0         B   Š/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0         B   ’/ocp/interconnect@48400000/segment@0/target-module@20000/serial@0         B   š/ocp/interconnect@48400000/segment@0/target-module@22000/serial@0         B   ¢/ocp/interconnect@48400000/segment@0/target-module@24000/serial@0         E   ª/ocp/interconnect@4ae00000/segment@20000/target-module@b000/serial@0          X   ²/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@1       X   ¼/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@2       B   Æ/ocp/interconnect@4ae00000/segment@30000/target-module@c000/can@0         ?   Í/ocp/interconnect@48400000/segment@0/target-module@80000/can@0        "   Ô/ocp/target-module@4b300000/spi@0            Ù/ocp/ipu@58820000            à/ocp/ipu@55020000            ç/ocp/dsp@40800000            î/ocp/dsp@41000000         F   õ/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0/rtc@6f         Z   ú/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_rtc         ?   ÿ/ocp/interconnect@48800000/segment@0/target-module@38000/rtc@0          /connector        timer            arm,armv7-timer       	  disabled          0                                
           &         interrupt-controller@48211000            arm,cortex-a15-gic                   4         @  E    H!            H!              H!@             H!`                       	           &           I         interrupt-controller@48281000         &   ti,omap5-wugen-mpu ti,omap4-wugen-mpu                    4           E    H(                 &           I         cpus                                 cpu@0           Qcpu          arm,cortex-a15          E            ]           q           xcpu         „ “à        ’           ¡           ¬           ·           I   ú      cpu@1           Qcpu          arm,cortex-a15          E           ]           q           xcpu         „ “à        ’           ¡            opp-table            operating-points-v2-ti-cpu          É            Ð        I      opp-1000000000          Û    ;šÊ         â ,  øP Œ0 ,  øP Œ0        ð   ÿ                  opp-1176000000          Û    FV         â ³@ � ³@ ³@ � ³@        ð   ÿ         opp-1500000000          Û    Yh/         â v� ~ð Ð v� ~ð Ð        ð   ÿ            ocp          simple-pm-bus                      q   	           
                                                     À           "€       €   €           I  
   l3-noc@44000000          ti,dra7-l3-noc          ED      E               -                       
         interconnect@4a000000            ti,dra7-l4-cfg simple-pm-bus                       q                   xfck         EJ      J     J           
  Aap la ia0                                  $      J         J         J               "        I     segment@0            simple-pm-bus                                 \                                             @   @      P   P      `   `      €   €                 `  `     p  p     à  à                      €  €  €     
   
    €  
€  
€     �  �              Ð  Ð     à  à                     @  @     P  P     `  `     p  p     	   	    €  	€  	€       target-module@2000           ti,sysc-omap4 ti,sysc           E               Arev                                                 scm@0            ti,dra7-scm-core simple-bus         E                                                             I     scm_conf@0           syscon simple-bus           E                                                           I      pbias_regulator@e00          ti,pbias-dra7 ti,pbias-omap         E              É           I     pbias_mmc_omap5         Kpbias_mmc_omap5         Z w@        r 2Z         I   ¤         phy-gmii-sel@554             ti,dra7xx-phy-gmii-sel          E  T           Š           I   ¹      clocks                                    I     clock-dss-deshdcp-0@558         •             ti,gate-clock           ¢dss_deshdcp_clk         q           µ            E  X        I        clock-ehrpwm0-tbclk-20@558          •             ti,gate-clock           ¢ehrpwm0_tbclk           q           µ           E  X        I   ³      clock-ehrpwm1-tbclk-21@558          •             ti,gate-clock           ¢ehrpwm1_tbclk           q           µ           E  X        I   ´      clock-ehrpwm2-tbclk-22@558          •             ti,gate-clock           ¢ehrpwm2_tbclk           q           µ           E  X        I   µ      clock-sys-32k@6c4           •             ti,mux-clock            ¢sys_32k_ck          q                    µ           E  Ä        I   U            pinmux@1400          ti,dra7-padconf pinctrl-single          E     h                                  Â           4                    Ñ            ï?ÿÿÿ        I   š   mmc1-default-pins         0    T     X     \     `     d     h           I   ¥      mmc1-sdr12-pins       0    T     X     \     `     d     h           I        mmc1-hs-pins          0    T °  X °  \ °  ` °  d °  h °        I   §      mmc1-sdr25-pins       0    T °  X °  \ °  ` °  d °  h °        I        mmc1-sdr50-pins       0    T    X    \    `    d    h          I        mmc1-ddr50-pins       0    T    X    \    `    d    h          I        mmc1-sdr104-pins          0    T    X    \    `    d    h          I        mmc2-default-pins         P     œ     °           ¤     ¨     ¬     Œ     �     ”     ˜          I   ©      mmc2-hs-pins          P     œ     °           ¤     ¨     ¬     Œ     �     ”     ˜          I   ª      mmc2-ddr-3-3v-rev11-pins          P     œ    °         ¤    ¨    ¬    Œ    �    ”    ˜         I   «      mmc2-ddr-1-8v-rev11-pins          P     œ    °         ¤    ¨    ¬    Œ    �    ”    ˜         I        mmc2-ddr-rev20-pins       P     œ     °           ¤     ¨     ¬     Œ     �     ”     ˜          I        mmc2-hs200-pins       P     œ    °         ¤    ¨    ¬    Œ    �    ”    ˜         I        mmc4-default-pins         0    è   ì   ð   ô   ø   ü         I        mmc4-hs-pins          0    è   ì   ð   ô   ø   ü         I        mmc3-default-pins         0    |    €    „    ˆ    Œ    �          I        mmc3-hs-pins          0    |    €    „    ˆ    Œ    �          I        mmc3-sdr12-pins       0    |    €    „    ˆ    Œ    �          I        mmc3-sdr25-pins       0    |    €    „    ˆ    Œ    �          I        mmc3-sdr50-pins       0    |    €    „    ˆ    Œ    �          I        mmc4-sdr12-pins       0    è   ì   ð   ô   ø   ü         I        mmc4-sdr25-pins       0    è   ì   ð   ô   ø   ü         I            scm_conf@1c04            syscon          E              I   Ç      scm_conf@1c24            syscon          E  $   $        I   d      dma-router@b78           ti,dra7-dma-crossbar            E  x   ü                    +   Í        8            H           I   ™      dma-router@c78           ti,dra7-dma-crossbar            E  x   |                    +   Ì        8            H           I   ¶            target-module@5000           ti,sysc-omap4 ti,sysc           E  P            Arev                                        P       cm_core_aon@0            ti,dra7-cm-core-aon simple-bus                                   E                                    I  !   clocks                                    I  "   clock-atl-clkin0            •             ti,dra7-atl-clock           ¢atl_clkin0_ck           q                  I   ¯      clock-atl-clkin1            •             ti,dra7-atl-clock           ¢atl_clkin1_ck           q                  I   °      clock-atl-clkin2            •             ti,dra7-atl-clock           ¢atl_clkin2_ck           q                  I   ±      clock-atl-clkin3            •             ti,dra7-atl-clock           ¢atl_clkin3_ck           q                  I   ²      clock-hdmi-clkin            •             fixed-clock         ¢hdmi_clkin_ck           T            I   5      clock-mlb-clkin         •             fixed-clock         ¢mlb_clkin_ck            T            I   ”      clock-mlbp-clkin            •             fixed-clock         ¢mlbp_clkin_ck           T            I   •      clock-pciesref-acs          •             fixed-clock         ¢pciesref_acs_clk_ck         Tõá         I   E      clock-ref-clkin0            •             fixed-clock         ¢ref_clkin0_ck           T            I  #      clock-ref-clkin1            •             fixed-clock         ¢ref_clkin1_ck           T            I  $      clock-ref-clkin2            •             fixed-clock         ¢ref_clkin2_ck           T            I  %      clock-ref-clkin3            •             fixed-clock         ¢ref_clkin3_ck           T            I  &      clock-rmii          •             fixed-clock         ¢rmii_clk_ck         T            I  '      clock-sdvenc-clkin          •             fixed-clock         ¢sdvenc_clkin_ck         T            I  (      clock-secure-32k-clk-src            •             fixed-clock         ¢secure_32k_clk_src_ck           T  €         I   ~      clock-sys-clk32-crystal         •             fixed-clock         ¢sys_clk32_crystal_ck            T  €         I         clock-sys-clk32-pseudo          •             fixed-factor-clock          ¢sys_clk32_pseudo_ck         q           d           o  b        I         clock-virt-12000000         •             fixed-clock         ¢virt_12000000_ck            T ·         I   l      clock-virt-13000000         •             fixed-clock         ¢virt_13000000_ck            T Æ]@        I  )      clock-virt-16800000         •             fixed-clock         ¢virt_16800000_ck            T Y         I   n      clock-virt-19200000         •             fixed-clock         ¢virt_19200000_ck            T$ø         I   o      clock-virt-20000000         •             fixed-clock         ¢virt_20000000_ck            T1-         I   m      clock-virt-26000000         •             fixed-clock         ¢virt_26000000_ck            TŒº€        I   p      clock-virt-27000000         •             fixed-clock         ¢virt_27000000_ck            T›üÀ        I   q      clock-virt-38400000         •             fixed-clock         ¢virt_38400000_ck            TIð         I   r      clock-sys-clkin2            •             fixed-clock         ¢sys_clkin2          TXˆ         I   s      clock-usb-otg-clkin         •             fixed-clock         ¢usb_otg_clkin_ck            T            I   {      clock-video1-clkin          •             fixed-clock         ¢video1_clkin_ck         T            I   ?      clock-video1-m2-clkin           •             fixed-clock         ¢video1_m2_clkin_ck          T            I   4      clock-video2-clkin          •             fixed-clock         ¢video2_clkin_ck         T            I   @      clock-video2-m2-clkin           •             fixed-clock         ¢video2_m2_clkin_ck          T            I   3      clock@1e0           •             ti,omap4-dpll-m4xen-clock           ¢dpll_abe_ck         q              E  à  ä  ì  è        I         clock-dpll-abe-x2           •             ti,omap4-dpll-x2-clock          ¢dpll_abe_x2_ck          q           I         clock-dpll-abe-m2x2-8@1f0           •             ti,divider-clock            ¢dpll_abe_m2x2_ck            q           y           „           E  ð         –         ­        I         clock-abe@108           •             ti,divider-clock            ¢abe_clk         q           y           E           Ä        I   u      clock-dpll-abe-m2-8@1f0         •             ti,divider-clock            ¢dpll_abe_m2_ck          q           y           „           E  ð         –         ­        I   w      clock-dpll-abe-m3x2-8@1f4           •             ti,divider-clock            ¢dpll_abe_m3x2_ck            q           y           „           E  ô         –         ­        I         clock@12c         
   ti,clksel           E  ,        •                                clock@23            E            ti,mux-clock            ¢dpll_core_byp_mux           q              •            I            clock@120           •             ti,omap4-dpll-core-clock            ¢dpll_core_ck            q              E     $  ,  (        I         clock-dpll-core-x2          •             ti,omap4-dpll-x2-clock          ¢dpll_core_x2_ck         q           I         clock-dpll-core-h12x2-8@13c         •             ti,divider-clock            ¢dpll_core_h12x2_ck          q           y   ?        „           E  <         –         ­        I          clock-mpu-dpll-hs-clk-div           •             fixed-factor-clock          ¢mpu_dpll_hs_clk_div         q            d           o           I   !      clock@160           •             ti,omap5-mpu-dpll-clock         ¢dpll_mpu_ck         q      !        E  `  d  l  h        I         clock-dpll-mpu-m2-8@170         •             ti,divider-clock            ¢dpll_mpu_m2_ck          q           y           „           E  p         –         ­        I   "      clock-mpu-dclk-div          •             fixed-factor-clock          ¢mpu_dclk_div            q   "        d           o           I   ‚      clock-dsp-dpll-hs-clk-div           •             fixed-factor-clock          ¢dsp_dpll_hs_clk_div         q            d           o           I   #      clock@240         
   ti,clksel           E  @        •                                clock@23            E            ti,mux-clock            ¢dpll_dsp_byp_mux            q      #        •            I   $         clock@234           •             ti,omap4-dpll-clock         ¢dpll_dsp_ck         q      $        E  4  8  @  <        Ú   %        ê#ÃF         I   %      clock-dpll-dsp-m2-8@244         •             ti,divider-clock            ¢dpll_dsp_m2_ck          q   %        y           „           E  D         –         ­        Ú   &        ê#ÃF         I   &      clock-iva-dpll-hs-clk-div           •             fixed-factor-clock          ¢iva_dpll_hs_clk_div         q            d           o           I   '      clock@1ac         
   ti,clksel           E  ¬        •                                clock@23            E            ti,mux-clock            ¢dpll_iva_byp_mux            q      '        •            I   (         clock@1a0           •             ti,omap4-dpll-clock         ¢dpll_iva_ck         q      (        E     ¤  ¬  ¨        Ú   )        êEp}@        I   )      clock-dpll-iva-m2-8@1b0         •             ti,divider-clock            ¢dpll_iva_m2_ck          q   )        y           „           E  °         –         ­        Ú   *        ê%        I   *      clock-iva-dclk          •             fixed-factor-clock        	  ¢iva_dclk            q   *        d           o           I   „      clock@2e4         
   ti,clksel           E  ä        •                                clock@23            E            ti,mux-clock            ¢dpll_gpu_byp_mux            q              •            I   +         clock@2d8           •             ti,omap4-dpll-clock         ¢dpll_gpu_ck         q      +        E  Ø  Ü  ä  à        Ú   ,        êLy@        I   ,      clock-dpll-gpu-m2-8@2e8         •             ti,divider-clock            ¢dpll_gpu_m2_ck          q   ,        y           „           E  è         –         ­        Ú   -        ê_(k        I   -      clock-dpll-core-m2-8@130            •             ti,divider-clock            ¢dpll_core_m2_ck         q           y           „           E  0         –         ­        I   .      clock-core-dpll-out-dclk-div            •             fixed-factor-clock          ¢core_dpll_out_dclk_div          q   .        d           o           I   †      clock@21c         
   ti,clksel           E          •                                clock@23            E            ti,mux-clock            ¢dpll_ddr_byp_mux            q              •            I   /         clock@210           •             ti,omap4-dpll-clock         ¢dpll_ddr_ck         q      /        E                I   0      clock-dpll-ddr-m2-8@220         •             ti,divider-clock            ¢dpll_ddr_m2_ck          q   0        y           „           E            –         ­        I   x      clock@2b4         
   ti,clksel           E  ´        •                                clock@23            E            ti,mux-clock            ¢dpll_gmac_byp_mux           q              •            I   1         clock@2a8           •             ti,omap4-dpll-clock         ¢dpll_gmac_ck            q      1        E  ¨  ¬  ´  °        I   2      clock-dpll-gmac-m2-8@2b8            •             ti,divider-clock            ¢dpll_gmac_m2_ck         q   2        y           „           E  ¸         –         ­        I   y      clock-video2-dclk-div           •             fixed-factor-clock          ¢video2_dclk_div         q   3        d           o           I   ˆ      clock-video1-dclk-div           •             fixed-factor-clock          ¢video1_dclk_div         q   4        d           o           I   ‰      clock-hdmi-dclk-div         •             fixed-factor-clock          ¢hdmi_dclk_div           q   5        d           o           I   Š      clock-per-dpll-hs-clk-div           •             fixed-factor-clock          ¢per_dpll_hs_clk_div         q           d           o           I   H      clock-usb-dpll-hs-clk-div           •             fixed-factor-clock          ¢usb_dpll_hs_clk_div         q           d           o           I   L      clock-eve-dpll-hs-clk-div           •             fixed-factor-clock          ¢eve_dpll_hs_clk_div         q            d           o           I   6      clock@290         
   ti,clksel           E  �        •                                clock@23            E            ti,mux-clock            ¢dpll_eve_byp_mux            q      6        •            I   7         clock@284           •             ti,omap4-dpll-clock         ¢dpll_eve_ck         q      7        E  „  ˆ  �  Œ        I   8      clock-dpll-eve-m2-8@294         •             ti,divider-clock            ¢dpll_eve_m2_ck          q   8        y           „           E  ”         –         ­        I   9      clock-eve-dclk-div          •             fixed-factor-clock          ¢eve_dclk_div            q   9        d           o           I   “      clock-dpll-core-h13x2-8@140         •             ti,divider-clock            ¢dpll_core_h13x2_ck          q           y   ?        „           E  @         –         ­        I  *      clock-dpll-core-h14x2-8@144         •             ti,divider-clock            ¢dpll_core_h14x2_ck          q           y   ?        „           E  D         –         ­        I   V      clock-dpll-core-h22x2-8@154         •             ti,divider-clock            ¢dpll_core_h22x2_ck          q           y   ?        „           E  T         –         ­        I   B      clock-dpll-core-h23x2-8@158         •             ti,divider-clock            ¢dpll_core_h23x2_ck          q           y   ?        „           E  X         –         ­        I   [      clock-dpll-core-h24x2-8@15c         •             ti,divider-clock            ¢dpll_core_h24x2_ck          q           y   ?        „           E  \         –         ­        I  +      clock-dpll-ddr-x2           •             ti,omap4-dpll-x2-clock          ¢dpll_ddr_x2_ck          q   0        I   :      clock-dpll-ddr-h11x2-8@228          •             ti,divider-clock            ¢dpll_ddr_h11x2_ck           q   :        y   ?        „           E  (         –         ­        I  ,      clock-dpll-dsp-x2           •             ti,omap4-dpll-x2-clock          ¢dpll_dsp_x2_ck          q   %        I   ;      clock-dpll-dsp-m3x2-8@248           •             ti,divider-clock            ¢dpll_dsp_m3x2_ck            q   ;        y           „           E  H         –         ­        Ú   <        ê×„         I   <      clock-dpll-gmac-x2          •             ti,omap4-dpll-x2-clock          ¢dpll_gmac_x2_ck         q   2        I   =      clock-dpll-gmac-h11x2-8@2c0         •             ti,divider-clock            ¢dpll_gmac_h11x2_ck          q   =        y   ?        „           E  À         –         ­        I   >      clock-dpll-gmac-h12x2-8@2c4         •             ti,divider-clock            ¢dpll_gmac_h12x2_ck          q   =        y   ?        „           E  Ä         –         ­        I  -      clock-dpll-gmac-h13x2-8@2c8         •             ti,divider-clock            ¢dpll_gmac_h13x2_ck          q   =        y   ?        „           E  È         –         ­        I   ÷      clock-dpll-gmac-m3x2-8@2bc          •             ti,divider-clock            ¢dpll_gmac_m3x2_ck           q   =        y           „           E  ¼         –         ­        I   ö      clock-gmii-m-clk-div            •             fixed-factor-clock          ¢gmii_m_clk_div          q   >        d           o           I  .      clock-hdmi-clk2-div         •             fixed-factor-clock          ¢hdmi_clk2_div           q   5        d           o           I  /      clock-hdmi-div          •             fixed-factor-clock          ¢hdmi_div_clk            q   5        d           o           I  0      clock@100         
   ti,clksel           E           •                                clock@4         E            ti,divider-clock            ¢l3_iclk_div         y           q             Ä        •            I            clock-l4-root-clk-div           •             fixed-factor-clock          ¢l4_root_clk_div         q           d           o           I         clock-video1-clk2-div           •             fixed-factor-clock          ¢video1_clk2_div         q   ?        d           o           I  1      clock-video1-div            •             fixed-factor-clock          ¢video1_div_clk          q   ?        d           o           I  2      clock-video2-clk2-div           •             fixed-factor-clock          ¢video2_clk2_div         q   @        d           o           I  3      clock-video2-div            •             fixed-factor-clock          ¢video2_div_clk          q   @        d           o           I  4      clock-dummy         •             fixed-clock       	  ¢dummy_ck            T            I  5         clockdomains            I  6      clock@300            ti,omap4-cm         ¢mpu_cm          E                                                         I  7   clock@20             ti,clkctrl          ¢mpu_clkctrl         E               •           I   ®         clock@400            ti,omap4-cm         ¢dsp1_cm         E                                                         I  8   clock@20             ti,clkctrl          ¢dsp1_clkctrl            E               •           I   à         clock@500            ti,omap4-cm         ¢ipu_cm          E                                                         I  9   clock@20             ti,clkctrl          ¢ipu1_clkctrl            E               •           Ú   A               ÿ   B        I   A      clock@50             ti,clkctrl          ¢ipu_clkctrl         E   P   4        •           I   �         clock@600            ti,omap4-cm         ¢dsp2_cm         E                                                         I  :   clock@20             ti,clkctrl          ¢dsp2_clkctrl            E               •           I   í         clock@700            ti,omap4-cm         ¢rtc_cm          E      `                                           `        I  ;   clock@20             ti,clkctrl          ¢rtc_clkctrl         E       (        •           I   ½         clock@760            ti,omap4-cm         ¢vpe_cm          E  `                                          `           I  <   clock@0          ti,clkctrl          ¢vpe_clkctrl         E               •           I   Ä               target-module@8000           ti,sysc-omap4 ti,sysc           E  €            Arev                                        €        cm_core@0            ti,dra7-cm-core simple-bus                                   E      0                   0         I  =   clocks                                    I  >   clock@200           •             ti,omap4-dpll-clock         ¢dpll_pcie_ref_ck            q              E                 I   C      clock-dpll-pcie-ref-m2ldo-8@210         •             ti,divider-clock            ¢dpll_pcie_ref_m2ldo_ck          q   C        y           „           E           –         ­        I   D      clock-apll-pcie-in-clk-mux-7@4ae06118            ti,mux-clock            ¢apll_pcie_in_clk_mux            q   D   E        •            E             µ           I   F      clock@21c           •             ti,dra7-apll-clock          ¢apll_pcie_ck            q   F   C        E             I   G      clock-optfclk-pciephy-div-8@4a00821c             ti,divider-clock            ¢optfclk_pciephy_div         q   G        •            E          µ           y           I   f      clock-apll-pcie-clkvcoldo           •             fixed-factor-clock          ¢apll_pcie_clkvcoldo         q   G        d           o           I  ?      clock-apll-pcie-clkvcoldo-div           •             fixed-factor-clock          ¢apll_pcie_clkvcoldo_div         q   G        d           o           I  @      clock-apll-pcie-m2          •             fixed-factor-clock          ¢apll_pcie_m2_ck         q   G        d           o           I   }      clock@14c         
   ti,clksel           E  L        •                                clock@23            E            ti,mux-clock            ¢dpll_per_byp_mux            q      H        •            I   I         clock@140           •             ti,omap4-dpll-clock         ¢dpll_per_ck         q      I        E  @  D  L  H        I   J      clock-dpll-per-m2-8@150         •             ti,divider-clock            ¢dpll_per_m2_ck          q   J        y           „           E  P         –         ­        I   K      clock-func-96m-aon-dclk-div         •             fixed-factor-clock          ¢func_96m_aon_dclk_div           q   K        d           o           I   ‹      clock@18c         
   ti,clksel           E  Œ        •                                clock@23            E            ti,mux-clock            ¢dpll_usb_byp_mux            q      L        •            I   M         clock@180           •             ti,omap4-dpll-j-type-clock          ¢dpll_usb_ck         q      M        E  €  „  Œ  ˆ        I   N      clock-dpll-usb-m2-8@190         •             ti,divider-clock            ¢dpll_usb_m2_ck          q   N        y           „           E  �         –         ­        I   R      clock-dpll-pcie-ref-m2-8@210            •             ti,divider-clock            ¢dpll_pcie_ref_m2_ck         q   C        y           „           E           –         ­        I   |      clock-dpll-per-x2           •             ti,omap4-dpll-x2-clock          ¢dpll_per_x2_ck          q   J        I   O      clock-dpll-per-h11x2-8@158          •             ti,divider-clock            ¢dpll_per_h11x2_ck           q   O        y   ?        „           E  X         –         ­        I   P      clock-dpll-per-h12x2-8@15c          •             ti,divider-clock            ¢dpll_per_h12x2_ck           q   O        y   ?        „           E  \         –         ­        I  A      clock-dpll-per-h13x2-8@160          •             ti,divider-clock            ¢dpll_per_h13x2_ck           q   O        y   ?        „           E  `         –         ­        I  B      clock-dpll-per-h14x2-8@164          •             ti,divider-clock            ¢dpll_per_h14x2_ck           q   O        y   ?        „           E  d         –         ­        I   W      clock-dpll-per-m2x2-8@150           •             ti,divider-clock            ¢dpll_per_m2x2_ck            q   O        y           „           E  P         –         ­        I   Q      clock-dpll-usb-clkdcoldo            •             fixed-factor-clock          ¢dpll_usb_clkdcoldo          q   N        d           o           I   T      clock-func-128m         •             fixed-factor-clock          ¢func_128m_clk           q   P        d           o           I  C      clock-func-12m-fclk         •             fixed-factor-clock          ¢func_12m_fclk           q   Q        d           o           I  D      clock-func-24m          •             fixed-factor-clock          ¢func_24m_clk            q   K        d           o           I  E      clock-func-48m-fclk         •             fixed-factor-clock          ¢func_48m_fclk           q   Q        d           o           I  F      clock-func-96m-fclk         •             fixed-factor-clock          ¢func_96m_fclk           q   Q        d           o           I  G      clock-l3init-60m@104            •             ti,divider-clock            ¢l3init_60m_fclk         q   R        E                        I  H      clock-clkout2-8@6b0         •             ti,gate-clock           ¢clkout2_clk         q   S        µ           E  °        I  	      clock-l3init-960m-gfclk-8@6c0           •             ti,gate-clock           ¢l3init_960m_gfclk           q   T        µ           E  À        I  I      clock-usb-phy1-always-on-clk32k-8@640           •             ti,gate-clock           ¢usb_phy1_always_on_clk32k           q   U        µ           E  @        I   `      clock-usb-phy2-always-on-clk32k-8@688           •             ti,gate-clock           ¢usb_phy2_always_on_clk32k           q   U        µ           E  ˆ        I   b      clock-usb-phy3-always-on-clk32k-8@698           •             ti,gate-clock           ¢usb_phy3_always_on_clk32k           q   U        µ           E  ˜        I   c      clock-gpu-core-gclk-mux-24@1220         •             ti,mux-clock            ¢gpu_core_gclk_mux           q   V   W   -        µ           E           Ú   X        ÿ   -        I   X      clock-gpu-hyd-gclk-mux-26@1220          •             ti,mux-clock            ¢gpu_hyd_gclk_mux            q   V   W   -        µ           E           Ú   Y        ÿ   -        I   Y      clock-l3instr-ts-gclk-div-24@e50            •             ti,divider-clock            ¢l3instr_ts_gclk_div         q   Z        µ           E  P                          I  J      clock-vip1-gclk-mux-24@1020         •             ti,mux-clock            ¢vip1_gclk_mux           q      [        µ           E           I  K      clock-vip2-gclk-mux-24@1028         •             ti,mux-clock            ¢vip2_gclk_mux           q      [        µ           E  (        I  L      clock-vip3-gclk-mux-24@1030         •             ti,mux-clock            ¢vip3_gclk_mux           q      [        µ           E  0        I  M         clockdomains            I  N   clock-coreaon-clkdm          ti,clockdomain          ¢coreaon_clkdm           q   N        I  O         clock@600            ti,omap4-cm         ¢coreaon_cm          E                                                         I  P   clock@20             ti,clkctrl          ¢coreaon_clkctrl         E               •           I   g         clock@700            ti,omap4-cm         ¢l3main1_cm          E                                                         I  Q   clock@20             ti,clkctrl          ¢l3main1_clkctrl         E       t        •           I   	         clock@900            ti,omap4-cm         ¢ipu2_cm         E  	                                           	            I  R   clock@20             ti,clkctrl          ¢ipu2_clkctrl            E               •           I   Ö         clock@a00            ti,omap4-cm         ¢dma_cm          E  
                                           
            I  S   clock@20             ti,clkctrl          ¢dma_clkctrl         E               •           I   ^         clock@b00            ti,omap4-cm         ¢emif_cm         E                                                         I  T   clock@20             ti,clkctrl          ¢emif_clkctrl            E               •           I  U         clock@c00            ti,omap4-cm         ¢atl_cm          E                                                         I  V   clock@0          ti,clkctrl          ¢atl_clkctrl         E               •           I            clock@d00            ti,omap4-cm       	  ¢l4cfg_cm            E                                                         I  W   clock@20             ti,clkctrl          ¢l4cfg_clkctrl           E       „        •           I            clock@e00            ti,omap4-cm         ¢l3instr_cm          E                                                         I  X   clock@20             ti,clkctrl          ¢l3instr_clkctrl         E               •           I   
         clock@f00            ti,omap4-cm         ¢iva_cm          E                                                         I  Y   clock@20             ti,clkctrl          ¢iva_clkctrl         E               •           I   ì         clock@1000           ti,omap4-cm         ¢cam_cm          E                                                         I  Z   clock@20             ti,clkctrl          ¢cam_clkctrl         E       ,        •           I   Â         clock@1100           ti,omap4-cm         ¢dss_cm          E                                                         I  [   clock@20             ti,clkctrl          ¢dss_clkctrl         E               •           I   ç         clock@1200           ti,omap4-cm         ¢gpu_cm          E                                                         I  \   clock@20             ti,clkctrl          ¢gpu_clkctrl         E               •           I   æ         clock@1300           ti,omap4-cm       
  ¢l3init_cm           E                                                         I  ]   clock@20             ti,clkctrl          ¢l3init_clkctrl          E       l   à           •           I   _      clock@b0             ti,clkctrl          ¢pcie_clkctrl            E   °           •           I   e      clock@d0             ti,clkctrl          ¢gmac_clkctrl            E   Ð           •           I   ·         clock@1700           ti,omap4-cm       	  ¢l4per_cm            E                                                         I  ^   clock@28             ti,clkctrl          ¢l4per_clkctrl         (  E   (   d       $   ð   <  @     p           •           Ú   \  \           ÿ   ]        I   ˜      clock@1a0            ti,clkctrl          ¢l4sec_clkctrl           E      ,        •           I   £      clock@c          ti,clkctrl          ¢l4per2_clkctrl        @  E               �      Ä     8     `     x   $  Ð   <        •           I   \      clock@14             ti,clkctrl          ¢l4per3_clkctrl          E         È     0           •           I   ¼               target-module@56000          ti,sysc-omap2 ti,sysc           E `     `,    `(           Arev sysc syss           "  #        /                     =                     K           q   ^                xfck                                       `       dma-controller@0             ti,omap4430-sdma ti,omap-sdma           E             0                             	          
                       X            +           I            target-module@5e000          ti,sysc       	  disabled                                          à           target-module@80000          ti,sysc-omap2 ti,sysc           E                        Arev sysc syss           "           =                  K           q   _   À            xfck                                           €    ocp2scp@0            ti,omap-ocp2scp                                            €         E           phy@4000             ti,dra7x-usb2 ti,omap-usb2          E  @            e              q   `   _   Ð           xwkupclk refclk          Š            v   a        I   ¾      phy@5000              ti,dra7x-usb2-phy2 ti,omap-usb2         E  P            e     t        q   b   _               xwkupclk refclk          Š            v   a        I   Á      phy@4400             ti,omap-usb3            E  D    €  H    d  L    @        Aphy_rx phy_tx pll_ctrl          e     p        q   c      _   Ð           xwkupclk sysclk refclk           Š            I   ¿            target-module@90000          ti,sysc-omap2 ti,sysc           E 	      	     	            Arev sysc syss           "           =                  K           q   _   È            xfck                                       	    €    ocp2scp@0            ti,omap-ocp2scp                                            €         E           pcie-phy@4000            ti,phy-pipe3-pcie           E  @    €  D    d        Aphy_rx phy_tx           e   d           �   d         4  q   C   D   e          e       	   e       
   f         ;  xdpll_ref dpll_ref_m2 wkupclk refclk div-clk phy-div sysclk          Š            I   Å      pcie-phy@5000            ti,phy-pipe3-pcie           E  P    €  T    d        Aphy_rx phy_tx           e   d            �   d         4  q   C   D   e         e      	   e      
   f         ;  xdpll_ref dpll_ref_m2 wkupclk refclk div-clk phy-div sysclk          Š          	  disabled            I   É      phy@6000             ti,phy-pipe3-sata           E  `    €  d    d  h    @        Aphy_rx phy_tx pll_ctrl          e     t        q      _   h           xsysclk refclk           Œ     ü        Š            I   i            target-module@a0000          ti,sysc       	  disabled                                          
    €       target-module@d9000          ti,sysc-omap4-sr ti,sysc            E �8           Asysc            "           =                     q   g               xfck                                       �          target-module@dd000          ti,sysc-omap4-sr ti,sysc            E Ð8           Asysc            "           =                     q   g               xfck                                       Ð          target-module@e0000          ti,sysc       	  disabled                                                     target-module@f4000          ti,sysc-omap4 ti,sysc           E @     @         	  Arev sysc            "           =                  q                  xfck                                       @       mailbox@0            ti,omap4-mailbox            E             $                   ‡          †           œ           ¨           º         	  disabled            I  _         target-module@f6000          ti,sysc-omap2 ti,sysc           E `     `    `           Arev sysc syss           "           =                  K           q                  xfck                                       `       spinlock@0           ti,omap4-hwspinlock         E               Ì           I  `            segment@100000           simple-pm-bus                                 ¸              0  0      €  €      �  �                                       0  0     @  @     P  P     `  `     p  p     €  €     °  °     À  À     Ð  Ð     à  à     ð  ð                              0  0     @  @     P  P     `  `     p  p     €  €     Ð  Ð     à  à                     0  0     @  @     P  P     `  `     p  p     €  €                     0  0     @  @     P  P     `  `     p  p     €  €     �  �              �  �              °  °     À  À     °  °     À  À     Ð  Ð     à  à     �  �                      "   target-module@2000           ti,sysc       	  disabled                                                      target-module@8000           ti,sysc       	  disabled                                           €          target-module@40000          ti,sysc-omap4 ti,sysc           E  ü              	  Arev sysc            /                  =                        h        q   _   h            xfck                                               sata@0           snps,dwc-ahci           E                            1           Ú   i      	  ßsata-phy            q   _   h           é           okay            I  a         target-module@51000          ti,sysc       	  disabled                                                    target-module@53000          ti,sysc       	  disabled                                          0          target-module@55000          ti,sysc       	  disabled                                          P          target-module@57000          ti,sysc       	  disabled                                          p          target-module@59000          ti,sysc       	  disabled                                          �          target-module@5b000          ti,sysc       	  disabled                                          °          target-module@5d000          ti,sysc       	  disabled                                          Ð          target-module@5f000          ti,sysc       	  disabled                                          ð          target-module@61000          ti,sysc       	  disabled                                                    target-module@63000          ti,sysc       	  disabled                                          0          target-module@65000          ti,sysc       	  disabled                                          P          target-module@67000          ti,sysc       	  disabled                                          p          target-module@69000          ti,sysc       	  disabled                                          �          target-module@6b000          ti,sysc       	  disabled                                          °          target-module@6d000          ti,sysc       	  disabled                                          Ð          target-module@71000          ti,sysc       	  disabled                                                    target-module@73000          ti,sysc       	  disabled                                          0          target-module@75000          ti,sysc       	  disabled                                          P          target-module@77000          ti,sysc       	  disabled                                          p          target-module@79000          ti,sysc       	  disabled                                          �          target-module@7b000          ti,sysc       	  disabled                                          °          target-module@7d000          ti,sysc       	  disabled                                          Ð          target-module@81000          ti,sysc       	  disabled                                                    target-module@83000          ti,sysc       	  disabled                                          0          target-module@85000          ti,sysc       	  disabled                                          P          target-module@87000          ti,sysc       	  disabled                                          p             segment@200000           simple-pm-bus                                 ø   €  !€     �  !�                                     °   °      À   À      Ð   Ð      à   à      ð   ð        !        !        !      0  !0     @  !@     P  !P        "      °  "°     À  !À     Ð  !Ð     à  !à     ð  !ð        "        "     @  "@     P  "P     `  "`     p  "p     À  "À     Ð  "Ð     à  "à     ð  "ð        #        #        #      0  #0     @  #@     P  #P     `  #`     p  #p        !      °  !°       target-module@0          ti,sysc       	  disabled                                                      target-module@a000           ti,sysc       	  disabled                                                      target-module@c000           ti,sysc       	  disabled                                           À          target-module@e000           ti,sysc       	  disabled                                           à          target-module@10000          ti,sysc       	  disabled                                                     target-module@12000          ti,sysc       	  disabled                                                     target-module@14000          ti,sysc       	  disabled                                          @          target-module@18000          ti,sysc       	  disabled                                          €          target-module@1a000          ti,sysc       	  disabled                                                     target-module@1c000          ti,sysc       	  disabled                                          À          target-module@1e000          ti,sysc       	  disabled                                          à          target-module@20000          ti,sysc       	  disabled                                                     target-module@24000          ti,sysc       	  disabled                                          @          target-module@26000          ti,sysc       	  disabled                                          `          target-module@2a000          ti,sysc       	  disabled                                                     target-module@2c000          ti,sysc       	  disabled                                          À          target-module@2e000          ti,sysc       	  disabled                                          à          target-module@30000          ti,sysc       	  disabled                                                     target-module@32000          ti,sysc       	  disabled                                                     target-module@34000          ti,sysc       	  disabled                                          @          target-module@36000          ti,sysc       	  disabled                                          `                interconnect@4ae00000            ti,dra7-l4-wkup simple-pm-bus              j        q   k                xfck         EJà     Jà    Jà          
  Aap la ia0                                  0      Jà        Já        Jâ        Jã             I  b   segment@0            simple-pm-bus                                  l                                 `   `       €   €      @   @      P   P      À   À      Ð   Ð       target-module@4000           ti,sysc-omap2 ti,sysc           E  @      @         	  Arev sysc            =                     q   k   0            xfck                                        @       counter@0            ti,omap-counter32k          E       @        I  c         target-module@6000           ti,sysc-omap4 ti,sysc           E  `            Arev                                        `        prm@0            ti,dra7-prm simple-bus          E      0                                                              0         I  d   clocks                                    I  e   clock-sys-clkin1@110            •             ti,mux-clock            ¢sys_clkin1          q   l   m   n   o   p   q   r        E           –        I         clock@118         
   ti,clksel           E          •                                clock@0         E             ti,mux-clock            ¢abe_dpll_sys_clk_mux            q      s        •            I   t         clock-abe-dpll-bypass-clk-mux@114           •             ti,mux-clock            ¢abe_dpll_bypass_clk_mux         q   t   U        E          I         clock-abe-dpll-clk-mux@10c          •             ti,mux-clock            ¢abe_dpll_clk_mux            q   t   U        E          I         clock-abe-24m@11c           •             ti,divider-clock            ¢abe_24m_fclk            q           E                        I   ]      clock-aess@178          •             ti,divider-clock          
  ¢aess_fclk           q   u        E  x        y           I   v      clock-abe-giclk-div@174         •             ti,divider-clock            ¢abe_giclk_div           q   v        E  t        y           I  f      clock-abe-lp-clk-div@1d8            •             ti,divider-clock            ¢abe_lp_clk_div          q           E  Ø                       I   –      clock-abe-sys-clk-div@120           •             ti,divider-clock            ¢abe_sys_clk_div         q           E           y           I  g      clock-adc-gfclk-mux@1dc         •             ti,mux-clock            ¢adc_gfclk_mux           q      s   U        E  Ü        I  h      clock-sys-clk1-dclk-div@1c8         •             ti,divider-clock            ¢sys_clk1_dclk_div           q           y   @        E  È         Ä        I         clock-sys-clk2-dclk-div@1cc         •             ti,divider-clock            ¢sys_clk2_dclk_div           q   s        y   @        E  Ì         Ä        I   €      clock-per-abe-x1-dclk-div@1bc           •             ti,divider-clock            ¢per_abe_x1_dclk_div         q   w        y   @        E  ¼         Ä        I   �      clock@18c         
   ti,clksel           E  Œ        •                                clock@0         E             ti,divider-clock            ¢dsp_gclk_div            q   &        y   @         Ä        •            I   ƒ         clock-gpu-dclk@1a0          •             ti,divider-clock          	  ¢gpu_dclk            q   -        y   @        E            Ä        I   …      clock-emif-phy-dclk-div@190         •             ti,divider-clock            ¢emif_phy_dclk_div           q   x        y   @        E  �         Ä        I   ‡      clock-gmac-250m-dclk-div@19c            •             ti,divider-clock            ¢gmac_250m_dclk_div          q   y        y   @        E  œ         Ä        I   z      clock-gmac-main         •             fixed-factor-clock          ¢gmac_main_clk           q   z        d           o           I   ¸      clock-l3init-480m-dclk-div@1ac          •             ti,divider-clock            ¢l3init_480m_dclk_div            q   R        y   @        E  ¬         Ä        I   Œ      clock-usb-otg-dclk-div@184          •             ti,divider-clock            ¢usb_otg_dclk_div            q   {        y   @        E  „         Ä        I   �      clock-sata-dclk-div@1c0         •             ti,divider-clock            ¢sata_dclk_div           q           y   @        E  À         Ä        I   Ž      clock-pcie2-dclk-div@1b8            •             ti,divider-clock            ¢pcie2_dclk_div          q   |        y   @        E  ¸         Ä        I   �      clock-pcie-dclk-div@1b4         •             ti,divider-clock            ¢pcie_dclk_div           q   }        y   @        E  ´         Ä        I   �      clock-emu-dclk-div@194          •             ti,divider-clock            ¢emu_dclk_div            q           y   @        E  ”         Ä        I   ‘      clock-secure-32k-dclk-div@1c4           •             ti,divider-clock            ¢secure_32k_dclk_div         q   ~        y   @        E  Ä         Ä        I   ’      clock-clkoutmux0-clk-mux@158            •             ti,mux-clock            ¢clkoutmux0_clk_mux        X  q      €   �   ‚   ƒ   „   …   †   ‡   z   ˆ   ‰   Š   ‹   Œ   �   Ž   �   �   ‘   ’   “        E  X        I  i      clock-clkoutmux1-clk-mux@15c            •             ti,mux-clock            ¢clkoutmux1_clk_mux        X  q      €   �   ‚   ƒ   „   …   †   ‡   z   ˆ   ‰   Š   ‹   Œ   �   Ž   �   �   ‘   ’   “        E  \        I  j      clock-clkoutmux2-clk-mux@160            •             ti,mux-clock            ¢clkoutmux2_clk_mux        X  q      €   �   ‚   ƒ   „   …   †   ‡   z   ˆ   ‰   Š   ‹   Œ   �   Ž   �   �   ‘   ’   “        E  `        I   S      clock-custefuse-sys-gfclk-div           •             fixed-factor-clock          ¢custefuse_sys_gfclk_div         q           d           o           I  k      clock-eve@180           •             ti,mux-clock            ¢eve_clk         q   9   <        E  €        I  l      clock-hdmi-dpll-clk-mux@164         •             ti,mux-clock            ¢hdmi_dpll_clk_mux           q      s        E  d        I  m      clock-mlb@134           •             ti,divider-clock            ¢mlb_clk         q   ”        y   @        E  4         Ä        I  n      clock-mlbp@130          •             ti,divider-clock          	  ¢mlbp_clk            q   •        y   @        E  0         Ä        I  o      clock-per-abe-x1-gfclk2-div@138         •             ti,divider-clock            ¢per_abe_x1_gfclk2_div           q   w        y   @        E  8         Ä        I  p      clock-timer-sys-clk-div@144         •             ti,divider-clock            ¢timer_sys_clk_div           q           E  D        y           I   ›      clock-video1-dpll-clk-mux@168           •             ti,mux-clock            ¢video1_dpll_clk_mux         q      s        E  h        I  q      clock-video2-dpll-clk-mux@16c           •             ti,mux-clock            ¢video2_dpll_clk_mux         q      s        E  l        I  r      clock-wkupaon-iclk-mux@108          •             ti,mux-clock            ¢wkupaon_iclk_mux            q      –        E          I   Z         clockdomains            I  s      clock@1800           ti,omap4-cm         ¢wkupaon_cm          E                                                         I  t   clock@20             ti,clkctrl          ¢wkupaon_clkctrl         E       l        •           I   k         prm@300       "   ti,dra7-prm-inst ti,omap-prm-inst           E              û            I   ­      prm@400       "   ti,dra7-prm-inst ti,omap-prm-inst           E                         û            I   ß      prm@500       "   ti,dra7-prm-inst ti,omap-prm-inst           E                         û            I   Î      prm@628       "   ti,dra7-prm-inst ti,omap-prm-inst           E  (   Ø        û            I         prm@700       "   ti,dra7-prm-inst ti,omap-prm-inst           E                         û            I         prm@f00       "   ti,dra7-prm-inst ti,omap-prm-inst           E                         û            I   ë      prm@1000          "   ti,dra7-prm-inst ti,omap-prm-inst           E              û            I  u      prm@1100          "   ti,dra7-prm-inst ti,omap-prm-inst           E              û            I  v      prm@1200          "   ti,dra7-prm-inst ti,omap-prm-inst           E              û            I  w      prm@1300          "   ti,dra7-prm-inst ti,omap-prm-inst           E                         û            I   h      prm@1400          "   ti,dra7-prm-inst ti,omap-prm-inst           E              û            I   —      prm@1600          "   ti,dra7-prm-inst ti,omap-prm-inst           E              û            I  x      prm@1724          "   ti,dra7-prm-inst ti,omap-prm-inst           E  $           û            I   j      prm@1b00          "   ti,dra7-prm-inst ti,omap-prm-inst           E      @                   û            I   î      prm@1b40          "   ti,dra7-prm-inst ti,omap-prm-inst           E  @   @        û            I  y      prm@1b80          "   ti,dra7-prm-inst ti,omap-prm-inst           E  €   @        û            I  z      prm@1bc0          "   ti,dra7-prm-inst ti,omap-prm-inst           E  À   @        û            I  {      prm@1c00          "   ti,dra7-prm-inst ti,omap-prm-inst           E      `        û            I  |      prm@1c60          "   ti,dra7-prm-inst ti,omap-prm-inst           E  `            û            I  }      prm@1c80          "   ti,dra7-prm-inst ti,omap-prm-inst           E  €   €        û            I   Ã            target-module@c000           ti,sysc-omap4 ti,sysc           E  À            Arev                                        À       scm_conf@0           syscon          E               I               segment@10000            simple-pm-bus                                  `                      @  @      P  P      €  €      �  �      À  À      Ð  Ð       target-module@0          ti,sysc-omap2 ti,sysc           E                          Arev sysc syss           "           =                     K           q   k          k            
  xfck dbclk                                                  gpio@0           ti,omap4-gpio           E                                          ,                    4           I   ž         target-module@4000           ti,sysc-omap2 ti,sysc           E  @      @     @           Arev sysc syss           "   "        =                     K           q   k               xfck                                        @       wdt@0            ti,omap3-wdt            E       €               K           I  ~         target-module@8000           ti,sysc-omap4-timer ti,sysc         E  €      €         	  Arev sysc            "           =                     q   k                xfck                                        €             8         L        I     timer@0          ti,omap5430-timer           E       €        q   k               xfck                             W        Ú   k               ÿ   U        I  €         target-module@c000           ti,sysc       	  disabled                                           À             segment@20000            simple-pm-bus                                  ¨    `  `                                            0  0      p  p      €  €      �  �      ˆ  ˆ      Š  Š      °  °      À  À      ð  ð       target-module@0          ti,sysc-omap4-timer ti,sysc         E                   	  Arev sysc            "           =                     q   k   (            xfck                                                timer@0          ti,omap5430-timer           E       €               Z            W         f        I  �         target-module@2000           ti,sysc       	  disabled                                                      target-module@6000           ti,sysc       	  disabled                                   H        `         p          €      (   ˆ      *   Š      0   �          target-module@b000           ti,sysc-omap2 ti,sysc           E  °P     °T     °X           Arev sysc syss           "           =                     K           q   k   `            xfck                                        °       serial@0             ti,dra742-uart          E                      Ý           TÜl       	  disabled            I  ‚         target-module@f000           ti,sysc       	  disabled                                           ð             segment@30000            simple-pm-bus                                  œ    À  À       à  à                                  0  0      @  @      P  P      `  `      p  p      €  €      �  �                 target-module@1000           ti,sysc       	  disabled                                                     target-module@3000           ti,sysc       	  disabled                                           0          target-module@5000           ti,sysc       	  disabled                                           P          target-module@7000           ti,sysc       	  disabled                                           p          target-module@9000           ti,sysc       	  disabled                                           �          target-module@c000           ti,sysc-omap4 ti,sysc           E  À            Arev         q   k   h            xfck                                        À        can@0            ti,dra7-d_can           E                v     X                   Þ           q   k   h         	  disabled            I  ƒ               interconnect@48000000            ti,dra7-l4-per1 simple-pm-bus              —        q   ˜   ˜            xfck       0  EH      H     H     H     H     H             Aap la ia0 ia1 ia2 ia3                                        H           H               I  „   segment@0            simple-pm-bus                                 ü                                                         0  0     @  @     P  P     `  `     p  p     à  à     ð  ð     P  P     `  `     p  p     €  €     �  �              °  °     À  À     Ð  Ð     à  à                       °  °     À  À     Ð  Ð     à  à     ð  ð                              0  0            0  0     @  @              0  0     €  €     �  �     `  `     p  p     €  €     �  �                     	€  	€     	�  	�     	   	      	°  	°     	À  	À     	Ð  	Ð     €  €     �  �     	   	       	   	      
@  
@     
`  
`     
€  
€   @  
À  
À     
Ð  
Ð     
à  
à     `  `     p  p     @  @     P  P     €  €     �  �              °  °                     P  P     `  `     
   
      
0  
0                                
P  
P              °  °     À  À     Ð  Ð       target-module@20000          ti,sysc-omap2 ti,sysc           E  P     T     X           Arev sysc syss           "           =                     K           q   ˜  (            xfck                                               serial@0             ti,dra742-uart          E                      E           TÜl         okay            …   ™   5   ™   6        Štx rx           -          E      š  ø        I  …         target-module@32000          ti,sysc-omap4-timer ti,sysc         E                 	  Arev sysc            "           =                     q   ˜               xfck                                               timer@0          ti,omap5430-timer           E       €        q   ˜         ›        xfck timer_sys_ck                   !           I  †         target-module@34000          ti,sysc-omap4-timer ti,sysc         E @     @         	  Arev sysc            "           =                     q   ˜               xfck                                       @            I  ‡   timer@0          ti,omap5430-timer           E       €        q   ˜         ›        xfck timer_sys_ck                   "           I   Ù         target-module@36000          ti,sysc-omap4-timer ti,sysc         E `     `         	  Arev sysc            "           =                     q   ˜                xfck                                       `            I  ˆ   timer@0          ti,omap5430-timer           E       €        q   ˜          ›        xfck timer_sys_ck                   #           I   Ú         target-module@3e000          ti,sysc-omap4-timer ti,sysc         E à     à         	  Arev sysc            "           =                     q   ˜   (            xfck                                       à       timer@0          ti,omap5430-timer           E       €        q   ˜   (      ›        xfck timer_sys_ck                   (           I   Û         target-module@51000          ti,sysc-omap2 ti,sysc           E                     Arev sysc syss           "           =                     K           q   ˜   è       ˜   è         
  xfck dbclk                                                      8         ”        I  ‰   gpio@0           ti,omap4-gpio           E                                          ,                    4           I   ¡         target-module@53000          ti,sysc-omap2 ti,sysc           E 0     0    1           Arev sysc syss           "           =                     K           q   ˜   ð       ˜   ð         
  xfck dbclk                                         0       gpio@0           ti,omap4-gpio           E                      t                    ,                    4           I  Š         target-module@55000          ti,sysc-omap2 ti,sysc           E P     P    Q           Arev sysc syss           "           =                     K           q   ˜   8       ˜   8         
  xfck dbclk                                         P            I  ‹   gpio@0           ti,omap4-gpio           E                                          ,                    4           I   È         target-module@57000          ti,sysc-omap2 ti,sysc           E p     p    q           Arev sysc syss           "           =                     K           q   ˜   @       ˜   @         
  xfck dbclk                                         p            I  Œ   gpio@0           ti,omap4-gpio           E                                          ,                    4           I  �         target-module@59000          ti,sysc-omap2 ti,sysc           E �     �    ‘           Arev sysc syss           "           =                     K           q   ˜   H       ˜   H         
  xfck dbclk                                         �       gpio@0           ti,omap4-gpio           E                                          ,                    4           I             target-module@5b000          ti,sysc-omap2 ti,sysc           E °     °    ±           Arev sysc syss           "           =                     K           q   ˜   P       ˜   P         
  xfck dbclk                                         °       gpio@0           ti,omap4-gpio           E                                          ,                    4           I  Ž         target-module@5d000          ti,sysc-omap2 ti,sysc           E Ð     Ð    Ñ           Arev sysc syss           "           =                     K           q   ˜   X       ˜   X         
  xfck dbclk                                         Ð       gpio@0           ti,omap4-gpio           E                                          ,                    4           I   ¦         target-module@60000          ti,sysc-omap2 ti,sysc           E             �           Arev sysc syss           "          =                     K           q   ˜   ˆ            xfck                                               i2c@0            ti,omap4-i2c            E                      8                                     okay            T €        I  �   rtc@6f           microchip,mcp7941x          E   o        -                š  $        §irq wakeup          ·   œ         Â        I  �            target-module@66000          ti,sysc-omap2 ti,sysc           E `P    `T    `X           Arev sysc syss           "           =                     K           q   ˜  H            xfck                                       `       serial@0             ti,dra742-uart          E                      d           TÜl       	  disabled            …   ™   ?   ™   @        Štx rx           I  ‘         target-module@68000          ti,sysc-omap2 ti,sysc           E €P    €T    €X           Arev sysc syss           "           =                     K           q   �   0            xfck                                       €       serial@0             ti,dra742-uart          E                      e           TÜl       	  disabled            …   ™   O   ™   P        Štx rx           I  ’         target-module@6a000          ti,sysc-omap2 ti,sysc           E  P     T     X           Arev sysc syss           "           =                     K           q   ˜              xfck                                               serial@0             ti,dra742-uart          E               -          C           TÜl       	  disabled            …   ™   1   ™   2        Štx rx           I  “         target-module@6c000          ti,sysc-omap2 ti,sysc           E ÀP    ÀT    ÀX           Arev sysc syss           "           =                     K           q   ˜               xfck                                       À       serial@0             ti,dra742-uart          E                      D           TÜl       	  disabled            …   ™   3   ™   4        Štx rx           I  ”         target-module@6e000          ti,sysc-omap2 ti,sysc           E àP    àT    àX           Arev sysc syss           "           =                     K           q   ˜  0            xfck                                       à       serial@0             ti,dra742-uart          E                      A           TÜl       	  disabled            …   ™   7   ™   8        Štx rx           I  •         target-module@70000          ti,sysc-omap2 ti,sysc           E             �           Arev sysc syss           "          =                     K           q   ˜   x            xfck                                               i2c@0            ti,omap4-i2c            E                      3                                     okay            T €        I  –   tps659038@58             ti,tps659038            E   X         &   ž                       4                     Ð         ë        I   Ÿ   tps659038_pmic           ti,tps659038-pmic      regulators     smps12          Ksmps12          Z øP        r Ð                          I         smps3           Ksmps3           Z ™p        r ™p                          I        smps45          Ksmps45          Z øP        r Ð                          I  —      smps6           Ksmps6           Z øP        r Œ0                          I  ˜      smps8           Ksmps8           Z w@        r w@                          I  ™      ldo1            Kldo1            Z w@        r 2Z                           I   ¨      ldo2            Kldo2            Z 2Z         r 2Z                           I  š      ldo3            Kldo3            Z w@        r w@                          I  ›      ldo4            Kldo4            Z w@        r w@                          I   é      ldo9            Kldo9            Z �        r �                          I  œ      ldoln           Kldoln           Z w@        r w@                          I   è      ldousb          Kldousb          Z 2Z         r 2Z                  I   a      regen1          Kregen1                            I               tps659038_rtc            ti,palmas-rtc            &   Ÿ                       Â        I  �      tps659038_pwr_button             ti,palmas-pwrbutton          &   Ÿ                       Â        .           I  ž      tps659038_gpio           ti,palmas-gpio                   ,           I        tps659038_usb            ti,palmas-usb-vid            K        d                   I   À         tmp102@48         
   ti,tmp102           E   H         &   ¡                      n           I   ý      tlv320aic3104@18            „             ti,tlv320aic3104            E           Ú   S        ÿ   €        okay            •   (        £   œ        ¯   œ        ¼   œ        É   ¢        I        eeprom@50            atmel,24c32         E   P        I  Ÿ            target-module@72000          ti,sysc-omap2 ti,sysc           E             �           Arev sysc syss           "          =                     K           q   ˜   €            xfck                                               i2c@0            ti,omap4-i2c            E                      4                                   	  disabled            I            target-module@78000          ti,sysc-omap2 ti,sysc           E €     €    €           Arev sysc syss           "          =                     K           q   ˜   0            xfck                                       €       elm@0            ti,am3352-elm           E      À                        	  disabled            I  ¡         target-module@7a000          ti,sysc-omap2 ti,sysc           E             �           Arev sysc syss           "          =                     K           q   ˜   �            xfck                                               i2c@0            ti,omap4-i2c            E                      9                                   	  disabled            I  ¢         target-module@7c000          ti,sysc-omap2 ti,sysc           E À     À    À�           Arev sysc syss           "          =                     K           q   �   (            xfck                                       À       i2c@0            ti,omap4-i2c            E                      7                                   	  disabled            I  £         target-module@86000          ti,sysc-omap4-timer ti,sysc         E `     `         	  Arev sysc            "           =                     q   ˜                xfck                                       `       timer@0          ti,omap5430-timer           E       €        q   ˜          ›        xfck timer_sys_ck                   )           I   ã         target-module@88000          ti,sysc-omap4-timer ti,sysc         E €     €         	  Arev sysc            "           =                     q   ˜               xfck                                       €       timer@0          ti,omap5430-timer           E       €        q   ˜         ›        xfck timer_sys_ck                   *           I   Ñ         target-module@90000          ti,sysc-omap2 ti,sysc           E 	à    	ä         	  Arev sysc            "           =               q   £                xfck                                       	         rng@0            ti,omap4-rng            E                       /           q           xfck         I  ¤         target-module@98000          ti,sysc-omap4 ti,sysc           E 	€     	€         	  Arev sysc            "           =                     q   ˜   È            xfck                                       	€       spi@0            ti,omap4-mcspi          E                      <                                     Õ         @  …   ™   #   ™   $   ™   %   ™   &   ™   '   ™   (   ™   )   ™   *         Štx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       	  disabled            I  ¥         target-module@9a000          ti,sysc-omap4 ti,sysc           E 	      	          	  Arev sysc            "           =                     q   ˜   Ð            xfck                                       	        spi@0            ti,omap4-mcspi          E                      =                                     Õ            …   ™   +   ™   ,   ™   -   ™   .        Štx0 rx0 tx1 rx1       	  disabled            I  ¦         target-module@9c000          ti,sysc-omap4 ti,sysc           E 	À     	À         	  Arev sysc            "           /                     =                     q   _               xfck                                       	À       mmc@0            ti,dra7-sdhci           E                      N           okay            ã   ¤        ðq°          þ                 default hs          &   ¥        0           :   ¦               C        L   §        V   ¨        I  §         target-module@a2000          ti,sysc       	  disabled                                          
           target-module@a4000          ti,sysc       	  disabled                                          
@        
P          target-module@a5000          ti,sysc-omap2 ti,sysc           E 
P0    
P4    
P8           Arev sysc syss           "           =                     K           q   £               xfck                                       
P            I  ¨   des@0            ti,omap4-des            E                       M           …   ™   u   ™   t        Štx rx           q           xfck         I  ©         target-module@a8000          ti,sysc       	  disabled                                          
€   @       target-module@ad000          ti,sysc-omap4 ti,sysc           E 
Ð     
Ð         	  Arev sysc            "           /                     =                     q   ˜   ø            xfck                                       
Ð       mmc@0            ti,dra7-sdhci           E                      Y         	  disabled            ðÐ�         b     @          I  ª         target-module@b2000          ti,sysc-omap2 ti,sysc           E                        Arev sysc syss           "           K            8        q   ˜   `            xfck                                               1w@0             ti,omap3-1w         E                      5           I  «         target-module@b4000          ti,sysc-omap4 ti,sysc           E @     @         	  Arev sysc            "           /                     =                     q   _               xfck                                       @       mmc@0            ti,dra7-sdhci           E                      Q           okay            ðq°         b                r         þ                 default hs ddr_3_3v         &   ©        V   œ        �   œ        0            Ž         C        L   ª        œ   «   ¬        I  ¬         target-module@b8000          ti,sysc-omap4 ti,sysc           E €     €         	  Arev sysc            "           =                     q   ˜   Ø            xfck                                       €       spi@0            ti,omap4-mcspi          E                      V                                     Õ           …   ™      ™           Štx0 rx0       	  disabled            I  ­         target-module@ba000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                     q   ˜   à            xfck                                               spi@0            ti,omap4-mcspi          E                      +                                     Õ           …   ™   F   ™   G        Štx0 rx0       	  disabled            I  ®         target-module@d1000          ti,sysc-omap4 ti,sysc           E               	  Arev sysc            "           /                     =                     q   ˜               xfck                                              mmc@0            ti,dra7-sdhci           E                      [         	  disabled            ðq°         b     @          I  ¯         target-module@d5000          ti,sysc       	  disabled                                          P             segment@200000           simple-pm-bus                                     target-module@48210000           ti,sysc-omap4-simple ti,sysc               ­        q   ®                xfck                                      H!        mpu          ti,omap5-mpu             interconnect@48400000            ti,dra7-l4-per2 simple-pm-bus              —        q   \                xfck       (  EH@     H@    H@    H@    H@            Aap la ia0 ia1 ia2                                  l      H@   @  E€  E€   @  EÀ  EÀ   @  F   F    @  HC` HC`  @  HC  HC   @  HDÀ HDÀ  @  HE  HE   @  HE@ HE@  @          I  °   segment@0            simple-pm-bus                                 T                                @  @   @                    €  €     À  À     Ð  Ð                        @  @      `  `     €  €               À  À      à  à     `  `     p  p                                 °  °     À  À     Ð  Ð     à  à     ð  ð                              0  0                                 °  °     @  @      `  `                     €  €               @  @     P  P     À  À      à  à     À  À     Ð  Ð                              0  0     @  @     P  P     `  `     p  p     €  €     �  �     €  €               °  °     À  À     Ð  Ð     à  à    E€  E€   @  EÀ  EÀ   @  F   F    @  HC` HC`  @  HC  HC   @  HDÀ HDÀ  @  HE  HE   @  HE@ HE@  @     target-module@20000          ti,sysc-omap2 ti,sysc           E  P     T     X           Arev sysc syss           "           =                     K           q   \  Ä            xfck                                               serial@0             ti,dra742-uart          E                      Ú           TÜl       	  disabled            I  ±         target-module@22000          ti,sysc-omap2 ti,sysc           E  P     T     X           Arev sysc syss           "           =                     K           q   \  Ô            xfck                                               serial@0             ti,dra742-uart          E                      Û           TÜl       	  disabled            I  ²         target-module@24000          ti,sysc-omap2 ti,sysc           E @P    @T    @X           Arev sysc syss           "           =                     K           q   \  Ü            xfck                                       @       serial@0             ti,dra742-uart          E                      Ü           TÜl       	  disabled            I  ³         target-module@2c000          ti,sysc       	  disabled                                          À          target-module@36000          ti,sysc       	  disabled                                          `          target-module@3a000          ti,sysc       	  disabled                                                     target-module@3c000          ti,sysc-omap4 ti,sysc           E À            Arev         q                   xfck                                       À          	  disabled            I  ´   atl@0            ti,dra7-atl         E      ÿ        ¦   ¯   °   ±   ²        q                  xfck       	  disabled            I  µ         target-module@3e000          ti,sysc-omap4 ti,sysc           E à     à         	  Arev sysc            "           =                  q   \   ¸            xfck                                       à       epwmss@0              ti,dra746-pwmss ti,am33xx-pwmss         E       0                               	  disabled                               I  ¶   pwm@100          ti,dra746-ecap ti,am3352-ecap           ¹           E      €        q           xfck       	  disabled            I  ·      pwm@200       "   ti,dra746-ehrpwm ti,am3352-ehrpwm           ¹           E      €        q   ³         
  xtbclk fck         	  disabled            I  ¸            target-module@40000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                  q   \   „            xfck                                               epwmss@0              ti,dra746-pwmss ti,am33xx-pwmss         E       0                               	  disabled                               I  ¹   pwm@100          ti,dra746-ecap ti,am3352-ecap           ¹           E      €        q           xfck       	  disabled            I  º      pwm@200       "   ti,dra746-ehrpwm ti,am3352-ehrpwm           ¹           E      €        q   ´         
  xtbclk fck         	  disabled            I  »            target-module@42000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                  q   \   Œ            xfck                                               epwmss@0              ti,dra746-pwmss ti,am33xx-pwmss         E       0                               	  disabled                               I  ¼   pwm@100          ti,dra746-ecap ti,am3352-ecap           ¹           E      €        q           xfck       	  disabled            I  ½      pwm@200       "   ti,dra746-ehrpwm ti,am3352-ehrpwm           ¹           E      €        q   µ         
  xtbclk fck         	  disabled            I  ¾            target-module@46000          ti,sysc       	  disabled                                          `          target-module@48000          ti,sysc       	  disabled                                          €          target-module@4a000          ti,sysc       	  disabled                                                     target-module@4c000          ti,sysc       	  disabled                                          À          target-module@50000          ti,sysc       	  disabled                                                     target-module@54000          ti,sysc       	  disabled                                          @          target-module@58000          ti,sysc       	  disabled                                          €           target-module@5b000          ti,sysc       	  disabled                                          °          target-module@5d000          ti,sysc       	  disabled                                          Ð          target-module@60000          ti,sysc-dra7-mcasp ti,sysc          E                 	  Arev sysc            =                $  q   �           �          �               xfck ahclkx ahclkr                                               E€  E€   @     mcasp@0          ti,dra7-mcasp-audio         E        E€             Ampu dat                h          g           §tx rx           …   ¶   �      ¶   €           Štx rx         $  q   �           �          �               xfck ahclkx ahclkr         	  disabled            I  ¿         target-module@64000          ti,sysc-dra7-mcasp ti,sysc          E @     @         	  Arev sysc            =                $  q   \  T       \  T      \  T           xfck ahclkx ahclkr                                         @     EÀ  EÀ   @     mcasp@0          ti,dra7-mcasp-audio         E        EÀ             Ampu dat                •          ”           §tx rx           …   ¶   ƒ      ¶   ‚           Štx rx         $  q   \  T       �          \  T           xfck ahclkx ahclkr         	  disabled            I  À         target-module@68000          ti,sysc-dra7-mcasp ti,sysc          E €     €         	  Arev sysc            =                  q   \  \       \  \           xfck ahclkx                                        €     F   F    @     mcasp@0          ti,dra7-mcasp-audio         E        F              Ampu dat                —          –           §tx rx           …   ¶   …      ¶   „           Štx rx           q   \  \       \  \           xfck ahclkx          okay            „            Ú   \  \           ÿ   s        Ä            Ì           Ö                      á            ì            I           target-module@6c000          ti,sysc-dra7-mcasp ti,sysc          E À     À         	  Arev sysc            =                  q   \  Œ       \  Œ           xfck ahclkx                                        À     HC` HC`  @     mcasp@0          ti,dra7-mcasp-audio         E        HC`            Ampu dat                ™          ˜           §tx rx           …   ¶   ‡      ¶   †           Štx rx           q   \  Œ       \  Œ           xfck ahclkx        	  disabled            I  Á         target-module@70000          ti,sysc-dra7-mcasp ti,sysc          E                 	  Arev sysc            =                  q   \  l       \  l           xfck ahclkx                                              HC  HC   @     mcasp@0          ti,dra7-mcasp-audio         E        HC             Ampu dat                ›          š           §tx rx           …   ¶   ‰      ¶   ˆ           Štx rx           q   \  l       \  l           xfck ahclkx        	  disabled            I  Â         target-module@74000          ti,sysc-dra7-mcasp ti,sysc          E @     @         	  Arev sysc            =                  q   \  ø       \  ø           xfck ahclkx                                        @     HDÀ HDÀ  @     mcasp@0          ti,dra7-mcasp-audio         E        HDÀ            Ampu dat                �          œ           §tx rx           …   ¶   ‹      ¶   Š           Štx rx           q   \  ø       \  ø           xfck ahclkx        	  disabled            I  Ã         target-module@78000          ti,sysc-dra7-mcasp ti,sysc          E €     €         	  Arev sysc            =                  q   \  ü       \  ü           xfck ahclkx                                        €     HE  HE   @     mcasp@0          ti,dra7-mcasp-audio         E        HE             Ampu dat                Ÿ          ž           §tx rx           …   ¶   �      ¶   Œ           Štx rx           q   \  ü       \  ü           xfck ahclkx        	  disabled            I  Ä         target-module@7c000          ti,sysc-dra7-mcasp ti,sysc          E À     À         	  Arev sysc            =                  q   \  „       \  „           xfck ahclkx                                        À     HE@ HE@  @     mcasp@0          ti,dra7-mcasp-audio         E        HE@            Ampu dat                ¡                      §tx rx           …   ¶   �      ¶   Ž           Štx rx           q   \  „       \  „           xfck ahclkx        	  disabled            I  Å         target-module@80000          ti,sysc-omap4 ti,sysc           E              Arev         q   \  ä            xfck                                                can@0            ti,dra7-d_can           E                v     X                  á           q         	  disabled            I  Æ         target-module@84000          ti,sysc-omap4-simple ti,sysc            E R     R    R           Arev sysc syss           "            /               =               K           q   ·                xfck                                       @   @          L   switch@0          #   ti,dra7-cpsw-switch ti,cpsw-switch          E      @                   @         q   ¸        xfck                                  É           okay          0        N         O         P         Q           §rx_thresh rx tx misc            I  Ç   ethernet-ports                               port@1          E           ÷port1           ý                Ú   ¹           	   º        rgmii-rxid                     I  È      port@2          E           ÷port2           ý                Ú   ¹           	   »        rgmii-rxid                     I  É         mdio@1000            ti,cpsw-mdio ti,davinci_mdio            q   ¸        xfck                                   / B@        E              I  Ê   ethernet-phy@1          E           I   º      ethernet-phy@2          E           8   d        I   »         cpts            q   ·               xcpts                      interconnect@48800000            ti,dra7-l4-per3 simple-pm-bus              —        q   ¼                xfck       (  EH€     H€    H€    H€    H€            Aap la ia0 ia1 ia2                                        H€              I  Ë   segment@0            simple-pm-bus                                 Œ                                                                           0  0     @  @     P  P     `  `     p  p     €  €     �  �              °  °     À  À     Ð  Ð     à  à     ð  ð                                                                             €  €     �  �     À  À     Ð  Ð              °  °     À  À     Ð  Ð     à  à     ð  ð                              0  0     @  @     P  P     `  `     p  p     €  €     �  �              °  °     À  À     Ð  Ð     à  à     ð  ð                              0  0     @  @     P  P     `  `     p  p     €  €     �  �              °  °     @  @     P  P     à  à     ð  ð                              0  0                       `  `     p  p                        @   @      P   P              
   
                                                    °   °     À  À     Ð  Ð     à  à     ð  ð                 0   0       target-module@2000           ti,sysc-omap4 ti,sysc           E                   	  Arev sysc            "           =                  q      €            xfck                                                mailbox@0            ti,omap4-mailbox            E             0        {         |         }         ~           œ           ¨           º         	  disabled            I  Ì         target-module@4000           ti,sysc       	  disabled                                           @          target-module@a000           ti,sysc       	  disabled                                                      target-module@10000          ti,sysc       	  disabled                                                     target-module@16000          ti,sysc       	  disabled                                          `          target-module@1c000          ti,sysc       	  disabled                                          À          target-module@1e000          ti,sysc       	  disabled                                          à          target-module@20000          ti,sysc-omap4-timer ti,sysc         E                 	  Arev sysc            "           =                     q   �               xfck                                               timer@0          ti,omap5430-timer           E       €        q   �         ›        xfck timer_sys_ck                   $           I   â         target-module@22000          ti,sysc-omap4-timer ti,sysc         E                 	  Arev sysc            "           =                     q   �               xfck                                               timer@0          ti,omap5430-timer           E       €        q   �         ›        xfck timer_sys_ck                   %           I   ó         target-module@24000          ti,sysc-omap4-timer ti,sysc         E @     @         	  Arev sysc            "           =                     q   �               xfck                                       @       timer@0          ti,omap5430-timer           E       €        q   �         ›        xfck timer_sys_ck                   &           I   Ò         target-module@26000          ti,sysc-omap4-timer ti,sysc         E `     `         	  Arev sysc            "           =                     q   �                xfck                                       `       timer@0          ti,omap5430-timer           E       €        q   �          ›        xfck timer_sys_ck                   '           I   Ó         target-module@28000          ti,sysc-omap4-timer ti,sysc         E €     €         	  Arev sysc            "           =                     q   ¼   ´            xfck                                       €       timer@0          ti,omap5430-timer           E       €        q   ¼   ´      ›        xfck timer_sys_ck                  S            B        I   ô         target-module@2a000          ti,sysc-omap4-timer ti,sysc         E                 	  Arev sysc            "           =                     q   ¼   ¼            xfck                                               timer@0          ti,omap5430-timer           E       €        q   ¼   ¼      ›        xfck timer_sys_ck                  T            B        I  Í         target-module@2c000          ti,sysc-omap4-timer ti,sysc         E À     À         	  Arev sysc            "           =                     q   ¼   Ä            xfck                                       À             8         L        I  Î   timer@0          ti,omap5430-timer           E       €        q   ¼   Ä      ›        xfck timer_sys_ck                  U            B        Ú   ¼   Ä           ÿ   ›        I  Ï         target-module@2e000          ti,sysc-omap4-timer ti,sysc         E à     à         	  Arev sysc            "           =                     q   ¼              xfck                                       à             8         L        I  Ð   timer@0          ti,omap5430-timer           E       €        q   ¼        ›        xfck timer_sys_ck                  V            B        Ú   ¼             ÿ   ›        I  Ñ         target-module@38000          ti,sysc-omap4-simple ti,sysc            E €t    €x         	  Arev sysc            =                     q   ½   $            xfck                                       €            I  Ò   rtc@0            ti,am3352-rtc           E                      Ù          Ù           q   U        I  Ó         target-module@3a000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                  q      (            xfck                                               mailbox@0            ti,omap4-mailbox            E             0         í          î          ï          ð           œ           ¨           º         	  disabled            I  Ô         target-module@3c000          ti,sysc-omap4 ti,sysc           E À     À         	  Arev sysc            "           =                  q      0            xfck                                       À       mailbox@0            ti,omap4-mailbox            E             0         ñ          ò          ó          ô           œ           ¨           º         	  disabled            I  Õ         target-module@3e000          ti,sysc-omap4 ti,sysc           E à     à         	  Arev sysc            "           =                  q      8            xfck                                       à       mailbox@0            ti,omap4-mailbox            E             0         õ          ö          ÷          ø           œ           ¨           º         	  disabled            I  Ö         target-module@40000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                  q      @            xfck                                               mailbox@0            ti,omap4-mailbox            E             0         ù          ú          û          ü           œ           ¨           º           okay            I   Ï   mbox-ipu1-ipc3x         O                 Z                 okay            I   Ð      mbox-dsp1-ipc3x         O                 Z                 okay            I   á            target-module@42000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                  q      H            xfck                                               mailbox@0            ti,omap4-mailbox            E             0         ý          þ          ÿ                     œ           ¨           º           okay            I   ×   mbox-ipu2-ipc3x         O                 Z                 okay            I   Ø      mbox-dsp2-ipc3x         O                 Z                 okay            I   ò            target-module@44000          ti,sysc-omap4 ti,sysc           E @     @         	  Arev sysc            "           =                  q      P            xfck                                       @       mailbox@0            ti,omap4-mailbox            E             0                                              œ           ¨           º         	  disabled            I  ×         target-module@46000          ti,sysc-omap4 ti,sysc           E `     `         	  Arev sysc            "           =                  q      X            xfck                                       `       mailbox@0            ti,omap4-mailbox            E             0                                              œ           ¨           º         	  disabled            I  Ø         target-module@48000          ti,sysc       	  disabled                                          €          target-module@4a000          ti,sysc       	  disabled                                                     target-module@4c000          ti,sysc       	  disabled                                          À          target-module@4e000          ti,sysc       	  disabled                                          à          target-module@50000          ti,sysc       	  disabled                                                     target-module@52000          ti,sysc       	  disabled                                                     target-module@54000          ti,sysc       	  disabled                                          @          target-module@56000          ti,sysc       	  disabled                                          `          target-module@58000          ti,sysc       	  disabled                                          €          target-module@5a000          ti,sysc       	  disabled                                                     target-module@5c000          ti,sysc       	  disabled                                          À          target-module@5e000          ti,sysc-omap4 ti,sysc           E à     à         	  Arev sysc            "           =                  q      `            xfck                                       à       mailbox@0            ti,omap4-mailbox            E             0        	         
                             œ           ¨           º         	  disabled            I  Ù         target-module@60000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                  q      h            xfck                                               mailbox@0            ti,omap4-mailbox            E             0                                              œ           ¨           º         	  disabled            I  Ú         target-module@62000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           =                  q      p            xfck                                               mailbox@0            ti,omap4-mailbox            E             0                                              œ           ¨           º         	  disabled            I  Û         target-module@64000          ti,sysc-omap4 ti,sysc           E @     @         	  Arev sysc            "           =                  q      x            xfck                                       @       mailbox@0            ti,omap4-mailbox            E             0                                              œ           ¨           º         	  disabled            I  Ü         target-module@80000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           /                     =                     q   _   Ð            xfck                                               omap_dwc3_1@0            ti,dwc3         E                      H                                    e                              I  Ý   usb@10000         
   snps,dwc3           E    p       $         G          G          H           §peripheral host otg         Ú   ¾   ¿        ßusb2-phy usb3-phy           osuper-speed         }host             …         ž        I  Þ            target-module@c0000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           /                     =                     q   _                xfck                                               omap_dwc3_2@0            ti,dwc3         E                      W                                    e                              ·   À        I  ß   usb@10000         
   snps,dwc3           E    p       $         I          I          W           §peripheral host otg         Ú   Á      	  ßusb2-phy            ohigh-speed          }peripheral           …         ž         ¾        I  à            target-module@100000             ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           /                     =                     q   _   (            xfck                                                  	  disabled            I  á   omap_dwc3_3@0            ti,dwc3         E                     X                                    e                            	  disabled            I  â   usb@10000         
   snps,dwc3           E    p       $         X          X         X           §peripheral host otg         ohigh-speed          }otg          …         ž        I  ã            target-module@170000             ti,sysc-omap4 ti,sysc           E             Asysc            /                  =                  q   Â                xfck                                                  	  disabled          target-module@190000             ti,sysc-omap4 ti,sysc           E             Asysc            /                  =                  q   Â               xfck                                                  	  disabled          target-module@1b0000             ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            /                  =                  q   Â               xfck                                                  	  disabled          target-module@1d0010             ti,sysc-omap4 ti,sysc           E             Asysc            /               =                     Ã        q   Ä               xfck                                               vpe@0            ti,dra7-vpe          E             €  W      Ð            Avpe_top sc csc vpdma                  b           I  ä         target-module@140000             ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            "           /                     =                     q   _   0            xfck                                                  	  disabled            I  å   omap_dwc3_4@0            ti,dwc3         E                     Z                                    e                  	  disabled            I  æ   usb@10000         
   snps,dwc3           E    p       $        Y         Y         Z           §peripheral host otg         ohigh-speed          }otg         I  ç                  target-module@51000000           ti,sysc-omap4 ti,sysc              h        Û   h            ârstctrl       $  q   e           e       	   e       
        xfck phy-clk phy-clk-div                                  Q   Q     0                     "        I  è   pcie@51000000           EQ       Q     L               Arc_dbics ti_conf config                è          é                                    Qpci       0  �             0        ‚        0  0     þÐ         î       ÿ        4           ø           	            Ú   Å      
  ßpcie-phy0           	   d           	&                     `  	9                  Æ                     Æ                     Æ                     Æ           	G   Ç              okay             ti,dra746-pcie-rc ti,dra7-pcie          =   È              I  é   interrupt-controller                                   4           I   Æ         pcie_ep@51000000             EQ      (Q     LQ     (            &  Aep_dbics ti_conf ep_dbics2 addr_space                  è           ø           	b           	q           Ú   Å      
  ßpcie-phy0           	G   Ç              	   d         	  disabled          "   ti,dra746-pcie-ep ti,dra7-pcie-ep           I  ê         target-module@51800000           ti,sysc-omap4 ti,sysc         $  q   e          e      	   e      
        xfck phy-clk phy-clk-div            h        Û   h           ârstctrl                                  Q€  Q€    0     0               "      	  disabled            I  ë   pcie@51800000           EQ€      Q€    L               Arc_dbics ti_conf config               c         d                                    Qpci       0  �             0        ‚       00  0     þÐ         î       ÿ        4           ø           	           Ú   É      
  ßpcie-phy0           	&                     `  	9                  Ê                     Ê                     Ê                     Ê           	G   Ç               ti,dra746-pcie-rc ti,dra7-pcie          I  ì   interrupt-controller                                   4           I   Ê            ocmcram@40300000          
   mmio-sram           E@0                 @0                                      I  í   sram-hs@0            ti,secure-ram           E                 ocmcram@40400000          	  disabled          
   mmio-sram           E@@                 @@                                      I  î      ocmcram@40500000          	  disabled          
   mmio-sram           E@P                 @P                                      I  ï      bandgap@4a0021e0          0  EJ !à   J #,   J #€   ,J #À   <J %d   J %t   P         ti,dra752-bandgap                  y           n           I   ø      dsp_system@40d00000          syscon          E@Ð             I   å      padconf@4844a000             ti,dra7-iodelay         EHD                                      Â           I  ð   mmc1_iodelay_ddr_rev11_conf       Ì  	€    <       õ      $      X  (          ,   7      0  “   x  4          8          <      <  @          D          H      <  L          P          T          X          \                I  ñ      mmc1_iodelay_ddr50_rev20_conf         Ì  	€    4  J     ÷      $  Ò      (          ,          0  ï      4          8         <         @          D          H        L          P          T          X          \                I  ò      mmc1_iodelay_sdr104_rev11_conf        „  	€     '     (          ,         4          8          @          D         L          P          X          \                I  ó      mmc1_iodelay_sdr104_rev20_conf        „  	€     X  �  (          ,          4          8         @          D          L          P          X          \                I  ô      mmc2_iodelay_hs200_rev11_conf         ä  	€  �  m  X  ”  ,      ¨  ã  X  ¬   ð      ´  ,  X  ¸   ð      À  º  X  Ä   <      Ð  <  ¤  Ø  §  X  Ü          ä    X  è   x      ð  ÿ  X  ô   á      ü  5  X      <      d  É  X  h   ´            I  õ      mmc2_iodelay_hs200_rev20_conf         ä  	€  �        ”   ¢      ¨  ‘      ¬   I      ´  Ñ      ¸   s      À  y      Ä   /      Ð  §    Ø  m      Ü          ä   ·      è          ð  Ó      ô          ü            .      d  ¬      h   L            I  ö      mmc2_iodelay_ddr_3_3v_rev11_conf         \  	€  Œ       x  �          ”   ®      ¤  	  h  ¨          ¬   ¨      °       x  ´          ¸   ˆ      ¼       x  À          Ä          È    ¤  Ð  o      Ô   �   ð  Ø          Ü          à          ä          è   "      ì       x  ð          ô   x      ø   x   ´  ü                     `          d          h               I   ¬      mmc2_iodelay_ddr_1_8v_rev11_conf         \  	€  Œ          �          ”   ®      ¤     ð  ¨          ¬   ¨      °       <  ´          ¸   ˆ      ¼       <  À          Ä          È    h  Ð  o      Ô   »   x  Ø          Ü          à          ä          è   "      ì       <  ð          ô   x      ø   y   <  ü                     `          d          h               I  ÷      mmc3_iodelay_manual1_conf         Ì  	€  x  –      €  “      „          ˆ          Œ          �   ‚      ”          ˜          œ   ©                 ¤          ¨          ¬          °          ´  É      ¸          ¼                I  ø      mmc4_iodelay_ds_rev11_conf        Ì  	€  @          H          L   `      P          T          p  F      t          x          |  ‡      €          „          ˆ  1      Œ          �          ”  L      ˜          œ                I  ù      mmc4_iodelay_ds_rev20_conf        Ì  	€  @          H          L  3      P          T          p        t          x          |  e      €          „          ˆ  «      Œ          �          ”  C      ˜          œ                I  ú      mmc4_iodelay_sdr12_hs_sdr25_rev11_conf        Ì  	€  @          H  
[      L  $      P          T          p  y      t          x          |  ¹      €          „          ˆ  c      Œ          �          ”        ˜          œ                I  û      mmc4_iodelay_sdr12_hs_sdr25_rev20_conf        Ì  	€  @          H  {      L  *      P          T          p  u      t          x          |  ‰   @  €          „          ˆ  �   €  Œ          �          ”  |   ,  ˜          œ                I  ü         target-module@43300000           ti,sysc-omap4 ti,sysc           EC0     C0          	  Arev sysc            /                  =                  q   	   P            xfck                                      C0        dma@0            ti,edma3-tpcc           E             	  Aedma3_cc          $        i         h         g         '  §edma3_ccint edma3_mperr edma3_ccerrint          +   @                    	’   Ë      Ì            I            target-module@43400000           ti,sysc-omap4 ti,sysc           EC@     C@          	  Arev sysc            /                  =                  q   	   X            xfck                                      C@        dma@0            ti,edma3-tptc           E                     r           §edma3_tcerrint          I   Ë         target-module@43500000           ti,sysc-omap4 ti,sysc           ECP     CP          	  Arev sysc            /                  =                  q   	   `            xfck                                      CP        dma@0            ti,edma3-tptc           E                     s           §edma3_tcerrint          I   Ì         target-module@4e000000           ti,sysc-omap2 ti,sysc           EN      N           	  Arev sysc            =                      N                                  dmm@0            ti,omap5-dmm            E                      l            ipu@58820000             ti,dra7-ipu         EX‚             Al2ram           	›   Í        okay            Û   Î       Î           q   A                	¢dra7-ipu1-fw.xem4           	°   Ï   Ð        	·   Ñ        	Á   Ò   Ó        	Ô   Ô        I  ý      ipu@55020000             ti,dra7-ipu         EU             Al2ram           	›   Õ        okay            Û                     q   Ö                	¢dra7-ipu2-fw.xem4           	°   ×   Ø        	·   Ù        	Á   Ú   Û        	Ô   Ü        I  þ      dsp@40800000             ti,dra7-dsp         E@€   € @à    € @ð    €         Al2ram l1pram l1dram         	â     \   
        	›   Ý   Þ        okay            Û   ß            q   à                	¢dra7-dsp1-fw.xe66           	°   Ï   á        	·   â        	Á   ã        	Ô   ä        I  ÿ      target-module@40d01000           ti,sysc-omap2 ti,sysc           E@Ð    @Ð   @Ð           Arev sysc syss           =                  "          q   à                xfck         Û   ß           ârstctrl             @Ð                                mmu@0            ti,dra7-dsp-iommu           E                                 	í            	ú   å            I   Ý         target-module@40d02000           ti,sysc-omap2 ti,sysc           E@Ð     @Ð    @Ð            Arev sysc syss           =                  "          q   à                xfck         Û   ß           ârstctrl             @Ð                                 mmu@0            ti,dra7-dsp-iommu           E                      ‘           	í            	ú   å           I   Þ         target-module@58882000           ti,sysc-omap2 ti,sysc           EXˆ     Xˆ    Xˆ            Arev sysc syss           =                  "          q   A                xfck         Û   Î           ârstctrl                                      Xˆ        mmu@0            ti,dra7-iommu           E                     ‹           	í             
        I   Í         target-module@55082000           ti,sysc-omap2 ti,sysc           EU     U    U            Arev sysc syss           =                  "          q   Ö                xfck         Û              ârstctrl                                      U        mmu@0            ti,dra7-iommu           E                     Œ           	í             
        I   Õ         regulator-abb-mpu@4ae07ddc        
   ti,abb-v3           Kabb_mpu                                    q           
$   2        
5         (  EJà}Ü   Jà}à   Jà`   J ;    JàÁX         D  Asetup-address control-address int-address efuse-address ldo-address         
E   €        
^           
v         H  
Š ,                ð   ³@              ð   v�              ð          I         regulator-abb-ivahd@4ae07e34          
   ti,abb-v3         
  Kabb_ivahd                                      q           
$   2        
5         (  EJà~4   Jà~$   Jà`   J %Ì   J $p         D  Asetup-address control-address int-address efuse-address ldo-address         
E@           
^           
v         H  
Š                ð   Œ0              ð   Ð              ð          I         regulator-abb-dspeve@4ae07e30         
   ti,abb-v3           Kabb_dspeve                                     q           
$   2        
5         (  EJà~0   Jà~    Jà`   J %à   J $l         D  Asetup-address control-address int-address efuse-address ldo-address         
E            
^           
v         H  
Š                ð   Œ0              ð   Ð              ð          I        regulator-abb-gpu@4ae07de4        
   ti,abb-v3           Kabb_gpu                                    q           
$   2        
5         (  EJà}ä   Jà}è   Jà`   J ;   JàÁT         D  Asetup-address control-address int-address efuse-address ldo-address         
E           
^           
v         H  
Š ¡Ð               ð   v�              ð   ˆ               ð          I        target-module@4b300000           ti,sysc-omap4 ti,sysc           EK0     K0          	  Arev sysc            =                     q   \  ,            xfck                                      K0     \   \         spi@0            ti,dra7xxx-qspi         E       \              Aqspi_base qspi_mmap         
–     X                                  q   \  ,           xfck         Ü                 W         	  disabled            I           target-module@50000000           ti,sysc-omap2 ti,sysc           EP      P     P             Arev sysc syss           =                  K           q   	               xfck                                  P   P              @      gpmc@50000000            ti,am3352-gpmc          EP     |                          …   ¶               Šrxtx            
©           
µ                                             4                    ,         	  disabled            I           target-module@56000000           ti,sysc-omap4 ti,sysc           EV þ    V þ         	  Arev sysc            /                  =                     q   æ                xfck                                      V         gpu@0         !   ti,am5728-gpu img,powervr-sgx544            E                                  crossbar@4a002a48            ti,irq-crossbar         EJ *H  0                  &           4           
Ç            
Ó  �        
ë            
÷                      ƒ   „           
   …   ‹   Œ                    I         target-module@58000000           ti,sysc-omap2 ti,sysc           EX      X           	  Arev syss            K         0  q   ç           ç       	   ç       
   ç               xfck hdmi_clk sys_clk tv_clk                                      X    €     dss@0            ti,dra7-dss         okay            &     8                                          €        (  E       €  @T     C       �T     “           (  Adss pll1_clkctrl pll1 pll2_clkctrl pll2       $  q   ç          ç          ç               xfck video1_clk video2_clk           6   è        I     target-module@1000           ti,sysc-omap2 ti,sysc           E                        Arev sysc syss           =                  /                  "          K           q   ç               xfck                                               dispc@0          ti,dra7-dispc           E                                 q   ç               xfck         H     4         target-module@40000          ti,sysc-omap4 ti,sysc           E                 	  Arev sysc            =                     "           q   ç       	   ç               xfck dss_clk                                               encoder@0            ti,dra7-hdmi             E             €      €    �         Awp pll phy core                `           okay            q   ç       	   ç       
        xfck sys_clk         …   ™   L      	  Šaudio_tx            S   é        I     port       endpoint            _   ê        I                       target-module@59000000           ti,sysc-omap4 ti,sysc           EY              Arev         q   ç               xfck                                      Y         gpu@0            vivante,gc          E                      x           q   ç               xcore            I           target-module@4b500000           ti,sysc-omap2 ti,sysc           EKP €   KP „   KP ˆ           Arev sysc syss           "           =                     K           q   £                xfck                                      KP             I     aes@0            ti,omap4-aes            E                       P           …   ¶   o       ¶   n            Štx rx           q           xfck         I  	         target-module@4b700000           ti,sysc-omap2 ti,sysc           EKp €   Kp „   Kp ˆ           Arev sysc syss           "           =                     K           q   £               xfck                                      Kp             I  
   aes@0            ti,omap4-aes            E                       ;           …   ¶   r       ¶   q            Štx rx           q           xfck         I           target-module@4b101000           ti,sysc-omap3-sham ti,sysc          EK    K   K           Arev sysc syss           "           =                  K           q   £   (            xfck                                      K            I     sham@0           ti,omap5-sham           E                      .           …   ¶   w            Šrx          q           xfck         I           target-module@42701000           ti,sysc-omap3-sham ti,sysc          EBp    Bp   Bp           Arev sysc syss           "           =                  K           q   £   X            xfck                                      Bp            I     sham@0           ti,omap5-sham           E                      £           …   ¶   ¥            Šrx          q           xfck         I           target-module@5a000000           ti,sysc-omap4 ti,sysc           EZ¤    Z¤         	  Arev sysc            /                  =                     ë        Û   ë           ârstctrl         q   ì                xfck                                  Z   Z      [   [              I     iva       	   ti,ivahd             opp-supply@4a003b20          ti,omap5-opp-supply         EJ ;            o ,      ³@    v�           � ã`        I        dsp_system@41500000          syscon          EAP             I   ï      target-module@41501000           ti,sysc-omap2 ti,sysc           EAP    AP   AP           Arev sysc syss           =                  "          q   í                xfck         Û   î           ârstctrl             AP                                mmu@0            ti,dra7-dsp-iommu           E                      ’           	í            	ú   ï            I   ð         target-module@41502000           ti,sysc-omap2 ti,sysc           EAP     AP    AP            Arev sysc syss           =                  "          q   í                xfck         Û   î           ârstctrl             AP                                 mmu@0            ti,dra7-dsp-iommu           E                      “           	í            	ú   ï           I   ñ         dsp@41000000             ti,dra7-dsp         EA    € A`    € Ap    €         Al2ram l1pram l1dram         	â     `   
        	›   ð   ñ        okay            Û   î            q   í                	¢dra7-dsp2-fw.xe66           	°   ×   ò        	·   ó        	Á   ô        	Ô   õ        I        target-module@4b226000           ti,sysc-pruss ti,sysc           EK"`    K"`         	  Arev sysc            "   0        /                  =                  q   \               xfck                                      K              I     pruss@0          ti,am5728-pruss         E                                                 I     memories@0          E                     €         Adram0 dram1 shrdram2            I        cfg@26000            ti,pruss-cfg syscon         E `                                           `             I     clocks                               iepclk-mux@30           E   0        •            q   ö   ÷        I              mii-rt@32000             ti,pruss-mii syscon         E      X        I        interrupt-controller@20000           ti,pruss-intc           E                        4         `         º          »          ¼          ½          ¾          ¿          À          Á         X  §host_intr0 host_intr1 host_intr2 host_intr3 host_intr4 host_intr5 host_intr6 host_intr7         I        pru@34000            ti,am5728-pru           E @   0        $            Airam control debug          	¢am57xx-pru1_0-fw            I        pru@38000            ti,am5728-pru           E €   0  @     D            Airam control debug          	¢am57xx-pru1_1-fw            I        mdio@32400           ti,davinci_mdio                                   q   ÷        xfck         / B@        E $    �      	  disabled            I              target-module@4b2a6000           ti,sysc-pruss ti,sysc           EK*`    K*`         	  Arev sysc            "   0        /                  =                  q   \               xfck                                      K(             I     pruss@0          ti,am5728-pruss         E                                                 I     memories@0          E                     €         Adram0 dram1 shrdram2            I        cfg@26000            ti,pruss-cfg syscon         E `                                           `             I      clocks                               iepclk-mux@30           E   0        •            q   ö   ÷        I  !            mii-rt@32000             ti,pruss-mii syscon         E      X        I  "      interrupt-controller@20000           ti,pruss-intc           E                        4         `         Ä          Å          Æ          Ç          È          É          Ê          Ë         X  §host_intr0 host_intr1 host_intr2 host_intr3 host_intr4 host_intr5 host_intr6 host_intr7         I  #      pru@34000            ti,am5728-pru           E @   0        $            Airam control debug          	¢am57xx-pru2_0-fw            I  $      pru@38000            ti,am5728-pru           E €   0  @     D            Airam control debug          	¢am57xx-pru2_1-fw            I  %      mdio@32400           ti,davinci_mdio                                   q   ÷        xfck         / B@        E $    �      	  disabled            I  &               thermal-zones           I  '   cpu_thermal         œ   ú        ²  ô        À   ø            Ð      Ð        I  (   trips           I  )   cpu_alert           Ý 8€        é  Ð        Xpassive         I   ù      cpu_crit            Ý _�        é  Ð      	  Xcritical            I  *      cpu_alert1          Ý  ÃP        é  Ð        Xactive          I   û         cooling-maps            I  +   map0            ô   ù        ù   úÿÿÿÿÿÿÿÿ      map1            ô   û        ù   üÿÿÿÿÿÿÿÿ            gpu_thermal         œ   ú        ²  ô        À   ø           Ð      Ð        I  ,   trips      gpu_crit            Ý _�        é  Ð      	  Xcritical            I  -            core_thermal            œ   ú        ²  ô        À   ø           Ð      Ð        I  .   trips      core_crit           Ý _�        é  Ð      	  Xcritical            I  /            dspeve_thermal          œ   ú        ²  ô        À   ø           Ð      Ð        I  0   trips      dspeve_crit         Ý _�        é  Ð      	  Xcritical            I  1            iva_thermal         œ   ú        ²  ô        À   ø           Ð      Ð        I  2   trips      iva_crit            Ý _�        é  Ð      	  Xcritical            I  3            board_thermal           œ  â        ²  Ü        À   ý            I  4   trips           I  5   board_alert         Ý  œ@        é  Ð        Xactive          I   þ      board_crit          Ý š(        é          	  Xcritical            I  6         cooling-maps            I  7   map0            ô   þ        ù   üÿÿÿÿÿÿÿÿ               pmu          arm,cortex-a15-pmu           &                  ƒ          „         memory@0            Qmemory          E    €       €         fixedregulator-main_12v0             regulator-fixed       
  Kmain_12v0           Z ·         r ·                           I   ÿ      fixedregulator-evm_5v0           regulator-fixed         Kevm_5v0         Z LK@        r LK@           ÿ                          I  8      reserved-memory                                      ipu2-memory@95800000             shared-dma-pool         E    •€      €                   okay            I   Ü      dsp1-memory@99000000             shared-dma-pool         E    ™                           okay            I   ä      ipu1-memory@9d000000             shared-dma-pool         E    �                           okay            I   Ô      dsp2-memory@9f000000             shared-dma-pool         E    Ÿ        €                   okay            I   õ         fixedregulator-vdd_3v3           regulator-fixed         Kvdd_3v3                    Z 2Z         r 2Z         I   œ      fixedregulator-aic_dvdd          regulator-fixed         Kaic_dvdd_fixed             œ        Z w@        r w@        I   ¢      fixedregulator-vtt           regulator-fixed       
  Kvtt_fixed                     Z 2Z         r 2Z                                    i   ¡               I  9      leds          
   gpio-leds      led0            ÷beagle-x15:usr0         =   ¡   	          
  /heartbeat           Eoff       led1            ÷beagle-x15:usr1         =   ¡               /cpu0            Eoff       led2            ÷beagle-x15:usr2         =   ¡               /mmc0            Eoff       led3            ÷beagle-x15:usr3         =   ¡               /disk-activity           Eoff          gpio_fan          	   gpio-fan            =                 S          2È           ’           I   ü      connector            hdmi-connector          ÷hdmi            Xa           I  :   port       endpoint            _          I              encoder          ti,tpd12s015          $  =   ¡   
       ¦          ¡               I  ;   ports                                port@0          E       endpoint            _          I   ê         port@1          E      endpoint            _          I                 sound0           simple-audio-card           fBeagleBoard-X15         }Line Line Out Line Line In        :  —Line Out LLOUT Line Out RLOUT MIC2L Line In MIC2R Line In           ±dsp_b           Ê          ì                   I  <   simple-audio-card,cpu           0        simple-audio-card,codec         0          q  	        I           __symbols__         :/interrupt-controller@48211000          >/interrupt-controller@48281000          H/cpus/cpu@0         M/opp-table          \/ocp            `/ocp/interconnect@4a000000        >  g/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0         I  k/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0          ]  t/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/pbias_regulator@e00          m  „/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/pbias_regulator@e00/pbias_mmc_omap5          Z  ’/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/phy-gmii-sel@554         P  Ÿ/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/clocks       h  ¯/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/clocks/clock-dss-deshdcp-0@558       k  ¿/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/clocks/clock-ehrpwm0-tbclk-20@558        k  Í/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/clocks/clock-ehrpwm1-tbclk-21@558        k  Û/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/clocks/clock-ehrpwm2-tbclk-22@558        b  é/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@0/clocks/clock-sys-32k@6c4         J  ô/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400         \  /ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc1-default-pins       Z  /ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc1-sdr12-pins         W  $/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc1-hs-pins        Z  1/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc1-sdr25-pins         Z  A/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc1-sdr50-pins         Z  Q/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc1-ddr50-pins         [  a/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc1-sdr104-pins        \  r/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc2-default-pins       W  „/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc2-hs-pins        c  ‘/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc2-ddr-3-3v-rev11-pins        c  ª/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc2-ddr-1-8v-rev11-pins        ^  Ã/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc2-ddr-rev20-pins         Z  ×/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc2-hs200-pins         \  ç/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc4-default-pins       W  ù/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc4-hs-pins        \  /ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc3-default-pins       W  /ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc3-hs-pins        Z  %/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc3-sdr12-pins         Z  5/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc3-sdr25-pins         Z  E/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc3-sdr50-pins         Z  U/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc4-sdr12-pins         Z  e/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/pinmux@1400/mmc4-sdr25-pins         L  u/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@1c04       L  /ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/scm_conf@1c24       M  �/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/dma-router@b78          M  —/ocp/interconnect@4a000000/segment@0/target-module@2000/scm@0/dma-router@c78          F  ¡/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0         M  ­/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks          ^  À/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-atl-clkin0         ^  Î/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-atl-clkin1         ^  Ü/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-atl-clkin2         ^  ê/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-atl-clkin3         ^  ø/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-hdmi-clkin         ]  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-mlb-clkin          ^  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-mlbp-clkin         `  !/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-pciesref-acs       ^  5/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-ref-clkin0         ^  C/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-ref-clkin1         ^  Q/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-ref-clkin2         ^  _/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-ref-clkin3         X  m/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-rmii       `  y/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-sdvenc-clkin       f  ‰/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-secure-32k-clk-src         e  Ÿ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-sys-clk32-crystal          d  ´/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-sys-clk32-pseudo       a  È/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-12000000          a  Ù/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-13000000          a  ê/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-16800000          a  û/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-19200000          a  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-20000000          a  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-26000000          a  ./ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-27000000          a  ?/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-virt-38400000          ^  P/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-sys-clkin2         a  [/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-usb-otg-clkin          `  l/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video1-clkin       c  |/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video1-m2-clkin        `  �/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video2-clkin       c  Ÿ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video2-m2-clkin        W  ²/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@1e0        _  ¾/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-abe-x2        g  Í/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-abe-m2x2-8@1f0        [  Þ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-abe@108        e  æ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-abe-m2-8@1f0          g  õ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-abe-m3x2-8@1f4        `  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@12c/clock@23       W  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@120        `  %/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-x2       i  5/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-h12x2-8@13c          g  H/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-mpu-dpll-hs-clk-div        W  \/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@160        e  h/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-mpu-m2-8@170          `  w/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-mpu-dclk-div       g  „/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dsp-dpll-hs-clk-div        `  ˜/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@240/clock@23       W  ©/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@234        e  µ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-dsp-m2-8@244          g  Ä/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-iva-dpll-hs-clk-div        `  Ø/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@1ac/clock@23       W  é/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@1a0        e  õ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-iva-m2-8@1b0          \  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-iva-dclk       `  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@2e4/clock@23       W  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@2d8        e  */ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-gpu-m2-8@2e8          f  9/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-m2-8@130         j  I/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-core-dpll-out-dclk-div         `  `/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@21c/clock@23       W  q/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@210        e  }/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-ddr-m2-8@220          `  Œ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@2b4/clock@23       W  ž/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@2a8        f  «/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-gmac-m2-8@2b8         c  »/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video2-dclk-div        c  Ë/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video1-dclk-div        a  Û/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-hdmi-dclk-div          g  é/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-per-dpll-hs-clk-div        g  ý/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-usb-dpll-hs-clk-div        g  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-eve-dpll-hs-clk-div        `  %/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@290/clock@23       W  6/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@284        e  B/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-eve-m2-8@294          `  Q/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-eve-dclk-div       i  ^/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-h13x2-8@140          i  q/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-h14x2-8@144          i  „/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-h22x2-8@154          i  —/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-h23x2-8@158          i  ª/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-core-h24x2-8@15c          _  ½/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-ddr-x2        h  Ì/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-ddr-h11x2-8@228       _  Þ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-dsp-x2        g  í/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-dsp-m3x2-8@248        `  þ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-gmac-x2       i  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-gmac-h11x2-8@2c0          i  !/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-gmac-h12x2-8@2c4          i  4/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-gmac-h13x2-8@2c8          h  G/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dpll-gmac-m3x2-8@2bc       b  Y/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-gmii-m-clk-div         a  h/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-hdmi-clk2-div          \  v/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-hdmi-div       _  ƒ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock@100/clock@4        c  �/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-l4-root-clk-div        c  Ÿ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video1-clk2-div        ^  ¯/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video1-div         c  ¾/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video2-clk2-div        ^  Î/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-video2-div         Y  Ý/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clocks/clock-dummy          S  æ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clockdomains        P  ÿ/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@300       Y  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@300/clock@20          P  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@400       Y  /ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@400/clock@20          P  '/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@500       Y  ./ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@500/clock@20          Y  ;/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@500/clock@50          P  G/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@600       Y  O/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@600/clock@20          P  \/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@700       Y  c/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@700/clock@20          P  o/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@760       X  v/ocp/interconnect@4a000000/segment@0/target-module@5000/cm_core_aon@0/clock@760/clock@0       B  ‚/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0         I  Š/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks          S  ™/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock@200        i  ª/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-pcie-ref-m2ldo-8@210          o  Á/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-apll-pcie-in-clk-mux-7@4ae06118        S  Ö/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock@21c        n  ã/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-optfclk-pciephy-div-8@4a00821c         c  ÷/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-apll-pcie-clkvcoldo        g  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-apll-pcie-clkvcoldo-div        \  #/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-apll-pcie-m2       \  3/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock@14c/clock@23       S  D/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock@140        a  P/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-per-m2-8@150          e  _/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-func-96m-aon-dclk-div          \  u/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock@18c/clock@23       S  †/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock@180        a  ’/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-usb-m2-8@190          f  ¡/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-pcie-ref-m2-8@210         [  µ/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-per-x2        d  Ä/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-per-h11x2-8@158       d  Ö/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-per-h12x2-8@15c       d  è/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-per-h13x2-8@160       d  ú/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-per-h14x2-8@164       c  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-per-m2x2-8@150        b  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-dpll-usb-clkdcoldo         Y  0/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-func-128m          ]  >/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-func-12m-fclk          X  L/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-func-24m       ]  Y/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-func-48m-fclk          ]  g/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-func-96m-fclk          ^  u/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-l3init-60m@104         ]  …/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-clkout2-8@6b0          g  ‘/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-l3init-960m-gfclk-8@6c0        o  £/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-usb-phy1-always-on-clk32k-8@640        o  ½/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-usb-phy2-always-on-clk32k-8@688        o  ×/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-usb-phy3-always-on-clk32k-8@698        i  ñ/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-gpu-core-gclk-mux-24@1220          h  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-gpu-hyd-gclk-mux-26@1220       j  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-l3instr-ts-gclk-div-24@e50         e  (/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-vip1-gclk-mux-24@1020          e  6/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-vip2-gclk-mux-24@1028          e  D/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clocks/clock-vip3-gclk-mux-24@1030          O  R/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clockdomains        c  g/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clockdomains/clock-coreaon-clkdm        L  u/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@600       U  €/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@600/clock@20          L  �/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@700       U  ›/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@700/clock@20          L  «/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@900       U  ³/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@900/clock@20          L  À/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@a00       U  Ç/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@a00/clock@20          L  Ó/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@b00       U  Û/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@b00/clock@20          L  è/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@c00       T  ï/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@c00/clock@0       L  û/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@d00       U  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@d00/clock@20          L  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@e00       U  /ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@e00/clock@20          L  -/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@f00       U  4/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@f00/clock@20          M  @/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1000          V  G/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1000/clock@20         M  S/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1100          V  Z/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1100/clock@20         M  f/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1200          V  m/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1200/clock@20         M  y/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1300          V  ƒ/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1300/clock@20         V  ’/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1300/clock@b0         V  Ÿ/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1300/clock@d0         M  ¬/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1700          V  µ/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1700/clock@28         W  Ã/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1700/clock@1a0        U  Ñ/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1700/clock@c          V  à/ocp/interconnect@4a000000/segment@0/target-module@8000/cm_core@0/clock@1700/clock@14         J  ï/ocp/interconnect@4a000000/segment@0/target-module@56000/dma-controller@0         L  ô/ocp/interconnect@4a000000/segment@0/target-module@80000/ocp2scp@0/phy@4000       L  þ/ocp/interconnect@4a000000/segment@0/target-module@80000/ocp2scp@0/phy@5000       L  /ocp/interconnect@4a000000/segment@0/target-module@80000/ocp2scp@0/phy@4400       Q  /ocp/interconnect@4a000000/segment@0/target-module@90000/ocp2scp@0/pcie-phy@4000          Q  /ocp/interconnect@4a000000/segment@0/target-module@90000/ocp2scp@0/pcie-phy@5000          L  &/ocp/interconnect@4a000000/segment@0/target-module@90000/ocp2scp@0/phy@6000       C  //ocp/interconnect@4a000000/segment@0/target-module@f4000/mailbox@0        D  8/ocp/interconnect@4a000000/segment@0/target-module@f6000/spinlock@0       E  C/ocp/interconnect@4a000000/segment@100000/target-module@40000/sata@0            H/ocp/interconnect@4ae00000        B  P/ocp/interconnect@4ae00000/segment@0/target-module@4000/counter@0         >  [/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0         E  _/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks          Z  j/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-sys-clkin1@110         W  u/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock@118/clock@0        g  Š/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-abe-dpll-bypass-clk-mux@114        `  ¢/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-abe-dpll-clk-mux@10c       W  ³/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-abe-24m@11c        T  À/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-aess@178       ]  Ê/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-abe-giclk-div@174          ^  Ø/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-abe-lp-clk-div@1d8         _  ç/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-abe-sys-clk-div@120        ]  ÷/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-adc-gfclk-mux@1dc          a  /ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-sys-clk1-dclk-div@1c8          a  /ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-sys-clk2-dclk-div@1cc          c  )/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-per-abe-x1-dclk-div@1bc        W  =/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock@18c/clock@0        X  J/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-gpu-dclk@1a0       a  S/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-emif-phy-dclk-div@190          b  e/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-gmac-250m-dclk-div@19c         U  x/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-gmac-main          d  †/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-l3init-480m-dclk-div@1ac       `  ›/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-usb-otg-dclk-div@184       ]  ¬/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-sata-dclk-div@1c0          ^  º/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-pcie2-dclk-div@1b8         ]  É/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-pcie-dclk-div@1b4          \  ×/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-emu-dclk-div@194       c  ä/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-secure-32k-dclk-div@1c4        b  ø/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-clkoutmux0-clk-mux@158         b  /ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-clkoutmux1-clk-mux@15c         b  /ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-clkoutmux2-clk-mux@160         c  1/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-custefuse-sys-gfclk-div        S  I/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-eve@180        a  Q/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-hdmi-dpll-clk-mux@164          S  c/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-mlb@134        T  k/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-mlbp@130       e  t/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-per-abe-x1-gfclk2-div@138          a  Š/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-timer-sys-clk-div@144          c  œ/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-video1-dpll-clk-mux@168        c  °/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-video2-dpll-clk-mux@16c        `  Ä/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clocks/clock-wkupaon-iclk-mux@108       K  Õ/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clockdomains        I  æ/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clock@1800          R  ñ/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/clock@1800/clock@20         F  /ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@300         F  	/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@400         F  /ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@500         F  /ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@628         F  &/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@700         F  //ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@f00         G  7/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1000        G  ?/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1100        G  G/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1200        G  O/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1300        G  Z/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1400        G  d/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1600        G  r/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1724        G  ~/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1b00        G  ‡/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1b40        G  �/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1b80        G  ™/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1bc0        G  ¢/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1c00        G  «/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1c60        G  ³/ocp/interconnect@4ae00000/segment@0/target-module@6000/prm@0/prm@1c80        C  »/ocp/interconnect@4ae00000/segment@0/target-module@c000/scm_conf@0        @  Ä/ocp/interconnect@4ae00000/segment@10000/target-module@0/gpio@0       B  Ê/ocp/interconnect@4ae00000/segment@10000/target-module@4000/wdt@0         <  Ï/ocp/interconnect@4ae00000/segment@10000/target-module@8000       D  Ý/ocp/interconnect@4ae00000/segment@10000/target-module@8000/timer@0       A  ä/ocp/interconnect@4ae00000/segment@20000/target-module@0/timer@0          E  ì/ocp/interconnect@4ae00000/segment@20000/target-module@b000/serial@0          B  ó/ocp/interconnect@4ae00000/segment@30000/target-module@c000/can@0           ù/ocp/interconnect@48000000        B  /ocp/interconnect@48000000/segment@0/target-module@20000/serial@0         A  /ocp/interconnect@48000000/segment@0/target-module@32000/timer@0          9  /ocp/interconnect@48000000/segment@0/target-module@34000          A  /ocp/interconnect@48000000/segment@0/target-module@34000/timer@0          9  #/ocp/interconnect@48000000/segment@0/target-module@36000          A  1/ocp/interconnect@48000000/segment@0/target-module@36000/timer@0          A  8/ocp/interconnect@48000000/segment@0/target-module@3e000/timer@0          9  ?/ocp/interconnect@48000000/segment@0/target-module@51000          @  L/ocp/interconnect@48000000/segment@0/target-module@51000/gpio@0       @  R/ocp/interconnect@48000000/segment@0/target-module@53000/gpio@0       9  X/ocp/interconnect@48000000/segment@0/target-module@55000          @  e/ocp/interconnect@48000000/segment@0/target-module@55000/gpio@0       9  k/ocp/interconnect@48000000/segment@0/target-module@57000          @  x/ocp/interconnect@48000000/segment@0/target-module@57000/gpio@0       @  ~/ocp/interconnect@48000000/segment@0/target-module@59000/gpio@0       @  „/ocp/interconnect@48000000/segment@0/target-module@5b000/gpio@0       @  Š/ocp/interconnect@48000000/segment@0/target-module@5d000/gpio@0       ?   X/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0        F  �/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0/rtc@6f         B  ˜/ocp/interconnect@48000000/segment@0/target-module@66000/serial@0         B  ž/ocp/interconnect@48000000/segment@0/target-module@68000/serial@0         B  ¤/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0         B  ª/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0         B  °/ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0         ?   N/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0        L  ¶/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58       m  À/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/smps12          l  Ë/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/smps3       m  Õ/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/smps45          l  à/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/smps6       l  ê/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/smps8       k  ô/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/ldo1        k  ý/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/ldo2        k   /ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/ldo3        k   /ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/ldo4        k   /ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/ldo9        l   !/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/ldoln       m   +/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/ldousb          m   6/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pmic/regulators/regen1          Z   =/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_rtc         a   K/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_pwr_button          [   `/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_gpio        Z   o/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tps659038@58/tps659038_usb         I   {/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tmp102@48          P   ‚/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/tlv320aic3104@18       I   �/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0/eeprom@50          ?   S/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0        ?   —/ocp/interconnect@48000000/segment@0/target-module@78000/elm@0        ?   ]/ocp/interconnect@48000000/segment@0/target-module@7a000/i2c@0        ?   ›/ocp/interconnect@48000000/segment@0/target-module@7c000/i2c@0        A    /ocp/interconnect@48000000/segment@0/target-module@86000/timer@0          A   ¨/ocp/interconnect@48000000/segment@0/target-module@88000/timer@0          ?   °/ocp/interconnect@48000000/segment@0/target-module@90000/rng@0        ?   ´/ocp/interconnect@48000000/segment@0/target-module@98000/spi@0        ?   »/ocp/interconnect@48000000/segment@0/target-module@9a000/spi@0        ?   Â/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0        9   Ç/ocp/interconnect@48000000/segment@0/target-module@a5000          ?   Ò/ocp/interconnect@48000000/segment@0/target-module@a5000/des@0        ?   Ö/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0        >   Û/ocp/interconnect@48000000/segment@0/target-module@b2000/1w@0         ?   â/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0        ?   ç/ocp/interconnect@48000000/segment@0/target-module@b8000/spi@0        ?   î/ocp/interconnect@48000000/segment@0/target-module@ba000/spi@0        ?   õ/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0           ú/ocp/interconnect@48400000        B  !/ocp/interconnect@48400000/segment@0/target-module@20000/serial@0         B  !/ocp/interconnect@48400000/segment@0/target-module@22000/serial@0         B  !/ocp/interconnect@48400000/segment@0/target-module@24000/serial@0         9  !/ocp/interconnect@48400000/segment@0/target-module@3c000          ?  !/ocp/interconnect@48400000/segment@0/target-module@3c000/atl@0        B  !/ocp/interconnect@48400000/segment@0/target-module@3e000/epwmss@0         J  !'/ocp/interconnect@48400000/segment@0/target-module@3e000/epwmss@0/pwm@100         J  !-/ocp/interconnect@48400000/segment@0/target-module@3e000/epwmss@0/pwm@200         B  !5/ocp/interconnect@48400000/segment@0/target-module@40000/epwmss@0         J  !=/ocp/interconnect@48400000/segment@0/target-module@40000/epwmss@0/pwm@100         J  !C/ocp/interconnect@48400000/segment@0/target-module@40000/epwmss@0/pwm@200         B  !K/ocp/interconnect@48400000/segment@0/target-module@42000/epwmss@0         J  !S/ocp/interconnect@48400000/segment@0/target-module@42000/epwmss@0/pwm@100         J  !Y/ocp/interconnect@48400000/segment@0/target-module@42000/epwmss@0/pwm@200         A  !a/ocp/interconnect@48400000/segment@0/target-module@60000/mcasp@0          A  !h/ocp/interconnect@48400000/segment@0/target-module@64000/mcasp@0          A  !o/ocp/interconnect@48400000/segment@0/target-module@68000/mcasp@0          A  !v/ocp/interconnect@48400000/segment@0/target-module@6c000/mcasp@0          A  !}/ocp/interconnect@48400000/segment@0/target-module@70000/mcasp@0          A  !„/ocp/interconnect@48400000/segment@0/target-module@74000/mcasp@0          A  !‹/ocp/interconnect@48400000/segment@0/target-module@78000/mcasp@0          A  !’/ocp/interconnect@48400000/segment@0/target-module@7c000/mcasp@0          ?  !™/ocp/interconnect@48400000/segment@0/target-module@80000/can@0        B  !Ÿ/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0         X  !¦/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@1       X  !±/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/ethernet-ports/port@2       L  !¼/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/mdio@1000       [  !Ì/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/mdio@1000/ethernet-phy@1        [  ù/ocp/interconnect@48400000/segment@0/target-module@84000/switch@0/mdio@1000/ethernet-phy@2          !Ñ/ocp/interconnect@48800000        B  !Ù/ocp/interconnect@48800000/segment@0/target-module@2000/mailbox@0         A  !ã/ocp/interconnect@48800000/segment@0/target-module@20000/timer@0          A  !ê/ocp/interconnect@48800000/segment@0/target-module@22000/timer@0          A  !ñ/ocp/interconnect@48800000/segment@0/target-module@24000/timer@0          A  !ø/ocp/interconnect@48800000/segment@0/target-module@26000/timer@0          A  !ÿ/ocp/interconnect@48800000/segment@0/target-module@28000/timer@0          A  "/ocp/interconnect@48800000/segment@0/target-module@2a000/timer@0          9  "/ocp/interconnect@48800000/segment@0/target-module@2c000          A  "/ocp/interconnect@48800000/segment@0/target-module@2c000/timer@0          9  "&/ocp/interconnect@48800000/segment@0/target-module@2e000          A  "5/ocp/interconnect@48800000/segment@0/target-module@2e000/timer@0          9  "=/ocp/interconnect@48800000/segment@0/target-module@38000          ?  ¯/ocp/interconnect@48800000/segment@0/target-module@38000/rtc@0        C  "G/ocp/interconnect@48800000/segment@0/target-module@3a000/mailbox@0        C  "P/ocp/interconnect@48800000/segment@0/target-module@3c000/mailbox@0        C  "Y/ocp/interconnect@48800000/segment@0/target-module@3e000/mailbox@0        C  "b/ocp/interconnect@48800000/segment@0/target-module@40000/mailbox@0        S  "k/ocp/interconnect@48800000/segment@0/target-module@40000/mailbox@0/mbox-ipu1-ipc3x        S  "{/ocp/interconnect@48800000/segment@0/target-module@40000/mailbox@0/mbox-dsp1-ipc3x        C  "‹/ocp/interconnect@48800000/segment@0/target-module@42000/mailbox@0        S  "”/ocp/interconnect@48800000/segment@0/target-module@42000/mailbox@0/mbox-ipu2-ipc3x        S  "¤/ocp/interconnect@48800000/segment@0/target-module@42000/mailbox@0/mbox-dsp2-ipc3x        C  "´/ocp/interconnect@48800000/segment@0/target-module@44000/mailbox@0        C  "½/ocp/interconnect@48800000/segment@0/target-module@46000/mailbox@0        C  "Æ/ocp/interconnect@48800000/segment@0/target-module@5e000/mailbox@0        C  "Ï/ocp/interconnect@48800000/segment@0/target-module@60000/mailbox@0        C  "Ù/ocp/interconnect@48800000/segment@0/target-module@62000/mailbox@0        C  "ã/ocp/interconnect@48800000/segment@0/target-module@64000/mailbox@0        G  "í/ocp/interconnect@48800000/segment@0/target-module@80000/omap_dwc3_1@0        Q  "ù/ocp/interconnect@48800000/segment@0/target-module@80000/omap_dwc3_1@0/usb@10000          G  "þ/ocp/interconnect@48800000/segment@0/target-module@c0000/omap_dwc3_2@0        Q   v/ocp/interconnect@48800000/segment@0/target-module@c0000/omap_dwc3_2@0/usb@10000          :  #
/ocp/interconnect@48800000/segment@0/target-module@100000         H  #/ocp/interconnect@48800000/segment@0/target-module@100000/omap_dwc3_3@0       R  #/ocp/interconnect@48800000/segment@0/target-module@100000/omap_dwc3_3@0/usb@10000         @  ·/ocp/interconnect@48800000/segment@0/target-module@1d0010/vpe@0       :  ##/ocp/interconnect@48800000/segment@0/target-module@140000         H  #+/ocp/interconnect@48800000/segment@0/target-module@140000/omap_dwc3_4@0       R  #7/ocp/interconnect@48800000/segment@0/target-module@140000/omap_dwc3_4@0/usb@10000           #</ocp/target-module@51000000       *  #A/ocp/target-module@51000000/pcie@51000000         ?  #J/ocp/target-module@51000000/pcie@51000000/interrupt-controller        -  #U/ocp/target-module@51000000/pcie_ep@51000000            #^/ocp/target-module@51800000       *  #c/ocp/target-module@51800000/pcie@51800000         ?  #l/ocp/target-module@51800000/pcie@51800000/interrupt-controller          #w/ocp/ocmcram@40300000           #€/ocp/ocmcram@40400000           #‰/ocp/ocmcram@40500000           #’/ocp/bandgap@4a0021e0           #š/ocp/dsp_system@40d00000            #¦/ocp/padconf@4844a000         2  #¸/ocp/padconf@4844a000/mmc1_iodelay_ddr_rev11_conf         4  #Ô/ocp/padconf@4844a000/mmc1_iodelay_ddr50_rev20_conf       5  #ð/ocp/padconf@4844a000/mmc1_iodelay_sdr104_rev11_conf          5  $/ocp/padconf@4844a000/mmc1_iodelay_sdr104_rev20_conf          4  $./ocp/padconf@4844a000/mmc2_iodelay_hs200_rev11_conf       4  $L/ocp/padconf@4844a000/mmc2_iodelay_hs200_rev20_conf       7  $j/ocp/padconf@4844a000/mmc2_iodelay_ddr_3_3v_rev11_conf        7  $‹/ocp/padconf@4844a000/mmc2_iodelay_ddr_1_8v_rev11_conf        0  $¬/ocp/padconf@4844a000/mmc3_iodelay_manual1_conf       0  $Ì/ocp/padconf@4844a000/mmc3_iodelay_manual1_conf       1  $ì/ocp/padconf@4844a000/mmc4_iodelay_ds_rev11_conf          1  %/ocp/padconf@4844a000/mmc4_iodelay_ds_rev20_conf          =  %"/ocp/padconf@4844a000/mmc4_iodelay_sdr12_hs_sdr25_rev11_conf          =  %I/ocp/padconf@4844a000/mmc4_iodelay_sdr12_hs_sdr25_rev20_conf          "  %p/ocp/target-module@43300000/dma@0         "  %u/ocp/target-module@43400000/dma@0         "  %€/ocp/target-module@43500000/dma@0           %‹/ocp/ipu@58820000           %�/ocp/ipu@55020000           /ocp/dsp@40800000         "  %•/ocp/target-module@40d01000/mmu@0         "  %Ÿ/ocp/target-module@40d02000/mmu@0         "  %©/ocp/target-module@58882000/mmu@0         "  %²/ocp/target-module@55082000/mmu@0            %»/ocp/regulator-abb-mpu@4ae07ddc       "  %Ã/ocp/regulator-abb-ivahd@4ae07e34         #  %Í/ocp/regulator-abb-dspeve@4ae07e30           %Ø/ocp/regulator-abb-gpu@4ae07de4       "  %à/ocp/target-module@4b300000/spi@0         *  %å/ocp/target-module@50000000/gpmc@50000000           %ê/ocp/crossbar@4a002a48        "  C/ocp/target-module@58000000/dss@0         @  %÷/ocp/target-module@58000000/dss@0/target-module@40000/encoder@0       N  %ü/ocp/target-module@58000000/dss@0/target-module@40000/encoder@0/port/endpoint         "  &/ocp/target-module@59000000/gpu@0           &
/ocp/target-module@4b500000       "  &/ocp/target-module@4b500000/aes@0           &/ocp/target-module@4b700000       "  &'/ocp/target-module@4b700000/aes@0           &,/ocp/target-module@4b101000       #  &9/ocp/target-module@4b101000/sham@0          &?/ocp/target-module@42701000       #  &L/ocp/target-module@42701000/sham@0          &R/ocp/target-module@5a000000         &`/ocp/opp-supply@4a003b20            &o/ocp/dsp_system@41500000          "  &{/ocp/target-module@41501000/mmu@0         "  &…/ocp/target-module@41502000/mmu@0           ‚/ocp/dsp@41000000           &�/ocp/target-module@4b226000       $  &™/ocp/target-module@4b226000/pruss@0       /  & /ocp/target-module@4b226000/pruss@0/memories@0        .  &«/ocp/target-module@4b226000/pruss@0/cfg@26000         C  &¶/ocp/target-module@4b226000/pruss@0/cfg@26000/clocks/iepclk-mux@30        1  &È/ocp/target-module@4b226000/pruss@0/mii-rt@32000          ?  &Ö/ocp/target-module@4b226000/pruss@0/interrupt-controller@20000        .  &â/ocp/target-module@4b226000/pruss@0/pru@34000         .  &é/ocp/target-module@4b226000/pruss@0/pru@38000         /  &ð/ocp/target-module@4b226000/pruss@0/mdio@32400          &ü/ocp/target-module@4b2a6000       $  '/ocp/target-module@4b2a6000/pruss@0       /  '/ocp/target-module@4b2a6000/pruss@0/memories@0        .  '/ocp/target-module@4b2a6000/pruss@0/cfg@26000         C  '#/ocp/target-module@4b2a6000/pruss@0/cfg@26000/clocks/iepclk-mux@30        1  '5/ocp/target-module@4b2a6000/pruss@0/mii-rt@32000          ?  'C/ocp/target-module@4b2a6000/pruss@0/interrupt-controller@20000        .  'O/ocp/target-module@4b2a6000/pruss@0/pru@34000         .  'V/ocp/target-module@4b2a6000/pruss@0/pru@38000         /  ']/ocp/target-module@4b2a6000/pruss@0/mdio@32400          'i/thermal-zones          'w/thermal-zones/cpu_thermal        !  'ƒ/thermal-zones/cpu_thermal/trips          +  '�/thermal-zones/cpu_thermal/trips/cpu_alert        *  '˜/thermal-zones/cpu_thermal/trips/cpu_crit         ,  '¡/thermal-zones/cpu_thermal/trips/cpu_alert1       (  '¬/thermal-zones/cpu_thermal/cooling-maps         '½/thermal-zones/gpu_thermal        *  'É/thermal-zones/gpu_thermal/trips/gpu_crit           'Ò/thermal-zones/core_thermal       ,  'ß/thermal-zones/core_thermal/trips/core_crit         'é/thermal-zones/dspeve_thermal         0  'ø/thermal-zones/dspeve_thermal/trips/dspeve_crit         (/thermal-zones/iva_thermal        *  (/thermal-zones/iva_thermal/trips/iva_crit           (/thermal-zones/board_thermal          #  ('/thermal-zones/board_thermal/trips        /  (3/thermal-zones/board_thermal/trips/board_alert        .  (@/thermal-zones/board_thermal/trips/board_crit         *  (K/thermal-zones/board_thermal/cooling-maps           (^/fixedregulator-main_12v0           (h/fixedregulator-evm_5v0       &  (p/reserved-memory/ipu2-memory@95800000         &  (ƒ/reserved-memory/dsp1-memory@99000000         &  (–/reserved-memory/ipu1-memory@9d000000         &  (©/reserved-memory/dsp2-memory@9f000000           (¼/fixedregulator-vdd_3v3         (Ä/fixedregulator-aic_dvdd            (Í/fixedregulator-vtt       
  (×/gpio_fan           (à/connector          (æ/connector/port/endpoint          	  (ø/encoder            )/encoder/ports/port@0/endpoint          )/encoder/ports/port@1/endpoint          )/sound0          )$/sound0/simple-audio-card,codec          	#address-cells #size-cells compatible interrupt-parent model stdout-path i2c0 i2c1 i2c2 i2c3 i2c4 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 ethernet0 ethernet1 d_can0 d_can1 spi0 rproc0 rproc1 rproc2 rproc3 rtc0 rtc1 rtc2 display0 status interrupts interrupt-controller #interrupt-cells reg phandle device_type operating-points-v2 clocks clock-names clock-latency #cooling-cells vbb-supply vdd-supply voltage-tolerance syscon opp-shared opp-hz opp-microvolt opp-supported-hw opp-suspend power-domains ranges dma-ranges interrupts-extended reg-names regulator-name regulator-min-microvolt regulator-max-microvolt #phy-cells #clock-cells clock-output-names ti,bit-shift #pinctrl-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins #dma-cells dma-requests ti,dma-safe-map dma-masters clock-frequency clock-mult clock-div ti,max-div ti,autoidle-shift ti,index-starts-at-one ti,invert-autoidle-bit ti,index-power-of-two assigned-clocks assigned-clock-rates assigned-clock-parents ti,dividers ti,sysc-mask ti,sysc-midle ti,sysc-sidle ti,syss-mask dma-channels syscon-phy-power phy-supply syscon-pcs syscon-pllreset #mbox-cells ti,mbox-num-users ti,mbox-num-fifos #hwlock-cells phys phy-names ports-implemented #power-domain-cells #reset-cells gpio-controller #gpio-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon ti,timer-secure syscon-raminit dmas dma-names ti,no-idle-on-init interrupt-names vcc-supply wakeup-source ti,system-power-controller ti,palmas-override-powerhold regulator-always-on regulator-boot-on ti,palmas-long-press-seconds ti,enable-vbus-detection vbus-gpio #thermal-sensor-cells #sound-dai-cells adc-settle-ms AVDD-supply IOVDD-supply DRVDD-supply DVDD-supply ti,spi-num-cs pbias-supply max-frequency mmc-ddr-1_8v mmc-ddr-3_3v pinctrl-names pinctrl-0 bus-width cd-gpios no-1-8-v pinctrl-1 vmmc-supply sdhci-caps-mask mmc-hs200-1_8v vqmmc-supply non-removable pinctrl-2 ti,provided-clocks #pwm-cells op-mode tdm-slots serial-dir tx-num-evt rx-num-evt label mac-address phy-handle phy-mode ti,dual-emac-pvid bus_freq max-speed ti,timer-pwm ti,mbox-tx ti,mbox-rx utmi-mode maximum-speed dr_mode snps,dis_u3_susphy_quirk snps,dis_u2_susphy_quirk extcon snps,dis_metastability_quirk resets reset-names bus-range num-lanes linux,pci-domain ti,syscon-lane-sel interrupt-map-mask interrupt-map ti,syscon-unaligned-access num-ib-windows num-ob-windows pinctrl-pin-array ti,tptcs iommus firmware-name mboxes ti,timers ti,watchdog-timers memory-region ti,bootreg #iommu-cells ti,syscon-mmuconfig ti,iommu-bus-err-back ti,settling-time ti,clock-cycles ti,tranxdone-status-mask ti,ldovbb-override-mask ti,ldovbb-vset-mask ti,abb_info syscon-chipselects gpmc,num-cs gpmc,num-waitpins ti,max-irqs ti,max-crossbar-sources ti,reg-size ti,irqs-reserved ti,irqs-skip ti,irqs-safe-map syscon-pll-ctrl vdda_video-supply syscon-pol vdda-supply remote-endpoint ti,efuse-settings ti,absolute-max-voltage-uv polling-delay-passive polling-delay thermal-sensors coefficients temperature hysteresis trip cooling-device vin-supply reusable enable-active-high linux,default-trigger default-state gpio-fan,speed-map simple-audio-card,name simple-audio-card,widgets simple-audio-card,routing simple-audio-card,format simple-audio-card,bitclock-master simple-audio-card,frame-master simple-audio-card,bitclock-inversion sound-dai gic wakeupgen cpu0 cpu0_opp_table ocp l4_cfg scm scm_conf pbias_regulator pbias_mmc_reg phy_gmii_sel scm_conf_clocks dss_deshdcp_clk ehrpwm0_tbclk ehrpwm1_tbclk ehrpwm2_tbclk sys_32k_ck dra7_pmx_core mmc1_pins_default mmc1_pins_sdr12 mmc1_pins_hs mmc1_pins_sdr25 mmc1_pins_sdr50 mmc1_pins_ddr50 mmc1_pins_sdr104 mmc2_pins_default mmc2_pins_hs mmc2_pins_ddr_3_3v_rev11 mmc2_pins_ddr_1_8v_rev11 mmc2_pins_ddr_rev20 mmc2_pins_hs200 mmc4_pins_default mmc4_pins_hs mmc3_pins_default mmc3_pins_hs mmc3_pins_sdr12 mmc3_pins_sdr25 mmc3_pins_sdr50 mmc4_pins_sdr12 mmc4_pins_sdr25 scm_conf1 scm_conf_pcie sdma_xbar edma_xbar cm_core_aon cm_core_aon_clocks atl_clkin0_ck atl_clkin1_ck atl_clkin2_ck atl_clkin3_ck hdmi_clkin_ck mlb_clkin_ck mlbp_clkin_ck pciesref_acs_clk_ck ref_clkin0_ck ref_clkin1_ck ref_clkin2_ck ref_clkin3_ck rmii_clk_ck sdvenc_clkin_ck secure_32k_clk_src_ck sys_clk32_crystal_ck sys_clk32_pseudo_ck virt_12000000_ck virt_13000000_ck virt_16800000_ck virt_19200000_ck virt_20000000_ck virt_26000000_ck virt_27000000_ck virt_38400000_ck sys_clkin2 usb_otg_clkin_ck video1_clkin_ck video1_m2_clkin_ck video2_clkin_ck video2_m2_clkin_ck dpll_abe_ck dpll_abe_x2_ck dpll_abe_m2x2_ck abe_clk dpll_abe_m2_ck dpll_abe_m3x2_ck dpll_core_byp_mux dpll_core_ck dpll_core_x2_ck dpll_core_h12x2_ck mpu_dpll_hs_clk_div dpll_mpu_ck dpll_mpu_m2_ck mpu_dclk_div dsp_dpll_hs_clk_div dpll_dsp_byp_mux dpll_dsp_ck dpll_dsp_m2_ck iva_dpll_hs_clk_div dpll_iva_byp_mux dpll_iva_ck dpll_iva_m2_ck iva_dclk dpll_gpu_byp_mux dpll_gpu_ck dpll_gpu_m2_ck dpll_core_m2_ck core_dpll_out_dclk_div dpll_ddr_byp_mux dpll_ddr_ck dpll_ddr_m2_ck dpll_gmac_byp_mux dpll_gmac_ck dpll_gmac_m2_ck video2_dclk_div video1_dclk_div hdmi_dclk_div per_dpll_hs_clk_div usb_dpll_hs_clk_div eve_dpll_hs_clk_div dpll_eve_byp_mux dpll_eve_ck dpll_eve_m2_ck eve_dclk_div dpll_core_h13x2_ck dpll_core_h14x2_ck dpll_core_h22x2_ck dpll_core_h23x2_ck dpll_core_h24x2_ck dpll_ddr_x2_ck dpll_ddr_h11x2_ck dpll_dsp_x2_ck dpll_dsp_m3x2_ck dpll_gmac_x2_ck dpll_gmac_h11x2_ck dpll_gmac_h12x2_ck dpll_gmac_h13x2_ck dpll_gmac_m3x2_ck gmii_m_clk_div hdmi_clk2_div hdmi_div_clk l3_iclk_div l4_root_clk_div video1_clk2_div video1_div_clk video2_clk2_div video2_div_clk dummy_ck cm_core_aon_clockdomains mpu_cm mpu_clkctrl dsp1_cm dsp1_clkctrl ipu_cm ipu1_clkctrl ipu_clkctrl dsp2_cm dsp2_clkctrl rtc_cm rtc_clkctrl vpe_cm vpe_clkctrl cm_core cm_core_clocks dpll_pcie_ref_ck dpll_pcie_ref_m2ldo_ck apll_pcie_in_clk_mux apll_pcie_ck optfclk_pciephy_div apll_pcie_clkvcoldo apll_pcie_clkvcoldo_div apll_pcie_m2_ck dpll_per_byp_mux dpll_per_ck dpll_per_m2_ck func_96m_aon_dclk_div dpll_usb_byp_mux dpll_usb_ck dpll_usb_m2_ck dpll_pcie_ref_m2_ck dpll_per_x2_ck dpll_per_h11x2_ck dpll_per_h12x2_ck dpll_per_h13x2_ck dpll_per_h14x2_ck dpll_per_m2x2_ck dpll_usb_clkdcoldo func_128m_clk func_12m_fclk func_24m_clk func_48m_fclk func_96m_fclk l3init_60m_fclk clkout2_clk l3init_960m_gfclk usb_phy1_always_on_clk32k usb_phy2_always_on_clk32k usb_phy3_always_on_clk32k gpu_core_gclk_mux gpu_hyd_gclk_mux l3instr_ts_gclk_div vip1_gclk_mux vip2_gclk_mux vip3_gclk_mux cm_core_clockdomains coreaon_clkdm coreaon_cm coreaon_clkctrl l3main1_cm l3main1_clkctrl ipu2_cm ipu2_clkctrl dma_cm dma_clkctrl emif_cm emif_clkctrl atl_cm atl_clkctrl l4cfg_cm l4cfg_clkctrl l3instr_cm l3instr_clkctrl iva_cm iva_clkctrl cam_cm cam_clkctrl dss_cm dss_clkctrl gpu_cm gpu_clkctrl l3init_cm l3init_clkctrl pcie_clkctrl gmac_clkctrl l4per_cm l4per_clkctrl l4sec_clkctrl l4per2_clkctrl l4per3_clkctrl sdma usb2_phy1 usb2_phy2 usb3_phy1 pcie1_phy pcie2_phy sata_phy mailbox1 hwspinlock sata l4_wkup counter32k prm prm_clocks sys_clkin1 abe_dpll_sys_clk_mux abe_dpll_bypass_clk_mux abe_dpll_clk_mux abe_24m_fclk aess_fclk abe_giclk_div abe_lp_clk_div abe_sys_clk_div adc_gfclk_mux sys_clk1_dclk_div sys_clk2_dclk_div per_abe_x1_dclk_div dsp_gclk_div gpu_dclk emif_phy_dclk_div gmac_250m_dclk_div gmac_main_clk l3init_480m_dclk_div usb_otg_dclk_div sata_dclk_div pcie2_dclk_div pcie_dclk_div emu_dclk_div secure_32k_dclk_div clkoutmux0_clk_mux clkoutmux1_clk_mux clkoutmux2_clk_mux custefuse_sys_gfclk_div eve_clk hdmi_dpll_clk_mux mlb_clk mlbp_clk per_abe_x1_gfclk2_div timer_sys_clk_div video1_dpll_clk_mux video2_dpll_clk_mux wkupaon_iclk_mux prm_clockdomains wkupaon_cm wkupaon_clkctrl prm_mpu prm_dsp1 prm_ipu prm_coreaon prm_core prm_iva prm_cam prm_dss prm_gpu prm_l3init prm_l4per prm_custefuse prm_wkupaon prm_dsp2 prm_eve1 prm_eve2 prm_eve3 prm_eve4 prm_rtc prm_vpe scm_wkup gpio1 wdt2 timer1_target timer1 timer12 uart10 dcan1 l4_per1 uart3 timer2 timer3_target timer3 timer4_target timer4 timer9 gpio7_target gpio7 gpio8 gpio2_target gpio2 gpio3_target gpio3 gpio4 gpio5 gpio6 mcp_rtc uart5 uart6 uart1 uart2 uart4 tps659038 smps12_reg smps3_reg smps45_reg smps6_reg smps8_reg ldo1_reg ldo2_reg ldo3_reg ldo4_reg ldo9_reg ldoln_reg ldousb_reg regen1 tps659038_rtc tps659038_pwr_button tps659038_gpio extcon_usb2 tmp102 tlv320aic3104 eeprom elm i2c5 timer10 timer11 rng mcspi1 mcspi2 mmc1 des_target des mmc3 hdqw1w mmc2 mcspi3 mcspi4 mmc4 l4_per2 uart7 uart8 uart9 atl_tm atl epwmss0 ecap0 ehrpwm0 epwmss1 ecap1 ehrpwm1 epwmss2 ecap2 ehrpwm2 mcasp1 mcasp2 mcasp3 mcasp4 mcasp5 mcasp6 mcasp7 mcasp8 dcan2 mac_sw cpsw_port1 cpsw_port2 davinci_mdio_sw phy0 l4_per3 mailbox13 timer5 timer6 timer7 timer8 timer13 timer14 timer15_target timer15 timer16_target timer16 rtctarget mailbox2 mailbox3 mailbox4 mailbox5 mbox_ipu1_ipc3x mbox_dsp1_ipc3x mailbox6 mbox_ipu2_ipc3x mbox_dsp2_ipc3x mailbox7 mailbox8 mailbox9 mailbox10 mailbox11 mailbox12 omap_dwc3_1 usb1 omap_dwc3_2 usb3_tm omap_dwc3_3 usb3 usb4_tm omap_dwc3_4 usb4 axi0 pcie1_rc pcie1_intc pcie1_ep axi1 pcie2_rc pcie2_intc ocmcram1 ocmcram2 ocmcram3 bandgap dsp1_system dra7_iodelay_core mmc1_iodelay_ddr_rev11_conf mmc1_iodelay_ddr_rev20_conf mmc1_iodelay_sdr104_rev11_conf mmc1_iodelay_sdr104_rev20_conf mmc2_iodelay_hs200_rev11_conf mmc2_iodelay_hs200_rev20_conf mmc2_iodelay_ddr_3_3v_rev11_conf mmc2_iodelay_ddr_1_8v_rev11_conf mmc3_iodelay_manual1_rev11_conf mmc3_iodelay_manual1_rev20_conf mmc4_iodelay_ds_rev11_conf mmc4_iodelay_ds_rev20_conf mmc4_iodelay_sdr12_hs_sdr25_rev11_conf mmc4_iodelay_sdr12_hs_sdr25_rev20_conf edma edma_tptc0 edma_tptc1 ipu1 ipu2 mmu0_dsp1 mmu1_dsp1 mmu_ipu1 mmu_ipu2 abb_mpu abb_ivahd abb_dspeve abb_gpu qspi gpmc crossbar_mpu hdmi hdmi_out bb2d aes1_target aes1 aes2_target aes2 sham1_target sham1 sham2_target sham2 iva_hd_target opp_supply_mpu dsp2_system mmu0_dsp2 mmu1_dsp2 pruss1_tm pruss1 pruss1_mem pruss1_cfg pruss1_iepclk_mux pruss1_mii_rt pruss1_intc pru1_0 pru1_1 pruss1_mdio pruss2_tm pruss2 pruss2_mem pruss2_cfg pruss2_iepclk_mux pruss2_mii_rt pruss2_intc pru2_0 pru2_1 pruss2_mdio thermal_zones cpu_thermal cpu_trips cpu_alert0 cpu_crit cpu_alert1 cpu_cooling_maps gpu_thermal gpu_crit core_thermal core_crit dspeve_thermal dspeve_crit iva_thermal iva_crit board_thermal board_trips board_alert0 board_crit board_cooling_maps main_12v0 evm_5v0 ipu2_memory_region dsp1_memory_region ipu1_memory_region dsp2_memory_region vdd_3v3 aic_dvdd vtt_fixed gpio_fan hdmi0 hdmi_connector_in tpd12s015 tpd12s015_in tpd12s015_out sound0 sound0_master 