Ðþí  0(   8  ,|   (            ¬  ,D                                                         Marvell Armada 395 GP Board       4   !marvell,a395-gp marvell,armada395 marvell,armada390    aliases          ,/soc/internal-regs/gpio@18100            2/soc/internal-regs/gpio@18140             8/soc/internal-regs/serial@12000           @/soc/internal-regs/serial@12100           H/soc/internal-regs/serial@12200           P/soc/internal-regs/serial@12300       cpus                                       Xmarvell,armada-390-smp     cpu@0            fcpu          !arm,cortex-a9            r          cpu@1            fcpu          !arm,cortex-a9            r            pmu          !arm,cortex-a9-pmu            v            soc       8   !marvell,armada390-mbus marvell,armadaxp-mbus simple-bus                                   Š            •            ¦à               ¸è                Éð      ñ            ÿð        bootrom          !marvell,bootrom          r                internal-regs            !simple-bus                                    É    ð            cache-controller@8000            !arm,pl310-cache          r  €              Ð         Þ            ê                                    0         scu@c000             !arm,cortex-a9-scu            r  À          timer@c600           !arm,cortex-a9-twd-timer          r  Æ             >                I            interrupt-controller@d000            !arm,cortex-a9-gic           P                         a         r  Ð      Á            v         i2c@11000            !marvell,mv64xxx-i2c          r                                        >                  I               ~okay            … †    eeprom@57            !atmel,24c64          r   W         i2c@11100            !marvell,mv64xxx-i2c          r                                        >                  I             	  ~disabled          i2c@11200            !marvell,mv64xxx-i2c          r                                        >                  I             	  ~disabled          i2c@11300            !marvell,mv64xxx-i2c          r                                        >                  I             	  ~disabled          serial@12000             !snps,dw-apb-uart             r              •           >                  Ÿ           I               ~okay          serial@12100             !snps,dw-apb-uart             r !            •           >                  Ÿ           I             	  ~disabled          serial@12200             !snps,dw-apb-uart             r "            •           >                  Ÿ           I             	  ~disabled          serial@12300             !snps,dw-apb-uart             r #            •           >                  Ÿ           I             	  ~disabled          pinctrl@18000            !marvell,mv88f6925-pinctrl            r €        i2c0-pins         
  ¬mpp2 mpp3           ¹i2c0          uart0-pins        
  ¬mpp0 mpp1           ¹ua0       uart1-pins          ¬mpp19 mpp20         ¹ua1       spi1-pins           ¬mpp56 mpp57 mpp58 mpp59         ¹spi1          nand-pins         N  ¬mpp22 mpp34 mpp23 mpp33 mpp38 mpp28 mpp40 mpp42 mpp35 mpp36 mpp25 mpp30 mpp32           ¹dev         v            gpio@18100           !marvell,orion-gpio           r �    @        Ê             Ñ        á            a        P         0  >       5          6          7          8         gpio@18140           !marvell,orion-gpio           r �@   @        Ê            Ñ        á            a        P         0  >       :          ;          <          =         system-controller@18200       M   !marvell,armada-390-system-controller marvell,armada-370-xp-system-controller             r ‚          clock-gating-control@18220            !marvell,armada-390-gating-clock          r ‚            I               í           v         mvebu-sar@18600          !marvell,armada-390-core-clock            r †            í           v         mbus-controller@20000            !marvell,mbus-controller          r       €     P           v         interrupt-controller@20a00           !marvell,mpic             r 
   Ð p   X        P            a         ú        >                 v         timer@20300       1   !marvell,armada-380-timer marvell,armada-xp-timer             r     0 @   0      P   v                       	             
                                    I                    	nbclk fixed       watchdog@20300           !marvell,armada-380-wdt           r     4     ‚`           I                 	nbclk fixed       cpurst@20800             !marvell,armada-370-cpu-reset             r           mpcore-soc-ctrl@20d20         #   !marvell,armada-380-mpcore-soc-ctrl           r     l      coherency-fabric@21010        $   !marvell,armada-380-coherency-fabric          r          pmsu@22000        0   !marvell,armada-390-pmsu marvell,armada-380-pmsu          r            xor@60800         )   !marvell,armada-380-xor marvell,orion-xor             r      
            I              ~okay       xor00           >                            #      xor01           >                            #         .         xor@60900         )   !marvell,armada-380-xor marvell,orion-xor             r 	                 I              ~okay       xor10           >       A                     #      xor11           >       B                     #         .         rtc@a3800            !marvell,armada-380-rtc           r 
8      „            <rtc rtc-soc         >                nand-controller@d0000         "   !marvell,armada370-nand-controller            r      T                                  >       T           I               ~okay            F           Pdefault    nand@0           r            ^pxa3xx_nand-0           d             l         …        —           ©      partitions           !fixed-partitions                                partition@0         ^U-Boot           r     `           ¼      partition@800000            ^uImage           r `   @           ¼      partition@1000000           ^Root             r    ?`                 sdhci@d8000          !marvell,armada-380-sdhci            <sdhci mbus conf-sdio3            r €     À     „T           >                  I              Æ           ~okay            …ëÂ          Ü         æ        ò            ü      clock@e4250       B   !marvell,armada-390-corediv-clock marvell,armada-380-corediv-clock            r BP           í           I   	        nand            v         thermal@e8078            !marvell,armada380-thermal            r @x    @t           ~okay          sata@a8000           !marvell,armada-380-ahci          r 
€             >                  I              ~okay          usb3@f0000           !marvell,armada-380-xhci          r     @  @   @         >                  I      	        ~okay          usb@58000           ~okay             pcie             !marvell,armada-370-pcie         ~okay             fpci                                             #       ÿ     P   É‚          ð             ‚          ð             ‚        @ ð   @         ‚        € ð   €         ‚          è             �          à             ‚          è             �          à             ‚          Ø             �          Ð             ‚          ¸             �          °                pcie@1,0             fpci         -‚                          r                                                    @intx             v                     P         @   É‚           ‚                 �           �                         #       ÿ        P                     `  c                  
                      
                     
                     
           q            ƒ            I            	  ~disabled       interrupt-controller             a        P           v   
         pcie@2,0             fpci         -‚                          r                                                    @intx             v          !           P         @   É‚           ‚                 �           �                         #       ÿ        P                     `  c                                                                                             q           ƒ            I              ~okay       interrupt-controller             a        P           v            pcie@3,0             fpci         -‚       @                  r                                                    @intx             v          F           P         @   É‚           ‚                 �           �                         #       ÿ        P                     `  c                                                                                             q           ƒ            I            	  ~disabled       interrupt-controller             a        P           v            pcie@4,0             fpci         -‚        €                  r                                                     @intx             v          G           P         @   É‚           ‚                 �           �                         #       ÿ        P                     `  c                                                                                             q           ƒ            I              ~okay       interrupt-controller             a        P           v               spi@10600         )   !marvell,armada-390-spi marvell,orion-spi             rð       P                                  •            >                  I             	  ~disabled          spi@10680         )   !marvell,armada-390-spi marvell,orion-spi             rð   €   P                                  •           >       ?           I             	  ~disabled             clocks     mainpll          !fixed-clock         í            …;šÊ         v   	      oscillator           !fixed-clock         í            …}x@        v            chosen           serial0:115200n8          memory           fmemory           r    @            	#address-cells #size-cells model compatible gpio0 gpio1 serial0 serial1 serial2 serial3 enable-method device_type reg interrupts-extended controller interrupt-parent pcie-mem-aperture pcie-io-aperture ranges cache-unified cache-level arm,double-linefill-incr arm,double-linefill-wrap arm,double-linefill prefetch-data interrupts clocks #interrupt-cells interrupt-controller phandle status clock-frequency reg-shift reg-io-width marvell,pins marvell,function ngpios gpio-controller #gpio-cells #clock-cells msi-controller clock-names dmacap,memcpy dmacap,xor dmacap,memset reg-names pinctrl-0 pinctrl-names label nand-rb marvell,nand-keep-config nand-on-flash-bbt nand-ecc-strength nand-ecc-step-size read-only mrvl,clk-delay-cycles broken-cd wp-inverted bus-width no-1-8-v clock-output-names msi-parent bus-range assigned-addresses interrupt-names interrupt-map-mask interrupt-map marvell,pcie-port marvell,pcie-lane cell-index stdout-path 