Ðþí  Oë   8  KD   (            §  K                             2    Marvell Armada XP Development Board DB-MV784MP-GP         O   marvell,axp-gp marvell,armadaxp-mv78460 marvell,armadaxp marvell,armada-370-xp                              aliases           ,/soc/internal-regs/serial@12000           4/soc/internal-regs/serial@12100           </soc/internal-regs/serial@12200           D/soc/internal-regs/serial@12300          L/soc/internal-regs/gpio@18100            R/soc/internal-regs/gpio@18140            X/soc/internal-regs/gpio@18180         cpus                                       ^marvell,armada-xp-smp      cpu@0            marvell,sheeva-v7            lcpu          x             |                ƒ B@      cpu@1            lcpu          marvell,sheeva-v7            x            |               ƒ B@      cpu@2            lcpu          marvell,sheeva-v7            x            |               ƒ B@      cpu@3            lcpu          marvell,sheeva-v7            x            |               ƒ B@      pm_pic        $   ‘                                    pmu          arm,cortex-a9-pmu            œ            soc                                   °            »            Ìø   à           Þÿà           !   marvell,armadaxp-mbus simple-bus          x   ïð          ñ                ÿð     /          ð      		          ñ     	          ñ               ñ         devbus-bootcs            marvell,mvebu-devbus             xð                ï    /      ÿÿÿÿ                                  |                öokay             ý             ê`        !            5 ä`        I ÈÀ        \            o            �            ”  ê`        ¦  ê`        ·  ê`   nor@0         
   cfi-flash            x               È            devbus-cs0           marvell,mvebu-devbus             xð               ï    >      ÿÿÿÿ                                  |             	   ödisabled          devbus-cs1           marvell,mvebu-devbus             xð               ï    =      ÿÿÿÿ                                  |             	   ödisabled          devbus-cs2           marvell,mvebu-devbus             xð               ï    ;      ÿÿÿÿ                                  |             	   ödisabled          devbus-cs3           marvell,mvebu-devbus             xð                ï    7      ÿÿÿÿ                                  |             	   ödisabled          internal-regs            simple-bus                                    ï    ð            rtc@10300            marvell,orion-rtc            x              Ó   2      i2c@11000         (   marvell,mv78230-i2c marvell,mv64xxx-i2c                                   Ó            |             	   ödisabled             x           i2c@11100         (   marvell,mv78230-i2c marvell,mv64xxx-i2c                                   Ó             |             	   ödisabled             x           serial@12000             snps,dw-apb-uart             x              Þ           Ó   )        è            |                öokay          serial@12100             snps,dw-apb-uart             x !            Þ           Ó   *        è            |                öokay          pin-ctrl@18000           x €    8         marvell,mv78460-pinctrl    ge0-gmii-pins         †  õmpp0 mpp1 mpp2 mpp3 mpp4 mpp5 mpp6 mpp7 mpp8 mpp9 mpp10 mpp11 mpp12 mpp13 mpp14 mpp15 mpp16 mpp17 mpp18 mpp19 mpp20 mpp21 mpp22 mpp23           ge0       ge0-rgmii-pins        >  õmpp0 mpp1 mpp2 mpp3 mpp4 mpp5 mpp6 mpp7 mpp8 mpp9 mpp10 mpp11           ge0       ge1-rgmii-pins        H  õmpp12 mpp13 mpp14 mpp15 mpp16 mpp17 mpp18 mpp19 mpp20 mpp21 mpp22 mpp23         ge1       sdio-pins         $  õmpp30 mpp31 mpp32 mpp33 mpp34 mpp35         sd0       spi0-pins           õmpp36 mpp37 mpp38 mpp39         spi0                     spi1-pins           õmpp13 mpp14 mpp16 mpp17         spi1                     uart2-pins          õmpp42 mpp43         uart2                    uart3-pins          õmpp44 mpp45         uart3                       corediv-clock@18740       !   marvell,armada-370-corediv-clock             x ‡@                       |           (nand                     mbus-controller@20000            marvell,mbus-controller          x       €     P                    interrupt-controller@20a00           marvell,mpic            ;            L         a         x 
   Ð p   X                 coherency-fabric@20200           marvell,coherency-fabric             x     °          timer@20300          x     0 @   0        Ó   %   &   '   (               marvell,armada-xp-timer          |                 pnbclk fixed       watchdog@20300           x     4             marvell,armada-xp-wdt            |                 pnbclk fixed         Ó   ]   &      cpurst@20800             marvell,armada-370-cpu-reset             x            pmsu@22000           marvell,armada-370-pmsu          x            usb@50000            marvell,orion-ehci           x              Ó   -         öokay             |            usb@51000            marvell,orion-ehci           x             Ó   .         öokay             |            ethernet@70000           x     @         Ó            |               öokay             marvell,armada-xp-neta          |   	        €qsgmii          ‰   
        ˜          mdio@72004                                     marvell,orion-mdio           x              |         ethernet-phy@0           x              	      ethernet-phy@1           x                    ethernet-phy@2           x                    ethernet-phy@3           x                       ethernet@74000           x @   @         Ó   
         |               öokay             marvell,armada-xp-neta          |           €qsgmii          ‰   
        ˜         sata@a0000           marvell,armada-370-sata          x 
    P         Ó   7         |                    p0 1          öokay            ¥         nand-controller@d0000         "   marvell,armada370-nand-controller            x      T                                  Ó   q         |                öokay       nand@0           x            ®pxa3xx_nand-0           ´             ¼         mvsdio@d4000             marvell,orion-sdio           x @            Ó   6         |                          Î         Û         ì      	   ödisabled          sdramc@1400       #   marvell,armada-xp-sdram-controller           x            l2-cache@8000            marvell,aurora-system-cache          x  €            þ                                &      serial@12200             snps,dw-apb-uart            2           <default          x "            Þ           Ó   +        è            |                öokay          serial@12300             snps,dw-apb-uart            2           <default          x #            Þ           Ó   ,        è            |                öokay          system-controller@18200       (   marvell,armada-370-xp-system-controller          x ‚          clock-gating-control@18220           marvell,armada-xp-gating-clock           x ‚             |                                   mvebu-sar@18230          marvell,armada-xp-core-clock             x ‚0                               thermal@182b0            marvell,armadaxp-thermal             x ‚°    „Ð            öokay          clock-complex@18700                     marvell,armada-xp-cpu-clock          x ‡    $ ÀT            |                       cpu-config@21000             marvell,armada-xp-cpu-config             x           ethernet@30000           marvell,armada-xp-neta           x     @         Ó            |               öokay            |           €qsgmii          ‰   
        ˜         usb@52000            marvell,orion-ehci           x              Ó   /         |            	   ödisabled          xor@60900            marvell,orion-xor            x 	                  |               öokay       xor10           Ó   3         J         X      xor11           Ó   4         J         X         c         crypto@90000             marvell,armada-xp-crypto             x 	             qregs            Ó   0   1         |                    pcesa0 cesa1         {              �         bm@c0000             marvell,armada-380-neta-bm           x      ¬         |              ©            öokay               
      xor@f0900            marvell,orion-xor            x 	                  |               öokay       xor00           Ó   ^         J         X      xor01           Ó   _         J         X         c         gpio@18100        +   marvell,armada-370-gpio marvell,orion-gpio           x �    @ �À         	  qgpio pwm            ¶             ½        Í           Ù            L        ;           Ó   R   S   T   U         |                        gpio@18140        +   marvell,armada-370-gpio marvell,orion-gpio           x �@   @ �È         	  qgpio pwm            ¶             ½        Í           Ù            L        ;           Ó   W   X   Y   Z         |             gpio@18180        +   marvell,armada-370-gpio marvell,orion-gpio           x �€   @        ¶            ½        Í            L        ;           Ó   [      ethernet@34000           marvell,armada-xp-neta           x @   @         Ó            |               öokay            |           €qsgmii          ‰   
        ˜         pinctrl         2           <default    pic-pins-0          õmpp16 mpp17 mpp18           gpio                           spi@10600         l   xð       (      ÿÿÿÿ^      ÿÿÿÿž      ÿÿÿÿÞ      ÿÿÿÿ      ÿÿÿÿ_      ÿÿÿÿŸ      ÿÿÿÿß      ÿÿÿÿ                                  ä            Ó            |                öokay          (   marvell,armada-xp-spi marvell,orion-spi         2           <default    flash@0                                   n25q128a13 jedec,spi-nor             x            ïoó          spi@10680         l   xð   €   (      ÿÿÿÿZ      ÿÿÿÿš      ÿÿÿÿÚ      ÿÿÿÿ      ÿÿÿÿ[      ÿÿÿÿ›      ÿÿÿÿÛ      ÿÿÿÿ                                  ä           Ó   \         |             	   ödisabled          (   marvell,armada-xp-spi marvell,orion-spi         2           <default       bootrom          marvell,bootrom          x               sa-sram0          
   mmio-sram            x		                  |                                        ï    		                          sa-sram1          
   mmio-sram            x	                  |                                        ï    	                          bm-bppi       
   mmio-sram            x                  ï                                               |                        öokay                     pcie@82000000            marvell,armada-xp-pcie           öokay             lpci                                                    ÿ     H   ï‚          ð             ‚          ð             ‚        @ ð   @         ‚        € ð   €         ‚        À ð   À         ‚          ð             ‚          ð             ‚        @ ð   @         ‚        € ð   €         ‚        À ð   À         ‚          è             �          à             ‚          Ø             �          Ð             ‚          ¸             �          °             ‚          x             �          p             ‚          è             �          à             ‚          Ø             �          Ð             ‚          ¸             �          °             ‚          x             �          p             ‚      	    ø             �      	    ð             ‚      
    ø             �      
    ð                pcie@1,0             lpci         #‚                          x                                                    6intx             œ      :        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g            y             |               öokay       interrupt-controller             L        ;                       pcie@2,0             lpci         #‚       @                  x                                                    6intx             œ      ;        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g            y            |            	   ödisabled       interrupt-controller             L        ;                       pcie@3,0             lpci         #‚       €                  x                                                    6intx             œ      <        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g            y            |            	   ödisabled       interrupt-controller             L        ;                       pcie@4,0             lpci         #‚        À                  x                                                     6intx             œ      =        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g            y            |            	   ödisabled       interrupt-controller             L        ;                       pcie@5,0             lpci         #‚ (                         x  (                                                  6intx             œ      >        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g           y             |      	      	   ödisabled       interrupt-controller             L        ;                       pcie@6,0             lpci         #‚ 0      @                  x  0                                                  6intx             œ      ?        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g           y            |      
      	   ödisabled       interrupt-controller             L        ;                       pcie@7,0             lpci         #‚ 8      €                  x  8                                                  6intx             œ      @        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g           y            |            	   ödisabled       interrupt-controller             L        ;                       pcie@8,0             lpci         #‚ @      À                  x  @                                                  6intx             œ      A        ;         @   ï‚           ‚                 �           �                                ÿ        F                     `  Y                                                                                             g           y            |            	   ödisabled       interrupt-controller             L        ;                       pcie@9,0             lpci         #‚ H                         x  H                                                  6intx             œ      c        ;         @   ï‚           ‚      	           �           �      	                          ÿ        F                     `  Y                                                                                             g           y             |               öokay       interrupt-controller             L        ;                       pcie@a,0             lpci         #‚ P                         x  P                                                  6intx             œ      g        ;         @   ï‚           ‚      
           �           �      
                          ÿ        F                     `  Y                                                                                                 g           y             |               öokay       interrupt-controller             L        ;                              clocks     mainpll          fixed-clock                     ‹w5”                  oscillator           fixed-clock                     ‹}x@                    chosen          ›serial0:115200n8          memory@0             lmemory            x            ð                          	model compatible #address-cells #size-cells serial0 serial1 serial2 serial3 gpio0 gpio1 gpio2 enable-method device_type reg clocks clock-latency ctrl-gpios interrupts-extended controller interrupt-parent pcie-mem-aperture pcie-io-aperture ranges status devbus,bus-width devbus,turn-off-ps devbus,badr-skew-ps devbus,acc-first-ps devbus,acc-next-ps devbus,rd-setup-ps devbus,rd-hold-ps devbus,sync-enable devbus,wr-high-ps devbus,wr-low-ps devbus,ale-wr-ps bank-width interrupts reg-shift reg-io-width marvell,pins marvell,function phandle #clock-cells clock-output-names #interrupt-cells interrupt-controller msi-controller clock-names phy phy-mode buffer-manager bm,pool-long nr-ports label nand-rb nand-on-flash-bbt cap-sdio-irq cap-sd-highspeed cap-mmc-highspeed cache-id-part cache-level cache-unified wt-override pinctrl-0 pinctrl-names dmacap,memcpy dmacap,xor dmacap,memset reg-names marvell,crypto-srams marvell,crypto-sram-size internal-mem ngpios gpio-controller #gpio-cells #pwm-cells cell-index spi-max-frequency no-memory-wc msi-parent bus-range assigned-addresses interrupt-names interrupt-map-mask interrupt-map marvell,pcie-port marvell,pcie-lane clock-frequency stdout-path 