Ðþí á   8 Ô   (            
 œ                             ,    timll,omap3-devkit8000 ti,omap3430 ti,omap3                                  +            7TimLL OMAP3 Devkit8000     chosen        aliases          =/ocp@68000000/i2c@48070000           B/ocp@68000000/i2c@48072000           G/ocp@68000000/i2c@48060000           L/ocp@68000000/mmc@4809c000           Q/ocp@68000000/mmc@480b4000           V/ocp@68000000/mmc@480ad000           [/ocp@68000000/serial@4806a000            c/ocp@68000000/serial@4806c000            k/ocp@68000000/serial@49020000            s/connector0          |/connector1       cpus                         +       cpu@0             arm,cortex-a8            …cpu          ‘             •            œcpu          ¨ “à         ¶            Ê            Ù           pmu@54000000              arm,cortex-a8-pmu            ‘T    €           á            ìdebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             ìmpu       iva       
    ti,iva2.2            ìiva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           ‘h               á   	   
                     +             ö         ìl3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +            ö    H         scm@2000              ti,omap3-scm simple-bus          ‘                             +            ö               pinmux@30              ti,omap3-padconf pinctrl-single          ‘   0  8                     +             ý                               2           P  ÿ   twl4030-pins            m  °  A         Ù   ä      dss-dpi-pins          à  m   ¤       ¦       ¨       ª       ¬       ®       °       ²       ´       ¶       ¸       º       ¼       ¾       À       Â       Ä       Æ       È       Ê       Ì       Î       Ð       Ò       Ô       Ö       Ø       Ú             Ù   ø         scm_conf@270              syscon simple-bus            ‘  p  0                     +            ö      p  0         Ù      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap             ‘  °           �      pbias_mmc_omap2430          ˆpbias_mmc_omap2430          — w@        ¯ -ÆÀ         Ù   ê         clocks                       +       clock@68          
    ti,clksel            ‘   h        Ç                        +       clock-mcbsp5-mux-fck@4           ‘           Ç              ti,composite-mux-clock          Ômcbsp5_mux_fck           •               Ù   	      clock-mcbsp3-mux-fck@0           ‘            Ç              ti,composite-mux-clock          Ômcbsp3_mux_fck           •               Ù         clock-mcbsp4-mux-fck@2           ‘           Ç              ti,composite-mux-clock          Ômcbsp4_mux_fck           •               Ù            mcbsp5_fck          Ç              ti,composite-clock           •      	         Ù   ò      clock@4       
    ti,clksel            ‘           Ç                        +       clock-mcbsp1-mux-fck@2           ‘           Ç              ti,composite-mux-clock          Ômcbsp1_mux_fck           •               Ù         clock-mcbsp2-mux-fck@6           ‘           Ç              ti,composite-mux-clock          Ômcbsp2_mux_fck           •               Ù            mcbsp1_fck          Ç              ti,composite-clock           •   
            Ù   í      mcbsp2_fck          Ç              ti,composite-clock           •               Ù   ï      mcbsp3_fck          Ç              ti,composite-clock           •               Ù   ð      mcbsp4_fck          Ç              ti,composite-clock           •               Ù   ñ            clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single          ‘  
    \                     +             ý                               2           P  ÿ   twl4030-vpins-pins           m                                    Ù   å               target-module@480a6000            ti,sysc-omap2 ti,sysc            ‘H
`D   H
`H   H
`L           çrev sysc syss           ñ           þ                              •            œick                      +            ö    H
`        aes1@0            ti,omap3-aes             ‘       P         á                  	      
        tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            ‘HPD   HPH   HPL           çrev sysc syss           ñ           þ                              •            œick                      +            ö    HP        aes2@0            ti,omap3-aes             ‘       P         á                  A      B        tx rx            prm@48306000              ti,omap3-prm             ‘H0`   @          á      clocks                       +       virt_16_8m_ck           Ç              fixed-clock         ( Y          Ù         osc_sys_ck@d40          Ç              ti,mux-clock             •                           ‘  @         Ù         sys_ck@1270         Ç              ti,divider-clock             •           8           E            ‘  p         P         Ù          sys_clkout1@d70         Ç              ti,gate-clock            •            ‘  p        8         dpll3_x2_ck         Ç              fixed-factor-clock           •           g           r         dpll3_m2x2_ck           Ç              fixed-factor-clock           •           g           r            Ù         dpll4_x2_ck         Ç              fixed-factor-clock           •           g           r         corex2_fck          Ç              fixed-factor-clock           •           g           r            Ù   !      wkup_l4_ick         Ç              fixed-factor-clock           •            g           r            Ù   `      corex2_d3_fck           Ç              fixed-factor-clock           •   !        g           r            Ù   ˆ      corex2_d5_fck           Ç              fixed-factor-clock           •   !        g           r            Ù   ‰         clockdomains             cm@48004000           ti,omap3-cm          ‘H @   @    clocks                       +       dummy_apb_pclk          Ç              fixed-clock         (          omap_32k_fck            Ç              fixed-clock         (  €          Ù   F      virt_12m_ck         Ç              fixed-clock         ( ·          Ù         virt_13m_ck         Ç              fixed-clock         ( Æ]@         Ù         virt_19200000_ck            Ç              fixed-clock         ($ø          Ù         virt_26000000_ck            Ç              fixed-clock         (Œº€         Ù         virt_38_4m_ck           Ç              fixed-clock         (Ið          Ù         dpll4_ck@d00            Ç              ti,omap3-dpll-per-clock          •                 ‘        D  0         Ù         dpll4_m2_ck@d48         Ç              ti,divider-clock             •           E   ?         ‘  H         P         Ù   "      dpll4_m2x2_mul_ck           Ç              fixed-factor-clock           •   "        g           r            Ù   #      dpll4_m2x2_ck@d00           Ç              ti,gate-clock            •   #        8            ‘            |         Ù   $      omap_96m_alwon_fck          Ç              fixed-factor-clock           •   $        g           r            Ù   0      dpll3_ck@d00            Ç              ti,omap3-dpll-core-clock             •                 ‘        @  0         Ù         clock@1140        
    ti,clksel            ‘  @        Ç                        +       clock-dpll3-m3@16            ‘           Ç              ti,divider-clock            Ôdpll3_m3_ck          •           E            P         Ù   *      clock-dpll4-m6@24            ‘           Ç              ti,divider-clock            Ôdpll4_m6_ck          •           E   ?         P         Ù   <      clock-emu-src-mux@0          ‘            Ç              ti,mux-clock            Ôemu_src_mux_ck           •       %   &   '         Ù   t      clock-pclk-fck@8             ‘           Ç              ti,divider-clock          	  Ôpclk_fck             •   (        E            P      clock-pclkx2-fck@6           ‘           Ç              ti,divider-clock            Ôpclkx2_fck           •   (        E            P      clock-atclk-fck@4            ‘           Ç              ti,divider-clock          
  Ôatclk_fck            •   (        E            P      clock-traceclk-src-fck@2             ‘           Ç              ti,mux-clock            Ôtraceclk_src_fck             •       %   &   '         Ù   )      clock-traceclk-fck@11            ‘           Ç              ti,divider-clock            Ôtraceclk_fck             •   )        E            P         dpll3_m3x2_mul_ck           Ç              fixed-factor-clock           •   *        g           r            Ù   +      dpll3_m3x2_ck@d00           Ç              ti,gate-clock            •   +        8            ‘            |         Ù   ,      emu_core_alwon_ck           Ç              fixed-factor-clock           •   ,        g           r            Ù   %      sys_altclk          Ç              fixed-clock         (             Ù   3      mcbsp_clks          Ç              fixed-clock         (             Ù         core_ck         Ç              fixed-factor-clock           •           g           r            Ù   -      dpll1_fck@940           Ç              ti,divider-clock             •   -        8           E            ‘  	@         P         Ù   .      dpll1_ck@904            Ç              ti,omap3-dpll-clock          •       .         ‘  	  	$  	@  	4         Ù         dpll1_x2_ck         Ç              fixed-factor-clock           •           g           r            Ù   /      dpll1_x2m2_ck@944           Ç              ti,divider-clock             •   /        E            ‘  	D         P         Ù   C      cm_96m_fck          Ç              fixed-factor-clock           •   0        g           r            Ù   1      clock@d40         
    ti,clksel            ‘  @        Ç                        +       clock-dpll3-m2@27            ‘           Ç              ti,divider-clock            Ôdpll3_m2_ck          •           E            P         Ù         clock-omap-96m-fck@6             ‘           Ç              ti,mux-clock            Ôomap_96m_fck             •   1             Ù   W      clock-omap-54m-fck@5             ‘           Ç              ti,mux-clock            Ôomap_54m_fck             •   2   3         Ù   ?      clock-omap-48m-fck@3             ‘           Ç              ti,mux-clock            Ôomap_48m_fck             •   4   3         Ù   7         clock@e40         
    ti,clksel            ‘  @        Ç                        +       clock-dpll4-m3@8             ‘           Ç              ti,divider-clock            Ôdpll4_m3_ck          •           E             P         Ù   5      clock-dpll4-m4@0             ‘            Ç              ti,divider-clock            Ôdpll4_m4_ck          •           E            P         Ù   8         dpll4_m3x2_mul_ck           Ç              fixed-factor-clock           •   5        g           r            Ù   6      dpll4_m3x2_ck@d00           Ç              ti,gate-clock            •   6        8            ‘            |         Ù   2      cm_96m_d2_fck           Ç              fixed-factor-clock           •   1        g           r            Ù   4      omap_12m_fck            Ç              fixed-factor-clock           •   7        g           r            Ù   X      dpll4_m4x2_mul_ck           Ç              ti,fixed-factor-clock            •   8        ’                        ­         Ù   9      dpll4_m4x2_ck@d00           Ç              ti,gate-clock            •   9        8            ‘            |         ­         Ù   \      dpll4_m5_ck@f40         Ç              ti,divider-clock             •           E   ?         ‘  @         P         Ù   :      dpll4_m5x2_mul_ck           Ç              ti,fixed-factor-clock            •   :        ’                        ­         Ù   ;      dpll4_m5x2_ck@d00           Ç              ti,gate-clock            •   ;        8            ‘            |         ­         Ù   x      dpll4_m6x2_mul_ck           Ç              fixed-factor-clock           •   <        g           r            Ù   =      dpll4_m6x2_ck@d00           Ç              ti,gate-clock            •   =        8            ‘            |         Ù   >      emu_per_alwon_ck            Ç              fixed-factor-clock           •   >        g           r            Ù   &      clock@d70         
    ti,clksel            ‘  p        Ç                        +       clock-clkout2-src-gate@7             ‘           Ç               ti,composite-no-wait-gate-clock         Ôclkout2_src_gate_ck          •   -         Ù   A      clock-clkout2-src-mux@0          ‘            Ç              ti,composite-mux-clock          Ôclkout2_src_mux_ck           •   -       1   ?         Ù   B      clock-sys-clkout2@3          ‘           Ç              ti,divider-clock            Ôsys_clkout2          •   @        E   @         À         clkout2_src_ck          Ç              ti,composite-clock           •   A   B         Ù   @      mpu_ck          Ç              fixed-factor-clock           •   C        g           r            Ù   D      arm_fck@924         Ç              ti,divider-clock             •   D         ‘  	$        E         emu_mpu_alwon_ck            Ç              fixed-factor-clock           •   D        g           r            Ù   '      clock@a40         
    ti,clksel            ‘  
@        Ç                        +       clock-l3-ick@0           ‘            Ç              ti,divider-clock            Ôl3_ick           •   -        E            P         Ù   E      clock-l4-ick@2           ‘           Ç              ti,divider-clock            Ôl4_ick           •   E        E            P         Ù   G      clock-gpt10-mux-fck@6            ‘           Ç              ti,composite-mux-clock          Ôgpt10_mux_fck            •   F             Ù   T      clock-gpt11-mux-fck@7            ‘           Ç              ti,composite-mux-clock          Ôgpt11_mux_fck            •   F             Ù   V      clock-ssi-ssr-div-fck-3430es2@8          ‘           Ç              ti,composite-divider-clock          Ôssi_ssr_div_fck_3430es2          •   !      $  Ö                                       Ù   }         clock@c40         
    ti,clksel            ‘  @        Ç                        +       clock-rm-ick@1           ‘           Ç              ti,divider-clock            Ôrm_ick           •   G        E            P      clock-gpt1-mux-fck@0             ‘            Ç              ti,composite-mux-clock          Ôgpt1_mux_fck             •   F             Ù   _      clock-usim-mux-fck@3             ‘           Ç              ti,composite-mux-clock          Ôusim_mux_fck          (   •       H   I   J   K   L   M   N   O   P         P         Ù   �         clock@a00         
    ti,clksel            ‘  
         Ç                        +       clock-gpt10-gate-fck@11          ‘           Ç              ti,composite-gate-clock         Ôgpt10_gate_fck           •             Ù   S      clock-gpt11-gate-fck@12          ‘           Ç              ti,composite-gate-clock         Ôgpt11_gate_fck           •             Ù   U      clock-mmchs2-fck@25          ‘           Ç              ti,wait-gate-clock          Ômmchs2_fck           •            Ù   ¶      clock-mmchs1-fck@24          ‘           Ç              ti,wait-gate-clock          Ômmchs1_fck           •            Ù   ·      clock-i2c3-fck@17            ‘           Ç              ti,wait-gate-clock        	  Ôi2c3_fck             •            Ù   ¸      clock-i2c2-fck@16            ‘           Ç              ti,wait-gate-clock        	  Ôi2c2_fck             •            Ù   ¹      clock-i2c1-fck@15            ‘           Ç              ti,wait-gate-clock        	  Ôi2c1_fck             •            Ù   º      clock-mcbsp5-gate-fck@10             ‘   
        Ç              ti,composite-gate-clock         Ômcbsp5_gate_fck          •            Ù         clock-mcbsp1-gate-fck@9          ‘   	        Ç              ti,composite-gate-clock         Ômcbsp1_gate_fck          •            Ù   
      clock-mcspi4-fck@21          ‘           Ç              ti,wait-gate-clock          Ômcspi4_fck           •   Q         Ù   »      clock-mcspi3-fck@20          ‘           Ç              ti,wait-gate-clock          Ômcspi3_fck           •   Q         Ù   ¼      clock-mcspi2-fck@19          ‘           Ç              ti,wait-gate-clock          Ômcspi2_fck           •   Q         Ù   ½      clock-mcspi1-fck@18          ‘           Ç              ti,wait-gate-clock          Ômcspi1_fck           •   Q         Ù   ¾      clock-uart2-fck@14           ‘           Ç              ti,wait-gate-clock        
  Ôuart2_fck            •   Q         Ù   ¿      clock-uart1-fck@13           ‘           Ç              ti,wait-gate-clock        
  Ôuart1_fck            •   Q         Ù   À      clock-hdq-fck@22             ‘           Ç              ti,wait-gate-clock          Ôhdq_fck          •   R         Ù   Á      clock-modem-fck@31           ‘           Ç              ti,omap3-interface-clock          
  Ômodem_fck            •             Ù   Ý      clock-mspro-fck@23           ‘           Ç              ti,wait-gate-clock        
  Ômspro_fck            •         clock-ssi-ssr-gate-fck-3430es2@0             ‘            Ç               ti,composite-no-wait-gate-clock         Ôssi_ssr_gate_fck_3430es2             •   !         Ù   |      clock-mmchs3-fck@30          ‘           Ç              ti,wait-gate-clock          Ômmchs3_fck           •            Ù   Ù         gpt10_fck           Ç              ti,composite-clock           •   S   T      gpt11_fck           Ç              ti,composite-clock           •   U   V      core_96m_fck            Ç              fixed-factor-clock           •   W        g           r            Ù         core_48m_fck            Ç              fixed-factor-clock           •   7        g           r            Ù   Q      core_12m_fck            Ç              fixed-factor-clock           •   X        g           r            Ù   R      core_l3_ick         Ç              fixed-factor-clock           •   E        g           r            Ù   Y      clock@a10         
    ti,clksel            ‘  
        Ç                        +       clock-sdrc-ick@1             ‘           Ç              ti,wait-gate-clock        	  Ôsdrc_ick             •   Y         Ù   Œ      clock-mmchs2-ick@25          ‘           Ç              ti,omap3-interface-clock            Ômmchs2_ick           •   Z         Ù   Â      clock-mmchs1-ick@24          ‘           Ç              ti,omap3-interface-clock            Ômmchs1_ick           •   Z         Ù   Ã      clock-hdq-ick@22             ‘           Ç              ti,omap3-interface-clock            Ôhdq_ick          •   Z         Ù   Ä      clock-mcspi4-ick@21          ‘           Ç              ti,omap3-interface-clock            Ômcspi4_ick           •   Z         Ù   Å      clock-mcspi3-ick@20          ‘           Ç              ti,omap3-interface-clock            Ômcspi3_ick           •   Z         Ù   Æ      clock-mcspi2-ick@19          ‘           Ç              ti,omap3-interface-clock            Ômcspi2_ick           •   Z         Ù   Ç      clock-mcspi1-ick@18          ‘           Ç              ti,omap3-interface-clock            Ômcspi1_ick           •   Z         Ù   È      clock-i2c3-ick@17            ‘           Ç              ti,omap3-interface-clock          	  Ôi2c3_ick             •   Z         Ù   É      clock-i2c2-ick@16            ‘           Ç              ti,omap3-interface-clock          	  Ôi2c2_ick             •   Z         Ù   Ê      clock-i2c1-ick@15            ‘           Ç              ti,omap3-interface-clock          	  Ôi2c1_ick             •   Z         Ù   Ë      clock-uart2-ick@14           ‘           Ç              ti,omap3-interface-clock          
  Ôuart2_ick            •   Z         Ù   Ì      clock-uart1-ick@13           ‘           Ç              ti,omap3-interface-clock          
  Ôuart1_ick            •   Z         Ù   Í      clock-gpt11-ick@12           ‘           Ç              ti,omap3-interface-clock          
  Ôgpt11_ick            •   Z         Ù   Î      clock-gpt10-ick@11           ‘           Ç              ti,omap3-interface-clock          
  Ôgpt10_ick            •   Z         Ù   Ï      clock-mcbsp5-ick@10          ‘   
        Ç              ti,omap3-interface-clock            Ômcbsp5_ick           •   Z         Ù   Ð      clock-mcbsp1-ick@9           ‘   	        Ç              ti,omap3-interface-clock            Ômcbsp1_ick           •   Z         Ù   Ñ      clock-omapctrl-ick@6             ‘           Ç              ti,omap3-interface-clock            Ôomapctrl_ick             •   Z         Ù   Ò      clock-aes2-ick@28            ‘           Ç              ti,omap3-interface-clock          	  Ôaes2_ick             •   Z         Ù         clock-sha12-ick@27           ‘           Ç              ti,omap3-interface-clock          
  Ôsha12_ick            •   Z         Ù   Ó      clock-icr-ick@29             ‘           Ç              ti,omap3-interface-clock            Ôicr_ick          •   Z      clock-des2-ick@26            ‘           Ç              ti,omap3-interface-clock          	  Ôdes2_ick             •   Z      clock-mspro-ick@23           ‘           Ç              ti,omap3-interface-clock          
  Ômspro_ick            •   Z      clock-mailboxes-ick@7            ‘           Ç              ti,omap3-interface-clock            Ômailboxes_ick            •   Z      clock-sad2d-ick@3            ‘           Ç              ti,omap3-interface-clock          
  Ôsad2d_ick            •   E         Ù   Þ      clock-hsotgusb-ick-3430es2@4             ‘           Ç          "    ti,omap3-hsotgusb-interface-clock           Ôhsotgusb_ick_3430es2             •   Y         Ù   �      clock-ssi-ick-3430es2@0          ‘            Ç              ti,omap3-ssi-interface-clock            Ôssi_ick_3430es2          •   [         Ù   þ      clock-mmchs3-ick@30          ‘           Ç              ti,omap3-interface-clock            Ômmchs3_ick           •   Z         Ù   Ø         gpmc_fck            Ç              fixed-factor-clock           •   Y        g           r         core_l4_ick         Ç              fixed-factor-clock           •   G        g           r            Ù   Z      clock@e00         
    ti,clksel            ‘           Ç                        +       clock-dss-tv-fck            Ç              ti,gate-clock           Ôdss_tv_fck           •   ?        8            Ù   ±      clock-dss-96m-fck           Ç              ti,gate-clock           Ôdss_96m_fck          •   W        8            Ù   ²      clock-dss2-alwon-fck            Ç              ti,gate-clock           Ôdss2_alwon_fck           •            8            Ù   ³      clock-dss1-alwon-fck-3430es2@0           ‘            Ç              ti,dss-gate-clock           Ôdss1_alwon_fck_3430es2           •   \         ­         Ù   ´         dummy_ck            Ç              fixed-clock         (          clock@c00         
    ti,clksel            ‘           Ç                        +       clock-gpt1-gate-fck@0            ‘            Ç              ti,composite-gate-clock         Ôgpt1_gate_fck            •             Ù   ^      clock-gpio1-dbck@3           ‘           Ç              ti,gate-clock           Ôgpio1_dbck           •   ]         Ù   ¨      clock-wdt2-fck@5             ‘           Ç              ti,wait-gate-clock        	  Ôwdt2_fck             •   ]         Ù   ©      clock-sr1-fck@6          ‘           Ç              ti,wait-gate-clock          Ôsr1_fck          •             Ù        clock-sr2-fck@7          ‘           Ç              ti,wait-gate-clock          Ôsr2_fck          •             Ù         clock-usim-gate-fck@9            ‘   	        Ç              ti,composite-gate-clock         Ôusim_gate_fck            •   W         Ù   €         gpt1_fck            Ç              ti,composite-clock           •   ^   _         Ù   ó      wkup_32k_fck            Ç              fixed-factor-clock           •   F        g           r            Ù   ]      clock@c10         
    ti,clksel            ‘          Ç                        +       clock-wdt2-ick@5             ‘           Ç              ti,omap3-interface-clock          	  Ôwdt2_ick             •   `         Ù   ª      clock-wdt1-ick@4             ‘           Ç              ti,omap3-interface-clock          	  Ôwdt1_ick             •   `         Ù   «      clock-gpio1-ick@3            ‘           Ç              ti,omap3-interface-clock          
  Ôgpio1_ick            •   `         Ù   ¬      clock-omap-32ksync-ick@2             ‘           Ç              ti,omap3-interface-clock            Ôomap_32ksync_ick             •   `         Ù   ­      clock-gpt12-ick@1            ‘           Ç              ti,omap3-interface-clock          
  Ôgpt12_ick            •   `         Ù   ®      clock-gpt1-ick@0             ‘            Ç              ti,omap3-interface-clock          	  Ôgpt1_ick             •   `         Ù   ¯      clock-usim-ick@9             ‘   	        Ç              ti,omap3-interface-clock          	  Ôusim_ick             •   `         Ù   °         per_96m_fck         Ç              fixed-factor-clock           •   0        g           r            Ù         per_48m_fck         Ç              fixed-factor-clock           •   7        g           r            Ù   a      clock@1000        
    ti,clksel            ‘           Ç                        +       clock-uart3-fck@11           ‘           Ç              ti,wait-gate-clock        
  Ôuart3_fck            •   a         Ù   Ž      clock-gpt2-gate-fck@3            ‘           Ç              ti,composite-gate-clock         Ôgpt2_gate_fck            •             Ù   c      clock-gpt3-gate-fck@4            ‘           Ç              ti,composite-gate-clock         Ôgpt3_gate_fck            •             Ù   e      clock-gpt4-gate-fck@5            ‘           Ç              ti,composite-gate-clock         Ôgpt4_gate_fck            •             Ù   g      clock-gpt5-gate-fck@6            ‘           Ç              ti,composite-gate-clock         Ôgpt5_gate_fck            •             Ù   i      clock-gpt6-gate-fck@7            ‘           Ç              ti,composite-gate-clock         Ôgpt6_gate_fck            •             Ù   k      clock-gpt7-gate-fck@8            ‘           Ç              ti,composite-gate-clock         Ôgpt7_gate_fck            •             Ù   m      clock-gpt8-gate-fck@9            ‘   	        Ç              ti,composite-gate-clock         Ôgpt8_gate_fck            •             Ù   o      clock-gpt9-gate-fck@10           ‘   
        Ç              ti,composite-gate-clock         Ôgpt9_gate_fck            •             Ù   q      clock-gpio6-dbck@17          ‘           Ç              ti,gate-clock           Ôgpio6_dbck           •   b         Ù   �      clock-gpio5-dbck@16          ‘           Ç              ti,gate-clock           Ôgpio5_dbck           •   b         Ù   �      clock-gpio4-dbck@15          ‘           Ç              ti,gate-clock           Ôgpio4_dbck           •   b         Ù   ‘      clock-gpio3-dbck@14          ‘           Ç              ti,gate-clock           Ôgpio3_dbck           •   b         Ù   ’      clock-gpio2-dbck@13          ‘           Ç              ti,gate-clock           Ôgpio2_dbck           •   b         Ù   “      clock-wdt3-fck@12            ‘           Ç              ti,wait-gate-clock        	  Ôwdt3_fck             •   b         Ù   ”      clock-mcbsp2-gate-fck@0          ‘            Ç              ti,composite-gate-clock         Ômcbsp2_gate_fck          •            Ù         clock-mcbsp3-gate-fck@1          ‘           Ç              ti,composite-gate-clock         Ômcbsp3_gate_fck          •            Ù         clock-mcbsp4-gate-fck@2          ‘           Ç              ti,composite-gate-clock         Ômcbsp4_gate_fck          •            Ù            clock@1040        
    ti,clksel            ‘  @        Ç                        +       clock-gpt2-mux-fck@0             ‘            Ç              ti,composite-mux-clock          Ôgpt2_mux_fck             •   F             Ù   d      clock-gpt3-mux-fck@1             ‘           Ç              ti,composite-mux-clock          Ôgpt3_mux_fck             •   F             Ù   f      clock-gpt4-mux-fck@2             ‘           Ç              ti,composite-mux-clock          Ôgpt4_mux_fck             •   F             Ù   h      clock-gpt5-mux-fck@3             ‘           Ç              ti,composite-mux-clock          Ôgpt5_mux_fck             •   F             Ù   j      clock-gpt6-mux-fck@4             ‘           Ç              ti,composite-mux-clock          Ôgpt6_mux_fck             •   F             Ù   l      clock-gpt7-mux-fck@5             ‘           Ç              ti,composite-mux-clock          Ôgpt7_mux_fck             •   F             Ù   n      clock-gpt8-mux-fck@6             ‘           Ç              ti,composite-mux-clock          Ôgpt8_mux_fck             •   F             Ù   p      clock-gpt9-mux-fck@7             ‘           Ç              ti,composite-mux-clock          Ôgpt9_mux_fck             •   F             Ù   r         gpt2_fck            Ç              ti,composite-clock           •   c   d         Ù   ô      gpt3_fck            Ç              ti,composite-clock           •   e   f      gpt4_fck            Ç              ti,composite-clock           •   g   h      gpt5_fck            Ç              ti,composite-clock           •   i   j      gpt6_fck            Ç              ti,composite-clock           •   k   l      gpt7_fck            Ç              ti,composite-clock           •   m   n      gpt8_fck            Ç              ti,composite-clock           •   o   p      gpt9_fck            Ç              ti,composite-clock           •   q   r      per_32k_alwon_fck           Ç              fixed-factor-clock           •   F        g           r            Ù   b      per_l4_ick          Ç              fixed-factor-clock           •   G        g           r            Ù   s      clock@1010        
    ti,clksel            ‘          Ç                        +       clock-gpio6-ick@17           ‘           Ç              ti,omap3-interface-clock          
  Ôgpio6_ick            •   s         Ù   •      clock-gpio5-ick@16           ‘           Ç              ti,omap3-interface-clock          
  Ôgpio5_ick            •   s         Ù   –      clock-gpio4-ick@15           ‘           Ç              ti,omap3-interface-clock          
  Ôgpio4_ick            •   s         Ù   —      clock-gpio3-ick@14           ‘           Ç              ti,omap3-interface-clock          
  Ôgpio3_ick            •   s         Ù   ˜      clock-gpio2-ick@13           ‘           Ç              ti,omap3-interface-clock          
  Ôgpio2_ick            •   s         Ù   ™      clock-wdt3-ick@12            ‘           Ç              ti,omap3-interface-clock          	  Ôwdt3_ick             •   s         Ù   š      clock-uart3-ick@11           ‘           Ç              ti,omap3-interface-clock          
  Ôuart3_ick            •   s         Ù   ›      clock-uart4-ick@18           ‘           Ç              ti,omap3-interface-clock          
  Ôuart4_ick            •   s         Ù   œ      clock-gpt9-ick@10            ‘   
        Ç              ti,omap3-interface-clock          	  Ôgpt9_ick             •   s         Ù   �      clock-gpt8-ick@9             ‘   	        Ç              ti,omap3-interface-clock          	  Ôgpt8_ick             •   s         Ù   ž      clock-gpt7-ick@8             ‘           Ç              ti,omap3-interface-clock          	  Ôgpt7_ick             •   s         Ù   Ÿ      clock-gpt6-ick@7             ‘           Ç              ti,omap3-interface-clock          	  Ôgpt6_ick             •   s         Ù          clock-gpt5-ick@6             ‘           Ç              ti,omap3-interface-clock          	  Ôgpt5_ick             •   s         Ù   ¡      clock-gpt4-ick@5             ‘           Ç              ti,omap3-interface-clock          	  Ôgpt4_ick             •   s         Ù   ¢      clock-gpt3-ick@4             ‘           Ç              ti,omap3-interface-clock          	  Ôgpt3_ick             •   s         Ù   £      clock-gpt2-ick@3             ‘           Ç              ti,omap3-interface-clock          	  Ôgpt2_ick             •   s         Ù   ¤      clock-mcbsp2-ick@0           ‘            Ç              ti,omap3-interface-clock            Ômcbsp2_ick           •   s         Ù   ¥      clock-mcbsp3-ick@1           ‘           Ç              ti,omap3-interface-clock            Ômcbsp3_ick           •   s         Ù   ¦      clock-mcbsp4-ick@2           ‘           Ç              ti,omap3-interface-clock            Ômcbsp4_ick           •   s         Ù   §         emu_src_ck          Ç              ti,clkdm-gate-clock          •   t         Ù   (      secure_32k_fck          Ç              fixed-clock         (  €          Ù   u      gpt12_fck           Ç              fixed-factor-clock           •   u        g           r            Ù   õ      wdt1_fck            Ç              fixed-factor-clock           •   u        g           r         security_l4_ick2            Ç              fixed-factor-clock           •   G        g           r            Ù   v      clock@a14         
    ti,clksel            ‘  
        Ç                        +       clock-aes1-ick@3             ‘           Ç              ti,omap3-interface-clock          	  Ôaes1_ick             •   v         Ù         clock-rng-ick@2          ‘           Ç              ti,omap3-interface-clock            Ôrng_ick          •   v         Ù   î      clock-sha11-ick@1            ‘           Ç              ti,omap3-interface-clock          
  Ôsha11_ick            •   v      clock-des1-ick@0             ‘            Ç              ti,omap3-interface-clock          	  Ôdes1_ick             •   v      clock-pka-ick@4          ‘           Ç              ti,omap3-interface-clock            Ôpka_ick          •   w         clock@f00         
    ti,clksel            ‘           Ç                        +       clock-cam-mclk@0             ‘            Ç              ti,gate-clock         	  Ôcam_mclk             •   x         ­      clock-csi2-96m-fck@1             ‘           Ç              ti,gate-clock           Ôcsi2_96m_fck             •            Ù   Û         cam_ick@f10         Ç          !    ti,omap3-no-wait-interface-clock             •   G         ‘          8             Ù   Ú      security_l3_ick         Ç              fixed-factor-clock           •   E        g           r            Ù   w      ssi_l4_ick          Ç              fixed-factor-clock           •   G        g           r            Ù   [      sr_l4_ick           Ç              fixed-factor-clock           •   G        g           r         dpll2_fck@40            Ç              ti,divider-clock             •   -        8           E            ‘   @         P         Ù   y      dpll2_ck@4          Ç              ti,omap3-dpll-clock          •       y         ‘      $   @   4         â         ô         ü         Ù   z      dpll2_m2_ck@44          Ç              ti,divider-clock             •   z        E            ‘   D         P         Ù   {      iva2_ck@0           Ç              ti,wait-gate-clock           •   {         ‘            8             Ù   Ü      clock@a18         
    ti,clksel            ‘  
        Ç                                    +       clock-mad2d-ick@3            ‘           Ç              ti,omap3-interface-clock          
  Ômad2d_ick            •   E         Ù   ß      clock-usbtll-ick@2           ‘           Ç              ti,omap3-interface-clock            Ôusbtll_ick           •   Z         Ù   ×         ssi_ssr_fck_3430es2         Ç              ti,composite-clock           •   |   }         Ù   ~      ssi_sst_fck_3430es2         Ç              fixed-factor-clock           •   ~        g           r            Ù   ý      sys_d2_ck           Ç              fixed-factor-clock           •            g           r            Ù   H      omap_96m_d2_fck         Ç              fixed-factor-clock           •   W        g           r            Ù   I      omap_96m_d4_fck         Ç              fixed-factor-clock           •   W        g           r            Ù   J      omap_96m_d8_fck         Ç              fixed-factor-clock           •   W        g           r            Ù   K      omap_96m_d10_fck            Ç              fixed-factor-clock           •   W        g           r   
         Ù   L      dpll5_m2_d4_ck          Ç              fixed-factor-clock           •           g           r            Ù   M      dpll5_m2_d8_ck          Ç              fixed-factor-clock           •           g           r            Ù   N      dpll5_m2_d16_ck         Ç              fixed-factor-clock           •           g           r            Ù   O      dpll5_m2_d20_ck         Ç              fixed-factor-clock           •           g           r            Ù   P      usim_fck            Ç              ti,composite-clock           •   €   �      dpll5_ck@d04            Ç              ti,omap3-dpll-clock          •                 ‘    $  L  4         â         ô         Ù   ‚      dpll5_m2_ck@d50         Ç              ti,divider-clock             •   ‚        E            ‘  P         P         Ù         sgx_gate_fck@b00            Ç              ti,composite-gate-clock          •   -        8            ‘            Ù   Š      core_d3_ck          Ç              fixed-factor-clock           •   -        g           r            Ù   ƒ      core_d4_ck          Ç              fixed-factor-clock           •   -        g           r            Ù   „      core_d6_ck          Ç              fixed-factor-clock           •   -        g           r            Ù   …      omap_192m_alwon_fck         Ç              fixed-factor-clock           •   $        g           r            Ù   †      core_d2_ck          Ç              fixed-factor-clock           •   -        g           r            Ù   ‡      sgx_mux_fck@b40         Ç              ti,composite-mux-clock            •   ƒ   „   …   1   †   ‡   ˆ   ‰         ‘  @         Ù   ‹      sgx_fck         Ç              ti,composite-clock           •   Š   ‹         Ù        sgx_ick@b10         Ç              ti,wait-gate-clock           •   E         ‘          8             Ù   à      cpefuse_fck@a08         Ç              ti,gate-clock            •             ‘  
        8             Ù   Ô      ts_fck@a08          Ç              ti,gate-clock            •   F         ‘  
        8            Ù   Õ      usbtll_fck@a08          Ç              ti,wait-gate-clock           •            ‘  
        8            Ù   Ö      dss_ick_3430es2@e10         Ç              ti,omap3-dss-interface-clock             •   G         ‘          8             Ù   µ      usbhost_120m_fck@1400           Ç              ti,gate-clock            •            ‘           8            Ù   á      usbhost_48m_fck@1400            Ç              ti,dss-gate-clock            •   7         ‘           8             Ù   â      usbhost_ick@1410            Ç              ti,omap3-dss-interface-clock             •   G         ‘          8             Ù   ã         clockdomains       core_l3_clkdm             ti,clockdomain           •   Œ   �      dpll3_clkdm           ti,clockdomain           •         dpll1_clkdm           ti,clockdomain           •         per_clkdm             ti,clockdomain        h   •   Ž   �   �   ‘   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §      emu_clkdm             ti,clockdomain           •   (      dpll4_clkdm           ti,clockdomain           •         wkup_clkdm            ti,clockdomain        $   •   ¨   ©   ª   «   ¬   ­   ®   ¯   °      dss_clkdm             ti,clockdomain           •   ±   ²   ³   ´   µ      core_l4_clkdm             ti,clockdomain        ”   •   ¶   ·   ¸   ¹   º   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò      Ó   Ô   Õ   Ö   ×   Ø   Ù      cam_clkdm             ti,clockdomain           •   Ú   Û      iva2_clkdm            ti,clockdomain           •   Ü      dpll2_clkdm           ti,clockdomain           •   z      d2d_clkdm             ti,clockdomain           •   Ý   Þ   ß      dpll5_clkdm           ti,clockdomain           •   ‚      sgx_clkdm             ti,clockdomain           •   à      usbhost_clkdm             ti,clockdomain           •   á   â   ã            target-module@48320000            ti,sysc-omap2 ti,sysc            ‘H2     H2          	  çrev sysc            þ                •   ]   ­         œfck ick                      +            ö    H2        counter@0             ti,omap-counter32k           ‘                 interrupt-controller@48200000             ti,omap3-intc                                ‘H               Ù         target-module@48056000            ti,sysc-omap2 ti,sysc            ‘H`    H`,   H`(           çrev sysc syss           ñ  #                          þ                              •   Y         œick                      +            ö    H`       dma-controller@0              ti,omap3430-sdma ti,omap-sdma            ‘                á                    +           6            C   `         Ù            gpio@48310000             ti,omap3-gpio            ‘H1              á            ìgpio1            P         b        r                                Ù   ÷      gpio@49050000             ti,omap3-gpio            ‘I              á            ìgpio2            b        r                             gpio@49052000             ti,omap3-gpio            ‘I              á            ìgpio3            b        r                             gpio@49054000             ti,omap3-gpio            ‘I@             á             ìgpio4            b        r                             gpio@49056000             ti,omap3-gpio            ‘I`             á   !         ìgpio5            b        r                             gpio@49058000             ti,omap3-gpio            ‘I€             á   "         ìgpio6            b        r                                Ù        serial@4806a000           ti,omap3-uart            ‘H              ~      H              1      2        tx rx            ìuart1           (Ül       serial@4806c000           ti,omap3-uart            ‘HÀ            ~      I              3      4        tx rx            ìuart2           (Ül       serial@49020000           ti,omap3-uart            ‘I             ~      J              5      6        tx rx            ìuart3           (Ül       i2c@48070000              ti,omap3-i2c             ‘H     €         á   8                     +             ìi2c1            ( '¬@   twl@48           ‘   H         á             ti,twl4030                              ’default             ä   å   audio             ti,twl4030-audio       codec            rtc           ti,twl4030-rtc           á         charger           ti,twl4030-bci           á   	           ª   æ        ¸   ç           Ävac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2          regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         — 	'À        ¯        regulator-vdac            ti,twl4030-vdac         — w@        ¯ w@         Ù   ú      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            — :�        ¯ 0°         Ù   ë      regulator-vmmc2           ti,twl4030-vmmc2            — :�        ¯ 0°      regulator-vusb1v5             ti,twl4030-vusb1v5           Ù   è      regulator-vusb1v8             ti,twl4030-vusb1v8           Ù   é      regulator-vusb3v1             ti,twl4030-vusb3v1           Ù   æ      regulator-vpll1           ti,twl4030-vpll1          	  ˆvdds_dsi            — w@        ¯ w@         Ù   ù      regulator-vpll2           ti,twl4030-vpll2            — w@        ¯ w@      regulator-vsim            ti,twl4030-vsim         — w@        ¯ -ÆÀ         Ù   ì      gpio              ti,twl4030-gpio          b        r                                Õ        á ¡Æ         Ù        twl4030-usb           ti,twl4030-usb           á   
           î   è        ü   é        
   æ                   !          pwm           ti,twl4030-pwm          ,         pwmled            ti,twl4030-pwmled           ,         pwrbutton             ti,twl4030-pwrbutton             á         keypad            ti,twl4030-keypad            á           7           G         D  Z            ?   	 
 @  A  B   s r      madc              ti,twl4030-madc          á           g            Ù   ç            i2c@48072000              ti,omap3-i2c             ‘H     €         á   9                     +             ìi2c2            ( €         Ù        i2c@48060000              ti,omap3-i2c             ‘H     €         á   =                     +             ìi2c3          	  ydisabled          mailbox@48094000              ti,omap3-mailbox             ìmailbox          ‘H	@             á           €           Œ           ž      mbox-dsp            °                    »                    spi@48098000              ti,omap2-mcspi           ‘H	€             á   A                     +             ìmcspi1          Æ         @        #      $      %      &      '      (      )      *         tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       spi@4809a000              ti,omap2-mcspi           ‘H	              á   B                     +             ìmcspi2          Æ                  +      ,      -      .        tx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           ‘H€             á   [                     +             ìmcspi3          Æ                                            tx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           ‘H              á   0                     +             ìmcspi4          Æ                 F      G        tx0 rx0       1w@480b2000           ti,omap3-1w          ‘H              á   :         ìhdq1w         mmc@4809c000              ti,omap3-hsmmc           ‘H	À             á   S         ìmmc1             Ô              =      >        tx rx           á   ê        î   ë        ú   ì                 mmc@480b4000              ti,omap3-hsmmc           ‘H@             á   V         ìmmc2                  /      0        tx rx         	  ydisabled          mmc@480ad000              ti,omap3-hsmmc           ‘H
Ð             á   ^         ìmmc3                  M      N        tx rx         	  ydisabled          mmu@480bd400                          ti,omap2-iommu           ‘HÔ    €         á            ìmmu_isp                     Ù   ÿ      mmu@5d000000                          ti,omap2-iommu           ‘]      €         á            ìmmu_iva       	  ydisabled          watchdog@48314000             ti,omap3-wdt             ‘H1@    €      
   ìwd_timer2         	  ydisabled          mcbsp@48074000            ti,omap3-mcbsp           ‘H@    ÿ        çmpu          á      ;   <        .common tx rx            >   €         ìmcbsp1                               tx rx            •   í         œfck       	  ydisabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            ‘H
 <   H
 @   H
 D           çrev sysc syss           ñ           þ                           •   î         œick                      +            ö    H
         rng@0             ti,omap2-rng             ‘                 á   4         mcbsp@49022000            ti,omap3-mcbsp           ‘I     ÿI€    ÿ        çmpu sidetone             á      >   ?           .common tx rx sidetone           >            ìmcbsp2 mcbsp2_sidetone                !      "        tx rx            •   ï   ¥         œfck ick         yokay             Ù        mcbsp@49024000            ti,omap3-mcbsp           ‘I@    ÿI     ÿ        çmpu sidetone             á      Y   Z           .common tx rx sidetone           >   €         ìmcbsp3 mcbsp3_sidetone                              tx rx            •   ð   ¦         œfck ick       	  ydisabled          mcbsp@49026000            ti,omap3-mcbsp           ‘I`    ÿ        çmpu          á      6   7        .common tx rx            >   €         ìmcbsp4                              tx rx            •   ñ         œfck         M          	  ydisabled          mcbsp@48096000            ti,omap3-mcbsp           ‘H	`    ÿ        çmpu          á      Q   R        .common tx rx            >   €         ìmcbsp5                              tx rx            •   ò         œfck       	  ydisabled          sham@480c3000             ti,omap3-sham            ìsham             ‘H0    d         á   1              E        rx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          ‘H1€    H1€   H1€           çrev sysc syss           ñ  '        þ                              •   ó   ¯         œfck ick                      +            ö    H1€       timer@0           ti,omap3430-timer            ‘       €         •   ó         œfck          á   %        ^   ó        n   F         target-module@49032000            ti,sysc-omap2-timer ti,sysc          ‘I     I    I            çrev sysc syss           ñ  '        þ                              •   ô   ¤         œfck ick                      +            ö    I        timer@0           ti,omap3430-timer            ‘                á   &         timer@49034000            ti,omap3430-timer            ‘I@             á   '         ìtimer3        timer@49036000            ti,omap3430-timer            ‘I`             á   (         ìtimer4        timer@49038000            ti,omap3430-timer            ‘I€             á   )         ìtimer5           …      timer@4903a000            ti,omap3430-timer            ‘I              á   *         ìtimer6           …      timer@4903c000            ti,omap3430-timer            ‘IÀ             á   +         ìtimer7           …      timer@4903e000            ti,omap3430-timer            ‘Ià             á   ,         ìtimer8           ’         …      timer@49040000            ti,omap3430-timer            ‘I              á   -         ìtimer9           ’      timer@48086000            ti,omap3430-timer            ‘H`             á   .         ìtimer10          ’      timer@48088000            ti,omap3430-timer            ‘H€             á   /         ìtimer11          ’      target-module@48304000            ti,sysc-omap2-timer ti,sysc          ‘H0@    H0@   H0@           çrev sysc syss           ñ  '        þ                              •   õ   ®         œfck ick                      +            ö    H0@             Ÿ         ³   timer@0           ti,omap3430-timer            ‘                á   _         ¾         Í         usbhstll@48062000             ti,usbhs-tll             ‘H              á   N         ìusb_tll_hs        usbhshost@48064000            ti,usbhs-host            ‘H@             ìusb_host_hs                      +             ö   usb@48064400              ti,ohci-omap3            ‘HD             á   L         Ý      usb@48064800              ti,ehci-omap             ‘HH             á   M         gpmc@6e000000             ti,omap3430-gpmc             ìgpmc             ‘n     Ð         á                         rxtx            õ                                   +                                b        r             ö        0             ,               Ù   ö   nand@0,0              ti,omap2-nand            ‘                       ö         á                                  "           4sw          D            U            c   ,        u   ,        ‡           –   "        ©   ,        ¼   (        Ë   6        Ú   @        é   R        ú   R           (                                 +      x-loader@0        	  5X-Loader             ‘             bootloaders@80000           5U-Boot           ‘            bootloaders_env@260000          5U-Boot Env           ‘ &           kernel@280000           5Kernel           ‘ (   @        filesystem@680000           5File System          ‘ h  ˜           ethernet@6,0              davicom,dm9000           ‘                           ;               ÷         á               F        X            "           j             x         ’        U           c   ´        u   ´        ‡            –           ©   0        ¬   6        Ë   ¨        º   6        ¼   ¨        é   º        ú   º        Ú   �        È           â   Z        ù   Z                    +                                     target-module@480ab000            ti,sysc-omap2 ti,sysc            ‘H
´    H
´   H
´           çrev sysc syss           ñ                             þ                              œfck                      +            ö    H
°             •   �   usb@0             ti,omap3-musb            ‘                á   \   ]        .mc dma          B           M           U            dss@48050000              ti,omap3-dss             ‘H             yokay          	   ìdss_core             •   ´         œfck                      +             ö        ’default             ø        ^   ù        n   ú   dispc@48050400            ti,omap3-dispc           ‘H             á         
   ìdss_dispc            •   ´         œfck       encoder@4804fc00              ti,omap3-dsi             ‘Hü    Hþ    @Hÿ             çproto phy pll            á         	  ydisabled          	   ìdss_dsi1             •   ´   ³         œfck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            ‘H          	  ydisabled          	   ìdss_rfbi             •   ´   µ         œfck ick       encoder@48050c00              ti,omap3-venc            ‘H            yokay          	   ìdss_venc             •   ±         œfck         ~   ú   port       endpoint            Š   û        š            Ù              port                         +       endpoint@0           ‘            Š   ü        ¦            Ù  	      endpoint@1           ‘               ssi-controller@48058000           ti,omap3-ssi             ìssi         yokay             ‘H€    H�            çsys gdd          á   G        .gdd_mpu                      +             ö         •   ~   ý   þ          œssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            ‘H     H¨            çtx rx            á   C   D      ssi-port@4805b000             ti,omap3-ssi-port            ‘H°    H¸            çtx rx            á   E   F         pinmux@480025d8            ti,omap3-padconf pinctrl-single          ‘H %Ø   $                     +             ý                               2           P  ÿ      isp@480bc000              ti,omap3-isp             ‘HÀ   üHØ   |         á           ±   ÿ        �      l        ¸            Ç      ports                        +             bandgap@48002524             ‘H %$             ti,omap34xx-bandgap         Ä             Ù        target-module@480cb000            ti,sysc-omap3430-sr ti,sysc          ìsmartreflex_core             ‘H°$           çsysc            ñ            •            œfck                      +            ö    H°       smartreflex@0             ti,omap3-smartreflex-core            ‘                á            target-module@480c9000            ti,sysc-omap3430-sr ti,sysc          ìsmartreflex_mpu_iva          ‘H�$           çsysc            ñ            •           œfck                      +            ö    H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva             ‘                á            target-module@50000000            ti,sysc-omap2 ti,sysc            ‘P             çrev          •     à         œfck ick                      +            ö    P         gpu@0         #    ti,omap3430-gpu img,powervr-sgx530           ‘                á               opp-table             operating-points-v2-ti-cpu          �            Ù      opp-125000000           Ú    sY@        á à˜ à˜ à˜        ïÿÿÿÿ         opp-250000000           Ú    æ²€        á g8 g8 g8        ïÿÿÿÿ            	       opp-500000000           Ú    Íe         á O€ O€ O€        ïÿÿÿÿ         opp-550000000           Ú     ÈU€        á tx tx tx        ïÿÿÿÿ         opp-600000000           Ú    #ÃF         á ™p ™p ™p        ïÿÿÿÿ         opp-720000000           Ú    *êT         á ™p ™p ™p        ïÿÿÿÿ            	         thermal-zones      cpu-thermal         	   ú        	-  è        	;      N         	H     trips      cpu_alert           	X 8€        	d  Ð         Œpassive          Ù        cpu_crit            	X _�        	d  Ð      	   Œcritical             cooling-maps       map0            	o          	t  ÿÿÿÿÿÿÿÿ               memory@80000000          …memory           ‘€            leds          
    gpio-leds      led-heartbeat           5devkit8000::led1            	ƒ                 	‰on        
  	—heartbeat         led-mmc         5devkit8000::led2            	ƒ                 	‰on          	—none          led-usr         5devkit8000::led3            	ƒ                 	‰on          	—usr       led-pmu-stat            5devkit8000::pmu_stat            	ƒ                  sound             ti,omap-twl4030         	­devkit8000          	¶        I  	¿Ext Spk PREDRIVEL Ext Spk PREDRIVER MAINMIC Main Mic Main Mic Mic Bias 1          gpio_keys         
    gpio-keys      user            5user            	ƒ   ÷               	Ð           	Û         encoder0          
    ti,tfp410           	é           ports                        +       port@0           ‘       endpoint            Š  	         Ù   ü         port@1           ‘      endpoint            Š  
         Ù                 connector0            dvi-connector           5dvi          	ù        
     port       endpoint            Š           Ù  
            connector1            svideo-connector            5tv     port       endpoint            Š           Ù   û               	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 display1 display2 device_type reg clocks clock-names clock-latency operating-points-v2 #cooling-cells phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended pinctrl-names pinctrl-0 bci3v1-supply io-channels io-channel-names ti,use-leds ti,pulldowns usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns linux,keymap #io-channel-cells status #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply vqmmc-supply bus-width #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,no-reset-on-init ti,no-idle ti,timer-alwon ti,timer-secure remote-wakeup-connected gpmc,num-cs gpmc,num-waitpins nand-bus-width gpmc,device-width ti,nand-ecc-opt gpmc,sync-clk-ps gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-off-ns gpmc,oe-off-ns gpmc,access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns label bank-width davicom,no-eeprom gpmc,mux-add-data gpmc,wait-pin gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen gpmc,oe-on-ns gpmc,we-on-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,wait-monitoring-ns gpmc,clk-activation-ns multipoint num-eps ram-bits vdds_dsi-supply vdda_dac-supply vdda-supply remote-endpoint ti,channels data-lines iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device gpios default-state linux,default-trigger ti,model ti,mcbsp ti,audio-routing linux,code wakeup-source powerdown-gpios digital ddc-i2c-bus 