Ðþí ?   8    (            + Ü                             /    isee,omap3-igep0020-rev-f ti,omap3630 ti,omap3                                   +         !   7IGEPv2 Rev. F (TI OMAP AM/DM37x)       chosen           =/ocp@68000000/serial@49020000         aliases          I/ocp@68000000/i2c@48070000           N/ocp@68000000/i2c@48072000           S/ocp@68000000/i2c@48060000           X/ocp@68000000/mmc@4809c000           ]/ocp@68000000/mmc@480b4000           b/ocp@68000000/mmc@480ad000           g/ocp@68000000/serial@4806a000            o/ocp@68000000/serial@4806c000            w/ocp@68000000/serial@49020000            /ocp@68000000/serial@49042000         cpus                         +       cpu@0             arm,cortex-a8            ‡cpu          “             —            žcpu          ª “à         ¸            Ì            ×            æ           pmu@54000000              arm,cortex-a8-pmu            “T    €           î            ùdebugss       soc           ti,omap-infra      mpu           ti,omap3-mpu             ùmpu       iva       
    ti,iva2.2            ùiva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           “h               î   	   
                     +                     ùl3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +               H         scm@2000              ti,omap3-scm simple-bus          “                             +                          pinmux@30              ti,omap3-padconf pinctrl-single          “   0  8                     +            
                       *        ?           ]  ÿ        zdefault         ˆ         gpmc-pins           ’   Ž            æ  
      uart1-pins          ’  R     L             æ   è      uart3-pins          ’  n     p             æ   ë      mcbsp2-pins          ’                              æ        mmc1-pins         0  ’                                 æ   õ      mmc2-pins         0  ’  (    *    ,    .    0    2           æ   û      i2c1-pins           ’  Š     Œ            æ   ì      i2c3-pins           ’  ’     ”            æ   ó      twl4030-pins            ’  °  A         æ   í      tfp410-pins         ’  –            æ         dss-dpi-pins          à  ’   ¤       ¦       ¨       ª       ¬       ®       °       ²       ´       ¶       ¸       º       ¼       ¾       À       Â       Ä       Æ       È       Ê       Ì       Î       Ð       Ò       Ô       Ö       Ø       Ú             æ         uart2-pins           ’  D     F      H      J            æ   é      smsc9221-pins           ’  ¢           æ        lbep5clwmc-pins         ’  ¤    6     :            æ   ü         scm_conf@270              syscon simple-bus            “  p  0                     +                 p  0         æ      pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap             “  °           ¦      pbias_mmc_omap2430          ­pbias_mmc_omap2430          ¼ w@        Ô -ÆÀ         æ   ô         clocks                       +       clock@68          
    ti,clksel            “   h        ì                        +       clock-mcbsp5-mux-fck@4           “           ì              ti,composite-mux-clock          ùmcbsp5_mux_fck           —      	         æ         clock-mcbsp3-mux-fck@0           “            ì              ti,composite-mux-clock          ùmcbsp3_mux_fck           —   
   	         æ         clock-mcbsp4-mux-fck@2           “           ì              ti,composite-mux-clock          ùmcbsp4_mux_fck           —   
   	         æ            mcbsp5_fck          ì              ti,composite-clock           —               æ        clock@4       
    ti,clksel            “           ì                        +       clock-mcbsp1-mux-fck@2           “           ì              ti,composite-mux-clock          ùmcbsp1_mux_fck           —      	         æ         clock-mcbsp2-mux-fck@6           “           ì              ti,composite-mux-clock          ùmcbsp2_mux_fck           —   
   	         æ            mcbsp1_fck          ì              ti,composite-clock           —               æ   ÿ      mcbsp2_fck          ì              ti,composite-clock           —               æ        mcbsp3_fck          ì              ti,composite-clock           —               æ        mcbsp4_fck          ì              ti,composite-clock           —               æ              clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single          “  
    \                     +            
                       *        ?           ]  ÿ   twl4030-vpins-pins           ’                                    æ   î               target-module@480a6000            ti,sysc-omap2 ti,sysc            “H
`D   H
`H   H
`L           rev sysc syss                      #                  1            —            žick                      +               H
`        aes1@0            ti,omap3-aes             “       P         î            >      	      
        Ctx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            “HPD   HPH   HPL           rev sysc syss                      #                  1            —            žick                      +               HP        aes2@0            ti,omap3-aes             “       P         î            >      A      B        Ctx rx            prm@48306000              ti,omap3-prm             “H0`   @          î      clocks                       +       virt_16_8m_ck           ì              fixed-clock         M Y          æ         osc_sys_ck@d40          ì              ti,mux-clock             —                           “  @         æ         sys_ck@1270         ì              ti,divider-clock             —           ]           j            “  p         u         æ   #      sys_clkout1@d70         ì              ti,gate-clock            —            “  p        ]         dpll3_x2_ck         ì              fixed-factor-clock           —           Œ           —         dpll3_m2x2_ck           ì              fixed-factor-clock           —            Œ           —            æ   "      dpll4_x2_ck         ì              fixed-factor-clock           —   !        Œ           —         corex2_fck          ì              fixed-factor-clock           —   "        Œ           —            æ   $      wkup_l4_ick         ì              fixed-factor-clock           —   #        Œ           —            æ   c      corex2_d3_fck           ì              fixed-factor-clock           —   $        Œ           —            æ   ‹      corex2_d5_fck           ì              fixed-factor-clock           —   $        Œ           —            æ   Œ         clockdomains             cm@48004000           ti,omap3-cm          “H @   @    clocks                       +       dummy_apb_pclk          ì              fixed-clock         M          omap_32k_fck            ì              fixed-clock         M  €          æ   I      virt_12m_ck         ì              fixed-clock         M ·          æ         virt_13m_ck         ì              fixed-clock         M Æ]@         æ         virt_19200000_ck            ì              fixed-clock         M$ø          æ         virt_26000000_ck            ì              fixed-clock         MŒº€         æ         virt_38_4m_ck           ì              fixed-clock         MIð          æ         dpll4_ck@d00            ì              ti,omap3-dpll-per-j-type-clock           —   #   #         “        D  0         æ   !      dpll4_m2_ck@d48         ì              ti,divider-clock             —   !        j   ?         “  H         u         æ   %      dpll4_m2x2_mul_ck           ì              fixed-factor-clock           —   %        Œ           —            æ   &      dpll4_m2x2_ck@d00           ì              ti,hsdiv-gate-clock          —   &        ]            “            ¡         æ   '      omap_96m_alwon_fck          ì              fixed-factor-clock           —   '        Œ           —            æ   3      dpll3_ck@d00            ì              ti,omap3-dpll-core-clock             —   #   #         “        @  0         æ         clock@1140        
    ti,clksel            “  @        ì                        +       clock-dpll3-m3@16            “           ì              ti,divider-clock            ùdpll3_m3_ck          —           j            u         æ   -      clock-dpll4-m6@24            “           ì              ti,divider-clock            ùdpll4_m6_ck          —   !        j   ?         u         æ   ?      clock-emu-src-mux@0          “            ì              ti,mux-clock            ùemu_src_mux_ck           —   #   (   )   *         æ   w      clock-pclk-fck@8             “           ì              ti,divider-clock          	  ùpclk_fck             —   +        j            u      clock-pclkx2-fck@6           “           ì              ti,divider-clock            ùpclkx2_fck           —   +        j            u      clock-atclk-fck@4            “           ì              ti,divider-clock          
  ùatclk_fck            —   +        j            u      clock-traceclk-src-fck@2             “           ì              ti,mux-clock            ùtraceclk_src_fck             —   #   (   )   *         æ   ,      clock-traceclk-fck@11            “           ì              ti,divider-clock            ùtraceclk_fck             —   ,        j            u         dpll3_m3x2_mul_ck           ì              fixed-factor-clock           —   -        Œ           —            æ   .      dpll3_m3x2_ck@d00           ì              ti,hsdiv-gate-clock          —   .        ]            “            ¡         æ   /      emu_core_alwon_ck           ì              fixed-factor-clock           —   /        Œ           —            æ   (      sys_altclk          ì              fixed-clock         M             æ   6      mcbsp_clks          ì              fixed-clock         M             æ   	      core_ck         ì              fixed-factor-clock           —            Œ           —            æ   0      dpll1_fck@940           ì              ti,divider-clock             —   0        ]           j            “  	@         u         æ   1      dpll1_ck@904            ì              ti,omap3-dpll-clock          —   #   1         “  	  	$  	@  	4         æ         dpll1_x2_ck         ì              fixed-factor-clock           —           Œ           —            æ   2      dpll1_x2m2_ck@944           ì              ti,divider-clock             —   2        j            “  	D         u         æ   F      cm_96m_fck          ì              fixed-factor-clock           —   3        Œ           —            æ   4      clock@d40         
    ti,clksel            “  @        ì                        +       clock-dpll3-m2@27            “           ì              ti,divider-clock            ùdpll3_m2_ck          —           j            u         æ          clock-omap-96m-fck@6             “           ì              ti,mux-clock            ùomap_96m_fck             —   4   #         æ   Z      clock-omap-54m-fck@5             “           ì              ti,mux-clock            ùomap_54m_fck             —   5   6         æ   B      clock-omap-48m-fck@3             “           ì              ti,mux-clock            ùomap_48m_fck             —   7   6         æ   :         clock@e40         
    ti,clksel            “  @        ì                        +       clock-dpll4-m3@8             “           ì              ti,divider-clock            ùdpll4_m3_ck          —   !        j             u         æ   8      clock-dpll4-m4@0             “            ì              ti,divider-clock            ùdpll4_m4_ck          —   !        j            u         æ   ;         dpll4_m3x2_mul_ck           ì              fixed-factor-clock           —   8        Œ           —            æ   9      dpll4_m3x2_ck@d00           ì              ti,hsdiv-gate-clock          —   9        ]            “            ¡         æ   5      cm_96m_d2_fck           ì              fixed-factor-clock           —   4        Œ           —            æ   7      omap_12m_fck            ì              fixed-factor-clock           —   :        Œ           —            æ   [      dpll4_m4x2_mul_ck           ì              ti,fixed-factor-clock            —   ;        ·           Å            Ò         æ   <      dpll4_m4x2_ck@d00           ì              ti,gate-clock            —   <        ]            “            ¡         Ò         æ   _      dpll4_m5_ck@f40         ì              ti,divider-clock             —   !        j   ?         “  @         u         æ   =      dpll4_m5x2_mul_ck           ì              ti,fixed-factor-clock            —   =        ·           Å            Ò         æ   >      dpll4_m5x2_ck@d00           ì              ti,hsdiv-gate-clock          —   >        ]            “            ¡         Ò         æ   {      dpll4_m6x2_mul_ck           ì              fixed-factor-clock           —   ?        Œ           —            æ   @      dpll4_m6x2_ck@d00           ì              ti,hsdiv-gate-clock          —   @        ]            “            ¡         æ   A      emu_per_alwon_ck            ì              fixed-factor-clock           —   A        Œ           —            æ   )      clock@d70         
    ti,clksel            “  p        ì                        +       clock-clkout2-src-gate@7             “           ì               ti,composite-no-wait-gate-clock         ùclkout2_src_gate_ck          —   0         æ   D      clock-clkout2-src-mux@0          “            ì              ti,composite-mux-clock          ùclkout2_src_mux_ck           —   0   #   4   B         æ   E      clock-sys-clkout2@3          “           ì              ti,divider-clock            ùsys_clkout2          —   C        j   @         å         clkout2_src_ck          ì              ti,composite-clock           —   D   E         æ   C      mpu_ck          ì              fixed-factor-clock           —   F        Œ           —            æ   G      arm_fck@924         ì              ti,divider-clock             —   G         “  	$        j         emu_mpu_alwon_ck            ì              fixed-factor-clock           —   G        Œ           —            æ   *      clock@a40         
    ti,clksel            “  
@        ì                        +       clock-l3-ick@0           “            ì              ti,divider-clock            ùl3_ick           —   0        j            u         æ   H      clock-l4-ick@2           “           ì              ti,divider-clock            ùl4_ick           —   H        j            u         æ   J      clock-gpt10-mux-fck@6            “           ì              ti,composite-mux-clock          ùgpt10_mux_fck            —   I   #         æ   W      clock-gpt11-mux-fck@7            “           ì              ti,composite-mux-clock          ùgpt11_mux_fck            —   I   #         æ   Y      clock-ssi-ssr-div-fck-3430es2@8          “           ì              ti,composite-divider-clock          ùssi_ssr_div_fck_3430es2          —   $      $  û                                       æ   €         clock@c40         
    ti,clksel            “  @        ì                        +       clock-rm-ick@1           “           ì              ti,divider-clock            ùrm_ick           —   J        j            u      clock-gpt1-mux-fck@0             “            ì              ti,composite-mux-clock          ùgpt1_mux_fck             —   I   #         æ   b      clock-usim-mux-fck@3             “           ì              ti,composite-mux-clock          ùusim_mux_fck          (   —   #   K   L   M   N   O   P   Q   R   S         u         æ   „         clock@a00         
    ti,clksel            “  
         ì                        +       clock-gpt10-gate-fck@11          “           ì              ti,composite-gate-clock         ùgpt10_gate_fck           —   #         æ   V      clock-gpt11-gate-fck@12          “           ì              ti,composite-gate-clock         ùgpt11_gate_fck           —   #         æ   X      clock-mmchs2-fck@25          “           ì              ti,wait-gate-clock          ùmmchs2_fck           —            æ   º      clock-mmchs1-fck@24          “           ì              ti,wait-gate-clock          ùmmchs1_fck           —            æ   »      clock-i2c3-fck@17            “           ì              ti,wait-gate-clock        	  ùi2c3_fck             —            æ   ¼      clock-i2c2-fck@16            “           ì              ti,wait-gate-clock        	  ùi2c2_fck             —            æ   ½      clock-i2c1-fck@15            “           ì              ti,wait-gate-clock        	  ùi2c1_fck             —            æ   ¾      clock-mcbsp5-gate-fck@10             “   
        ì              ti,composite-gate-clock         ùmcbsp5_gate_fck          —   	         æ         clock-mcbsp1-gate-fck@9          “   	        ì              ti,composite-gate-clock         ùmcbsp1_gate_fck          —   	         æ         clock-mcspi4-fck@21          “           ì              ti,wait-gate-clock          ùmcspi4_fck           —   T         æ   ¿      clock-mcspi3-fck@20          “           ì              ti,wait-gate-clock          ùmcspi3_fck           —   T         æ   À      clock-mcspi2-fck@19          “           ì              ti,wait-gate-clock          ùmcspi2_fck           —   T         æ   Á      clock-mcspi1-fck@18          “           ì              ti,wait-gate-clock          ùmcspi1_fck           —   T         æ   Â      clock-uart2-fck@14           “           ì              ti,wait-gate-clock        
  ùuart2_fck            —   T         æ   Ã      clock-uart1-fck@13           “           ì              ti,wait-gate-clock        
  ùuart1_fck            —   T         æ   Ä      clock-hdq-fck@22             “           ì              ti,wait-gate-clock          ùhdq_fck          —   U         æ   Å      clock-modem-fck@31           “           ì              ti,omap3-interface-clock          
  ùmodem_fck            —   #         æ   á      clock-mspro-fck@23           “           ì              ti,wait-gate-clock        
  ùmspro_fck            —         clock-ssi-ssr-gate-fck-3430es2@0             “            ì               ti,composite-no-wait-gate-clock         ùssi_ssr_gate_fck_3430es2             —   $         æ         clock-mmchs3-fck@30          “           ì              ti,wait-gate-clock          ùmmchs3_fck           —            æ   Ý         gpt10_fck           ì              ti,composite-clock           —   V   W      gpt11_fck           ì              ti,composite-clock           —   X   Y      core_96m_fck            ì              fixed-factor-clock           —   Z        Œ           —            æ         core_48m_fck            ì              fixed-factor-clock           —   :        Œ           —            æ   T      core_12m_fck            ì              fixed-factor-clock           —   [        Œ           —            æ   U      core_l3_ick         ì              fixed-factor-clock           —   H        Œ           —            æ   \      clock@a10         
    ti,clksel            “  
        ì                        +       clock-sdrc-ick@1             “           ì              ti,wait-gate-clock        	  ùsdrc_ick             —   \         æ   �      clock-mmchs2-ick@25          “           ì              ti,omap3-interface-clock            ùmmchs2_ick           —   ]         æ   Æ      clock-mmchs1-ick@24          “           ì              ti,omap3-interface-clock            ùmmchs1_ick           —   ]         æ   Ç      clock-hdq-ick@22             “           ì              ti,omap3-interface-clock            ùhdq_ick          —   ]         æ   È      clock-mcspi4-ick@21          “           ì              ti,omap3-interface-clock            ùmcspi4_ick           —   ]         æ   É      clock-mcspi3-ick@20          “           ì              ti,omap3-interface-clock            ùmcspi3_ick           —   ]         æ   Ê      clock-mcspi2-ick@19          “           ì              ti,omap3-interface-clock            ùmcspi2_ick           —   ]         æ   Ë      clock-mcspi1-ick@18          “           ì              ti,omap3-interface-clock            ùmcspi1_ick           —   ]         æ   Ì      clock-i2c3-ick@17            “           ì              ti,omap3-interface-clock          	  ùi2c3_ick             —   ]         æ   Í      clock-i2c2-ick@16            “           ì              ti,omap3-interface-clock          	  ùi2c2_ick             —   ]         æ   Î      clock-i2c1-ick@15            “           ì              ti,omap3-interface-clock          	  ùi2c1_ick             —   ]         æ   Ï      clock-uart2-ick@14           “           ì              ti,omap3-interface-clock          
  ùuart2_ick            —   ]         æ   Ð      clock-uart1-ick@13           “           ì              ti,omap3-interface-clock          
  ùuart1_ick            —   ]         æ   Ñ      clock-gpt11-ick@12           “           ì              ti,omap3-interface-clock          
  ùgpt11_ick            —   ]         æ   Ò      clock-gpt10-ick@11           “           ì              ti,omap3-interface-clock          
  ùgpt10_ick            —   ]         æ   Ó      clock-mcbsp5-ick@10          “   
        ì              ti,omap3-interface-clock            ùmcbsp5_ick           —   ]         æ   Ô      clock-mcbsp1-ick@9           “   	        ì              ti,omap3-interface-clock            ùmcbsp1_ick           —   ]         æ   Õ      clock-omapctrl-ick@6             “           ì              ti,omap3-interface-clock            ùomapctrl_ick             —   ]         æ   Ö      clock-aes2-ick@28            “           ì              ti,omap3-interface-clock          	  ùaes2_ick             —   ]         æ         clock-sha12-ick@27           “           ì              ti,omap3-interface-clock          
  ùsha12_ick            —   ]         æ   ×      clock-icr-ick@29             “           ì              ti,omap3-interface-clock            ùicr_ick          —   ]      clock-des2-ick@26            “           ì              ti,omap3-interface-clock          	  ùdes2_ick             —   ]      clock-mspro-ick@23           “           ì              ti,omap3-interface-clock          
  ùmspro_ick            —   ]      clock-mailboxes-ick@7            “           ì              ti,omap3-interface-clock            ùmailboxes_ick            —   ]      clock-sad2d-ick@3            “           ì              ti,omap3-interface-clock          
  ùsad2d_ick            —   H         æ   â      clock-hsotgusb-ick-3430es2@4             “           ì          "    ti,omap3-hsotgusb-interface-clock           ùhsotgusb_ick_3430es2             —   \         æ   �      clock-ssi-ick-3430es2@0          “            ì              ti,omap3-ssi-interface-clock            ùssi_ick_3430es2          —   ^         æ        clock-mmchs3-ick@30          “           ì              ti,omap3-interface-clock            ùmmchs3_ick           —   ]         æ   Ü         gpmc_fck            ì              fixed-factor-clock           —   \        Œ           —         core_l4_ick         ì              fixed-factor-clock           —   J        Œ           —            æ   ]      clock@e00         
    ti,clksel            “           ì                        +       clock-dss-tv-fck            ì              ti,gate-clock           ùdss_tv_fck           —   B        ]            æ   µ      clock-dss-96m-fck           ì              ti,gate-clock           ùdss_96m_fck          —   Z        ]            æ   ¶      clock-dss2-alwon-fck            ì              ti,gate-clock           ùdss2_alwon_fck           —   #        ]            æ   ·      clock-dss1-alwon-fck-3430es2@0           “            ì              ti,dss-gate-clock           ùdss1_alwon_fck_3430es2           —   _         Ò         æ   ¸         dummy_ck            ì              fixed-clock         M          clock@c00         
    ti,clksel            “           ì                        +       clock-gpt1-gate-fck@0            “            ì              ti,composite-gate-clock         ùgpt1_gate_fck            —   #         æ   a      clock-gpio1-dbck@3           “           ì              ti,gate-clock           ùgpio1_dbck           —   `         æ   ¬      clock-wdt2-fck@5             “           ì              ti,wait-gate-clock        	  ùwdt2_fck             —   `         æ   ­      clock-sr1-fck@6          “           ì              ti,wait-gate-clock          ùsr1_fck          —   #         æ        clock-sr2-fck@7          “           ì              ti,wait-gate-clock          ùsr2_fck          —   #         æ        clock-usim-gate-fck@9            “   	        ì              ti,composite-gate-clock         ùusim_gate_fck            —   Z         æ   ƒ         gpt1_fck            ì              ti,composite-clock           —   a   b         æ        wkup_32k_fck            ì              fixed-factor-clock           —   I        Œ           —            æ   `      clock@c10         
    ti,clksel            “          ì                        +       clock-wdt2-ick@5             “           ì              ti,omap3-interface-clock          	  ùwdt2_ick             —   c         æ   ®      clock-wdt1-ick@4             “           ì              ti,omap3-interface-clock          	  ùwdt1_ick             —   c         æ   ¯      clock-gpio1-ick@3            “           ì              ti,omap3-interface-clock          
  ùgpio1_ick            —   c         æ   °      clock-omap-32ksync-ick@2             “           ì              ti,omap3-interface-clock            ùomap_32ksync_ick             —   c         æ   ±      clock-gpt12-ick@1            “           ì              ti,omap3-interface-clock          
  ùgpt12_ick            —   c         æ   ²      clock-gpt1-ick@0             “            ì              ti,omap3-interface-clock          	  ùgpt1_ick             —   c         æ   ³      clock-usim-ick@9             “   	        ì              ti,omap3-interface-clock          	  ùusim_ick             —   c         æ   ´         per_96m_fck         ì              fixed-factor-clock           —   3        Œ           —            æ   
      per_48m_fck         ì              fixed-factor-clock           —   :        Œ           —            æ   d      clock@1000        
    ti,clksel            “           ì                        +       clock-uart3-fck@11           “           ì              ti,wait-gate-clock        
  ùuart3_fck            —   d         æ   ‘      clock-gpt2-gate-fck@3            “           ì              ti,composite-gate-clock         ùgpt2_gate_fck            —   #         æ   f      clock-gpt3-gate-fck@4            “           ì              ti,composite-gate-clock         ùgpt3_gate_fck            —   #         æ   h      clock-gpt4-gate-fck@5            “           ì              ti,composite-gate-clock         ùgpt4_gate_fck            —   #         æ   j      clock-gpt5-gate-fck@6            “           ì              ti,composite-gate-clock         ùgpt5_gate_fck            —   #         æ   l      clock-gpt6-gate-fck@7            “           ì              ti,composite-gate-clock         ùgpt6_gate_fck            —   #         æ   n      clock-gpt7-gate-fck@8            “           ì              ti,composite-gate-clock         ùgpt7_gate_fck            —   #         æ   p      clock-gpt8-gate-fck@9            “   	        ì              ti,composite-gate-clock         ùgpt8_gate_fck            —   #         æ   r      clock-gpt9-gate-fck@10           “   
        ì              ti,composite-gate-clock         ùgpt9_gate_fck            —   #         æ   t      clock-gpio6-dbck@17          “           ì              ti,gate-clock           ùgpio6_dbck           —   e         æ   ’      clock-gpio5-dbck@16          “           ì              ti,gate-clock           ùgpio5_dbck           —   e         æ   “      clock-gpio4-dbck@15          “           ì              ti,gate-clock           ùgpio4_dbck           —   e         æ   ”      clock-gpio3-dbck@14          “           ì              ti,gate-clock           ùgpio3_dbck           —   e         æ   •      clock-gpio2-dbck@13          “           ì              ti,gate-clock           ùgpio2_dbck           —   e         æ   –      clock-wdt3-fck@12            “           ì              ti,wait-gate-clock        	  ùwdt3_fck             —   e         æ   —      clock-mcbsp2-gate-fck@0          “            ì              ti,composite-gate-clock         ùmcbsp2_gate_fck          —   	         æ         clock-mcbsp3-gate-fck@1          “           ì              ti,composite-gate-clock         ùmcbsp3_gate_fck          —   	         æ         clock-mcbsp4-gate-fck@2          “           ì              ti,composite-gate-clock         ùmcbsp4_gate_fck          —   	         æ         clock-uart4-fck@18           “           ì              ti,wait-gate-clock        
  ùuart4_fck            —   d         æ   «         clock@1040        
    ti,clksel            “  @        ì                        +       clock-gpt2-mux-fck@0             “            ì              ti,composite-mux-clock          ùgpt2_mux_fck             —   I   #         æ   g      clock-gpt3-mux-fck@1             “           ì              ti,composite-mux-clock          ùgpt3_mux_fck             —   I   #         æ   i      clock-gpt4-mux-fck@2             “           ì              ti,composite-mux-clock          ùgpt4_mux_fck             —   I   #         æ   k      clock-gpt5-mux-fck@3             “           ì              ti,composite-mux-clock          ùgpt5_mux_fck             —   I   #         æ   m      clock-gpt6-mux-fck@4             “           ì              ti,composite-mux-clock          ùgpt6_mux_fck             —   I   #         æ   o      clock-gpt7-mux-fck@5             “           ì              ti,composite-mux-clock          ùgpt7_mux_fck             —   I   #         æ   q      clock-gpt8-mux-fck@6             “           ì              ti,composite-mux-clock          ùgpt8_mux_fck             —   I   #         æ   s      clock-gpt9-mux-fck@7             “           ì              ti,composite-mux-clock          ùgpt9_mux_fck             —   I   #         æ   u         gpt2_fck            ì              ti,composite-clock           —   f   g         æ        gpt3_fck            ì              ti,composite-clock           —   h   i      gpt4_fck            ì              ti,composite-clock           —   j   k      gpt5_fck            ì              ti,composite-clock           —   l   m      gpt6_fck            ì              ti,composite-clock           —   n   o      gpt7_fck            ì              ti,composite-clock           —   p   q      gpt8_fck            ì              ti,composite-clock           —   r   s      gpt9_fck            ì              ti,composite-clock           —   t   u      per_32k_alwon_fck           ì              fixed-factor-clock           —   I        Œ           —            æ   e      per_l4_ick          ì              fixed-factor-clock           —   J        Œ           —            æ   v      clock@1010        
    ti,clksel            “          ì                        +       clock-gpio6-ick@17           “           ì              ti,omap3-interface-clock          
  ùgpio6_ick            —   v         æ   ˜      clock-gpio5-ick@16           “           ì              ti,omap3-interface-clock          
  ùgpio5_ick            —   v         æ   ™      clock-gpio4-ick@15           “           ì              ti,omap3-interface-clock          
  ùgpio4_ick            —   v         æ   š      clock-gpio3-ick@14           “           ì              ti,omap3-interface-clock          
  ùgpio3_ick            —   v         æ   ›      clock-gpio2-ick@13           “           ì              ti,omap3-interface-clock          
  ùgpio2_ick            —   v         æ   œ      clock-wdt3-ick@12            “           ì              ti,omap3-interface-clock          	  ùwdt3_ick             —   v         æ   �      clock-uart3-ick@11           “           ì              ti,omap3-interface-clock          
  ùuart3_ick            —   v         æ   ž      clock-uart4-ick@18           “           ì              ti,omap3-interface-clock          
  ùuart4_ick            —   v         æ   Ÿ      clock-gpt9-ick@10            “   
        ì              ti,omap3-interface-clock          	  ùgpt9_ick             —   v         æ          clock-gpt8-ick@9             “   	        ì              ti,omap3-interface-clock          	  ùgpt8_ick             —   v         æ   ¡      clock-gpt7-ick@8             “           ì              ti,omap3-interface-clock          	  ùgpt7_ick             —   v         æ   ¢      clock-gpt6-ick@7             “           ì              ti,omap3-interface-clock          	  ùgpt6_ick             —   v         æ   £      clock-gpt5-ick@6             “           ì              ti,omap3-interface-clock          	  ùgpt5_ick             —   v         æ   ¤      clock-gpt4-ick@5             “           ì              ti,omap3-interface-clock          	  ùgpt4_ick             —   v         æ   ¥      clock-gpt3-ick@4             “           ì              ti,omap3-interface-clock          	  ùgpt3_ick             —   v         æ   ¦      clock-gpt2-ick@3             “           ì              ti,omap3-interface-clock          	  ùgpt2_ick             —   v         æ   §      clock-mcbsp2-ick@0           “            ì              ti,omap3-interface-clock            ùmcbsp2_ick           —   v         æ   ¨      clock-mcbsp3-ick@1           “           ì              ti,omap3-interface-clock            ùmcbsp3_ick           —   v         æ   ©      clock-mcbsp4-ick@2           “           ì              ti,omap3-interface-clock            ùmcbsp4_ick           —   v         æ   ª         emu_src_ck          ì              ti,clkdm-gate-clock          —   w         æ   +      secure_32k_fck          ì              fixed-clock         M  €          æ   x      gpt12_fck           ì              fixed-factor-clock           —   x        Œ           —            æ        wdt1_fck            ì              fixed-factor-clock           —   x        Œ           —         security_l4_ick2            ì              fixed-factor-clock           —   J        Œ           —            æ   y      clock@a14         
    ti,clksel            “  
        ì                        +       clock-aes1-ick@3             “           ì              ti,omap3-interface-clock          	  ùaes1_ick             —   y         æ         clock-rng-ick@2          “           ì              ti,omap3-interface-clock            ùrng_ick          —   y         æ         clock-sha11-ick@1            “           ì              ti,omap3-interface-clock          
  ùsha11_ick            —   y      clock-des1-ick@0             “            ì              ti,omap3-interface-clock          	  ùdes1_ick             —   y      clock-pka-ick@4          “           ì              ti,omap3-interface-clock            ùpka_ick          —   z         clock@f00         
    ti,clksel            “           ì                        +       clock-cam-mclk@0             “            ì              ti,gate-clock         	  ùcam_mclk             —   {         Ò      clock-csi2-96m-fck@1             “           ì              ti,gate-clock           ùcsi2_96m_fck             —            æ   ß         cam_ick@f10         ì          !    ti,omap3-no-wait-interface-clock             —   J         “          ]             æ   Þ      security_l3_ick         ì              fixed-factor-clock           —   H        Œ           —            æ   z      ssi_l4_ick          ì              fixed-factor-clock           —   J        Œ           —            æ   ^      sr_l4_ick           ì              fixed-factor-clock           —   J        Œ           —         dpll2_fck@40            ì              ti,divider-clock             —   0        ]           j            “   @         u         æ   |      dpll2_ck@4          ì              ti,omap3-dpll-clock          —   #   |         “      $   @   4                           !         æ   }      dpll2_m2_ck@44          ì              ti,divider-clock             —   }        j            “   D         u         æ   ~      iva2_ck@0           ì              ti,wait-gate-clock           —   ~         “            ]             æ   à      clock@a18         
    ti,clksel            “  
        ì                       5             +       clock-mad2d-ick@3            “           ì              ti,omap3-interface-clock          
  ùmad2d_ick            —   H         æ   ã      clock-usbtll-ick@2           “           ì              ti,omap3-interface-clock            ùusbtll_ick           —   ]         æ   Û         ssi_ssr_fck_3430es2         ì              ti,composite-clock           —      €         æ   �      ssi_sst_fck_3430es2         ì              fixed-factor-clock           —   �        Œ           —            æ        sys_d2_ck           ì              fixed-factor-clock           —   #        Œ           —            æ   K      omap_96m_d2_fck         ì              fixed-factor-clock           —   Z        Œ           —            æ   L      omap_96m_d4_fck         ì              fixed-factor-clock           —   Z        Œ           —            æ   M      omap_96m_d8_fck         ì              fixed-factor-clock           —   Z        Œ           —            æ   N      omap_96m_d10_fck            ì              fixed-factor-clock           —   Z        Œ           —   
         æ   O      dpll5_m2_d4_ck          ì              fixed-factor-clock           —   ‚        Œ           —            æ   P      dpll5_m2_d8_ck          ì              fixed-factor-clock           —   ‚        Œ           —            æ   Q      dpll5_m2_d16_ck         ì              fixed-factor-clock           —   ‚        Œ           —            æ   R      dpll5_m2_d20_ck         ì              fixed-factor-clock           —   ‚        Œ           —            æ   S      usim_fck            ì              ti,composite-clock           —   ƒ   „      dpll5_ck@d04            ì              ti,omap3-dpll-clock          —   #   #         “    $  L  4                           æ   …      dpll5_m2_ck@d50         ì              ti,divider-clock             —   …        j            “  P         u         æ   ‚      sgx_gate_fck@b00            ì              ti,composite-gate-clock          —   0        ]            “            æ   �      core_d3_ck          ì              fixed-factor-clock           —   0        Œ           —            æ   †      core_d4_ck          ì              fixed-factor-clock           —   0        Œ           —            æ   ‡      core_d6_ck          ì              fixed-factor-clock           —   0        Œ           —            æ   ˆ      omap_192m_alwon_fck         ì              fixed-factor-clock           —   '        Œ           —            æ   ‰      core_d2_ck          ì              fixed-factor-clock           —   0        Œ           —            æ   Š      sgx_mux_fck@b40         ì              ti,composite-mux-clock            —   †   ‡   ˆ   4   ‰   Š   ‹   Œ         “  @         æ   Ž      sgx_fck         ì              ti,composite-clock           —   �   Ž         æ        sgx_ick@b10         ì              ti,wait-gate-clock           —   H         “          ]             æ   ä      cpefuse_fck@a08         ì              ti,gate-clock            —   #         “  
        ]             æ   Ø      ts_fck@a08          ì              ti,gate-clock            —   I         “  
        ]            æ   Ù      usbtll_fck@a08          ì              ti,wait-gate-clock           —   ‚         “  
        ]            æ   Ú      dss_ick_3430es2@e10         ì              ti,omap3-dss-interface-clock             —   J         “          ]             æ   ¹      usbhost_120m_fck@1400           ì              ti,gate-clock            —   ‚         “           ]            æ   å      usbhost_48m_fck@1400            ì              ti,dss-gate-clock            —   :         “           ]             æ   æ      usbhost_ick@1410            ì              ti,omap3-dss-interface-clock             —   J         “          ]             æ   ç         clockdomains       core_l3_clkdm             ti,clockdomain           —   �   �      dpll3_clkdm           ti,clockdomain           —         dpll1_clkdm           ti,clockdomain           —         per_clkdm             ti,clockdomain        l   —   ‘   ’   “   ”   •   –   —   ˜   ™   š   ›   œ   �   ž   Ÿ       ¡   ¢   £   ¤   ¥   ¦   §   ¨   ©   ª   «      emu_clkdm             ti,clockdomain           —   +      dpll4_clkdm           ti,clockdomain           —   !      wkup_clkdm            ti,clockdomain        $   —   ¬   ­   ®   ¯   °   ±   ²   ³   ´      dss_clkdm             ti,clockdomain           —   µ   ¶   ·   ¸   ¹      core_l4_clkdm             ti,clockdomain        ”   —   º   »   ¼   ½   ¾   ¿   À   Á   Â   Ã   Ä   Å   Æ   Ç   È   É   Ê   Ë   Ì   Í   Î   Ï   Ð   Ñ   Ò   Ó   Ô   Õ   Ö      ×   Ø   Ù   Ú   Û   Ü   Ý      cam_clkdm             ti,clockdomain           —   Þ   ß      iva2_clkdm            ti,clockdomain           —   à      dpll2_clkdm           ti,clockdomain           —   }      d2d_clkdm             ti,clockdomain           —   á   â   ã      dpll5_clkdm           ti,clockdomain           —   …      sgx_clkdm             ti,clockdomain           —   ä      usbhost_clkdm             ti,clockdomain           —   å   æ   ç            target-module@48320000            ti,sysc-omap2 ti,sysc            “H2     H2          	  rev sysc            #                —   `   ±         žfck ick                      +               H2        counter@0             ti,omap-counter32k           “                 interrupt-controller@48200000             ti,omap3-intc            *                    “H               æ         target-module@48056000            ti,sysc-omap2 ti,sysc            “H`    H`,   H`(           rev sysc syss             #        B                  #                  1            —   \         žick                      +               H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma            “                î                    P           [            h   `         æ            gpio@48310000             ti,omap3-gpio            “H1              î            ùgpio1            u         ‡        —            *                    æ   ú      gpio@49050000             ti,omap3-gpio            “I              î            ùgpio2            ‡        —            *                 gpio@49052000             ti,omap3-gpio            “I              î            ùgpio3            ‡        —            *                 gpio@49054000             ti,omap3-gpio            “I@             î             ùgpio4            ‡        —            *                 gpio@49056000             ti,omap3-gpio            “I`             î   !         ùgpio5            ‡        —            *                    æ   ê      gpio@49058000             ti,omap3-gpio            “I€             î   "         ùgpio6            ‡        —            *                    æ   þ      serial@4806a000           ti,omap3-uart            “H              £      H        >      1      2        Ctx rx            ùuart1           MÜl         zdefault         ˆ   è      serial@4806c000           ti,omap3-uart            “HÀ            £      I        >      3      4        Ctx rx            ùuart2           MÜl         zdefault         ˆ   é   bluetooth             ti,wl1835-st            ·   ê   	            Ä “à         serial@49020000           ti,omap3-uart            “I             £      J        >      5      6        Ctx rx            ùuart3           MÜl         zdefault         ˆ   ë      i2c@48070000              ti,omap3-i2c             “H     €         î   8                     +             ùi2c1            zdefault         ˆ   ì        M '¬@   twl@48           “   H         î                         ti,twl4030           *                   zdefault         ˆ   í   î   audio             ti,twl4030-audio       codec            rtc           ti,twl4030-rtc           î         charger           ti,twl4030-bci           î   	           Î   ï        Ü   ð           èvac       watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1          regulator-vaux2           ti,twl4030-vaux2          regulator-vaux3           ti,twl4030-vaux3          regulator-vaux4           ti,twl4030-vaux4          regulator-vdd1            ti,twl4030-vdd1         ¼ 	'À        Ô        regulator-vdac            ti,twl4030-vdac         ¼ w@        Ô w@      regulator-vio             ti,twl4030-vio        regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1            ¼ :�        Ô 0°         æ   ÷      regulator-vmmc2           ti,twl4030-vmmc2            ¼ :�        Ô 0°      regulator-vusb1v5             ti,twl4030-vusb1v5           æ   ñ      regulator-vusb1v8             ti,twl4030-vusb1v8           æ   ò      regulator-vusb3v1             ti,twl4030-vusb3v1           æ   ï      regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2            ¼ w@        Ô w@      	  ­vdds_dsi          regulator-vsim            ti,twl4030-vsim         ¼ w@        Ô -ÆÀ         æ   ø      gpio              ti,twl4030-gpio          ‡        —            *                    ù         æ   ù      twl4030-usb           ti,twl4030-usb           î   
              ñ           ò        !   ï        /           8             æ        pwm           ti,twl4030-pwm          C         pwmled            ti,twl4030-pwmled           C         pwrbutton             ti,twl4030-pwrbutton             î         keypad            ti,twl4030-keypad            î           N           ^         madc              ti,twl4030-madc          î           q            æ   ð            i2c@48072000              ti,omap3-i2c             “H     €         î   9                     +             ùi2c2          i2c@48060000              ti,omap3-i2c             “H     €         î   =                     +             ùi2c3            zdefault         ˆ   ó        M †          æ      eeprom@50         
    ti,eeprom            “   P         mailbox@48094000              ti,omap3-mailbox             ùmailbox          “H	@             î           ƒ           �           ¡      mbox-dsp            ³                    ¾                    spi@48098000              ti,omap2-mcspi           “H	€             î   A                     +             ùmcspi1          É         @  >      #      $      %      &      '      (      )      *         Ctx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       spi@4809a000              ti,omap2-mcspi           “H	              î   B                     +             ùmcspi2          É            >      +      ,      -      .        Ctx0 rx0 tx1 rx1       spi@480b8000              ti,omap2-mcspi           “H€             î   [                     +             ùmcspi3          É            >                                Ctx0 rx0 tx1 rx1       spi@480ba000              ti,omap2-mcspi           “H              î   0                     +             ùmcspi4          É           >      F      G        Ctx0 rx0       1w@480b2000           ti,omap3-1w          “H              î   :         ùhdq1w         mmc@4809c000              ti,omap3-hsmmc           “H	À             î   S         ùmmc1             ×        >      =      >        Ctx rx           ä   ô        zdefault         ˆ   õ   ö        ñ   ÷        ý   ø                      ù                   ú            mmc@480b4000              ti,omap3-hsmmc           “H@             î   V         ùmmc2            >      /      0        Ctx rx           zdefault         ˆ   û   ü        ñ   ý                    )                     +       wlcore@2          
    ti,wl1835            “               þ         î               mmc@480ad000              ti,omap3-hsmmc           “H
Ð             î   ^         ùmmc3            >      M      N        Ctx rx         	  7disabled          mmu@480bd400            >              ti,omap2-iommu           “HÔ    €         î            ùmmu_isp         K            æ        mmu@5d000000            >              ti,omap2-iommu           “]      €         î            ùmmu_iva       	  7disabled          watchdog@48314000             ti,omap3-wdt             “H1@    €      
   ùwd_timer2         mcbsp@48074000            ti,omap3-mcbsp           “H@    ÿ        mpu          î      ;   <        [common tx rx            k   €         ùmcbsp1          >                     Ctx rx            —   ÿ         žfck       	  7disabled          target-module@480a0000            ti,sysc-omap2 ti,sysc            “H
 <   H
 @   H
 D           rev sysc syss                      #               1            —            žick                      +               H
         rng@0             ti,omap2-rng             “                 î   4         mcbsp@49022000            ti,omap3-mcbsp           “I     ÿI€    ÿ        mpu sidetone             î      >   ?           [common tx rx sidetone           k            ùmcbsp2 mcbsp2_sidetone          >      !      "        Ctx rx            —     ¨         žfck ick         7okay            zdefault         ˆ           æ        mcbsp@49024000            ti,omap3-mcbsp           “I@    ÿI     ÿ        mpu sidetone             î      Y   Z           [common tx rx sidetone           k   €         ùmcbsp3 mcbsp3_sidetone          >                    Ctx rx            —     ©         žfck ick       	  7disabled          mcbsp@49026000            ti,omap3-mcbsp           “I`    ÿ        mpu          î      6   7        [common tx rx            k   €         ùmcbsp4          >                    Ctx rx            —           žfck         z          	  7disabled          mcbsp@48096000            ti,omap3-mcbsp           “H	`    ÿ        mpu          î      Q   R        [common tx rx            k   €         ùmcbsp5          >                    Ctx rx            —           žfck       	  7disabled          sham@480c3000             ti,omap3-sham            ùsham             “H0    d         î   1        >      E        Crx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          “H1€    H1€   H1€           rev sysc syss             '        #                  1            —     ³         žfck ick                      +               H1€             ‹         Ÿ   timer@0           ti,omap3430-timer            “       €         —           žfck          î   %         ª        ¹          É   I         target-module@49032000            ti,sysc-omap2-timer ti,sysc          “I     I    I            rev sysc syss             '        #                  1            —     §         žfck ick                      +               I        timer@0           ti,omap3430-timer            “                î   &         timer@49034000            ti,omap3430-timer            “I@             î   '         ùtimer3        timer@49036000            ti,omap3430-timer            “I`             î   (         ùtimer4        timer@49038000            ti,omap3430-timer            “I€             î   )         ùtimer5           à      timer@4903a000            ti,omap3430-timer            “I              î   *         ùtimer6           à      timer@4903c000            ti,omap3430-timer            “IÀ             î   +         ùtimer7           à      timer@4903e000            ti,omap3430-timer            “Ià             î   ,         ùtimer8           í         à      timer@49040000            ti,omap3430-timer            “I              î   -         ùtimer9           í      timer@48086000            ti,omap3430-timer            “H`             î   .         ùtimer10          í      timer@48088000            ti,omap3430-timer            “H€             î   /         ùtimer11          í      target-module@48304000            ti,sysc-omap2-timer ti,sysc          “H0@    H0@   H0@           rev sysc syss             '        #                  1            —     ²         žfck ick                      +               H0@       timer@0           ti,omap3430-timer            “                î   _         ª         ú         usbhstll@48062000             ti,usbhs-tll             “H              î   N         ùusb_tll_hs        usbhshost@48064000            ti,usbhs-host            “H@             ùusb_host_hs                      +                  	  
ehci-phy       usb@48064400              ti,ohci-omap3            “HD             î   L               usb@48064800              ti,ehci-omap             “HH             î   M        -  	         gpmc@6e000000             ti,omap3430-gpmc             ùgpmc             “n     Ð         î           >              Crxtx            2           >                        +            *                    ‡        —           zdefault         ˆ  
                 0             ,               æ     nand@0,0              ti,omap2-nand            “                               î                       P           _           qbch8            �            ’                ,        ²   ,        Ä           Ó   "        æ   ,        ù   (           6           @        &   R        7   R        H   (        Z                         +           7okay          onenand@0,0           ti,omap2-onenand             “                    r         �        ‘            £         ³         Ã        _           Ô           ’                `        ²   `        Ä            Ó           æ           æ              `        ô            ù   `        &   r        7   r           Z                               3            M            e           Z           H   Z        �  .à                     +         	  7disabled          ethernet@gpmc             smsc,lan9221 smsc,lan9115           |           Ô            ’                *        ²   $        Ä           Ó           æ           æ               *        ô            ù   $        &   <        7   6           $                                3            Z           H   *         ‡         ¡        »          Ë          Ù            æ        zdefault         ˆ           “          ÿ            þ         î               target-module@480ab000            ti,sysc-omap2 ti,sysc            “H
´    H
´   H
´           rev sysc syss                      B                  #                  1            žfck                      +               H
°             —   �   usb@0             ti,omap3-musb            “                î   \   ]        [mc dma          ü           	           	           	            	'          -        	  	/usb2-phy            3           	9   2         dss@48050000              ti,omap3-dss             “H             7okay          	   ùdss_core             —   ¸         žfck                      +               dispc@48050400            ti,omap3-dispc           “H             î         
   ùdss_dispc            —   ¸         žfck       encoder@4804fc00              ti,omap3-dsi             “Hü    Hþ    @Hÿ             proto phy pll            î         	  7disabled          	   ùdss_dsi1             —   ¸   ·         žfck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            “H          	  7disabled          	   ùdss_rfbi             —   ¸   ¹         žfck ick       encoder@48050c00              ti,omap3-venc            “H          	  7disabled          	   ùdss_venc             —   µ   ¶         žfck tv_dac_clk        port       endpoint            	?          	O            æ              ssi-controller@48058000           ti,omap3-ssi             ùssi         7okay             “H€    H�            sys gdd          î   G        [gdd_mpu                      +                     —   �              žssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            “H     H¨            tx rx            î   C   D      ssi-port@4805b000             ti,omap3-ssi-port            “H°    H¸            tx rx            î   E   F         serial@49042000           ti,omap3-uart            “I              î   P        >      Q      R        Ctx rx            ùuart4           MÜl       regulator-abb-mpu         
    ti,abb-v1           ­abb_mpu_iva                       +             “H0rð   H0h           base-address int-address            	Z            —   #        	s           	„         `  	” s                     O€                     7È                     û                            æ         pinmux@480025a0            ti,omap3-padconf pinctrl-single          “H %    \                     +            
                       *        ?           ]  ÿ        zdefault         ˆ     hsusbb1-pins          `  ’   :      8      L     N     <     >     @     B     D     F     H     J           æ        leds-pins           ’   T      V      X            æ        mmc1-cd-pins            ’   Z           æ   ö         isp@480bc000              ti,omap3-isp             “HÀ   üHØ             î           	           ¦     ð        	§           ì      ports                        +             bandgap@48002524             “H %$             ti,omap36xx-bandgap         	³             æ        target-module@480cb000            ti,sysc-omap3630-sr ti,sysc          ùsmartreflex_core             “H°8           sysc                       #                   —           žfck                      +               H°       smartreflex@0             ti,omap3-smartreflex-core            “                î            target-module@480c9000            ti,sysc-omap3630-sr ti,sysc          ùsmartreflex_mpu_iva          “H�8           sysc                       #                   —           žfck                      +               H�       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva             “                î            target-module@50000000            ti,sysc-omap4 ti,sysc            “P þ    P þ         	  rev sysc            B                  #                   —     ä         žfck ick                      +               P         gpu@0         #    ti,omap3630-gpu img,powervr-sgx530           “                î               opp-table             operating-points-v2-ti-cpu          ¦            æ      opp-50-300000000            	É    á£         	Ð s s s s s s        	Þÿÿÿÿ            	ï      opp-100-600000000           	É    #ÃF         	Ð O€ O€ O€ O€ O€ O€        	Þÿÿÿÿ         opp-130-800000000           	É    /¯         	Ð 7È 7È 7È 7È 7È 7È        	Þÿÿÿÿ         opp-1000000000          	É    ;šÊ         	Ð û û û û û û        	Þÿÿÿÿ            	û         opp-supply            ti,omap-opp-supply          
 û      thermal-zones      cpu-thermal         
!   ú        
7  è        
E      N         
R     trips      cpu_alert           
b 8€        
n  Ð         Žpassive          æ        cpu_crit            
b _�        
n  Ð      	   Žcritical             cooling-maps       map0            
y          
~  ÿÿÿÿÿÿÿÿ               memory@80000000          ‡memory           “€             sound             ti,omap-twl4030         
�igep2           
–        regulator-vdd33           regulator-fixed         ­vdd33            
Ÿ      regulator-vddvario            regulator-fixed       	  ­vddvario             
Ÿ         æ        regulator-vdd33a              regulator-fixed         ­vdd33a           
Ÿ         æ        leds            zdefault         ˆ        
    gpio-leds      boot            
³omap3:green:boot            ¾   ú               
¹on        user0           
³omap3:red:user0         ¾   ú               
¹off       user1           
³omap3:red:user1         ¾   ú               
¹off       user2           
³omap3:green:user1           ¾   ù               hsusb1_power_reg              regulator-fixed         ­hsusb1_vbus         ¼ 2Z         Ô 2Z         
Ç   ù              
Ì p         æ        hsusb1_phy            usb-nop-xceiv           
Ý   ú              
é          8             æ  	      encoder       
    ti,tfp410           
ô   þ   
      ports                        +       port@0           “       endpoint            	?           æ           port@1           “      endpoint            	?           æ  !               connector             dvi-connector           
³dvi                        port       endpoint            	?  !         æ              regulator-lbep5clwmc-wlen             regulator-fixed         ­regulator-lbep5clwmc-wlen           ¼ 2Z         Ô 2Z         
Ç   ê                         æ   ý         	compatible interrupt-parent #address-cells #size-cells model stdout-path i2c0 i2c1 i2c2 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended enable-gpios max-speed bci3v1-supply io-channels io-channel-names ti,use-leds usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns #io-channel-cells #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply vmmc_aux-supply bus-width cd-gpios wp-gpios non-removable status #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port1-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins nand-bus-width gpmc,device-width ti,nand-ecc-opt gpmc,sync-clk-ps gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,we-off-ns gpmc,oe-off-ns gpmc,access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns gpmc,sync-read gpmc,sync-write gpmc,burst-length gpmc,burst-wrap gpmc,burst-read gpmc,burst-write gpmc,mux-add-data gpmc,oe-on-ns gpmc,we-on-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,wait-monitoring-ns gpmc,clk-activation-ns bank-width gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen vddvario-supply vdd33a-supply reg-io-width smsc,save-mac-address multipoint num-eps ram-bits interface-type usb-phy phy-names power remote-endpoint data-lines ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device ti,model ti,mcbsp regulator-always-on label default-state gpio startup-delay-us reset-gpios vcc-supply powerdown-gpios digital ddc-i2c-bus enable-active-high 