Ðþí xî   8 e¬   (            B et                             &    seeed,am335x-bone-green-eco ti,am33xx                                    +         "   7Seeed Studio BeagleBone Green Eco      sound           Á   ú        Ÿ   ú        †i2s         oTI BeagleBone Green HDMI cape k-          simple-audio-card F   simple-audio-card,codec         à   ü      simple-audio-card,cpu           F   ú        	   û        à   «         clk-mcasp0          F   û        b   `               	   ù          gpio-gate-clock                    clk-mcasp0-fixed            F   ù        @w            fixed-clock                    connector-hdmi           ìa mi        §hdmi con          hdmi-connector =   port       endpoint            F   ÿ        R   ø            chosen           =serial0:115200n8          aliases       C   I/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0        ?   N/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0        D   S/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0       F   X/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         B   `/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0         B   h/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0         G   p/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0        G   x/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0        G   €/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0        D   ˆ/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0       D   �/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0       %   –/ocp/target-module@47400000/usb@1400          %   ›/ocp/target-module@47400000/usb@1800          )    /ocp/target-module@47400000/usb-phy@1300          )   ¥/ocp/target-module@47400000/usb-phy@1b00          Y   ª/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1          Y   ´/ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2          ?   ¾/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0        D   Ã/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0       ?   È/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0        D   Í/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0       "   Ò/ocp/target-module@47810000/mmc@0         cpus                         +       cpu@0             arm,cortex-a8         
   ×ti,am3352            åcpu          ñ             õ           	           cpu          “à        *           :           F   a      idle-states    mpu_gate              arm,idle-state          N   (        _   Z        o  ,         €        F               opp-table             operating-points-v2-ti-cpu          �           F      opp-50-300000000            —    á£         ž ~ð 4¸ É(        ¬               ½      opp-100-275000000           —    d*À        ž Èà rð Ð        ¬      ÿ         ½      opp-100-300000000           —    á£         ž Èà rð Ð        ¬                ½      opp-100-500000000           —    Íe         ž Èà rð Ð        ¬     ÿÿ      opp-100-600000000           —    #ÃF         ž Èà rð Ð        ¬      @      opp-120-600000000           —    #ÃF         ž O€ ñÀ ­@        ¬     ÿÿ      opp-120-720000000           —    *êT         ž O€ ñÀ ­@        ¬      €      opp-720000000           —    *êT         ž 9à ×p œP        ¬     ÿÿ      opp-800000000           —    /¯         ž 9à ×p œP        ¬            opp-1000000000          —    ;šÊ         ž 7È ÐD ŸL        ¬               target-module@4b000000            ti,sysc-omap4-simple ti,sysc            	      ¸            fck          É                     +           Ô    K         target-module@140000              ti,sysc-omap4-simple ti,sysc            	                   fck                      +           Ô        ì     pmu@0             arm,cortex-a8-pmu           Û               soc           ti,omap-infra         ocp           simple-pm-bus           æ   	        	      ¼            fck                      +            Ô        F   b   interconnect@44c00000              ti,am33xx-l4-wkup simple-pm-bus         æ   
        	                  fck           ñDÀ     DÀ    DÀ    DÀ            ôap la ia0 ia1                        +         $  Ô    DÀ        DÐ         Dà             F   c   segment@0             simple-pm-bus                        +         0  Ô                                            segment@100000            simple-pm-bus                        +         0  Ô         @   @  @                          target-module@0           ti,sysc-omap4 ti,sysc            ñ               ôrev         	                   fck                      +           Ô          @              cpu@0             ti,am3352-wkup-m3            ñ      @              
  ôumem dmem           þ   
           rstctrl         am335x-pm-firmware.elf          F   1            segment@200000            simple-pm-bus                        +        €  Ô                         0   0      @   @      P   P      `   `      p   p      €   €      �   �                 °   °      À   À      Ð   Ð      ð   ð        !         "         #        #        #      0  #0     @  #@     P  #P     `  #`     p  #p     €  #€     �  #�        #      à  #à     ð  #ð      à   à        $         (        target-module@0           ti,sysc-omap4 ti,sysc            ñ               ôrev                      +           Ô               prcm@0            ti,am3-prcm simple-bus           ñ                             +           Ô                    F   d   clocks                       +            F   e   clock-clk-32768                        fixed-clock         -clk_32768_ck            @  €         F         clock-clk-rc32k                        fixed-clock         -clk_rc32k_ck            @  }         F         clock-virt-19200000                        fixed-clock         -virt_19200000_ck            @$ø         F   ,      clock-virt-24000000                        fixed-clock         -virt_24000000_ck            @n6         F   -      clock-virt-25000000                        fixed-clock         -virt_25000000_ck            @}x@        F   .      clock-virt-26000000                        fixed-clock         -virt_26000000_ck            @Œº€        F   /      clock-tclkin                           fixed-clock       
  -tclkin_ck           @ ·         F         clock@490                          ti,am3-dpll-core-clock          -dpll_core_ck            	               ñ  �  \  h  `  d        F         clock-dpll-core-x2                         ti,am3-dpll-x2-clock            -dpll_core_x2_ck         	           F         clock-dpll-core-m4@480                         ti,divider-clock            -dpll_core_m4_ck         	           P            ñ  €         [        F         clock-dpll-core-m5@484                         ti,divider-clock            -dpll_core_m5_ck         	           P            ñ  „         [        F         clock-dpll-core-m6@4d8                         ti,divider-clock            -dpll_core_m6_ck         	           P            ñ  Ø         [        F   f      clock@488                          ti,am3-dpll-clock           -dpll_mpu_ck         	               ñ  ˆ     ,  $  (        F         clock-dpll-mpu-m2@4a8                          ti,divider-clock            -dpll_mpu_m2_ck          	           P            ñ  ¨         [        F   g      clock@494                          ti,am3-dpll-no-gate-clock           -dpll_ddr_ck         	               ñ  ”  4  @  8  <        F         clock-dpll-ddr-m2@4a0                          ti,divider-clock            -dpll_ddr_m2_ck          	           P            ñ            [        F         clock-dpll-ddr-m2-div2                         fixed-factor-clock          -dpll_ddr_m2_div2_ck         	           r           }           F   h      clock@498                          ti,am3-dpll-no-gate-clock           -dpll_disp_ck            	               ñ  ˜  H  T  L  P        F         clock-dpll-disp-m2@4a4                         ti,divider-clock            -dpll_disp_m2_ck         	           P            ñ  ¤         [         ‡        F         clock@48c                      !    ti,am3-dpll-no-gate-j-type-clock            -dpll_per_ck         	               ñ  Œ  p  œ  t  x        F         clock-dpll-per-m2@4ac                          ti,divider-clock            -dpll_per_m2_ck          	           P            ñ  ¬         [        F         clock-dpll-per-m2-div4-wkupdm                          fixed-factor-clock          -dpll_per_m2_div4_wkupdm_ck          	           r           }           F   i      clock-dpll-per-m2-div4                         fixed-factor-clock          -dpll_per_m2_div4_ck         	           r           }           F   j      clock-clk-24mhz                        fixed-factor-clock        
  -clk_24mhz           	           r           }           F         clock-clkdiv32k                        fixed-factor-clock          -clkdiv32k_ck            	           r           }  Ü        F   k      clock-l3-gclk                          fixed-factor-clock          -l3_gclk         	           r           }           F         clock-pruss-ocp-gclk@530                           ti,mux-clock            -pruss_ocp_gclk          	               ñ  0        F   U      clock-mmu-fck-1@914                        ti,gate-clock           -mmu_fck         	           š            ñ  	        F   l      clock-timer1-fck@528                           ti,mux-clock            -timer1_fck          	                                ñ  (        F   4      clock-timer2-fck@508                           ti,mux-clock            -timer2_fck          	                          ñ          F   :      clock-timer3-fck@50c                           ti,mux-clock            -timer3_fck          	                          ñ          F   m      clock-timer4-fck@510                           ti,mux-clock            -timer4_fck          	                          ñ          F   n      clock-timer5-fck@518                           ti,mux-clock            -timer5_fck          	                          ñ          F   o      clock-timer6-fck@51c                           ti,mux-clock            -timer6_fck          	                          ñ          F   p      clock-timer7-fck@504                           ti,mux-clock            -timer7_fck          	                          ñ          F   q      clock-usbotg-fck-8@47c                         ti,gate-clock           -usbotg_fck          	           š            ñ  |        F   r      clock-dpll-core-m4-div2                        fixed-factor-clock          -dpll_core_m4_div2_ck            	           r           }           F         clock-ieee5000-fck-1@e4                        ti,gate-clock           -ieee5000_fck            	           š            ñ   ä        F   s      clock-wdt1-fck@538                         ti,mux-clock          	  -wdt1_fck            	                       ñ  8        F   t      clock-l4-rtc-gclk                          fixed-factor-clock          -l4_rtc_gclk         	           r           }           F   u      clock-l4hs-gclk                        fixed-factor-clock        
  -l4hs_gclk           	           r           }           F   v      clock-l3s-gclk                         fixed-factor-clock        	  -l3s_gclk            	           r           }           F   w      clock-l4fw-gclk                        fixed-factor-clock        
  -l4fw_gclk           	           r           }           F   x      clock-l4ls-gclk                        fixed-factor-clock        
  -l4ls_gclk           	           r           }           F   0      clock-sysclk-div                           fixed-factor-clock          -sysclk_div_ck           	           r           }           F   y      clock-cpsw-125mhz-gclk                         fixed-factor-clock          -cpsw_125mhz_gclk            	           r           }           F   L      clock-cpsw-cpts-rft@520                        ti,mux-clock            -cpsw_cpts_rft_clk           	               ñ           F   M      clock-gpio0-dbclk-mux@53c                          ti,mux-clock            -gpio0_dbclk_mux_ck          	                          ñ  <        F   z      clock-lcd-gclk@534                         ti,mux-clock          	  -lcd_gclk            	                  ñ  4         ‡        F          clock-mmc                          fixed-factor-clock          -mmc_clk         	           r           }           F   {      clock@52c         
    ti,clksel            ñ  ,                                 +       clock-gfx-fclk-clksel@1          ñ                          ti,mux-clock            -gfx_fclk_clksel_ck          	              F         clock-gfx-fck-div@0          ñ                           ti,divider-clock            -gfx_fck_div_ck          	           P           F   |         clock@700         
    ti,clksel            ñ                                    +       clock-sysclkout-pre@0            ñ                           ti,mux-clock            -sysclkout_pre_ck            	                        F   !      clock-clkout2-div@3          ñ                          ti,divider-clock            -clkout2_div_ck          	   !        P           F   "      clock-clkout2@7          ñ                          ti,gate-clock           -clkout2_ck          	   "        F   }            clockdomains            F   ~      clock@0           ti,omap4-cm         -per_cm           ñ                            +           Ô                   F      clock@38              ti,clkctrl          -l4ls_clkctrl          8   ñ   8   ,   l   (   ¬      À      ì          0                       F   7      clock@1c              ti,clkctrl          -l3s_clkctrl           ñ         0      h      ø                       F   9      clock@24              ti,clkctrl          -l3_clkctrl        (   ñ   $      ”      ¼      Ü      ü                       F         clock@120             ti,clkctrl          -l4hs_clkctrl             ñ                          F   J      clock@e8              ti,clkctrl          -pruss_ocp_clkctrl            ñ   è                       F   T      clock@0           ti,clkctrl          -cpsw_125mhz_clkctrl          ñ                           F   K      clock@18              ti,clkctrl          -lcdc_clkctrl             ñ                          F   I      clock@14c             ti,clkctrl          -clk_24mhz_clkctrl            ñ  L                       F            clock@400             ti,omap4-cm         -wkup_cm          ñ                           +           Ô                  F   €   clock@0           ti,clkctrl          -l4_wkup_clkctrl          ñ          ´   $                    F         clock@14              ti,clkctrl          -l3_aon_clkctrl           ñ                          F         clock@b0              ti,clkctrl          -l4_wkup_aon_clkctrl          ñ   °                       F            clock@600             ti,omap4-cm         -mpu_cm           ñ                           +           Ô                  F   �   clock@0           ti,clkctrl          -mpu_clkctrl          ñ                           F   C         clock@800             ti,omap4-cm       
  -l4_rtc_cm            ñ                           +           Ô                  F   ‚   clock@0           ti,clkctrl          -l4_rtc_clkctrl           ñ                           F   6         clock@900             ti,omap4-cm       
  -gfx_l3_cm            ñ  	                         +           Ô      	            F   ƒ   clock@0           ti,clkctrl          -gfx_l3_clkctrl           ñ                           F   ]         clock@a00             ti,omap4-cm         -l4_cefuse_cm             ñ  
                         +           Ô      
            F   „   clock@0           ti,clkctrl          -l4_cefuse_clkctrl            ñ       $                    F   …         prm@c00       !    ti,am3-prm-inst ti,omap-prm-inst             ñ              §           ´            F   	      prm@d00       !    ti,am3-prm-inst ti,omap-prm-inst             ñ              §           ´            F   
      prm@e00       !    ti,am3-prm-inst ti,omap-prm-inst             ñ              ´            F   B      prm@f00       !    ti,am3-prm-inst ti,omap-prm-inst             ñ              §           F   †      prm@1000          !    ti,am3-prm-inst ti,omap-prm-inst             ñ              ´            F   5      prm@1100          !    ti,am3-prm-inst ti,omap-prm-inst             ñ              ´            §           F   ^      prm@1200          !    ti,am3-prm-inst ti,omap-prm-inst             ñ              ´            F   ‡            target-module@3000            ti,sysc       	  Èdisabled                         +           Ô      0          target-module@5000            ti,sysc       	  Èdisabled                         +           Ô      P          target-module@7000            ti,sysc-omap2 ti,sysc            ñ  p      p     q           ôrev sysc syss           Ï           Ü                     ê           	                         
  fck dbclk                        +           Ô      p            F   ˆ   gpio@0            ti,omap4-gpio         À  ÷   #       R      #      4      #      ^      #      G      #      ‡      #      l      #      I      #            #      
      #      J      #      Q      #                                              4            ñ               Û   `        F   <         target-module@9000            ti,sysc-omap2 ti,sysc            ñ  �P     �T     �X           ôrev sysc syss           Ï           Ü                     	      ´            fck                      +           Ô      �       serial@0              ti,am3352-uart          @Ül          ñ               Û   H        Èokay            E   $          $               Jtx rx           Tdefault         b   %        F   ‰         target-module@b000            ti,sysc-omap2 ti,sysc            ñ  °      °     °�           ôrev sysc syss           Ï          Ü                     ê           	      ¸            fck                      +           Ô      °       i2c@0             ti,omap4-i2c                         +             ñ               Û   F        Èokay            Tdefault         b   &        @ €        F   Š   eeprom@50             atmel,24c32          ñ   P        l   '        F   ‹   nvmem-layout              fixed-layout                         +      baseboard_data@0             ñ               F   Œ            pmic@30           ti,tps65214          ñ   0        w   (        „   (        ‘   (        ž   (        ª   (                    Û           b   )        F   �   regulators     buck1           ¶vdd_mpu         Å H        Ý ÐD         õ                 F         buck2         	  ¶vdd_core            Å H        Ý Œ0         õ                 F   Ž      buck3         	  ¶vdds_ddr            Å ™p        Ý ™p                 F   �      ldo1          
  ¶vdd_1v8_1           Å w@        Ý w@         õ                 F   �      ldo2          
  ¶vdd_1v8_2           Å w@        Ý w@         õ                 F   ‘                  target-module@d000            ti,sysc-omap4 ti,sysc            ñ  Ð      Ð         	  ôrev sysc            Ü                     	      ¼            fck                      +           Ô      Ð         à       tscadc@0              ti,am3359-tscadc             ñ               Û           	   *        fck       	  Èdisabled            E   $   5       $   9            Jfifo0 fifo1         F   ’   tsc           ti,am3359-tsc         adc                      ti,am3359-adc           F   “            target-module@10000           ti,sysc-omap4 ti,sysc            ñ              ôrev         	                  fck          É                     +           Ô                      scm@0             ti,am3-scm simple-bus            ñ                             +           -           Ô                    F   ”   pinmux@800            pinctrl-single           ñ     8        -           <            Z           Tdefault         b   +        F   #   mcasp0-pins         F        0  w  ¬   0      œ         ”         �              pinmux-bb-lcd-pins          F   ý       w              ¤          ¨          ¬          °          ´          ¸          ¼          À          Ä          È          Ì          Ð          Ô          Ø          Ü          à          ä          è          ì          �          ”          ˜   (         user-leds-s0-pins         0  w   T          X         \          `              F   _      i2c0-pins           w  ˆ   0      Œ   0            F   &      i2c2-pins           w  x   0     |   0           F   >      uart0-pins          w  p   0      t                F   %      clkout2-pins            w  ´               F   +      cpsw-default-pins         œ  w     0                   0                           $          (          ,   0      0   0      4   0      8   0      <   0      @   0            F   •      cpsw-sleep-pins       œ  w                                                $         (         ,         0         4         8         <         @               F   –      davinci-mdio-default-pins         $  w  H   0      L         h              F   R      davinci-mdio-sleep-pins       $  w  H         L         h               F   S      mmc1-pins         T  w  `   (      ü   0       ø   0       ô   0       ð   0         0          0            F   ;      emmc-pins         x  w   €   0      „   0          0         0         0         0         0         0         0         0           F   A      uart2-pins          w  P   (     T              F   8      cpsw-b-default-pins       �  w                    ,         0         (         $                            @         <         8         4               F   O      cpsw-b-sleep-pins         �  w                    ,         0         (         $                            @         <         8         4               F   P      pmic-irq-default-pins           w  À   0            F   )         scm_conf@0            syscon simple-bus            ñ                            +           Ô                   F      phy-gmii-sel              ti,am3352-phy-gmii-sel           ñ  P           ‹           F   N      clocks                       +            F   —   clock-sys-clkin-22@40                          ti,mux-clock            -sys_clkin_ck            	   ,   -   .   /        š            ñ   @        F         clock-adc-tsc-fck                          fixed-factor-clock          -adc_tsc_fck         	           r           }           F   *      clock-dcan0-fck                        fixed-factor-clock        
  -dcan0_fck           	           r           }           F   ?      clock-dcan1-fck                        fixed-factor-clock        
  -dcan1_fck           	           r           }           F   @      clock-mcasp0-fck                           fixed-factor-clock          -mcasp0_fck          	           r           }           F   ˜      clock-mcasp1-fck                           fixed-factor-clock          -mcasp1_fck          	           r           }           F   ™      clock-smartreflex0-fck                         fixed-factor-clock          -smartreflex0_fck            	           r           }           F   š      clock-smartreflex1-fck                         fixed-factor-clock          -smartreflex1_fck            	           r           }           F   ›      clock-sha0-fck                         fixed-factor-clock        	  -sha0_fck            	           r           }           F   œ      clock-aes0-fck                         fixed-factor-clock        	  -aes0_fck            	           r           }           F   �      clock-rng-fck                          fixed-factor-clock          -rng_fck         	           r           }           F   ž      clock@664         
    ti,clksel            ñ  d                                 +       clock-ehrpwm0-tbclk@0            ñ                           ti,gate-clock           -ehrpwm0_tbclk           	   0        F   F      clock-ehrpwm1-tbclk@1            ñ                          ti,gate-clock           -ehrpwm1_tbclk           	   0        F   G      clock-ehrpwm2-tbclk@2            ñ                          ti,gate-clock           -ehrpwm2_tbclk           	   0        F   H               control@620           ti,am335x-usb-ctrl-module            ñ        H           ôphy_ctrl wakeup         F   Y      wkup_m3_ipc@1324              ti,am3352-wkup-m3-ipc            ñ  $   $        Û   N        –   1        Ÿ   2   3        ¦am335x-bone-scale-data.bin          F   Ÿ      dma-router@f90            ti,am335x-edma-crossbar          ñ  �   @        ´           ¿            Ì   $        F          clockdomains            F   ¡            target-module@31000           ti,sysc-omap2-timer ti,sysc          ñ                     ôrev sysc syss           Ï          Ü                  ê           	      Ä                      fck ick                      +           Ô                  Ø         É        F   ¢   timer@0           ti,am335x-timer-1ms          ñ               Û   C         ì        	   4        fck         û   4                   F   £         target-module@33000           ti,sysc       	  Èdisabled                         +           Ô     0          target-module@35000           ti,sysc-omap2 ti,sysc            ñ P     P    P           ôrev sysc syss           Ï   "        Ü                     ê           	      Ô            fck                      +           Ô     P       wdt@0             ti,omap3-wdt             ñ               Û   [        F   ¤         target-module@37000           ti,sysc       	  Èdisabled                         +           Ô     p          target-module@39000           ti,sysc       	  Èdisabled                         +           Ô     �          target-module@3e000           ti,sysc-omap4-simple ti,sysc             ñ àt    àx         	  ôrev sysc            Ü                     æ   5        	   6                fck                      +           Ô     à       rtc@0             ti,am3352-rtc ti,da830-rtc           ñ               Û   K   L        	                      ext-clk int-clk          "        F   ¥         target-module@40000           ti,sysc       	  Èdisabled                         +           Ô                      interconnect@48000000             ti,am33xx-l4-per simple-pm-bus          æ   	        	   7   (            fck       0   ñH      H     H     H     H     H             ôap la ia0 ia1 ia2 ia3                        +         H  Ô    H         H         H       0  H0     F   F    @  F@  F@   @          F   ¦   segment@0             simple-pm-bus                        +        ˆ  Ô                                                          €   €      �   �     `  `     p  p              0  0     @  @     P  P              °  °     €  €               @  @     P  P     À  À      à  à                              0  0     @  @     P  P     `  `     p  p     €  €     �  �     À  À     Ð  Ð                                                 	   	      
   
                                        °  °     €  €     �  �     À  À     Ð  Ð              °  °    F   F    @  F@  F@   @     target-module@8000            ti,sysc       	  Èdisabled                         +           Ô      €          target-module@14000           ti,sysc       	  Èdisabled                         +           Ô     @          target-module@16000           ti,sysc       	  Èdisabled                         +           Ô     `          target-module@22000           ti,sysc-omap2 ti,sysc            ñ  P     T     X           ôrev sysc syss           Ï           Ü                     	   7   4            fck                      +           Ô             serial@0              ti,am3352-uart          @Ül          ñ               Û   I      	  Èdisabled            E   $          $               Jtx rx           F   §         target-module@24000           ti,sysc-omap2 ti,sysc            ñ @P    @T    @X           ôrev sysc syss           Ï           Ü                     	   7   8            fck                      +           Ô     @       serial@0              ti,am3352-uart          @Ül          ñ               Û   J        Èokay            E   $          $               Jtx rx           Tdefault         b   8        F   ¨         target-module@2a000           ti,sysc-omap2 ti,sysc            ñ             �           ôrev sysc syss           Ï          Ü                     ê           	   7               fck                      +           Ô             i2c@0             ti,omap4-i2c                         +             ñ               Û   G      	  Èdisabled            F   ©         target-module@30000           ti,sysc-omap2 ti,sysc            ñ                      ôrev sysc syss           Ï          Ü                  ê           	   7               fck                      +           Ô             spi@0             ti,omap4-mcspi                       +             ñ               Û   A        :         0  E   $          $          $          $               Jtx0 rx0 tx1 rx1       	  Èdisabled            F   ª         target-module@38000           ti,sysc-omap4-simple ti,sysc             ñ €     €         	  ôrev sysc            Ü                  	   9               fck                      +           Ô     €     F   F    @     mcasp@0         7            ,            !                                              b          Tdefault         ê              ti,am33xx-mcasp-audio            ñ        F    @          ômpu dat         Û   P   Q        Htx rx           Èokay led        E   $         $   	           Jtx rx           F   «         target-module@3c000           ti,sysc-omap4-simple ti,sysc             ñ À     À         	  ôrev sysc            Ü                  	   9   L            fck                      +           Ô     À     F@  F@   @     mcasp@0           ti,am33xx-mcasp-audio            ñ        F@   @          ômpu dat         Û   R   S        Htx rx         	  Èdisabled            E   $   
      $              Jtx rx           F   ¬         target-module@40000           ti,sysc-omap4-timer ti,sysc          ñ                        ôrev sysc syss           Ï           Ü                     	   7   H       7   (            fck ick                      +           Ô                   Ø         É        F   ­   timer@0           ti,am335x-timer          ñ               Û   D        	   :        fck         û   :                   F   ®         target-module@42000           ti,sysc-omap4-timer ti,sysc          ñ                        ôrev sysc syss           Ï           Ü                     	   7   L            fck                      +           Ô             timer@0           ti,am335x-timer          ñ               Û   E        F   ¯         target-module@44000           ti,sysc-omap4-timer ti,sysc          ñ @     @    @           ôrev sysc syss           Ï           Ü                     	   7   P            fck                      +           Ô     @       timer@0           ti,am335x-timer          ñ               Û   \         X        F   °         target-module@46000           ti,sysc-omap4-timer ti,sysc          ñ `     `    `           ôrev sysc syss           Ï           Ü                     	   7   ´            fck                      +           Ô     `       timer@0           ti,am335x-timer          ñ               Û   ]         X        F   ±         target-module@48000           ti,sysc-omap4-timer ti,sysc          ñ €     €    €           ôrev sysc syss           Ï           Ü                     	   7   ¸            fck                      +           Ô     €       timer@0           ti,am335x-timer          ñ               Û   ^         X        F   ²         target-module@4a000           ti,sysc-omap4-timer ti,sysc          ñ                        ôrev sysc syss           Ï           Ü                     	   7   D            fck                      +           Ô             timer@0           ti,am335x-timer          ñ               Û   _         X        F   ³         target-module@4c000           ti,sysc-omap2 ti,sysc            ñ À     À    Á           ôrev sysc syss           Ï           Ü                     ê           	   7   t       7   t         
  fck dbclk                        +           Ô     À       gpio@0            ti,omap4-gpio         @  ÷   #              #      Z      #            #                                              4            ñ               Û   b        F   `         target-module@50000           ti,sysc       	  Èdisabled                         +           Ô                 target-module@60000           ti,sysc-omap2 ti,sysc            ñ ü                   ôrev sysc syss           Ï          Ü                  ê           	   7               fck                      +           Ô             mmc@0             ti,am335-sdhci          E   $          $               Jtx rx           Û   @         ñ               Èokay            e           Tdefault         b   ;        o   <              x   =        F   ´         target-module@80000           ti,sysc-omap2 ti,sysc            ñ                        ôrev sysc syss           Ï          Ü                  ê           	   7               fck                      +           Ô             elm@0             ti,am3352-elm            ñ                Û         	  Èdisabled            F   µ         target-module@a0000           ti,sysc       	  Èdisabled                         +           Ô     
           target-module@c8000           ti,sysc-omap4 ti,sysc            ñ €     €         	  ôrev sysc            Ï           Ü                  	   7   Ø            fck                      +           Ô     €       mailbox@0             ti,omap4-mailbox             ñ               Û   M        „           �           ¢           F   2   mbox-wkup-m3             ´        Ç                    Ò                   F   3            target-module@ca000           ti,sysc-omap2 ti,sysc            ñ                        ôrev sysc syss           Ï          Ü                  ê           	   7   Ô            fck                      +           Ô             spinlock@0            ti,omap4-hwspinlock          ñ               Ý           F   ¶         target-module@cc000           ti,sysc       	  Èdisabled                         +           Ô     À             segment@100000            simple-pm-bus                        +        h  Ô À  À     Ð  Ð     à  à     ð  ð     	À  À     	Ð  Ð     
`  `     
p  p     
€  €     
�  �     
         
°  °     
À  À     
Ð  Ð     
à  à     
ð  ð                       À  À      à  à                          €  €     �  �     
         
       
         
0  0     
@  @     
P  P       target-module@8c000           ti,sysc       	  Èdisabled                         +           Ô     À          target-module@8e000           ti,sysc       	  Èdisabled                         +           Ô     à          target-module@9c000           ti,sysc-omap2 ti,sysc            ñ 	À     	À    	À�           ôrev sysc syss           Ï          Ü                     ê           	   7               fck                      +           Ô     	À       i2c@0             ti,omap4-i2c                         +             ñ               Û           Èokay            Tdefault         b   >        @ †         F   ·   it66121         F   ü        Û                  Ä        ê            b   ý        Tdefault          ñ   M          ite,it66121    ports            +                   port@1           ñ      endpoint            F   ø        R   ÿ         port@0           ñ       endpoint            F           R   þ        e                  eeprom@54             atmel,24c256             ñ   T        F   ¸   nvmem-layout              fixed-layout                         +      cape_data@0          ñ               F   ¹            eeprom@55             atmel,24c256             ñ   U        F   º   nvmem-layout              fixed-layout                         +      cape_data@0          ñ               F   »            eeprom@56             atmel,24c256             ñ   V        F   ¼   nvmem-layout              fixed-layout                         +      cape_data@0          ñ               F   ½            eeprom@57             atmel,24c256             ñ   W        F   ¾   nvmem-layout              fixed-layout                         +      cape_data@0          ñ               F   ¿                  target-module@a0000           ti,sysc-omap2 ti,sysc            ñ 
      
    
           ôrev sysc syss           Ï          Ü                  ê           	   7               fck                      +           Ô     
        spi@0             ti,omap4-mcspi                       +             ñ               Û   }        :         0  E   $   *       $   +       $   ,       $   -            Jtx0 rx0 tx1 rx1       	  Èdisabled            F   À         target-module@a2000           ti,sysc       	  Èdisabled                         +           Ô     
           target-module@a4000           ti,sysc       	  Èdisabled                         +           Ô     
@          target-module@a6000           ti,sysc-omap2 ti,sysc            ñ 
`P    
`T    
`X           ôrev sysc syss           Ï           Ü                     	   7   <            fck                      +           Ô     
`       serial@0              ti,am3352-uart          @Ül          ñ               Û   ,      	  Èdisabled            F   Á         target-module@a8000           ti,sysc-omap2 ti,sysc            ñ 
€P    
€T    
€X           ôrev sysc syss           Ï           Ü                     	   7   @            fck                      +           Ô     
€       serial@0              ti,am3352-uart          @Ül          ñ               Û   -      	  Èdisabled            F   Â         target-module@aa000           ti,sysc-omap2 ti,sysc            ñ 
 P    
 T    
 X           ôrev sysc syss           Ï           Ü                     	   7                fck                      +           Ô     
        serial@0              ti,am3352-uart          @Ül          ñ               Û   .      	  Èdisabled            F   Ã         target-module@ac000           ti,sysc-omap2 ti,sysc            ñ 
À     
À    
Á           ôrev sysc syss           Ï           Ü                     ê           	   7   x       7   x         
  fck dbclk                        +           Ô     
À       gpio@0            ti,omap4-gpio         0  ÷   #       "      #      M      #      8   
                                     4            ñ               Û            F   Ä         target-module@ae000           ti,sysc-omap2 ti,sysc            ñ 
à     
à    
á           ôrev sysc syss           Ï           Ü                     ê           	   7   |       7   |         
  fck dbclk                        +           Ô     
à            F   Å   gpio@0            ti,omap4-gpio         P  ÷   #       B      #      b      #      K      #      �      #      d                                        4            ñ               Û   >        F   Æ         target-module@b0000           ti,sysc       	  Èdisabled                         +           Ô                target-module@cc000           ti,sysc-omap4 ti,sysc            ñ À            ôrev         	   7   ˆ       ?        fck osc                      +           Ô     À        can@0             ti,am3352-d_can          ñ                	   ?        fck         ë     D            Û   4      	  Èdisabled            F   Ç         target-module@d0000           ti,sysc-omap4 ti,sysc            ñ              ôrev         	   7   Œ       @        fck osc                      +           Ô              can@0             ti,am3352-d_can          ñ                	   @        fck         ë     D           Û   7      	  Èdisabled            F   È         target-module@d8000           ti,sysc-omap2 ti,sysc            ñ ‚ü    �    �           ôrev sysc syss           Ï          Ü                  ê           	   7   ¼            fck                      +           Ô     €       mmc@0             ti,am335-sdhci          E   $          $               Jtx rx           Û            ñ               Èokay            x   =        Tdefault         b   A        e           F   É            segment@200000            simple-pm-bus                        +           Ô              target-module@0           ti,sysc-omap4-simple ti,sysc            æ   B        	   C               fck          É                     +           Ô              mpu@0             ti,omap3-mpu            ú   D   E            segment@300000            simple-pm-bus                        +          Ô     0         0         0       0  00      @  0@      P  0P      à  0à      ð  0ð     €  1€   @  À  1À        1          1      P  1P     `  1`     p  1p     0  10     @  1@        2        2        2      0  20     @  2@     P  2P       target-module@0           ti,sysc-omap4 ti,sysc            ñ                   	  ôrev sysc                                 Ü                     	   7   œ            fck                      +           Ô              epwmss@0              ti,am33xx-pwmss          ñ                            +         	  Èdisabled            Ô                   F   Ê   pwm@100           ti,am3352-ecap                      ñ      €        	   0        fck       	  Èdisabled            F   Ë      counter@180           ti,am3352-eqep           ñ  €   €        	   0      
  sysclkout           Û   O      	  Èdisabled            F   Ì      pwm@200           ti,am3352-ehrpwm                        ñ      €        	   F   0      
  tbclk fck         	  Èdisabled            F   Í            target-module@2000            ti,sysc-omap4 ti,sysc            ñ                   	  ôrev sysc                                 Ü                     	   7   ”            fck                      +           Ô              epwmss@0              ti,am33xx-pwmss          ñ                            +         	  Èdisabled            Ô                   F   Î   pwm@100           ti,am3352-ecap                      ñ      €        	   0        fck       	  Èdisabled            F   Ï      counter@180           ti,am3352-eqep           ñ  €   €        	   0      
  sysclkout           Û   X      	  Èdisabled            F   Ð      pwm@200           ti,am3352-ehrpwm                        ñ      €        	   G   0      
  tbclk fck         	  Èdisabled            F   Ñ            target-module@4000            ti,sysc-omap4 ti,sysc            ñ  @      @         	  ôrev sysc                                 Ü                     	   7                fck                      +           Ô      @       epwmss@0              ti,am33xx-pwmss          ñ                            +         	  Èdisabled            Ô                   F   Ò   pwm@100           ti,am3352-ecap                      ñ      €        	   0        fck       	  Èdisabled            F   Ó      counter@180           ti,am3352-eqep           ñ  €   €        	   0      
  sysclkout           Û   Y      	  Èdisabled            F   Ô      pwm@200           ti,am3352-ehrpwm                        ñ      €        	   H   0      
  tbclk fck         	  Èdisabled            F   Õ            target-module@e000            ti,sysc-omap4 ti,sysc            ñ  à      àT         	  ôrev sysc                              Ü                  	   I                fck                      +           Ô      à       lcdc@0        	  ûstraight -ti          ti,am33xx-tilcdc             ñ               Û   $        Èokay led        F   Ö   port       endpoint@0          F   þ        R                  target-module@10000           ti,sysc-omap2 ti,sysc            ñ à    ä         	  ôrev sysc            Ï           Ü               	   7   X            fck                      +           Ô              rng@0             ti,omap4-rng             ñ                Û   o        F   ×         target-module@13000           ti,sysc       	  Èdisabled                         +           Ô     0          target-module@15000           ti,sysc       	  Èdisabled                         +           Ô     P        `          target-module@18000           ti,sysc       	  Èdisabled                         +           Ô     €   @       target-module@20000           ti,sysc       	  Èdisabled                         +           Ô                target-module@22000           ti,sysc       	  Èdisabled                         +           Ô                target-module@24000           ti,sysc       	  Èdisabled                         +           Ô     @                interconnect@47c00000             ti,am33xx-l4-fw simple-bus           ñGÀ     GÀ    GÀ          
  ôap la ia0                        +           Ô    GÀ             F   Ø   segment@0             simple-bus                       +        Ô  Ô                               À   À      Ð   Ð      à   à      ð   ð                              °  °     @  @     P  P     `  `     p  p                     €  €     �  �              °  °     à  à     ð  ð     À  À              `  `     p  p     @  @     P  P     €  €     �  �              0  0     Ð  Ð                     0  0     @  @     P  P       target-module@c000            ti,sysc       	  Èdisabled                         +           Ô      À          target-module@e000            ti,sysc       	  Èdisabled                         +           Ô      à          target-module@10000           ti,sysc       	  Èdisabled                         +           Ô                target-module@14000           ti,sysc       	  Èdisabled                         +           Ô     @          target-module@1a000           ti,sysc       	  Èdisabled                         +           Ô                target-module@24000           ti,sysc       	  Èdisabled                         +           Ô     @          target-module@26000           ti,sysc       	  Èdisabled                         +           Ô     `          target-module@28000           ti,sysc       	  Èdisabled                         +           Ô     €          target-module@30000           ti,sysc       	  Èdisabled                         +           Ô                target-module@32000           ti,sysc       	  Èdisabled                         +           Ô                target-module@38000           ti,sysc       	  Èdisabled                         +           Ô     €          target-module@3a000           ti,sysc       	  Èdisabled                         +           Ô                target-module@3c000           ti,sysc       	  Èdisabled                         +           Ô     À          target-module@3e000           ti,sysc       	  Èdisabled                         +           Ô     à          target-module@40000           ti,sysc       	  Èdisabled                         +           Ô                target-module@42000           ti,sysc       	  Èdisabled                         +           Ô                target-module@44000           ti,sysc       	  Èdisabled                         +           Ô     @          target-module@46000           ti,sysc       	  Èdisabled                         +           Ô     `                interconnect@4a000000              ti,am33xx-l4-fast simple-pm-bus         æ   	        	   J                fck          ñJ      J     J           
  ôap la ia0                        +           Ô    J              F   Ù   segment@0             simple-pm-bus                        +         „  Ô                                     €  €  €                                  (   (      0   0      8   8        target-module@100000              ti,sysc-omap4-simple ti,sysc             ñ                     ôrev sysc syss           Ï                           Ü               ê           	   K               fck                      +           Ô         €    ethernet@0            ti,am335x-cpsw ti,cpsw          	   L   M      	  fck cpts                       *           6            B            N           U            b€           r            ñ                                  +           Û   (   )   *   +        Ô          €         �         	  Èdisabled            F   Ú   mdio@1000             ti,cpsw-mdio ti,davinci_mdio            	   K               fck                      +            ƒ B@         ñ            	  Èdisabled            F   Û      slave@200           Œ                ˜   N              F   Ü      slave@300           Œ                ˜   N              F   Ý         switch@0          %    ti,am335x-cpsw-switch ti,cpsw-switch             ñ      @         Ô          @         	   L        fck                      +           �           Èokay            Û   (   )   *   +        Hrx_thresh rx tx misc            Tdefault sleep           b   O        �   P        F   Þ   ethernet-ports                       +       port@1           ñ           §port1           Œ                ˜   N              ­   Q      	  ¸rgmii-id            Á           F   ß      port@2           ñ           §port2           Œ                ˜   N            	  Èdisabled            F   à         mdio@1000             ti,cpsw-mdio ti,davinci_mdio            	   L        fck                      +            ƒ B@         ñ              Tdefault sleep           b   R        �   S        F   á   ethernet-phy@0           ñ            Ó   	        è   	        ý                     #        F   Q         cpts            	   M        cpts                target-module@180000              ti,sysc       	  Èdisabled                         +           Ô                target-module@200000              ti,sysc       	  Èdisabled                         +           Ô                 target-module@300000              ti,sysc-pruss ti,sysc            ñ 2`     2`         	  ôrev sysc            Ï   0                          Ü                  	   T                fck         þ   	           rstctrl                      +           Ô     0             Èokay            F   â   pruss@0           ti,am3356-pruss          ñ                            +            Ô        F   ã   memories@0           ñ                     0         ôdram0 dram1 shrdram2            F   ä      cfg@26000             ti,pruss-cfg syscon          ñ `                          +           Ô     `             F   å   clocks                       +       iepclk-mux@30            ñ   0                     	      U        F   æ            mii-rt@32000              ti,pruss-mii syscon          ñ      X        F   ç      interrupt-controller@20000            ti,pruss-intc            ñ                Û                              X  Hhost_intr0 host_intr1 host_intr2 host_intr3 host_intr4 host_intr5 host_intr6 host_intr7                  4           F   è      pru@34000             ti,am3356-pru            ñ @            $            ôiram control debug          ¦am335x-pru0-fw          F   é      pru@38000             ti,am3356-pru            ñ €      @     D            ôiram control debug          ¦am335x-pru1-fw          F   ê      mdio@32400            ti,davinci_mdio          ñ $    �        	           fck         ƒ B@                     +          	  Èdisabled            F   ë                  interconnect@4b140000             ti,am33xx-l4-mpuss simple-bus            ñKD    KH            ôla ap                        +           Ô    K    €         F   ì   segment@0             simple-bus                       +         `  Ô  H   H                          @   @      P   P                 0   0                target-module@0           ti,sysc       	  Èdisabled                         +         $  Ô                                     target-module@3000            ti,sysc       	  Èdisabled                         +           Ô      0                interrupt-controller@48200000             ti,am33xx-intc                   4            ñH              F         target-module@49000000            ti,sysc-omap4 ti,sysc            ñI              ôrev         	      ˜            fck                      +           Ô    I         dma@0             ti,edma3-tpcc            ñ             	  ôedma3_cc            Û               '  Hedma3_ccint edma3_mperr edma3_ccerrint          ¿   @        ´           A   V      W      X            J              F   $         target-module@49800000            ti,sysc-omap4 ti,sysc            ñI€     I€          	  ôrev sysc            Ï                       Ü               	                   fck                      +           Ô    I€        dma@0             ti,edma3-tptc            ñ               Û   p        Hedma3_tcerrint          F   V         target-module@49900000            ti,sysc-omap4 ti,sysc            ñI�     I�          	  ôrev sysc            Ï                       Ü               	      Ø            fck                      +           Ô    I�        dma@0             ti,edma3-tptc            ñ               Û   q        Hedma3_tcerrint          F   W         target-module@49a00000            ti,sysc-omap4 ti,sysc            ñI      I           	  ôrev sysc            Ï                       Ü               	      Ü            fck                      +           Ô    I         dma@0             ti,edma3-tptc            ñ               Û   r        Hedma3_tcerrint          F   X         target-module@47810000            ti,sysc-omap2 ti,sysc            ñG�ü   G�   G�           ôrev sysc syss           Ï          Ü                  ê           	   9   Ü            fck                      +           Ô    G�        mmc@0             ti,am335-sdhci          Û            ñ             	  Èdisabled            F   í         target-module@47400000            ti,sysc-omap4 ti,sysc            ñG@     G@          	  ôrev sysc            Ï                             Ü                     b           	   9                fck                      +           Ô    G@    €         F   î   usb-phy@1300              ti,am335x-usb-phy            ñ              ôphy         s   Y        ‹            F   Z      usb@1400              ti,musb-am33xx           ñ                    ômc control          Û           Hmc          peripheral          ‡           ™           ¨           ¸  ô        ˜   Z     h  E   [           [          [          [          [          [          [          [          [          [   	       [   
       [          [          [          [          [          [         [         [         [         [         [         [         [         [   	      [   
      [         [         [         [            „  Jrx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15         Å              F   ï      usb-phy@1b00              ti,am335x-usb-phy            ñ              ôphy         s   Y        ‹            F   \      usb@1800              ti,musb-am33xx           ñ                    ômc control          Û           Hmc          host            ‡           ™           ¨           ¸  ô        ˜   \     h  E   [          [          [          [          [          [          [          [          [          [          [          [          [          [          [          [         [         [         [         [         [         [         [         [         [         [         [         [         [         [            „  Jrx1 rx2 rx3 rx4 rx5 rx6 rx7 rx8 rx9 rx10 rx11 rx12 rx13 rx14 rx15 tx1 tx2 tx3 tx4 tx5 tx6 tx7 tx8 tx9 tx10 tx11 tx12 tx13 tx14 tx15         F   ð      dma-controller@2000           ti,am3359-cppi41              ñ                0      @   @       #  ôglue controller scheduler queuemgr          Û           Hglue            ´           Ù           Ú           ç           ¿           F   [         target-module@40300000            ti,sysc-omap4-simple ti,sysc            	                  fck          É                     +           Ô    @0        sram@0        
    mmio-sram            ñ               Ô                                +           F   ñ   pm-code-sram@0            ti,sram          ñ                õ        F   D      pm-data-sram@1000             ti,sram          ñ                       F   E            target-module@4c000000            ti,sysc-omap4-simple ti,sysc             ñL              ôrev         	                  fck          É                     +           Ô    L         emif@0            ti,emif-am3352           ñ               Û   e        ý   D   E        F   ò         target-module@50000000            ti,sysc-omap2 ti,sysc            ñP      P     P             ôrev sysc syss           Ü                  ê           	   9               fck                      +           ÔP   P              @      gpmc@50000000             ti,am3352-gpmc           ñP               Û   d        E   $   4            Jrxtx                                               +                    4                             	  Èdisabled            F   ó         target-module@53100000            ti,sysc-omap3-sham ti,sysc           ñS    S   S           ôrev sysc syss           Ï           Ü                  ê           	      |            fck                      +           Ô    S             F   ô   sham@0            ti,omap4-sham            ñ               Û   m        E   $   $            Jrx          Èokay            F   õ         target-module@53500000            ti,sysc-omap2 ti,sysc            ñSP €   SP „   SP ˆ           ôrev sysc syss           Ï           Ü                     ê           	      p            fck                      +           Ô    SP             F   ö   aes@0             ti,omap4-aes             ñ                Û   g        E   $          $               Jtx rx           Èokay            F   ÷         target-module@56000000            ti,sysc-omap4 ti,sysc            ñV þ    V þ         	  ôrev sysc                              Ü                  	   ]               fck         æ   ^        þ   ^            rstctrl                      +           Ô    V         gpu@0         #    ti,omap3630-gpu img,powervr-sgx530           ñ               Û   %            memory@80000000          åmemory           ñ€            leds            Tdefault         b   _      
    gpio-leds      led2            §beaglebone:green:heartbeat          r   `             
  %heartbeat           ;off       led3            §beaglebone:green:mmc0           r   `               %mmc0            ;off       led4            §beaglebone:green:usr2           r   `               %cpu0            ;off       led5            §beaglebone:green:usr3           r   `               %mmc1            ;off          fixedregulator0           regulator-fixed         ¶vmmcsd_fixed            Å 2Z         Ý 2Z         F   =      regulator-sys-5v              regulator-fixed         ¶sys_5v          Å LK@        Ý LK@                 F   (      regulator-v3v3            regulator-fixed         ¶v3v3                     F   '      __symbols__         I/cpus/cpu@0         M/cpus/idle-states/mpu_gate          V/opp-table          e/ocp            i/ocp/interconnect@44c00000        @  q/ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0       A  y/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0          H  ~/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks       X  Š/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768       X  —/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k       \  ¤/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000       \  µ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000       \  Æ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000       \  ×/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000       U  è/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin          R  ò/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490         [  ÿ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2        _  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480        _  	/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484        _  	//ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8        R  	?/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488         ^  	K/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8         R  	Z/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494         ^  	f/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0         _  	u/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2        R  	‰/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498         _  	–/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4        R  	¦/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c         ^  	²/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac         f  	Á/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm         _  	Ü/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4        X  	ð/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz       X  	ú/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k       V  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk         a  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530          \  
/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914       ]  
&/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528          ]  
1/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508          ]  
</ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c          ]  
G/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510          ]  
R/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518          ]  
]/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c          ]  
h/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504          _  
s/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c        `  
~/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2       `  
“/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4       [  
 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538        Z  
©/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk         X  
µ/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk       W  
¿/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk        X  
È/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk       X  
Ò/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk       Y  
Ü/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div          _  
ê/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk        `  
û/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520       b  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c         [   /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534        R  )/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc         j  1/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel@1         f  D/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div@0         h  S/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre@0       f  d/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div@3         b  s/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2@7         N  ~/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clockdomains         I  �/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0          R  —/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38         R  ¤/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c         R  °/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24         S  »/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120        R  È/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8         Q  Ú/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0          R  î/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18         S  û/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c        K  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400        S  /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0        T  %/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14       T  4/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0       K  H/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600        S  O/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0        K  [/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800        S  e/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0        K  t/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900        S  ~/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0        K  �/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00        S  š/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0        I  ¬/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00          I  ´/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00          I  ½/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00          I  Å/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00          J  Ð/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000         J  Ø/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100         J  à/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200         =  ë/ocp/interconnect@44c00000/segment@200000/target-module@7000          D  ø/ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0       F  þ/ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0         C   I/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0        M  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/eeprom@50          k  /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/eeprom@50/nvmem-layout/baseboard_data@0        K  $/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/pmic@30        \  -/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/pmic@30/regulators/buck1       \  3/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/pmic@30/regulators/buck2       \  9/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/pmic@30/regulators/buck3       [  ?/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/pmic@30/regulators/ldo1        [  H/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/pmic@30/regulators/ldo2        F  Q/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0         J  X/ocp/interconnect@44c00000/segment@200000/target-module@d000/tscadc@0/adc         D  c/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0       O  g/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800        a  u/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/user-leds-s0-pins          Y  ‚/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/i2c0-pins          Y  Œ/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/i2c2-pins          Z  –/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/uart0-pins         \  ¡/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/clkout2-pins       a  ­/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw-default-pins          _  º/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw-sleep-pins        i  Å/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci-mdio-default-pins          g  Ú/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/davinci-mdio-sleep-pins        Y  í/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/mmc1-pins          Y  ÷/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/emmc-pins          Z  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/uart2-pins         c  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw-b-default-pins        a  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/cpsw-b-sleep-pins          e  (/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/pmic-irq-default-pins          O  >/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0        \  G/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel       V  T/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks         l  _/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40       h  l/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck       f  x/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck         f  ‚/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck         g  Œ/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck        g  —/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck        m  ¢/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck          m  ³/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck          e  Ä/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck          e  Í/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck          d  Ö/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck       v  Þ/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk@0         v  ì/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk@1         v  ú/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk@2         P  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620       U  /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324          S  !/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90        Q  +/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/clockdomains          >  </ocp/interconnect@44c00000/segment@200000/target-module@31000         F  J/ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0         D  Q/ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0       D  Ô/ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0         V/ocp/interconnect@48000000        B  ]/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0         B  c/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0         ?   N/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0        ?   ¾/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0        A  i/ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0          A  p/ocp/interconnect@48000000/segment@0/target-module@3c000/mcasp@0          9  w/ocp/interconnect@48000000/segment@0/target-module@40000          A  …/ocp/interconnect@48000000/segment@0/target-module@40000/timer@0          A  Œ/ocp/interconnect@48000000/segment@0/target-module@42000/timer@0          A  “/ocp/interconnect@48000000/segment@0/target-module@44000/timer@0          A  š/ocp/interconnect@48000000/segment@0/target-module@46000/timer@0          A  ¡/ocp/interconnect@48000000/segment@0/target-module@48000/timer@0          A  ¨/ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0          @  ¯/ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0       ?   Í/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0        ?  µ/ocp/interconnect@48000000/segment@0/target-module@80000/elm@0        C  ¹/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0        P  Á/ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0/mbox-wkup-m3       D  Í/ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0       D   S/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0       N  Ø/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@54         g  å/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@54/nvmem-layout/cape_data@0        N  ð/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@55         g  ý/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@55/nvmem-layout/cape_data@0        N  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@56         g  /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@56/nvmem-layout/cape_data@0        N   /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@57         g  -/ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/eeprom@57/nvmem-layout/cape_data@0        D   Ã/ocp/interconnect@48000000/segment@100000/target-module@a0000/spi@0       G  8/ocp/interconnect@48000000/segment@100000/target-module@a6000/serial@0        G  >/ocp/interconnect@48000000/segment@100000/target-module@a8000/serial@0        G  D/ocp/interconnect@48000000/segment@100000/target-module@aa000/serial@0        E  J/ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0          >  P/ocp/interconnect@48000000/segment@100000/target-module@ae000         E  ]/ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0          D  c/ocp/interconnect@48000000/segment@100000/target-module@cc000/can@0       D  i/ocp/interconnect@48000000/segment@100000/target-module@d0000/can@0       D   Ò/ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0       C  o/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0        K  w/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@100        O  }/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/counter@180        K  ƒ/ocp/interconnect@48000000/segment@300000/target-module@0/epwmss@0/pwm@200        F  ‹/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0         N  “/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@100         R  ™/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/counter@180         N  Ÿ/ocp/interconnect@48000000/segment@300000/target-module@2000/epwmss@0/pwm@200         F  §/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0         N  ¯/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@100         R  µ/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/counter@180         N  »/ocp/interconnect@48000000/segment@300000/target-module@4000/epwmss@0/pwm@200         D  Ã/ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0       D  È/ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0         Ì/ocp/interconnect@47c00000          Ò/ocp/interconnect@4a000000        E  Ú/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0          O  Þ/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/mdio@1000        O  ë/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@200        O  ö/ocp/interconnect@4a000000/segment@0/target-module@100000/ethernet@0/slave@300        C  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0        Y  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@1          Y  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/ethernet-ports/port@2          M  /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000          \  ./ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000/ethernet-phy@0       :  8/ocp/interconnect@4a000000/segment@0/target-module@300000         B  A/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0         M  G/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/memories@0          L  Q/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000       a  [/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000/clocks/iepclk-mux@30          O  l/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000        ]  y/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000          L  „/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000       L  ‰/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000       M  Ž/ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mdio@32400            ™/ocp/interconnect@4b140000        #  /ocp/interrupt-controller@48200000        "  ¢/ocp/target-module@49000000/dma@0         "  §/ocp/target-module@49800000/dma@0         "  ²/ocp/target-module@49900000/dma@0         "  ½/ocp/target-module@49a00000/dma@0         "  È/ocp/target-module@47810000/mmc@0           Í/ocp/target-module@47400000       )  Ñ/ocp/target-module@47400000/usb-phy@1300          %   –/ocp/target-module@47400000/usb@1400          )  Ú/ocp/target-module@47400000/usb-phy@1b00          %   ›/ocp/target-module@47400000/usb@1800          0  ã/ocp/target-module@47400000/dma-controller@2000       #  í/ocp/target-module@40300000/sram@0        2  õ/ocp/target-module@40300000/sram@0/pm-code-sram@0         5  /ocp/target-module@40300000/sram@0/pm-data-sram@1000          #  /ocp/target-module@4c000000/emif@0        *  /ocp/target-module@50000000/gpmc@50000000           /ocp/target-module@53100000       #  %/ocp/target-module@53100000/sham@0          */ocp/target-module@53500000       "  5/ocp/target-module@53500000/aes@0           9/fixedregulator0            F/regulator-sys-5v           M/regulator-v3v3          	compatible interrupt-parent #address-cells #size-cells model stdout-path i2c0 i2c1 i2c2 serial0 serial1 serial2 serial3 serial4 serial5 d-can0 d-can1 usb0 usb1 phy0 phy1 ethernet0 ethernet1 spi0 spi1 mmc0 mmc1 mmc2 enable-method device_type reg operating-points-v2 clocks clock-names clock-latency cpu-idle-states cpu0-supply phandle entry-latency-us exit-latency-us min-residency-us ti,idle-wkup-m3 syscon opp-hz opp-microvolt opp-supported-hw opp-suspend ti,no-idle ranges interrupts power-domains reg-names resets reset-names ti,pm-firmware #clock-cells clock-output-names clock-frequency ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-rate-parent ti,bit-shift #reset-cells #power-domain-cells status ti,sysc-mask ti,sysc-sidle ti,syss-mask gpio-ranges gpio-controller #gpio-cells interrupt-controller #interrupt-cells dmas dma-names pinctrl-names pinctrl-0 vcc-supply buck1-supply buck2-supply buck3-supply ldo1-supply ldo2-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on #io-channel-cells #pinctrl-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins #phy-cells ti,rproc mboxes firmware-name #dma-cells dma-requests dma-masters ti,no-reset-on-init ti,timer-alwon assigned-clocks assigned-clock-parents system-power-controller ti,spi-num-cs interrupt-names ti,timer-pwm bus-width cd-gpios vmmc-supply #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-send-noirq ti,mbox-tx ti,mbox-rx #hwlock-cells syscon-raminit pm-sram ti,sysc-midle #pwm-cells cpdma_channels ale_entries bd_ram_size mac_control slaves active_slave cpts_clock_mult cpts_clock_shift bus_freq mac-address phys pinctrl-1 label phy-handle phy-mode ti,dual-emac-pvid ti,rx-internal-delay ti,tx-internal-delay ti,fifo-depth ti,min-output-impedance ti,dp83867-rxctrl-strap-quirk ti,tptcs ti,edma-memcpy-channels ti,sysc-delay-us ti,ctrl_mod dr_mode mentor,multipoint mentor,num-eps mentor,ram-bits mentor,power interrupts-extended #dma-channels #dma-requests protect-exec pool gpmc,num-cs gpmc,num-waitpins linux,default-trigger default-state cpu mpu_gate cpu0_opp_table ocp l4_wkup wkup_m3 prcm prcm_clocks clk_32768_ck clk_rc32k_ck virt_19200000_ck virt_24000000_ck virt_25000000_ck virt_26000000_ck tclkin_ck dpll_core_ck dpll_core_x2_ck dpll_core_m4_ck dpll_core_m5_ck dpll_core_m6_ck dpll_mpu_ck dpll_mpu_m2_ck dpll_ddr_ck dpll_ddr_m2_ck dpll_ddr_m2_div2_ck dpll_disp_ck dpll_disp_m2_ck dpll_per_ck dpll_per_m2_ck dpll_per_m2_div4_wkupdm_ck dpll_per_m2_div4_ck clk_24mhz clkdiv32k_ck l3_gclk pruss_ocp_gclk mmu_fck timer1_fck timer2_fck timer3_fck timer4_fck timer5_fck timer6_fck timer7_fck usbotg_fck dpll_core_m4_div2_ck ieee5000_fck wdt1_fck l4_rtc_gclk l4hs_gclk l3s_gclk l4fw_gclk l4ls_gclk sysclk_div_ck cpsw_125mhz_gclk cpsw_cpts_rft_clk gpio0_dbclk_mux_ck lcd_gclk mmc_clk gfx_fclk_clksel_ck gfx_fck_div_ck sysclkout_pre_ck clkout2_div_ck clkout2_ck prcm_clockdomains per_cm l4ls_clkctrl l3s_clkctrl l3_clkctrl l4hs_clkctrl pruss_ocp_clkctrl cpsw_125mhz_clkctrl lcdc_clkctrl clk_24mhz_clkctrl wkup_cm l4_wkup_clkctrl l3_aon_clkctrl l4_wkup_aon_clkctrl mpu_cm mpu_clkctrl l4_rtc_cm l4_rtc_clkctrl gfx_l3_cm gfx_l3_clkctrl l4_cefuse_cm l4_cefuse_clkctrl prm_per prm_wkup prm_mpu prm_device prm_rtc prm_gfx prm_cefuse gpio0_target gpio0 uart0 baseboard_eeprom baseboard_data tps65214 buck1 buck2 buck3 ldo1_reg ldo2_reg tscadc am335x_adc scm am33xx_pinmux user_leds_s0 i2c0_pins i2c2_pins uart0_pins clkout2_pin cpsw_default cpsw_sleep davinci_mdio_default davinci_mdio_sleep mmc1_pins emmc_pins uart2_pins cpsw_b_default cpsw_b_sleep pmic_irq_pins_default scm_conf phy_gmii_sel scm_clocks sys_clkin_ck adc_tsc_fck dcan0_fck dcan1_fck mcasp0_fck mcasp1_fck smartreflex0_fck smartreflex1_fck sha0_fck aes0_fck rng_fck ehrpwm0_tbclk ehrpwm1_tbclk ehrpwm2_tbclk usb_ctrl_mod wkup_m3_ipc edma_xbar scm_clockdomains timer1_target timer1 wdt2 l4_per uart1 uart2 mcasp0 mcasp1 timer2_target timer2 timer3 timer4 timer5 timer6 timer7 gpio1 elm mailbox mbox_wkupm3 hwspinlock cape_eeprom0 cape0_data cape_eeprom1 cape1_data cape_eeprom2 cape2_data cape_eeprom3 cape3_data uart3 uart4 uart5 gpio2 gpio3_target gpio3 dcan0 dcan1 epwmss0 ecap0 eqep0 ehrpwm0 epwmss1 ecap1 eqep1 ehrpwm1 epwmss2 ecap2 eqep2 ehrpwm2 lcdc rng l4_fw l4_fast mac davinci_mdio cpsw_emac0 cpsw_emac1 mac_sw cpsw_port1 cpsw_port2 davinci_mdio_sw dp83867_0 pruss_tm pruss pruss_mem pruss_cfg pruss_iepclk_mux pruss_mii_rt pruss_intc pru0 pru1 pruss_mdio l4_mpuss edma edma_tptc0 edma_tptc1 edma_tptc2 mmc3 usb usb0_phy usb1_phy cppi41dma ocmcram pm_sram_code pm_sram_data emif gpmc sham_target sham aes_target aes vmmcsd_fixed sys_5v v3v3 remote-endpoint enable-gpios simple-audio-card,name simple-audio-card,format simple-audio-card,bitclock-master simple-audio-card,frame-master sound-dai #sound-dai-cells blue-and-red-wiring op-mode tdm-slots serial-dir tx-num-evt rx-num-evt 