Ðþí  #Z   8  ¬   (            ®  t                                                      /   onion,omega4-evb onion,omega4 rockchip,rv1103b           &            7Onion Omega4 Evaluation Board      arm-pmu          arm,cortex-a7-pmu            =                   H         cpus                                 cpu@0            arm,cortex-a7            [             _               fcpu          r            timer            arm,armv7-timer          zn6          =                      oscillator-24m           fixed-clock          zn6          Šxin24m           �          pinctrl          rockchip,rv1103b-pinctrl             ª             ·                            gpio@20520000            rockchip,gpio-bank           [ R              _      Y      Z          ¾         =       K             Î         ã            ï            r         gpio@20d80000            rockchip,gpio-bank           [ Ø              _      P      Q          ¾         =       O             Î         ã            ï         gpio@20840000            rockchip,gpio-bank           [ „              _      ¡      ¢          ¾         =       S             Î         ã            ï            r         pcfg-pull-up                       r         pcfg-pull-none                    r         pcfg-pull-none-drv-level-0                                r   	      pcfg-pull-up-drv-level-2                                  r         pcfg-pull-none-smt                    )         r         cam-clk0          cam-clk1          cam-spi       clk       clk-24m       cpu       emmc       emmc-bus4         @  >                                                          r         emmc-clk            >                     r         emmc-cmd            >                     r            fspi       fspi-bus4         @  >                                                          r         fspi-cs0            >                     r         fspi-clk            >                     r            i2c0          i2c1          i2c2          i2c3          i2c4          jtag          psram-spi         pwm0          pwm1          pwm2          pwr       rtc_32k       sai       sdmmc0     sdmmc0-bus4       @  >                                                         r         sdmmc0-clk          >      	               r         sdmmc0-cmd          >      
               r         sdmmc0-det          >                     r            sdmmc1     sdmmc1-bus4       @  >                                                          r         sdmmc1-clk          >                     r         sdmmc1-cmd          >                     r            spi0          uart0      uart0m0-xfer             >                                   r   
         uart1      uart1m0-xfer             >       
                            r            uart2      uart2m0-xfer             >       	                            r            sdio-pwrseq    wifi-enable-h           >      
                r            sdmmc      sdmmc-pwren         >                       r          sdmmc-volt          >                       r   !         wireless-wlan         leds       led         >                       r   "            soc          simple-bus                                     ·   clock-controller@20000000            rockchip,rv1103b-cru             [               �           L            r         syscon@20160000       +   rockchip,rv1103b-pmu-grf syscon simple-mfd           [         reboot-mode          syscon-reboot-mode          Y           `RBÃ         lRBÃ        zRBÃ	        ŠRBÃ         syscon@20170000          rockchip,rv1103b-ioc syscon          [               r         interrupt-controller@20411000            arm,gic-400           [ A     A       A@      A`              =      	            Î         ï                          r         serial@20540000       '   rockchip,rv1103b-uart snps,dw-apb-uart           [ T              _             f        –baudclk apb_pclk             =       E           ¢default         °   
        º           Ä           Ñokay             Ø      mmc@20650000          1   rockchip,rv1103b-dw-mshc rockchip,rk3576-dw-mshc             [ e    @          _      ¦      *        –biu ciu         ã            =       ,           îðÑ€        ¢default         °                 Ñokay            ü                              $        :            E         K         R      serial@20870000       '   rockchip,rv1103b-uart snps,dw-apb-uart           [ ‡              _      !      š        –baudclk apb_pclk             =       F           ¢default         °           º           Ä         	  Ñdisabled          serial@20880000       '   rockchip,rv1103b-uart snps,dw-apb-uart           [ ˆ              _      "      ™        –baudclk apb_pclk             =       G           ¢default         °           º           Ä         	  Ñdisabled          mmc@20d20000          1   rockchip,rv1103b-dw-mshc rockchip,rk3576-dw-mshc             [ Ò    @          _      N              –biu ciu         ã            =       *           îðÑ€        ¢default         °                    Ñokay            ü            `                  r         }         K         …        “           Ÿ         mmc@20d30000          1   rockchip,rv1103b-dw-mshc rockchip,rk3576-dw-mshc             [ Ó    @          _      K              –biu ciu         ã            =       3           îðÑ€        ¢default         °               	  Ñdisabled          spi@20d40000             rockchip,sfc             [ Ô    @          _            L        –clk_sfc hclk_sfc             =       4           ¢default         °                                           Ñokay       flash@0       	   spi-nand             [             ¬         »        ËxhÀ        Ý           î      partitions           fixed-partitions                                partition@0          [               ÿenv       partition@40000          [              ÿidblock                partition@140000             [              ÿuboot                  partition@240000             [ $   €          ÿboot          partition@a40000             [ ¤  \          ÿubi                sram@210f6000         
   mmio-sram            [!`   €          ·    !`   €                                   sdio-pwrseq          mmc-pwrseq-simple           ¢default         °             ,        &      
            r         vcc3v3-sd            regulator-fixed         2                 ¢default         °          
  7vcc3v3_sd           F 2Z         ^ 2Z          r         vccio-sd             regulator-gpio          ,                  ¢default         °   !      	  7vccio_sd            F w@        ^ 2Z         v 2Z     w@             r         aliases         }/soc/serial@20540000          chosen          …serial0:115200n8          leds          
   gpio-leds      led-0           ‘           —on          ¥status          ,                  ÿsys         ¢default         °   "            	#address-cells #size-cells compatible interrupt-parent model interrupts interrupt-affinity reg clocks device_type phandle clock-frequency clock-output-names #clock-cells rockchip,grf ranges gpio-controller interrupt-controller #gpio-cells #interrupt-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins #reset-cells offset mode-normal mode-recovery mode-bootloader mode-loader clock-names pinctrl-names pinctrl-0 reg-shift reg-io-width status bootph-all fifo-depth max-frequency bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq no-sd no-mmc non-removable cap-mmc-highspeed disable-wp no-sdio sd-uhs-sdr104 vmmc-supply vqmmc-supply bootph-pre-ram bootph-some-ram spi-max-frequency spi-rx-bus-width spi-tx-bus-width label read-only post-power-on-delay-ms reset-gpios gpio regulator-name regulator-min-microvolt regulator-max-microvolt states serial0 stdout-path color default-state function 