Ðþí P   8 	T   (            	ü 	                                                                   ,   ,TQ-Systems i.MX8DXP TQMa8XDPS on MB-SMARC-2       A   2tq,imx8dxp-tqma8xdps-mb-smarc-2 tq,imx8dxp-tqma8xdps fsl,imx8dxp       aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          �/bus@5a000000/i2c@5a800000           †/bus@5a000000/i2c@5a810000           ‹/bus@5a000000/i2c@5a820000           �/bus@5a000000/i2c@5a830000           •/bus@5b000000/mmc@5b010000           š/bus@5b000000/mmc@5b020000           Ÿ/bus@5b000000/mmc@5b030000           ¤/bus@5d000000/mailbox@5d1b0000           ¨/bus@5d000000/mailbox@5d1c0000           ¬/bus@5d000000/mailbox@5d1d0000           °/bus@5d000000/mailbox@5d1e0000           ´/bus@5d000000/mailbox@5d1f0000           ¸/bus@5a000000/serial@5a060000            À/bus@5a000000/serial@5a070000            È/bus@5a000000/serial@5a080000            Ð/bus@5a000000/serial@5a090000            Ø/bus@5a000000/spi@5a000000           Ý/bus@5a000000/spi@5a010000           â/bus@5a000000/spi@5a020000           ç/bus@5a000000/spi@5a030000            ì/vpu@2c000000/vpu-core@2d080000           ö/vpu@2c000000/vpu-core@2d090000       "   /bus@5a000000/i2c@5a800000/rtc@51           /system-controller/rtc        cpus                                 cpu@0           
cpu          2arm,cortex-a35                          psci            (  €         5   @        G           T  €         a   @        s   €        €           ‘     û           ˜           ¬           »         cpu@1           
cpu          2arm,cortex-a35                         psci            (  €         5   @        G           T  €         a   @        s   €        €           ‘     û           ˜           ¬           »   	      l2-cache0            2cache           Ã            Ï        *           7   @        I           »            opp-table            2operating-points-v2          Ý        »      opp-900000000           è    5¤é         ï B@        ý Ið      opp-1200000000          è    G†Œ         ï Èà        ý Ið                  interrupt-controller@51a00000            2arm,gic-v3               Q              Q°                                          +        @      	           »         reserved-memory                                   K   decoder-boot@84000000               „                   R        »   $      encoder-boot@86000000               †                    R        »   '      decoder-rpc@92000000                ’                   R        »   %      dsp@92400000                ’@                  R      	  Ydisabled          linux,cma            2shared-dma-pool          `        0                i    –       0            v      m4@88000000          R            ˆ                	  Ydisabled          vdev0vring0@90000000             2shared-dma-pool             �         €          R      	  Ydisabled          vdev0vring1@90008000             2shared-dma-pool             � €       €          R      	  Ydisabled          vdev1vring0@90010000             2shared-dma-pool             �        €          R      	  Ydisabled          vdev1vring1@90018000             2shared-dma-pool             �€       €          R      	  Ydisabled          rsc-table@900ff000              �ð                 R      	  Ydisabled          vdevbuffer@90400000          2shared-dma-pool             �@                  R      	  Ydisabled          encoder-rpc@92100000                ’       p           R        »   (         pmu          2arm,cortex-a35-pmu          @               psci             2arm,psci-1.0            !smc       system-controller            2fsl,imx-scu         ˆtx0 rx0 gip3          $  “                                 power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           š           »         clock-controller             2fsl,imx8qxp-clk fsl,scu-clk         ®           »         pinctrl          2fsl,imx8qxp-iomuxc          »   �   backlight-lvds0grp          »   [      !        »   ¯      backlight-lvds1grp          »   Y      !        »   ±      can1grp         »   q      !   r      !        »   t      can2grp         »   n       !   m       !        »   u      ethphy0grp          »   y      @   ª      @        »   ‹      ethphy1grp          »   h      @   P      @        »   �      fec1grp       ¨  »   5      A   4      A   &       @   %       @   '       @   (       @   )       @   *       @   ,       @   -       @   .       @   /       @   0       @   1       @        »   ‰      fec2grp       �  »   9      @   7      @   ?      @   @      @   8      @   :      @   ;      @   B      @   A      @   >      @   =      @   <      @        »   �      flexspi0grp       ¨  »   œ       M   �       M   ž       M   Ÿ       M           M   ¡       M   £       M   ¥       M   ¦       M   §       M   ¨       M   ©       M   «       M   ¬       M        »   ¡      smarcgpiogrp          l  »   ]      !   ^      !   _      !   a      !   g      !   d      !   c      !   f      !   e      !        »          smarcfangpiogrp         »   N      !   M      !        »   ž      smarcmngtgpiogrp          <  »   H      !   E      !   G      !   F      !   C      !        »   Ÿ      lbdpanel0grp            »   \      !        »   ¬      lbdpanel1grp            »   Z      !        »   ­      lpi2c0grp           »   ›     !   š     !        »   e      lpi2c0gpiogrp           »   ›      !   š      !        »   f      lpuart0grp        0  »   o          p          i         j              »   ]      lpuart3grp          »   �         ‚              »   a      mipi-lvds0-i2c0grp          »   t      !   u      !      mipi-lvds0-i2c0-gpiogrp         »   t      !   u      !      pcieagrp          $  »         A        A        A      mipi-lvds0-pwmgrp           »   v      !      mipi-lvds1-pwmgrp           »   z      !      rtcgrp          »   {      !        »   i      usdhc1grp         „  »   	      @   
                                                                                                          @        »   {      usdhc1100mhzgrp       „  »   	      A   
       !          !          !          !          !          !          !          !          !          A        »   |      usdhc1200mhzgrp       „  »   	      A   
       !          !          !          !          !          !          !          !          !          A        »   }      sdvmmcgrp           »         !        »   ®      spi1grp       <  »   S     A   R     A   U     A   T      !   V      !        »   X      sai1grp       <  »   L      @   W     @   X     @   k     @   l     @        »   7      usbotg1grp          »         !         !        »   y      usdhc2gpiogrp           »         !         !        »   ‚      usdhc2grp         T  »         A          !           !   !       !   "       !   #       !          !        »   �      usdhc2100mhzgrp       T  »         @                          !           "           #                           »   ƒ      usdhc2200mhzgrp       T  »         @                          !           "           #                           »   „         ocotp            2fsl,imx8qxp-scu-ocotp                               mac@2c4           Ä         mac@2c6           Æ            keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key           Ä   t         Ó      	  Ydisabled          reset-controller             2fsl,imx-scu-reset           á           »         rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt           î   <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal           ú           »            timer            2arm,armv8-timer       0  @                                 
         clock-dummy          2fixed-clock         ®                      
   clk_dummy           »         clock-xtal32k            2fixed-clock         ®              €          xtal_32KHz        clock-xtal24m            2fixed-clock         ®            n6          xtal_24MHz        thermal-zones      cpu0-thermal            3   ú        I  Ð        W     c   trips      trip0           g s        s  Ð        passive         »         trip1           g †         s  Ð      	  critical             cooling-maps       map0            ~           ƒ   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ            pmic0-thermal           3   ú        I  Ð        W     ñ   trips      trip0           g ­°        s  Ð        passive         »   
      trip1           g èH        s  Ð      	  critical             cooling-maps       map0            ~   
        ƒ   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ               clock-img-ipg            2fixed-clock         ®            ëÂ          img_ipg_clk         »         clock-img-pxl            2fixed-clock         ®            #ÃF          img_pxl_clk         »   "      bus@58000000             2simple-bus                                   KX       X         isi@58100000            X           H  @      )         *         +         ,         -         .         0  ‘                                                  ’per0 per1 per2 per3 per4 per5                      0  ž     y     z     {     |     }     ~      	  Ydisabled             2fsl,imx8qxp-isi    ports                                port@2                endpoint            ¬           »                  irqsteer@58220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X"                         +        @      @           ‘           ’ipg                      ž     ‘        ¼            È            »         gpio@58222000            2fsl,imx8qm-gpio fsl,imx35-gpio          X"                         +        @            Õ            á                     ž     ‘      clock-controller@58223018            2fsl,imx8qxp-lpcg            X"0           ‘     ‘           ®           ñ            csi0_lpcg_core_clk          ž     y        »         clock-controller@5822301c            2fsl,imx8qxp-lpcg            X"0           ‘     ‘           ®           ñ            csi0_lpcg_esc_clk           ž     y        »         i2c@58226000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X"`            @           ‘     “              ’per ipg         ÿ     “           n6                      ž     “      	  Ydisabled          csi@58227000             2fsl,imx8qxp-mipi-csi2           X"p    X"            ‘                           ’core esc ui         ÿ                    u* J¢         ž     y        $     ‘      	  Ydisabled       ports                                port@0                    port@1                endpoint            ¬           »                  irqsteer@58240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X$                         +        @      A           ‘           ’ipg                      ž     ”        ¼            È          	  Ydisabled            »         gpio@58242000            2fsl,imx8qm-gpio fsl,imx35-gpio          X$                         +        @            Õ            á                     ž     ”      	  Ydisabled          clock-controller@58243018            2fsl,imx8qxp-lpcg            X$0           ‘     ”           ®           ñ            csi1_lpcg_core_clk          ž     y      	  Ydisabled            »         clock-controller@5824301c            2fsl,imx8qxp-lpcg            X$0           ‘     ”           ®           ñ            csi1_lpcg_esc_clk           ž     y      	  Ydisabled            »         i2c@58246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X$`            @           ‘     –              ’per ipg         ÿ     –           n6                      ž     –      	  Ydisabled          csi@58247000             2fsl,imx8qxp-mipi-csi2           X$p    X$            ‘                           ’core esc ui         ÿ                    u* J¢         ž     y        $     ”      	  Ydisabled          irqsteer@58260000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X&                         +        @      B           ‘           ’ipg                      ž     F        ¼            È          	  Ydisabled            »         clock-controller@58263004            2fsl,imx8qxp-lpcg            X&0           ‘     F           ®           ñ            pi0_lpcg_ipg_clk            ž     y      clock-controller@58263018            2fsl,imx8qxp-lpcg            X&0           ‘     F           ®           ñ             pi0_lpcg_pxl_clk            ž     y      clock-controller@5826301c            2fsl,imx8qxp-lpcg            X&0           ‘     F            ®           ñ             pi0_lpcg_misc_clk           ž     y      i2c@58266000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X&`            @           ‘     I              ’per ipg         ÿ     I           n6                      ž     I      	  Ydisabled          jpegdec@58400000            X@             @      5           ‘                       ÿ                       ëÂ ëÂ         ž          �         2nxp,imx8qxp-jpgdec        jpegenc@58450000            XE             @      1           ‘   !       !           ÿ   !       !           ëÂ ëÂ         ž          …         2nxp,imx8qxp-jpgenc        clock-controller@58500000            2fsl,imx8qxp-lpcg            XP             ‘   "        ®           ñ             pdma0_lpcg_clk          ž     y        »         clock-controller@58510000            2fsl,imx8qxp-lpcg            XQ             ‘   "        ®           ñ             pdma1_lpcg_clk          ž     z        »         clock-controller@58520000            2fsl,imx8qxp-lpcg            XR             ‘   "        ®           ñ             pdma2_lpcg_clk          ž     {        »         clock-controller@58530000            2fsl,imx8qxp-lpcg            XS             ‘   "        ®           ñ             pdma3_lpcg_clk          ž     |        »         clock-controller@58540000            2fsl,imx8qxp-lpcg            XT             ‘   "        ®           ñ             pdma4_lpcg_clk          ž     }        »         clock-controller@58550000            2fsl,imx8qxp-lpcg            XU             ‘   "        ®           ñ             pdma5_lpcg_clk          ž     ~        »         clock-controller@58560000            2fsl,imx8qxp-lpcg            XV             ‘   "        ®           ñ             pdma6_lpcg_clk          ž           clock-controller@58570000            2fsl,imx8qxp-lpcg            XW             ‘   "        ®           ñ             pdma7_lpcg_clk          ž     €      clock-controller@58580000            2fsl,imx8qxp-lpcg            XX             ‘   "        ®           ñ             csi0_lpcg_pxl_clk           ž     ‘        »         clock-controller@58590000            2fsl,imx8qxp-lpcg            XY             ‘   "        ®           ñ             csi1_lpcg_pxl_clk           ž     ”      	  Ydisabled            »         clock-controller@585a0000            2fsl,imx8qxp-lpcg            XZ             ‘   "        ®           ñ             hdmi_rx_lpcg_pxl_link_clk           ž     ›      clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]             ®           ‘              ñ             0   img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         ž             »          clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_             ®           ‘              ñ             0   img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         ž             »   !         vpu@2c000000                                     K,       ,                  ,                  ž             Yokay             2nxp,imx8qxp-vpu    mailbox@2d000000             2fsl,imx6sx-mu           -              @      Õ           +           ž             Yokay            »   #      mailbox@2d020000             2fsl,imx6sx-mu           -             @      Ö           +           ž             Yokay            »   &      vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder           ž             ˆtx0 tx1 rx        $  “   #           #          #               Yokay            7   $   %      vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder           ž             ˆtx0 tx1 rx        $  “   &           &          &               Yokay            7   '   (         bus@31400000             2simple-bus                                   K1@      1@   	     crypto@31400000          2fsl,imx8qxp-caam fsl,sec-v4.0           1@   	          @       ”                                    K    1@   	          ž     õ        E   	   jr@30000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        @      Å           ž     õ      jr@40000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        @      Æ           ž     ö            clock-cm40-ipg           2fixed-clock         ®            Þ)          cm40_ipg_clk            »   ,      bus@34000000             2simple-bus                                   K4       4                   )   serial@37220000          2fsl,imx8qxp-lpuart          7"             @              ‘   *      *          	  ’ipg baud            ÿ                n6         ž           	  Ydisabled          i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             @   	           ‘   +       +           ’per ipg         ÿ                 n6         ž            	  Ydisabled          intmux@37400000          2fsl,imx-intmux          7@                        `  @                                                                                         +                   ‘   ,        ’ipg         ž     !      	  Ydisabled            »   )      clock-controller@37620000            2fsl,imx8qxp-lpcg            7b             ®           ‘           ,        ñ             *   cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk           ž             »   *      clock-controller@37630000            2fsl,imx8qxp-lpcg            7c             ®           ‘            ,        ñ             (   cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk         ž              »   +         bus@53000000             2simple-bus                                   KS       S         gpu@53100000             2vivante,gc          S             @       @           ‘      �         �           ’core shader         ÿ      �         �           )¹' 2©ø€        ž      �         clock-audio-ipg          2fixed-clock         ®            '          audio_ipg_clk           »   4      clock-ext-aud-mclk0          2fixed-clock         ®                         ext_aud_mclk0           »   G      clock-ext-aud-mclk1          2fixed-clock         ®                         ext_aud_mclk1           »   H      clock-esai0-rx           2fixed-clock         ®                         esai0_rx_clk            »   I      clock-esai0-rx-hf            2fixed-clock         ®                         esai0_rx_hf_clk         »   J      clock-esai0-tx           2fixed-clock         ®                         esai0_tx_clk            »   K      clock-esai0-tx-hf            2fixed-clock         ®                         esai0_tx_hf_clk         »   L      clock-spdif0-rx          2fixed-clock         ®                      
   spdif0_rx           »   M      clock-sai0-rx-bclk           2fixed-clock         ®                         sai0_rx_bclk            »   N      clock-sai0-tx-bclk           2fixed-clock         ®                         sai0_tx_bclk            »   O      clock-sai1-rx-bclk           2fixed-clock         ®                         sai1_rx_bclk            »   P      clock-sai1-tx-bclk           2fixed-clock         ®                         sai1_tx_bclk            »   Q      clock-sai2-rx-bclk           2fixed-clock         ®                         sai2_rx_bclk            »   R      clock-sai3-rx-bclk           2fixed-clock         ®                         sai3_rx_bclk            »   S      clock-sai4-rx-bclk           2fixed-clock         ®                         sai4_rx_bclk            »   T      bus@59000000             2simple-bus                                   KY       Y         asrc@59000000            2fsl,imx8qm-asrc         Y              @      t         d  ‘   -       -       .      /      0       0                                                �  ’mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  Q   1               1              1              1             1             1                  Vrxa rxb rxc txa txb txc         `  @        n           }            ž     ž      	  Ydisabled          esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai            Y             @      ™           ‘   2      2       2              ’core extal fsys spba             Q   1             1                   Vrx tx           ž     Ÿ      	  Ydisabled          spdif@59020000           2fsl,imx8qm-spdif            Y             @      È         Ê         0  ‘   3         3                4               :  ’core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            Q   1             1   	               Vrx tx           ž            	  Ydisabled          sai@59040000             2fsl,imx8qm-sai          Y             @      :           ‘   5         5                  ’bus mclk0 mclk1 mclk2 mclk3         Vrx tx            Q   1             1                   ž     >      	  Ydisabled          sai@59050000             2fsl,imx8qm-sai          Y             @      <           ‘   6         6                  ’bus mclk0 mclk1 mclk2 mclk3         Vrx tx            Q   1             1                   ž     ?        Yokay          ,  ÿ     E        E         E      6            .à  î   »€ î          Ždefault         œ   7        »   ¶      sai@59060000             2fsl,imx8qm-sai          Y             @      >           ‘   8         8                  ’bus mclk0 mclk1 mclk2 mclk3         Vrx          Q   1                  ž     @      	  Ydisabled          sai@59070000             2fsl,imx8qm-sai          Y             @      C           ‘   9         9                  ’bus mclk0 mclk1 mclk2 mclk3         Vrx          Q   1                  ž     ¢      	  Ydisabled          dma-controller@591f0000          2fsl,imx8qm-edma         Y             ¦           ±           ¾ \      ,  @      v         w         x         y         z         {         š         š         É         Ë                               ;         ;         =         =         ?         D                                          ‡                    ‰         q         À  ž      @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W        »   1      clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@             ®           ‘   4        ñ            asrc0_lpcg_ipg_clk          ž     ž        »   -      clock-controller@59410000            2fsl,imx8qxp-lpcg            YA             ®           ‘   0      4        ñ             (   esai0_lpcg_extal_clk esai0_lpcg_ipg_clk         ž     Ÿ        »   2      clock-controller@59420000            2fsl,imx8qxp-lpcg            YB             ®           ‘   0      4        ñ             %   spdif0_lpcg_tx_clk spdif0_lpcg_gclkw            ž              »   3      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD             ®           ‘   0      4        ñ             !   sai0_lpcg_mclk sai0_lpcg_ipg_clk            ž     >        »   5      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE             ®           ‘   0      4        ñ             !   sai1_lpcg_mclk sai1_lpcg_ipg_clk            ž     ?        »   6      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF             ®           ‘   0      4        ñ             !   sai2_lpcg_mclk sai2_lpcg_ipg_clk            ž     @        »   8      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG             ®           ‘   0      4        ñ             !   sai3_lpcg_mclk sai3_lpcg_ipg_clk            ž     ¢        »   9      clock-controller@59580000            2fsl,imx8qxp-lpcg            YX             ®           ‘   4   4   4        ñ               4   dsp_lpcg_adb_clk dsp_lpcg_ipg_clk dsp_lpcg_core_clk         ž              »   :      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY             ®           ‘   4        ñ            dsp_ram_lpcg_ipg_clk            ž             »   ;      dsp@596e8000             2fsl,imx8qxp-hifi4           Yn€  €         ‘   :      ;      :           ’ipg ocram core          ž      ë      ×        ˆtx rx rxdb        $  “   <           <          <               Ïimx/dsp/hifi4.bin         	  Ydisabled          asrc@59800000            2fsl,imx8qm-asrc         Y€             @      |         d  ‘   =      =      .       /       0       0                                                �  ’mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  Q   >               >              >              >             >             >                  Vrxa rxb rxc txa txb txc         `  @        n           }           ž     Æ      	  Ydisabled          sai@59820000             2fsl,imx8qm-sai          Y‚             @      I           ‘   ?         ?                  ’bus mclk0 mclk1 mclk2 mclk3          Q   >             >   	                Vrx tx           ž     £      	  Ydisabled            »   B      sai@59830000             2fsl,imx8qm-sai          Yƒ             @      K           ‘   @         @                  ’bus mclk0 mclk1 mclk2 mclk3         Q   >   
                Vtx          ž     ¤      	  Ydisabled            »   C      amix@59840000            2fsl,imx8qm-audmix           Y„             ‘   A            ’ipg         ž     Ê        Ý   B   C      	  Ydisabled          mqs@59850000             2fsl,imx8qm-mqs          Y…             ‘   D      D          
  ’mclk core           ž     Ë      	  Ydisabled          dma-controller@599f0000          2fsl,imx8qm-edma         YŸ             ¦           ±           ¾   À      �  @      ~                  €         �         ‚         ƒ                               J         J         L         s         X  ž      l      m      n      o      p      q      r      s      t      u      v        »   >      clock-controller@59d00000            2fsl,imx8qxp-lpcg            YÐ             ®           ‘     E           ñ             aud_rec_clk0_lpcg_clk           ž     E        »   E      clock-controller@59d10000            2fsl,imx8qxp-lpcg            YÑ             ®           ‘     ì           ñ             aud_rec_clk1_lpcg_clk           ž     ì        »   F      clock-controller@59d20000            2fsl,imx8qxp-lpcg            YÒ             ®           ‘     E            ñ             aud_pll_div_clk0_lpcg_clk           ž     E        »   .      clock-controller@59d30000            2fsl,imx8qxp-lpcg            YÓ             ®           ‘     ì            ñ             aud_pll_div_clk1_lpcg_clk           ž     ì        »   /      clock-controller@59d50000            2fsl,imx8qxp-lpcg            YÕ             ®           ‘   0           ñ             mclkout0_lpcg_clk           ž     ï        »   l      clock-controller@59d60000            2fsl,imx8qxp-lpcg            YÖ             ®           ‘   0           ñ             mclkout1_lpcg_clk           ž     ð      acm@59e00000             2fsl,imx8qxp-acm         Yà             ®         ˆ  ž     í     î     ï     ð     E     ì     ž     Æ     Ÿ     >     ?     @     ¢     £     ¤           Ë      X  ‘   E       F       .       /       G   H   I   J   K   L   M   N   O   P   Q   R   S   T       ’aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk          »   0      clock-controller@59c00000            2fsl,imx8qxp-lpcg            YÀ             ®           ‘   4        ñ            asrc1_lpcg_ipg_clk          ž     Æ        »   =      clock-controller@59c20000            2fsl,imx8qxp-lpcg            YÂ             ®           ‘   0      4        ñ             !   sai4_lpcg_mclk sai4_lpcg_ipg_clk            ž     £        »   ?      clock-controller@59c30000            2fsl,imx8qxp-lpcg            YÃ             ®           ‘   0      4        ñ             !   sai5_lpcg_mclk sai5_lpcg_ipg_clk            ž     ¤        »   @      clock-controller@59c40000            2fsl,imx8qxp-lpcg            YÄ             ®           ‘   4        ñ             amix_lpcg_ipg_clk           ž     Ê        »   A      clock-controller@59c50000            2fsl,imx8qxp-lpcg            YÅ             ®           ‘   0      4        ñ             !   mqs0_lpcg_mclk mqs0_lpcg_ipg_clk            ž     Ë        »   D         clock-dma-ipg            2fixed-clock         ®            '          dma_ipg_clk         »   c      bus@5a000000             2simple-bus                                   KZ       Z         spi@5a000000             2fsl,imx7ulp-spi         Z                                        @      P                        ‘   U       U           ’per ipg         ÿ      5           “‡         ž      5         Q   V              V                   Vtx rx         	  Ydisabled          spi@5a010000             2fsl,imx7ulp-spi         Z                                       @      Q                        ‘   W       W           ’per ipg         ÿ      6           “‡         ž      6         Q   V              V                  Vtx rx           Yokay            Ždefault         œ   X        â   Y         Y            spi@5a020000             2fsl,imx7ulp-spi         Z                                       @      R                        ‘   Z       Z           ’per ipg         ÿ      7           “‡         ž      7         Q   V              V                  Vtx rx         	  Ydisabled          spi@5a030000             2fsl,imx7ulp-spi         Z                                       @      S                        ‘   [       [           ’per ipg         ÿ      8           “‡         ž      8         Q   V              V                  Vtx rx         	  Ydisabled          serial@5a060000         Z             @      Y           ‘   \      \          	  ’ipg baud            ÿ      9           Ä´         ž      9        Vrx tx            Q   V             V   	                Yokay             2fsl,imx8qxp-lpuart          Ždefault         œ   ]      serial@5a070000         Z             @      Z           ‘   ^      ^          	  ’ipg baud            ÿ      :           Ä´         ž      :        Vrx tx            Q   V   
          V                 	  Ydisabled             2fsl,imx8qxp-lpuart        serial@5a080000         Z             @      [           ‘   _      _          	  ’ipg baud            ÿ      ;           Ä´         ž      ;        Vrx tx            Q   V             V                 	  Ydisabled             2fsl,imx8qxp-lpuart        serial@5a090000         Z	             @      \           ‘   `      `          	  ’ipg baud            ÿ      <           Ä´         ž      <        Vrx tx            Q   V             V                   Yokay             2fsl,imx8qxp-lpuart          Ždefault         œ   a      pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             @                  ‘   b      b            ’ipg per         ÿ      ¼           n6         ë           ž      ¼      dma-controller@5a1f0000          2fsl,imx8qm-edma         Z             ¦           ±         Ì  @                ¡         ¢         £         ¤         ¥         ¦         §         ²         ³         ´         µ         ¶         ·         ¸         ¹          C         €  ž      þ      ÿ                     «     ¬     ­     ®     ¯     °     ±     ²     ³     ´     µ        »   V      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@             ®           ‘      5      c        ñ                 spi0_lpcg_clk spi0_lpcg_ipg_clk         ž      5        »   U      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA             ®           ‘      6      c        ñ                 spi1_lpcg_clk spi1_lpcg_ipg_clk         ž      6        »   W      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB             ®           ‘      7      c        ñ                 spi2_lpcg_clk spi2_lpcg_ipg_clk         ž      7        »   Z      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC             ®           ‘      8      c        ñ                 spi3_lpcg_clk spi3_lpcg_ipg_clk         ž      8        »   [      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF             ®           ‘      9      c        ñ             '   uart0_lpcg_baud_clk uart0_lpcg_ipg_clk          ž      9        »   \      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG             ®           ‘      :      c        ñ             '   uart1_lpcg_baud_clk uart1_lpcg_ipg_clk          ž      :        »   ^      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH             ®           ‘      ;      c        ñ             '   uart2_lpcg_baud_clk uart2_lpcg_ipg_clk          ž      ;        »   _      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI             ®           ‘      <      c        ñ             '   uart3_lpcg_baud_clk uart3_lpcg_ipg_clk          ž      <        »   `      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY             ®           ‘      ¼      c        ñ             (   adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk         ž      ¼        »   b      i2c@5a800000            Z€    @                                   @       Ü           ‘   d       d           ’per ipg         ÿ      `           n6         ž      `        Yokay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c          †         Ždefault gpio            œ   e        ö   f            g              
   g         temperature-sensor@1b            2nxp,se97b jedec,jc-42.4-temp                     eeprom@50            2atmel,24c64            P                       h      rtc@51           2nxp,pcf85063a              Q        Ždefault         œ   i        (  X             j        @             eeprom@53            2nxp,se97b atmel,24c02              S                    @           h      clock-generator@6a           2renesas,9fgv0241               j        ‘   k        ®         audio-codec@18           2ti,tlv320aic32x4                       ‘   l            ’mclk            J   m        U   h        »   ·      eeprom@57            2atmel,24c32            W                       h         i2c@5a810000            Z�    @                                   @       Ý           ‘   n       n           ’per ipg         ÿ      a           n6         ž      a      	  Ydisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a820000            Z‚    @                                   @       Þ           ‘   o       o           ’per ipg         ÿ      b           n6         ž      b      	  Ydisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a830000            Zƒ    @                                   @       ß           ‘   p       p           ’per ipg         ÿ      c           n6         ž      c      	  Ydisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       adc@5a880000             2nxp,imx8qxp-adc         b           Zˆ             @       ð                        ‘   q       q           ’per ipg         ÿ      e           n6         ž      e      	  Ydisabled          adc@5a890000             2nxp,imx8qxp-adc         b           Z‰             @       ñ                        ‘   r       r           ’per ipg         ÿ      f           n6         ž      f      	  Ydisabled          can@5a8d0000             2fsl,imx8qm-flexcan          Z�             @       ë                        ‘   s      s            ’ipg per         ÿ      i           bZ         ž      i        t            ƒ          	  Ydisabled          can@5a8e0000             2fsl,imx8qm-flexcan          ZŽ             @       ì                        ‘   s      s            ’ipg per         ÿ      i           bZ         ž      j        t            ƒ           Yokay            Ždefault         œ   t        ‘   h      can@5a8f0000             2fsl,imx8qm-flexcan          Z�             @       í                        ‘   s      s            ’ipg per         ÿ      i           bZ         ž      k        t            ƒ           Yokay            Ždefault         œ   u        ‘   h      dma-controller@5a9f0000          2fsl,imx8qm-edma         ZŸ   	          ¦           ±         l  @      ¨         ©         ª         «         ¬         ­         ®         ¯          E         @  ž     Ì     Í     Î     Ï     Ð     Ñ     Ò     Ó      clock-controller@5ac00000            2fsl,imx8qxp-lpcg            ZÀ             ®           ‘      `      c        ñ                 i2c0_lpcg_clk i2c0_lpcg_ipg_clk         ž      `        »   d      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            ZÁ             ®           ‘      a      c        ñ                 i2c1_lpcg_clk i2c1_lpcg_ipg_clk         ž      a        »   n      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            ZÂ             ®           ‘      b      c        ñ                 i2c2_lpcg_clk i2c2_lpcg_ipg_clk         ž      b        »   o      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            ZÃ             ®           ‘      c      c        ñ                 i2c3_lpcg_clk i2c3_lpcg_ipg_clk         ž      c        »   p      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            ZÈ             ®           ‘      e      c        ñ                 adc0_lpcg_clk adc0_lpcg_ipg_clk         ž      e        »   q      clock-controller@5ac90000            2fsl,imx8qxp-lpcg            ZÉ             ®           ‘      f      c        ñ                 adc1_lpcg_clk adc1_lpcg_ipg_clk         ž      f        »   r      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            ZÍ             ®           ‘      i      c   c        ñ                5   can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            ž      i        »   s         clock-conn-axi           2fixed-clock         ®            ÞCU         conn_axi_clk            »   ”      clock-conn-ahb           2fixed-clock         ®            	ï!ª         conn_ahb_clk            »   •      clock-conn-ipg           2fixed-clock         ®            ÷�Õ         conn_ipg_clk            »   “      clock-conn-bch           2fixed-clock         ®            ×„          conn_bch_clk          bus@5b000000             2simple-bus                                   K[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          @                     v        «   w            ‘   x           ·            È           Ü           ž             Yokay            Ždefault         œ   y         ð         ü                           &        >otg       usbmisc@5b0d0200            F         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [            »   w      usbphy@5b100000       &   2fsl,imx8qxp-usbphy fsl,imx7ulp-usbphy           [             ‘   x           ž             Yokay            »   v      mmc@5b010000            @       è           [             ‘   z      z      z            ’ipg ahb per         ÿ      ø           ×„         ž      ø        S           h           Yokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         "  Ždefault state_100mhz state_200mhz           œ   {        ö   |        x   }        ‚   ~        Ž           ›            ¥         ³         ¹      mmc@5b020000            @       é           [             ‘   €      €      €            ’ipg ahb per         ÿ      ù           ëÂ         ž      ù        S           h           Yokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         "  Ždefault state_100mhz state_200mhz           œ   �   ‚        ö   ƒ   ‚        x   „   ‚        ›           Á   …              Ê   …               ‚   †         Ó         Ü         ¹      mmc@5b030000            @       ê           [             ‘   ‡      ‡      ‡            ’ipg ahb per         ÿ      ú           ëÂ         ž      ú        S           h         	  Ydisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         ethernet@5b040000           [           0  @                                           (  ‘   ˆ      ˆ      ˆ      ˆ       ˆ         '  ’ipg ahb enet_clk_ref ptp enet_2x_txclk          ÿ      û         û           æ²€sY@        ã           õ           ž      û        Yokay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           Ždefault         œ   ‰      	  rgmii-id               Š                 ,           mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22                      Ždefault         œ   ‹        8   	        M   	        b            p        Žÿÿÿÿ            g              ¬ ¡         ¼  ÃP         Î             Œ        @              »   Š      ethernet-phy@3           2ethernet-phy-ieee802.3-c22                     Ždefault         œ   �        8   	        M   	        b            p        Žÿÿÿÿ            Y              ¬ ¡         ¼  ÃP         Î             Œ        @              »   �            ethernet@5b050000           [           0  @                                          (  ‘   Ž      Ž      Ž      Ž       ˆ         '  ’ipg ahb enet_clk_ref ptp enet_2x_txclk          ÿ      ü         ü           æ²€sY@        ã           õ           ž      ü        Yokay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           Ždefault         œ   �      	  rgmii-id               �                 ,              usb@5b110000             2fsl,imx8qm-usb3         [                                       K      (  ‘   ‘      ‘       ‘      ‘      ‘           ’lpm bus aclk ipg core           ÿ                æ²€        ž             Yokay       usb@5b120000          
   2cdns,usb3           [     [     [             äotg xhci dev                       0  @                                            îhost peripheral otg wakeup          þ   ’        cdns3,usb3-phy                     Yokay            >host             usb-phy@5b160000             2nxp,salvo-phy           [             ‘   ‘           ’salvo_phy_clk           ž             $            Yokay            »   ’      clock-controller@5b200000            2fsl,imx8qxp-lpcg            [              ®           ‘      ø      “   ”        ñ                9   sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            ž      ø        »   z      clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!             ®           ‘      ù      “   ”        ñ                9   sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            ž      ù        »   €      clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["             ®           ‘      ú      “   ”        ñ                9   sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            ž      ú        »   ‡      clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#             ®         0  ‘      û         û      ”      û      “   “        ñ                         …   enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            ž      û        »   ˆ      clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$             ®         0  ‘      ü         ü      ”      ü      “   “        ñ                         …   enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            ž      ü        »   Ž      clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['             ®           ‘   •   “        ñ            "   usboh3_ahb_clk usboh3_phy_ipg_clk           ž             »   x      clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(             ®           ñ                         0  ‘                   “   “   “              M   usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            ž             »   ‘      clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)             ®            ‘     	        	      ”   ”        ñ                   '   gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb          ž     	        »   —      clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)            ®           ‘   ”        ñ            apbhdma_hclk            ž     	        »   –      dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [�            0  @                                            ¦           ±           ‘   –            ž     	        »   ˜      nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [�      [�@             ägpmi-nand bch                                     @                 îbch          ‘   —      —      —       —         '  ’gpmi_io gpmi_apb gpmi_bch gpmi_bch_apb          Q   ˜            Vrx-tx           ž     	        ÿ     	           úð€      	  Ydisabled             bus@5c000000             2simple-bus                                   K\       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             @       ƒ            clock-lsio-bus           2fixed-clock         ®            õá          lsio_bus_clk            »   ¢      bus@5d000000             2simple-bus                                    K]       ]                      pwm@5d000000             2fsl,imx27-pwm           ]              ’ipg per         ‘   ™      ™           ÿ      ¿           n6         ë           @       ^         	  Ydisabled          pwm@5d010000             2fsl,imx27-pwm           ]             ’ipg per         ‘   š      š           ÿ      À           n6         ë           @       _         	  Ydisabled          pwm@5d020000             2fsl,imx27-pwm           ]             ’ipg per         ‘   ›      ›           ÿ      Á           n6         ë           @       `         	  Ydisabled          pwm@5d030000             2fsl,imx27-pwm           ]             ’ipg per         ‘   œ      œ           ÿ      Â           n6         ë           @       a         	  Ydisabled          gpio@5d080000           ]             @       ˆ            á        Õ            +                   ž      Ç          2fsl,imx8qxp-gpio fsl,imx35-gpio       P  /   �      8      �      E      �      K      �      P      �      R           Ždefault         œ   ž   Ÿ      p  ;            LID SLEEP CHARGING# CHGPRSNT# BATLOW#     SMARC_GPIO6 SMARC_GPIO5  PHY3 RST#   SPI0_CS0  SPI0_CS1           »   Y      gpio@5d090000           ]	             @       ‰            á        Õ            +                   ž      È          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  /   �       Y   	   �   	   c      �      t           Ždefault         œ          ²  ;LCD1_BLKT_EN LCD1_VDD_EN LCD0_BLKT_EN LCD0_VDD_EN SMARC_GPIO0 SMARC_GPIO1 SMARC_GPIO2  SMARC_GPIO3 SMARC_GPIO8 SMARC_GPIO7 SMARC_GPIO10 SMARC_GPIO9 SMARC_GPIO4                             »   Œ      gpio@5d0a0000           ]
             @       Š            á        Õ            +                   ž      É          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  /   �       {      �      ~      �      �         (  ;RTC_INT#                                        »   j      gpio@5d0b0000           ]             @       ‹            á        Õ            +                   ž      Ê          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  /   �       ’      �      —      �      ¥         )  ;                      PHY0_RST#                     »   g      gpio@5d0c0000           ]             @       Œ            á        Õ            +                   ž      Ë          2fsl,imx8qxp-gpio fsl,imx35-gpio       €  /   �              �            �      	      �            �            �            �            �      %         [  ;PCIE_PERST#  PCIE_WAKE# USB_OTG1_PWR                SDIO_PWR_EN  SDIO_WP SDIO_CD#                   »   …      gpio@5d0d0000           ]             @       �            á        Õ            +                   ž      Ì          2fsl,imx8qxp-gpio fsl,imx35-gpio       0  /   �       (      �      ,      �   	   3         gpio@5d0e0000           ]             @       Ž            á        Õ            +                   ž      Í          2fsl,imx8qxp-gpio fsl,imx35-gpio       gpio@5d0f0000           ]             @       �            á        Õ            +                   ž      Î          2fsl,imx8qxp-gpio fsl,imx35-gpio       spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   äfspi_base fspi_mmap         @       \           ‘      í         í           ’fspi_en fspi            ž      í        Yokay            Ždefault         œ   ¡   flash@0          2jedec,spi-nor                       Kï€        ]           n      partitions           2fixed-partitions                                         mailbox@5d1b0000            ]             @       °           +         	  Ydisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1c0000            ]             @       ±           +         -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu            »         mailbox@5d1d0000            ]             @       ²           +         	  Ydisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1e0000            ]             @       ³           +         	  Ydisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1f0000            ]             @       ´           +         	  Ydisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d200000            ]              @       ¸           +           ž      Ú      	  Ydisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d210000            ]!             @       ¹           +           ž      Û      	  Ydisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d280000            ](             @       À           +           ž      â         2fsl,imx8qxp-mu fsl,imx6sx-mu            »   <      clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@             ®         4  ‘      ¿         ¿         ¿      ¢      ¿           ñ                      h   pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         ž      ¿        »   ™      clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A             ®         4  ‘      À         À         À      ¢      À           ñ                      h   pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         ž      À        »   š      clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B             ®         4  ‘      Á         Á         Á      ¢      Á           ñ                      h   pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         ž      Á        »   ›      clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C             ®         4  ‘      Â         Â         Â      ¢      Â           ñ                      h   pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         ž      Â        »   œ      clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D             ®         4  ‘      Ã         Ã         Ã      ¢      Ã           ñ                      h   pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         ž      Ã      clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E             ®         4  ‘      Ä         Ä         Ä      ¢      Ä           ñ                      h   pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         ž      Ä      clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F             ®         4  ‘      Å         Å         Å      ¢      Å           ñ                      h   pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         ž      Å      clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G             ®         4  ‘      Æ         Æ         Æ      ¢      Æ           ñ                      h   pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         ž      Æ         clock-hsio-axi           2fixed-clock         ®            ×„          hsio_axi_clk            »   ¥      clock-hsio-per           2fixed-clock         ®            ò�U         hsio_per_clk            »   ¦      clock-hsio-refa          2gpio-gate-clock         ‘   £        ®               …            clock-hsio-refb          2gpio-gate-clock         ‘   £        ®               …              »   §      clock-xtal100m           2fixed-clock         ®            õá          xtal_100MHz         »   £      bus@5f000000             2simple-bus           K_       _      €       p                                       Œ€       €   €      pcie@5f010000            2fsl,imx8q-pcie          _     �ð             ädbi config        0  K�           �ø         ‚       €   €       ð                     @       f          h           îmsi dma                                  ‘   ¤      ¤      ¤           ’dbi mstr slv            —       ÿ        
pci       €  ¡                         i                            j                            k                            l           ¯                       Â           Ì           ž      ©        Ù         	  Ydisabled          pcie-ep@5f010000             2fsl,imx8q-pcie-ep           _     €              ädbi addr_space          Â           @       h           îdma         ‘   ¤      ¤      ¤           ’dbi mstr slv            ž      ©        Ù           ì           û         	  Ydisabled          clock-controller@5f060000            2fsl,imx8qxp-lpcg            _             ‘   ¥   ¥   ¥        ®           ñ               F   hsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk           ž      ©        »   ¤      clock-controller@5f0b0000            2fsl,imx8qxp-lpcg            _             ‘   ¦        ®           ñ            hsio_phyx1_per_clk          ž      «        »   ©      clock-controller@5f0d0000            2fsl,imx8qxp-lpcg            _             ‘   ¦        ®           ñ            hsio_pcieb_per_clk          ž      ©        »   ª      clock-controller@5f0f0000            2fsl,imx8qxp-lpcg            _             ‘   ¦        ®           ñ            hsio_misc_per_clk           ž      ¬        »   «      clock-controller@5f090000            2fsl,imx8qxp-lpcg            _	             ‘   §   ¦   ¦   ¦        ®           ñ                   Q   hsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk            ž      «        »   ¨      phy@5f1a0000             2fsl,imx8qxp-hsio             _     _     _     _             äreg phy ctrl misc         (  ‘   ¨       ¨      ©      ª      «         +  ’pclk0 apb_pclk0 phy0_crr ctl0_crr misc_crr          $           ž      «      	  Ydisabled             memory@80000000         
memory              €       @         clk-xtal25           2fixed-clock         ®            }x@        »   k      regulator-3v3            2regulator-fixed         	
3V3         	 2Z         	1 2Z          	I        »   h      regulator-lvds0          2regulator-fixed         Ždefault         œ   ¬        	
LCD0_VDD_EN         	 2Z         	1 2Z         	]   Œ                	b        »   ³      regulator-lvds1          2regulator-fixed         Ždefault         œ   ­        	
LCD1_VDD_EN         	 2Z         	1 2Z         	]   Œ                	b        »   µ      regulator-sdvmmc             2regulator-fixed         Ždefault         œ   ®      	  	
SD1_VMMC            	 2Z         	1 2Z         	]   …                	b        Yokay            	u @        »   †      regulator-vmmc           2regulator-fixed       	  	
MMC0_3V3            	 2Z         	1 2Z          	I        »   ~      regulator-vqmmc          2regulator-fixed       	  	
MMC0_1V8            	 w@        	1 w@         	I        »         backlight-lvds0          2pwm-backlight           Ždefault         œ   ¯         	…                    @   €   ÿ        	—           	°   °           Œ             	  Ydisabled            »   ²      backlight-lvds1          2pwm-backlight           Ždefault         œ   ±         	…                    @   €   ÿ        	—           	°   °           Œ              	  Ydisabled            »   ´      chosen          	½/bus@5a000000/serial@5a060000         panel-lvds0         	É   ²        	°   ³      	  Ydisabled       port       endpoint                panel-lvds1         	É   ´        	°   µ      	  Ydisabled       port       endpoint                regulator-1v8            2regulator-fixed         	
1V8         	 w@        	1 w@         	I        »   m      regulator-12v0           2regulator-fixed         	
12V0            	 ·         	1 ·          	I        »   °      sound            2fsl,imx-audio-tlv320aic32x4          ,tqm-tlv320aic32         	Ó   ¶        	â   ·      k  	îIN3_L Mic Jack Mic Jack Mic Bias IN1_L Line In Jack IN1_R Line In Jack Line Out Jack LOL Line Out Jack LOR           	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 rtc0 rtc1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status reusable alloc-ranges linux,cma-default mbox-names mboxes #power-domain-cells #clock-cells fsl,pins linux,keycodes wakeup-source #reset-cells timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device clock-names power-domains remote-endpoint fsl,channel fsl,num-irqs #gpio-cells gpio-controller clock-indices assigned-clocks assigned-clock-rates resets #mbox-cells memory-region fsl,sec-era dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map pinctrl-names pinctrl-0 #dma-cells dma-channels dma-channel-mask firmware-name dais cs-gpios #pwm-cells pinctrl-1 scl-gpios sda-gpios pagesize vcc-supply quartz-load-femtofarads read-only iov-supply ldoin-supply #io-channel-cells fsl,clk-source fsl,scu-index xceiver-supply fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword srp-disable hnp-disable adp-disable power-active-high over-current-active-low dr_mode #index-cells fsl,tuning-start-tap fsl,tuning-step pinctrl-2 vmmc-supply vqmmc-supply bus-width non-removable no-sd no-sdio cd-gpios wp-gpios no-1-8-v no-mmc fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet mac-address ti,rx-internal-delay ti,tx-internal-delay ti,fifo-depth ti,dp83867-rxctrl-strap-quirk ti,clk-output-sel reset-gpios reset-assert-us reset-deassert-us enet-phy-lane-no-swap reg-names interrupt-names phys phy-names cdns,on-chip-buff-size #phy-cells gpio-ranges gpio-line-names spi-max-frequency spi-tx-bus-width spi-rx-bus-width enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed num-ib-windows num-ob-windows regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on gpio enable-active-high off-on-delay-us brightness-levels default-brightness-level power-supply stdout-path backlight ssi-controller audio-codec audio-routing 