Ðþí Ú   8 ì   (            	î ´                                                                   '   ,Toradex Colibri iMX8QXP on Aster Board        >   2toradex,colibri-imx8x-aster toradex,colibri-imx8x fsl,imx8qxp      aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          �/bus@5a000000/i2c@5a800000           †/bus@5a000000/i2c@5a810000           ‹/bus@5a000000/i2c@5a820000           �/bus@5a000000/i2c@5a830000           •/bus@5b000000/mmc@5b010000           š/bus@5b000000/mmc@5b020000           Ÿ/bus@5b000000/mmc@5b030000           ¤/bus@5d000000/mailbox@5d1b0000           ¨/bus@5d000000/mailbox@5d1c0000           ¬/bus@5d000000/mailbox@5d1d0000           °/bus@5d000000/mailbox@5d1e0000           ´/bus@5d000000/mailbox@5d1f0000           ¸/bus@5a000000/serial@5a060000            À/bus@5a000000/serial@5a070000            È/bus@5a000000/serial@5a080000            Ð/bus@5a000000/serial@5a090000            Ø/bus@5a000000/spi@5a000000           Ý/bus@5a000000/spi@5a010000           â/bus@5a000000/spi@5a020000           ç/bus@5a000000/spi@5a030000            ì/vpu@2c000000/vpu-core@2d080000           ö/vpu@2c000000/vpu-core@2d090000       cpus                                 cpu@0            cpu          2arm,cortex-a35                          psci              €         +   @        =           J  €         W   @        i   €        v           ‡     û           Ž           ¢           ±   	      cpu@1            cpu          2arm,cortex-a35                         psci              €         +   @        =           J  €         W   @        i   €        v           ‡     û           Ž           ¢           ±   
      cpu@2            cpu          2arm,cortex-a35                         psci              €         +   @        =           J  €         W   @        i   €        v           ‡     û           Ž           ¢           ±         cpu@3            cpu          2arm,cortex-a35                         psci              €         +   @        =           J  €         W   @        i   €        v           ‡     û           Ž           ¢           ±         l2-cache0            2cache           ¹            Å                    -   @        ?           ±            opp-table            2operating-points-v2          Ó        ±      opp-900000000           Þ    5¤é         å B@        ó Ið      opp-1200000000          Þ    G†Œ         å Èà        ó Ið                  interrupt-controller@51a00000            2arm,gic-v3               Q              Q°                                          !        6      	           ±         reserved-memory                                   A   decoder-boot@84000000               „                   H        ±   '      encoder-boot@86000000               †                    H        ±   *      decoder-rpc@92000000                ’                   H        ±   (      dsp@92400000                ’@                  H      	  Odisabled          encoder-rpc@94400000                ”@       p           H        ±   +         pmu          2arm,cortex-a35-pmu          6               psci             2arm,psci-1.0            smc       system-controller            2fsl,imx-scu         Vtx0 rx0 gip3          $  a                                 power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           h           ±         clock-controller             2fsl,imx8qxp-clk fsl,scu-clk         |           ±         pinctrl          2fsl,imx8qxp-iomuxc          ‰default         —           ±   Ÿ   ad7879intgrp            ¡   ˜      !        ±   r      adc0grp       0  ¡   d       `   c       `   h       `   g       `        ±   x      atmeladaptergrp         ¡   N      !   M     !      atmelconnectorgrp           ¡   ¨     !   ¬      !      canintgrp           ¡          @      csictlgrp           ¡   ¡          ¢             csimclkgrp          ¡   “    À  A      extio0grp           ¡   1     @      fec1grp       x  ¡   5          4          &       a   %     a   '       a   (       a   -       a   .       a   /       a   0      a        ±   Œ      fec1slpgrp        x  ¡   5     A   4     A   &      A   %      A   '      A   (      A   -      A   .      A   /      A   0      A        ±   �      flexcan0grp         ¡   j       !   i       !      flexcan1grp         ¡   l       !   k       !      flexcan2grp         ¡   n       !   m       !      gpioblongrp         ¡   Ÿ      `      gpiohpdgrp          ¡   z             gpiokeysgrp         ¡   �   p A        ±   ­      hog0grp        ¡   �       a   ž          S          Š       a   ,         Ž       a   ¥          T          ‹       a   ¦          U          ˆ       a   R          ‰       a   §                                        ’          ©          X          ª          «               ±         hog1grp         ¡   £             hog2grp         ¡   “             hogscfwgrp          ¡   �             i2c0grp         ¡   ›     !   š     !        ±   i      i2c0mipilvds0grp            ¡   t    Æ      u    Æ         i2c0mipilvds1grp            ¡   x    Æ      y    Æ         i2c1grp         ¡   v     !   w     !        ±   t      lcdifgrp         ,  ¡   L      `   H      `   K      `   J      @         @   7      `         `   8      `   9      `   :      `   ;      `   <      `   =      `   >      `   ?      `   @      `   A      `   B      `   C      `   E      `   F      `   G      `   I      `   )      `   P      `      lpspi2grp         0  ¡   Y      !   Z      @   [      @   \      @        ±   Y      lpspi2cs2grp            ¡   *      !      lpuart0grp        0  ¡   o          p          i         j              ±   ^      lpuart2grp          ¡   r          q               ±   a      lpuart3grp          ¡   m         n              ±   c      lpuart3ctrlgrp        H  ¡   {          V          W          •                    ”               ±   d      pciebgrp          $  ¡        a        a          `        ±   ¤      pwmagrp         ¡   �       a   `      `        ±   f      pwmbgrp         ¡   M      `        ±   ™      pwmcgrp         ¡   N      `        ±   ›      pwmdgrp         ¡   Œ       a   O      `        ±   �      sai0grp       0  ¡   ^     @   a     @   ]     @   _     @        ±   9      sgtl5000grp         ¡   ™      A      sgtl5000usbclkgrp           ¡   e      !        ±   j      usb3503agrp         ¡   —      a        ±   l      usbcdetgrp          ¡   3     @        ±   ®      usbh1reggrp         ¡        @        ±   ¯      usdhc1grp         �  ¡   	      A   
       !          !          !          !          !          !          !          !          !          A          !        ±   €      usdhc1-100mhzgrp          �  ¡   	      A   
       !          !          !          !          !          !          !          !          !          A          !        ±   �      usdhc1-200mhzgrp          �  ¡   	      A   
       !          !          !          !          !          !          !          !          !          A          !        ±   ‚      usdhc2gpiogrp           ¡   œ     !        ±   …      usdhc2gpioslpgrp            ¡   œ      `        ±   ‰      usdhc2grp         T  ¡         A          !           !   !       !   "       !   #       !          !        ±   „      usdhc2-100mhzgrp          T  ¡         A          !           !   !       !   "       !   #       !          !        ±   †      usdhc2-200mhzgrp          T  ¡         A          !           !   !       !   "       !   #       !          !        ±   ‡      usdhc2slpgrp          T  ¡         `         `          `   !      `   "      `   #      `          !        ±   ˆ      wifigrp         ¡   ‡                ocotp            2fsl,imx8qxp-scu-ocotp                               mac@2c4           Ä         mac@2c6           Æ            keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key           ª   t         ¹      	  Odisabled          reset-controller             2fsl,imx-scu-reset           Ç           ±         rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt           Ô   <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal           à           ±            timer            2arm,armv8-timer       0  6                                 
         clock-dummy          2fixed-clock         |            ö          
  clk_dummy           ±   !      clock-xtal32k            2fixed-clock         |            ö  €         xtal_32KHz        clock-xtal24m            2fixed-clock         |            ön6         xtal_24MHz        thermal-zones      cpu0-thermal               ú        /  Ð        =     c   trips      trip0           M _�        Y  Ð        passive         ±         trip1           M š(        Y  Ð      	  critical             cooling-maps       map0            d         0  i   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            pmic-thermal               ú        /  Ð        =     ñ   trips      trip0           M ­°        Y  Ð        passive         ±         trip1           M èH        Y  Ð      	  critical             cooling-maps       map0            d         0  i   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ               clock-img-ipg            2fixed-clock         |            öëÂ         img_ipg_clk         ±         clock-img-pxl            2fixed-clock         |            ö#ÃF         img_pxl_clk         ±   %      bus@58000000             2simple-bus                                   AX       X         isi@58100000            X           H  6      )         *         +         ,         -         .         0  ‡                                                  xper0 per1 per2 per3 per4 per5                      0  „     y     z     {     |     }     ~      	  Odisabled             2fsl,imx8qxp-isi    ports                                port@2                endpoint            ’           ±                  irqsteer@58220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X"                         !        6      @           ‡           xipg                      „     ‘        ¢            ®            ±         gpio@58222000            2fsl,imx8qm-gpio fsl,imx35-gpio          X"                         !        6            »            Ç                     „     ‘      clock-controller@58223018            2fsl,imx8qxp-lpcg            X"0           ‡     ‘           |           ×           csi0_lpcg_core_clk          „     y        ±         clock-controller@5822301c            2fsl,imx8qxp-lpcg            X"0           ‡     ‘           |           ×           csi0_lpcg_esc_clk           „     y        ±         i2c@58226000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X"`            6           ‡     “              xper ipg         å     “           õn6                      „     “      	  Odisabled          csi@58227000             2fsl,imx8qxp-mipi-csi2           X"p    X"            ‡                           xcore esc ui         å                    õu* J¢         „     y        
     ‘      	  Odisabled       ports                                port@0                    port@1                endpoint            ’           ±                  irqsteer@58240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X$                         !        6      A           ‡           xipg                      „     ”        ¢            ®          	  Odisabled            ±         gpio@58242000            2fsl,imx8qm-gpio fsl,imx35-gpio          X$                         !        6            »            Ç                     „     ”      	  Odisabled          clock-controller@58243018            2fsl,imx8qxp-lpcg            X$0           ‡     ”           |           ×           csi1_lpcg_core_clk          „     y      	  Odisabled            ±         clock-controller@5824301c            2fsl,imx8qxp-lpcg            X$0           ‡     ”           |           ×           csi1_lpcg_esc_clk           „     y      	  Odisabled            ±         i2c@58246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X$`            6           ‡     –              xper ipg         å     –           õn6                      „     –      	  Odisabled          csi@58247000             2fsl,imx8qxp-mipi-csi2           X$p    X$            ‡                            xcore esc ui         å                    õu* J¢         „     y        
     ”      	  Odisabled          irqsteer@58260000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X&                         !        6      B           ‡   !        xipg                      „     F        ¢            ®          	  Odisabled            ±   "      clock-controller@58263004            2fsl,imx8qxp-lpcg            X&0           ‡     F           |           ×           pi0_lpcg_ipg_clk            „     y      clock-controller@58263018            2fsl,imx8qxp-lpcg            X&0           ‡     F           |           ×            pi0_lpcg_pxl_clk            „     y      clock-controller@5826301c            2fsl,imx8qxp-lpcg            X&0           ‡     F            |           ×            pi0_lpcg_misc_clk           „     y      i2c@58266000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X&`            6           ‡     I              xper ipg         å     I           õn6              "        „     I      	  Odisabled          jpegdec@58400000            X@             6      5           ‡   #       #           å   #       #           õëÂ ëÂ         „          �         2nxp,imx8qxp-jpgdec          Ookay          jpegenc@58450000            XE             6      1           ‡   $       $           å   $       $           õëÂ ëÂ         „          …         2nxp,imx8qxp-jpgenc          Ookay          clock-controller@58500000            2fsl,imx8qxp-lpcg            XP             ‡   %        |           ×            pdma0_lpcg_clk          „     y        ±         clock-controller@58510000            2fsl,imx8qxp-lpcg            XQ             ‡   %        |           ×            pdma1_lpcg_clk          „     z        ±         clock-controller@58520000            2fsl,imx8qxp-lpcg            XR             ‡   %        |           ×            pdma2_lpcg_clk          „     {        ±         clock-controller@58530000            2fsl,imx8qxp-lpcg            XS             ‡   %        |           ×            pdma3_lpcg_clk          „     |        ±         clock-controller@58540000            2fsl,imx8qxp-lpcg            XT             ‡   %        |           ×            pdma4_lpcg_clk          „     }        ±         clock-controller@58550000            2fsl,imx8qxp-lpcg            XU             ‡   %        |           ×            pdma5_lpcg_clk          „     ~        ±         clock-controller@58560000            2fsl,imx8qxp-lpcg            XV             ‡   %        |           ×            pdma6_lpcg_clk          „           clock-controller@58570000            2fsl,imx8qxp-lpcg            XW             ‡   %        |           ×            pdma7_lpcg_clk          „     €      clock-controller@58580000            2fsl,imx8qxp-lpcg            XX             ‡   %        |           ×            csi0_lpcg_pxl_clk           „     ‘        ±         clock-controller@58590000            2fsl,imx8qxp-lpcg            XY             ‡   %        |           ×            csi1_lpcg_pxl_clk           „     ”      	  Odisabled            ±          clock-controller@585a0000            2fsl,imx8qxp-lpcg            XZ             ‡   %        |           ×            hdmi_rx_lpcg_pxl_link_clk           „     ›      clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]             |           ‡              ×             0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         „             ±   #      clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_             |           ‡              ×             0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         „             ±   $         vpu@2c000000                                     A,       ,                  ,                  „             Ookay             2nxp,imx8qxp-vpu    mailbox@2d000000             2fsl,imx6sx-mu           -              6      Õ                      „             Ookay            ±   &      mailbox@2d020000             2fsl,imx6sx-mu           -             6      Ö                      „             Ookay            ±   )      vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder           „             Vtx0 tx1 rx        $  a   &           &          &               Ookay               '   (      vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder           „             Vtx0 tx1 rx        $  a   )           )          )               Ookay               *   +         bus@31400000             2simple-bus                                   A1@      1@   	     crypto@31400000          2fsl,imx8qxp-caam fsl,sec-v4.0           1@   	          6       ”                                    A    1@   	          „     õ        +   	   jr@30000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        6      Å           „     õ      jr@40000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        6      Æ           „     ö            clock-cm40-ipg           2fixed-clock         |            öÞ)         cm40_ipg_clk            ±   /      bus@34000000             2simple-bus                                   A4       4                   ,   serial@37220000          2fsl,imx8qxp-lpuart          7"             6              ‡   -      -          	  xipg baud            å                õn6         „           	  Odisabled          i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             6   	           ‡   .       .           xper ipg         å                 õn6         „            	  Odisabled          intmux@37400000          2fsl,imx-intmux          7@                        `  6                                                                                         !                   ‡   /        xipg         „     !      	  Odisabled            ±   ,      clock-controller@37620000            2fsl,imx8qxp-lpcg            7b             |           ‡           /        ×             *  cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk           „             ±   -      clock-controller@37630000            2fsl,imx8qxp-lpcg            7c             |           ‡            /        ×             (  cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk         „              ±   .         bus@53000000             2simple-bus                                   AS       S         gpu@53100000             2vivante,gc          S             6       @           ‡      �         �           xcore shader         å      �         �           õ)¹' 2©ø€        „      �         clock-audio-ipg          2fixed-clock         |            ö'         audio_ipg_clk           ±   7      clock-ext-aud-mclk0          2fixed-clock         |            ö            ext_aud_mclk0           ±   G      clock-ext-aud-mclk1          2fixed-clock         |            ö            ext_aud_mclk1           ±   H      clock-esai0-rx           2fixed-clock         |            ö            esai0_rx_clk            ±   I      clock-esai0-rx-hf            2fixed-clock         |            ö            esai0_rx_hf_clk         ±   J      clock-esai0-tx           2fixed-clock         |            ö            esai0_tx_clk            ±   K      clock-esai0-tx-hf            2fixed-clock         |            ö            esai0_tx_hf_clk         ±   L      clock-spdif0-rx          2fixed-clock         |            ö          
  spdif0_rx           ±   M      clock-sai0-rx-bclk           2fixed-clock         |            ö            sai0_rx_bclk            ±   N      clock-sai0-tx-bclk           2fixed-clock         |            ö            sai0_tx_bclk            ±   O      clock-sai1-rx-bclk           2fixed-clock         |            ö            sai1_rx_bclk            ±   P      clock-sai1-tx-bclk           2fixed-clock         |            ö            sai1_tx_bclk            ±   Q      clock-sai2-rx-bclk           2fixed-clock         |            ö            sai2_rx_bclk            ±   R      clock-sai3-rx-bclk           2fixed-clock         |            ö            sai3_rx_bclk            ±   S      clock-sai4-rx-bclk           2fixed-clock         |            ö            sai4_rx_bclk            ±   T      bus@59000000             2simple-bus                                   AY       Y         asrc@59000000            2fsl,imx8qm-asrc         Y              6      t         d  ‡   0       0       1      2      3       3      !   !   !   !   !   !   !   !   !   !   !   !   !      �  xmem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  7   4               4              4              4             4             4                  <rxa rxb rxc txa txb txc         F  @        T           c            „     ž      	  Odisabled          esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai            Y             6      ™           ‡   5      5       5      !        xcore extal fsys spba             7   4             4                   <rx tx           „     Ÿ      	  Odisabled          spdif@59020000           2fsl,imx8qm-spdif            Y             6      È         Ê         0  ‡   6      !   6       !   !   !   7   !   !   !      :  xcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            7   4             4   	               <rx tx           „            	  Odisabled          sai@59040000             2fsl,imx8qm-sai          Y             6      :           ‡   8      !   8       !   !        xbus mclk0 mclk1 mclk2 mclk3         <rx tx            7   4             4                   „     >        Ookay            t            ‰default         —   9        ±   ²      sai@59050000             2fsl,imx8qm-sai          Y             6      <           ‡   :      !   :       !   !        xbus mclk0 mclk1 mclk2 mclk3         <rx tx            7   4             4                   „     ?      	  Odisabled          sai@59060000             2fsl,imx8qm-sai          Y             6      >           ‡   ;      !   ;       !   !        xbus mclk0 mclk1 mclk2 mclk3         <rx          7   4                  „     @      	  Odisabled          sai@59070000             2fsl,imx8qm-sai          Y             6      C           ‡   <      !   <       !   !        xbus mclk0 mclk1 mclk2 mclk3         <rx          7   4                  „     ¢      	  Odisabled          dma-controller@591f0000          2fsl,imx8qm-edma         Y             …           �           � \      ,  6      v         w         x         y         z         {         š         š         É         Ë                               ;         ;         =         =         ?         D                                          ‡                    ‰         q         À  „      @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W        ±   4      clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@             |           ‡   7        ×           asrc0_lpcg_ipg_clk          „     ž        ±   0      clock-controller@59410000            2fsl,imx8qxp-lpcg            YA             |           ‡   3      7        ×             (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk         „     Ÿ        ±   5      clock-controller@59420000            2fsl,imx8qxp-lpcg            YB             |           ‡   3      7        ×             %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw            „              ±   6      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD             |           ‡   3      7        ×             !  sai0_lpcg_mclk sai0_lpcg_ipg_clk            „     >        ±   8      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE             |           ‡   3      7        ×             !  sai1_lpcg_mclk sai1_lpcg_ipg_clk            „     ?        ±   :      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF             |           ‡   3      7        ×             !  sai2_lpcg_mclk sai2_lpcg_ipg_clk            „     @        ±   ;      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG             |           ‡   3      7        ×             !  sai3_lpcg_mclk sai3_lpcg_ipg_clk            „     ¢        ±   <      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY             |           ‡   7        ×           dsp_ram_lpcg_ipg_clk            „           asrc@59800000            2fsl,imx8qm-asrc         Y€             6      |         d  ‡   =      =      1       2       3       3      !   !   !   !   !   !   !   !   !   !   !   !   !      �  xmem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  7   >               >              >              >             >             >                  <rxa rxb rxc txa txb txc         F  @        T           c           „     Æ      	  Odisabled          sai@59820000             2fsl,imx8qm-sai          Y‚             6      I           ‡   ?      !   ?       !   !        xbus mclk0 mclk1 mclk2 mclk3          7   >             >   	                <rx tx           „     £      	  Odisabled            ±   B      sai@59830000             2fsl,imx8qm-sai          Yƒ             6      K           ‡   @      !   @       !   !        xbus mclk0 mclk1 mclk2 mclk3         7   >   
                <tx          „     ¤      	  Odisabled            ±   C      amix@59840000            2fsl,imx8qm-audmix           Y„             ‡   A            xipg         „     Ê        ®   B   C      	  Odisabled          mqs@59850000             2fsl,imx8qm-mqs          Y…             ‡   D      D          
  xmclk core           „     Ë      	  Odisabled          dma-controller@599f0000          2fsl,imx8qm-edma         YŸ             …           �           �   À      �  6      ~                  €         �         ‚         ƒ                               J         J         L         s         X  „      l      m      n      o      p      q      r      s      t      u      v        ±   >      clock-controller@59d00000            2fsl,imx8qxp-lpcg            YÐ             |           ‡     E           ×            aud_rec_clk0_lpcg_clk           „     E        ±   E      clock-controller@59d10000            2fsl,imx8qxp-lpcg            YÑ             |           ‡     ì           ×            aud_rec_clk1_lpcg_clk           „     ì        ±   F      clock-controller@59d20000            2fsl,imx8qxp-lpcg            YÒ             |           ‡     E            ×            aud_pll_div_clk0_lpcg_clk           „     E        ±   1      clock-controller@59d30000            2fsl,imx8qxp-lpcg            YÓ             |           ‡     ì            ×            aud_pll_div_clk1_lpcg_clk           „     ì        ±   2      clock-controller@59d50000            2fsl,imx8qxp-lpcg            YÕ             |           ‡   3           ×            mclkout0_lpcg_clk           „     ï        ±   k      clock-controller@59d60000            2fsl,imx8qxp-lpcg            YÖ             |           ‡   3           ×            mclkout1_lpcg_clk           „     ð      acm@59e00000             2fsl,imx8qxp-acm         Yà             |         ˆ  „     í     î     ï     ð     E     ì     ž     Æ     Ÿ     >     ?     @     ¢     £     ¤           Ë      X  ‡   E       F       1       2       G   H   I   J   K   L   M   N   O   P   Q   R   S   T       xaud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk          ±   3      clock-controller@59c00000            2fsl,imx8qxp-lpcg            YÀ             |           ‡   7        ×           asrc1_lpcg_ipg_clk          „     Æ        ±   =      clock-controller@59c20000            2fsl,imx8qxp-lpcg            YÂ             |           ‡   3      7        ×             !  sai4_lpcg_mclk sai4_lpcg_ipg_clk            „     £        ±   ?      clock-controller@59c30000            2fsl,imx8qxp-lpcg            YÃ             |           ‡   3      7        ×             !  sai5_lpcg_mclk sai5_lpcg_ipg_clk            „     ¤        ±   @      clock-controller@59c40000            2fsl,imx8qxp-lpcg            YÄ             |           ‡   7        ×            amix_lpcg_ipg_clk           „     Ê        ±   A      clock-controller@59c50000            2fsl,imx8qxp-lpcg            YÅ             |           ‡   3      7        ×             !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk            „     Ë        ±   D         clock-dma-ipg            2fixed-clock         |            ö'         dma_ipg_clk         ±   g      bus@5a000000             2simple-bus                                   AZ       Z         spi@5a000000             2fsl,imx7ulp-spi         Z                                        6      P                        ‡   U       U           xper ipg         å      5           õ“‡         „      5         7   V              V                   <tx rx         	  Odisabled          spi@5a010000             2fsl,imx7ulp-spi         Z                                       6      Q                        ‡   W       W           xper ipg         å      6           õ“‡         „      6         7   V              V                  <tx rx         	  Odisabled          spi@5a020000             2fsl,imx7ulp-spi         Z                                       6      R                        ‡   X       X           xper ipg         å      7           õ“‡         „      7         7   V              V                  <tx rx         	  Odisabled            ‰default         —   Y        ³   Z          [            spi@5a030000             2fsl,imx7ulp-spi         Z                                       6      S                        ‡   \       \           xper ipg         å      8           õ“‡         „      8         7   V              V                  <tx rx         	  Odisabled          serial@5a060000         Z             6      Y           ‡   ]      ]          	  xipg baud            å      9           õÄ´         „      9        <rx tx            7   V             V   	                Ookay             2fsl,imx8qxp-lpuart          ‰default         —   ^      serial@5a070000         Z             6      Z           ‡   _      _          	  xipg baud            å      :           õÄ´         „      :        <rx tx            7   V   
          V                 	  Odisabled             2fsl,imx8qxp-lpuart        serial@5a080000         Z             6      [           ‡   `      `          	  xipg baud            å      ;           õÄ´         „      ;        <rx tx            7   V             V                   Ookay             2fsl,imx8qxp-lpuart          ‰default         —   a      serial@5a090000         Z	             6      \           ‡   b      b          	  xipg baud            å      <           õÄ´         „      <        <rx tx            7   V             V                   Ookay             2fsl,imx8qxp-lpuart          ‰default         —   c   d      pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             6                  ‡   e      e            xipg per         å      ¼           õn6         ¼           „      ¼        ‰default         —   f        Ookay          dma-controller@5a1f0000          2fsl,imx8qm-edma         Z             …           �         Ì  6                ¡         ¢         £         ¤         ¥         ¦         §         ²         ³         ´         µ         ¶         ·         ¸         ¹          C         €  „      þ      ÿ                     «     ¬     ­     ®     ¯     °     ±     ²     ³     ´     µ        ±   V      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@             |           ‡      5      g        ×                spi0_lpcg_clk spi0_lpcg_ipg_clk         „      5        ±   U      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA             |           ‡      6      g        ×                spi1_lpcg_clk spi1_lpcg_ipg_clk         „      6        ±   W      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB             |           ‡      7      g        ×                spi2_lpcg_clk spi2_lpcg_ipg_clk         „      7        ±   X      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC             |           ‡      8      g        ×                spi3_lpcg_clk spi3_lpcg_ipg_clk         „      8        ±   \      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF             |           ‡      9      g        ×             '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk          „      9        ±   ]      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG             |           ‡      :      g        ×             '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk          „      :        ±   _      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH             |           ‡      ;      g        ×             '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk          „      ;        ±   `      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI             |           ‡      <      g        ×             '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk          „      <        ±   b      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY             |           ‡      ¼      g        ×             (  adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk         „      ¼        ±   e      i2c@5a800000            Z€    @                                   6       Ü           ‡   h       h           xper ipg         å      `           õn6         „      `        Ookay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         ö †         ‰default         —   i   j   usb-hub@8            2smsc,usb3803                     ,  å     E        E         E      k            õ.à  î   ·  ·         ‰default         —   l        Ç   m              ‡   k            xrefclk          Ô           ã           ð   n              û   m            audio-codec@a            2fsl,sgtl5000               
        t          ,  å     E        E         E      k            õ.à  î   ·  ·         ‡   k               o           p           q        ±   ±      touchscreen@2c           2adi,ad7879-1            ‰default         —   r           ,             n        6              ,           E   x        \           w           Œ           £           ±ÿ         	  Odisabled          gpio@43          2fcs,fxl6408            C         Ç        »         u  ÉWi-Fi_W_DISABLE Wi-Fi_WKUP_WLAN PWR_EN_+V3.3_WiFi_N PCIe_REF_CLK_EN USB_RESET_N USB_BYPASS_N Wi-Fi_PDn Wi-Fi_WKUP_BT            ±   m         i2c@5a810000            Z�    @                                   6       Ý           ‡   s       s           xper ipg         å      a           õn6         „      a      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         ö †         ‰default         —   t      i2c@5a820000            Z‚    @                                   6       Þ           ‡   u       u           xper ipg         å      b           õn6         „      b      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a830000            Zƒ    @                                   6       ß           ‡   v       v           xper ipg         å      c           õn6         „      c      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       adc@5a880000             2nxp,imx8qxp-adc         Ù           Zˆ             6       ð                        ‡   w       w           xper ipg         å      e           õn6         „      e        Ookay            ‰default         —   x        ë   p      can@5a8d0000             2fsl,imx8qm-flexcan          Z�             6       ë                        ‡   y      y            xipg per         å      i           õbZ         „      i        ÷                      	  Odisabled          can@5a8e0000             2fsl,imx8qm-flexcan          ZŽ             6       ì                        ‡   y      y            xipg per         å      i           õbZ         „      j        ÷                     	  Odisabled          can@5a8f0000             2fsl,imx8qm-flexcan          Z�             6       í                        ‡   y      y            xipg per         å      i           õbZ         „      k        ÷                     	  Odisabled          dma-controller@5a9f0000          2fsl,imx8qm-edma         ZŸ   	          …           �         l  6      ¨         ©         ª         «         ¬         ­         ®         ¯          E         @  „     Ì     Í     Î     Ï     Ð     Ñ     Ò     Ó      clock-controller@5ac00000            2fsl,imx8qxp-lpcg            ZÀ             |           ‡      `      g        ×                i2c0_lpcg_clk i2c0_lpcg_ipg_clk         „      `        ±   h      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            ZÁ             |           ‡      a      g        ×                i2c1_lpcg_clk i2c1_lpcg_ipg_clk         „      a        ±   s      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            ZÂ             |           ‡      b      g        ×                i2c2_lpcg_clk i2c2_lpcg_ipg_clk         „      b        ±   u      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            ZÃ             |           ‡      c      g        ×                i2c3_lpcg_clk i2c3_lpcg_ipg_clk         „      c        ±   v      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            ZÈ             |           ‡      e      g        ×                adc0_lpcg_clk adc0_lpcg_ipg_clk         „      e        ±   w      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            ZÍ             |           ‡      i      g   g        ×                5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            „      i        ±   y         clock-conn-axi           2fixed-clock         |            öÞCU        conn_axi_clk            ±   “      clock-conn-ahb           2fixed-clock         |            ö	ï!ª        conn_ahb_clk            ±   ”      clock-conn-ipg           2fixed-clock         |            ö÷�Õ        conn_ipg_clk            ±   ’      clock-conn-bch           2fixed-clock         |            ö×„         conn_bch_clk          bus@5b000000             2simple-bus                                   A[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          6                    z           {            ‡   |           +            <           P           „             Ookay             d         p        …   }   }         Œ         ˜         ª        ¶   ~      usbmisc@5b0d0200            Â         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [            ±   {      usbphy@5b100000       &   2fsl,imx8qxp-usbphy fsl,imx7ulp-usbphy           [             ‡   |           „             Ookay            ±   z      mmc@5b010000            6       è           [             ‡                           xipg ahb per         å      ø           õ×„         „      ø        Ï           ä           Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           ô            þ                        "  ‰default state_100mhz state_200mhz           —   €           �        $   ‚      mmc@5b020000            6       é           [             ‡   ƒ      ƒ      ƒ            xipg ahb per         å      ù           õëÂ         „      ù        Ï           ä           Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc           ô           .   n   	           7   q      (  ‰default state_100mhz state_200mhz sleep         —   „   …           †   …        $   ‡   …        C   ˆ   ‰         M         X      mmc@5b030000            6       ê           [             ‡   Š      Š      Š            xipg ahb per         å      ú           õëÂ         „      ú        Ï           ä         	  Odisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         ethernet@5b040000           [           0  6                                           (  ‡   ‹      ‹      ‹      ‹       ‹         '  xipg ahb enet_clk_ref ptp enet_2x_txclk          å      û         û           õæ²€sY@        a           s           „      û        Ookay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           ‰default sleep           —   Œ           �        …rmii            Ž   Ž         ™   mdio                                 ethernet-phy@2           2ethernet-phy-ieee802.3-c22          ª   d                   ±   Ž            ethernet@5b050000           [           0  6                                          (  ‡   �      �      �      �       ‹         '  xipg ahb enet_clk_ref ptp enet_2x_txclk          å      ü         ü           õæ²€sY@        a           s           „      ü      	  Odisabled          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec         usb@5b110000             2fsl,imx8qm-usb3         [                                       A      (  ‡   �      �       �      �      �           xlpm bus aclk ipg core           å                õæ²€        „             Ookay       usb@5b120000          
   2cdns,usb3           [     [     [             ´otg xhci dev                       0  6                                            ¾host peripheral otg wakeup          Î   ‘        Ócdns3,usb3-phy          Ý           Ookay            ôhost             usb-phy@5b160000             2nxp,salvo-phy           [             ‡   �           xsalvo_phy_clk           „             ü            Ookay            ±   ‘      clock-controller@5b200000            2fsl,imx8qxp-lpcg            [              |           ‡      ø      ’   “        ×                9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            „      ø        ±         clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!             |           ‡      ù      ’   “        ×                9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            „      ù        ±   ƒ      clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["             |           ‡      ú      ’   “        ×                9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            „      ú        ±   Š      clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#             |         0  ‡      û         û      “      û      ’   ’        ×                         …  enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_ref_50mhz_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            „      û        ±   ‹      clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$             |         0  ‡      ü         ü      “      ü      ’   ’        ×                         …  enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            „      ü        ±   �      clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['             |           ‡   ”   ’        ×            "  usboh3_ahb_clk usboh3_phy_ipg_clk           „             ±   |      clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(             |           ×                         0  ‡                   ’   ’   ’              M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            „             ±   �      clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)             |            ‡     	        	      “   “        ×                   '  gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb          „     	        ±   –      clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)            |           ‡   “        ×           apbhdma_hclk            „     	        ±   •      dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [�            0  6                                            …           �           ‡   •            „     	        ±   —      nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [�      [�@             ´gpmi-nand bch                                     6                 ¾bch          ‡   –      –      –       –         '  xgpmi_io gpmi_apb gpmi_bch gpmi_bch_apb          7   —            <rx-tx           „     	        å     	           õúð€      	  Odisabled             bus@5c000000             2simple-bus                                   A\       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             6       ƒ            clock-lsio-bus           2fixed-clock         |            öõá         lsio_bus_clk            ±          bus@5d000000             2simple-bus                                    A]       ]                      pwm@5d000000             2fsl,imx27-pwm           ]              xipg per         ‡   ˜      ˜           å      ¿           õn6         ¼           6       ^         	  Odisabled            —   ™        ‰default       pwm@5d010000             2fsl,imx27-pwm           ]             xipg per         ‡   š      š           å      À           õn6         ¼           6       _         	  Odisabled            —   ›        ‰default       pwm@5d020000             2fsl,imx27-pwm           ]             xipg per         ‡   œ      œ           å      Á           õn6         ¼           6       `         	  Odisabled            —   �        ‰default       pwm@5d030000             2fsl,imx27-pwm           ]             xipg per         ‡   ž      ž           å      Â           õn6         ¼           6       a         	  Odisabled          gpio@5d080000           ]             6       ˆ            Ç        »            !                   „      Ç          2fsl,imx8qxp-gpio fsl,imx35-gpio       P     Ÿ      8      Ÿ      E      Ÿ      K      Ÿ      P      Ÿ      R          É SODIMM_70 SODIMM_60 SODIMM_58 SODIMM_78 SODIMM_72 SODIMM_80 SODIMM_46 SODIMM_62 SODIMM_48 SODIMM_74 SODIMM_50 SODIMM_52 SODIMM_54 SODIMM_66 SODIMM_64 SODIMM_68   SODIMM_82 SODIMM_56 SODIMM_28 SODIMM_30  SODIMM_61 SODIMM_103 SODIMM_79 SODIMM_97  SODIMM_25 SODIMM_27 SODIMM_100          gpio@5d090000           ]	             6       ‰            Ç        »            !                   „      È          2fsl,imx8qxp-gpio fsl,imx35-gpio       0     Ÿ       Y   	   Ÿ   	   c      Ÿ      t          ÉSODIMM_86 SODIMM_92 SODIMM_90 SODIMM_88    SODIMM_59  SODIMM_6 SODIMM_8   SODIMM_2 SODIMM_4 SODIMM_34 SODIMM_32 SODIMM_63 SODIMM_55 SODIMM_33 SODIMM_35 SODIMM_36 SODIMM_38 SODIMM_21 SODIMM_19 SODIMM_140 SODIMM_142 SODIMM_196 SODIMM_194 SODIMM_186 SODIMM_188 SODIMM_138            ±   Z      gpio@5d0a0000           ]
             6       Š            Ç        »            !                   „      É          2fsl,imx8qxp-gpio fsl,imx35-gpio       0     Ÿ       {      Ÿ      ~      Ÿ      �           ÉSODIMM_23   SODIMM_144        gpio@5d0b0000           ]             6       ‹            Ç        »            !                   „      Ê          2fsl,imx8qxp-gpio fsl,imx35-gpio       0     Ÿ       ’      Ÿ      —      Ÿ      ¥         Ò  ÉSODIMM_96 SODIMM_75 SODIMM_37 SODIMM_29      SODIMM_43 SODIMM_45 SODIMM_69 SODIMM_71 SODIMM_73 SODIMM_77 SODIMM_89 SODIMM_93 SODIMM_95 SODIMM_99 SODIMM_105 SODIMM_107 SODIMM_98 SODIMM_102 SODIMM_104 SODIMM_106           ±   n      gpio@5d0c0000           ]             6       Œ            Ç        »            !                   „      Ë          2fsl,imx8qxp-gpio fsl,imx35-gpio       €     Ÿ              Ÿ            Ÿ      	      Ÿ            Ÿ            Ÿ            Ÿ            Ÿ      %         ˜  É   SODIMM_129 SODIMM_133 SODIMM_127 SODIMM_131             SODIMM_44  SODIMM_76 SODIMM_31 SODIMM_47 SODIMM_190 SODIMM_192 SODIMM_49 SODIMM_51 SODIMM_53         ±   ¢      gpio@5d0d0000           ]             6       �            Ç        »            !                   „      Ì          2fsl,imx8qxp-gpio fsl,imx35-gpio       0     Ÿ       (      Ÿ      ,      Ÿ   	   3         a  É SODIMM_57 SODIMM_65 SODIMM_85     SODIMM_135 SODIMM_137 UNUSABLE_SODIMM_180 UNUSABLE_SODIMM_184            ±   [      gpio@5d0e0000           ]             6       Ž            Ç        »            !                   „      Í          2fsl,imx8qxp-gpio fsl,imx35-gpio       gpio@5d0f0000           ]             6       �            Ç        »            !                   „      Î          2fsl,imx8qxp-gpio fsl,imx35-gpio       spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   ´fspi_base fspi_mmap         6       \           ‡      í         í           xfspi_en fspi            „      í      	  Odisabled          mailbox@5d1b0000            ]             6       °                    	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1c0000            ]             6       ±                    -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu            ±         mailbox@5d1d0000            ]             6       ²                    	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1e0000            ]             6       ³                    	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1f0000            ]             6       ´                    	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d200000            ]              6       ¸                      „      Ú      	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d210000            ]!             6       ¹                      „      Û      	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d280000            ](             6       À                      „      â         2fsl,imx8qxp-mu fsl,imx6sx-mu          clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@             |         4  ‡      ¿         ¿         ¿             ¿           ×                      h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         „      ¿        ±   ˜      clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A             |         4  ‡      À         À         À             À           ×                      h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         „      À        ±   š      clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B             |         4  ‡      Á         Á         Á             Á           ×                      h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         „      Á        ±   œ      clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C             |         4  ‡      Â         Â         Â             Â           ×                      h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         „      Â        ±   ž      clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D             |         4  ‡      Ã         Ã         Ã             Ã           ×                      h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         „      Ã      clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E             |         4  ‡      Ä         Ä         Ä             Ä           ×                      h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         „      Ä      clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F             |         4  ‡      Å         Å         Å             Å           ×                      h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         „      Å      clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G             |         4  ‡      Æ         Æ         Æ             Æ           ×                      h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         „      Æ         clock-hsio-axi           2fixed-clock         |            ö×„         hsio_axi_clk            ±   ¦      clock-hsio-per           2fixed-clock         |            öò�U        hsio_per_clk            ±   §      clock-hsio-refa          2gpio-gate-clock         ‡   ¡        |               ¢            clock-hsio-refb          2gpio-gate-clock         ‡   ¡        |               m               ±   ¨      clock-xtal100m           2fixed-clock         |            öõá         xtal_100MHz         ±   ¡      bus@5f000000             2simple-bus           A_       _      €       p                                        €       €   €      pcie@5f010000            2fsl,imx8q-pcie          _     �ð             ´dbi config        0  A�           �ø         ‚       €   €       ð                     6       f          h           ¾msi dma                                  ‡   £      £      £           xdbi mstr slv            +       ÿ         pci       €  5                         i                            j                            k                            l           C                       V           `           „      ©        m           Ookay            ‰default         —   ¤        Î   ¥                 	  Ópcie-phy            û   ¢             pcie-ep@5f010000             2fsl,imx8q-pcie-ep           _     €              ´dbi addr_space          V           6       h           ¾dma         ‡   £      £      £           xdbi mstr slv            „      ©        m           €           �         	  Odisabled          clock-controller@5f060000            2fsl,imx8qxp-lpcg            _             ‡   ¦   ¦   ¦        |           ×               F  hsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk           „      ©        ±   £      clock-controller@5f0b0000            2fsl,imx8qxp-lpcg            _             ‡   §        |           ×           hsio_phyx1_per_clk          „      «        ±   ª      clock-controller@5f0d0000            2fsl,imx8qxp-lpcg            _             ‡   §        |           ×           hsio_pcieb_per_clk          „      ©        ±   «      clock-controller@5f0f0000            2fsl,imx8qxp-lpcg            _             ‡   §        |           ×           hsio_misc_per_clk           „      ¬        ±   ¬      clock-controller@5f090000            2fsl,imx8qxp-lpcg            _	             ‡   ¨   §   §   §        |           ×                   Q  hsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk            „      «        ±   ©      phy@5f1a0000             2fsl,imx8qxp-hsio             _     _     _     _             ´reg phy ctrl misc         (  ‡   ©       ©      ª      «      ¬         +  xpclk0 apb_pclk0 phy0_crr ctl0_crr misc_crr          ü           „      «        Ookay            žpciea-x2-pcieb          «input           ±   ¥         chosen          ¿/bus@5a000000/serial@5a090000         gpio-keys         
   2gpio-keys           ‰default         —   ­        Ookay       key-wakeup          Ë   
        ¶   n   
            ÝWake-Up         ã   �         ¹         usbc-det             2linux,extcon-usb-gpio           ‰default         —   ®        î   [   	            Ookay            ±   }      regulator-module-3v3             2regulator-fixed         ÷+V3.3           	 2Z         	 2Z         ±   q      regulator-module-3v3-avdd            2regulator-fixed         	 2Z         	 2Z         ÷+V3.3_AVDD_AUDIO            ±   o      regulator-module-vref-1v8            2regulator-fixed         	 w@        	 w@      	  ÷vref-1v8            ±   p      regulator-module-wifi            2regulator-fixed         	6   m                	;         	N      
  ÷Wi-Fi_PDn           	b  Ð      regulator-usbh-vbus          2regulator-fixed         ‰default         —   ¯        	6   ¢               	N        	 LK@        	 LK@      
  ÷usbh_vbus           ±   ~      sound-card           2simple-audio-card           	s   °        	•i2s         	®   °        	Ícolibri-imx8x      simple-audio-card,codec         ‡   k            	ä   ±        ±   °      simple-audio-card,cpu           	ä   ²            	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins linux,keycodes wakeup-source #reset-cells timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device clock-names power-domains remote-endpoint fsl,channel fsl,num-irqs #gpio-cells gpio-controller clock-indices assigned-clocks assigned-clock-rates resets #mbox-cells memory-region fsl,sec-era dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map #sound-dai-cells #dma-cells dma-channels dma-channel-mask dais cs-gpios #pwm-cells bypass-gpios disabled-ports initial-mode intn-gpios reset-gpios VDDA-supply VDDD-supply VDDIO-supply touchscreen-max-pressure adi,resistance-plate-x adi,first-conversion-delay adi,acquisition-time adi,median-filter-size adi,averaging adi,conversion-interval gpio-line-names #io-channel-cells vref-supply fsl,clk-source fsl,scu-index fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable disable-over-current extcon hnp-disable power-active-high srp-disable vbus-supply #index-cells fsl,tuning-start-tap fsl,tuning-step bus-width non-removable no-sd no-sdio pinctrl-1 pinctrl-2 cd-gpios vmmc-supply pinctrl-3 disable-wp no-1-8-v fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet max-speed reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode #phy-cells gpio-ranges enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed num-ib-windows num-ob-windows fsl,hsio-cfg fsl,refclk-pad-mode stdout-path debounce-interval label linux,code id-gpios regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high regulator-always-on startup-delay-us simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,name sound-dai 