Ðþí  ªº   8  Ÿ   (            ²  žÐ                             `    google,hana-rev6 google,hana-rev5 google,hana-rev4 google,hana-rev3 google,hana mediatek,mt8173                                  +            7Google Hana          =laptop     aliases          J/soc/ovl@1400c000            O/soc/ovl@1400d000            T/soc/rdma@1400e000           Z/soc/rdma@1400f000           `/soc/rdma@14010000           f/soc/wdma@14011000           l/soc/wdma@14012000           r/soc/color@14013000          y/soc/color@14014000          €/soc/split@14018000          ‡/soc/split@14019000          Ž/soc/dpi@1401d000            “/soc/dsi@1401b000            ˜/soc/dsi@1401c000            �/soc/rdma@14001000           §/soc/rdma@14002000           ±/soc/rsz@14003000            º/soc/rsz@14004000            Ã/soc/rsz@14005000            Ì/soc/wdma@14006000           Ö/soc/wrot@14007000           à/soc/wrot@14008000           ê/soc/serial@11002000             ò/soc/serial@11003000             ú/soc/serial@11004000            /soc/serial@11005000            
/soc/mmc@11230000           /soc/mmc@11240000           /soc/mmc@11260000         opp-table-0           operating-points-v2                  $   	   opp-507000000           ,    84À        3 x      opp-702000000           ,    )×«€        3 Úà      opp-1001000000          ,    ;ª@        3 ÿØ      opp-1105000000          ,    AÜö@        3 eh      opp-1209000000          ,    Hà@        3 Ç      opp-1300000000          ,    M|m         3  è      opp-1508000000          ,    YâA         3 ì      opp-1703000000          ,    e�·À        3 *ˆ         opp-table-1           operating-points-v2                  $      opp-507000000           ,    84À        3 ¢`      opp-702000000           ,    )×«€        3 :¸      opp-1001000000          ,    ;ª@        3 %      opp-1209000000          ,    Hà@        3 Å@      opp-1404000000          ,    S¯W         3 ]˜      opp-1612000000          ,    `+         3 ¨      opp-1807000000          ,    k´¡À        3 �è      opp-2106000000          ,    }‡€        3 *ˆ         cpus                         +       cpu-map    cluster0       core0           A         core1           A            cluster1       core0           A         core1           A               cpu@0           Ecpu           arm,cortex-a53          Q            Upsci            c           s           ‚          œ                    £cpu intermediate            ¯   	        Ã  ä        Ö   
        $         cpu@1           Ecpu           arm,cortex-a53          Q           Upsci            c           s           ‚          œ                    £cpu intermediate            ¯   	        Ã  ä        Ö   
        $         cpu@100         Ecpu           arm,cortex-a72          Q           Upsci            c           s           ‚          œ                    £cpu intermediate            ¯           Ã           Ö           â           $         cpu@101         Ecpu           arm,cortex-a72          Q          Upsci            c           s           ‚          œ                    £cpu intermediate            ¯           Ã           Ö           â           $         idle-states         îpsci       cpu-sleep-0           arm,idle-state           û                    ¨        -  @        >           $               pmu-a53           arm,cortex-a53-pmu          U                 	           `            pmu-a72           arm,cortex-a72-pmu          U                            `            psci          #    arm,psci-1.0 arm,psci-0.2 arm,psci          \smc         s„          „          ‡„        oscillator0           fixed-clock         Ž            ›Œº€        «clk26m          $         oscillator1           fixed-clock         Ž            ›  }         «clk32k        oscillator2           fixed-clock         Ž            ›            «cpum_ck       thermal-zones      cpu-thermal         ¾  è        Ô  è        â           ò  ”   trips      trip-point0           ê`          Ð         Epassive       trip-point1           ýè          Ð         Epassive         $         cpu-crit0            Á8          Ð      	   Ecritical             cooling-maps       map0                           ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        /         map1                           ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        /                  reserved-memory                      +            <   audio-dma-pool            shared-dma-pool         C               H                R        $   6      vpu-dma-mem@b7000000              shared-dma-pool         Q    ·        P          H            R        $            timer             arm,armv8-timer                   0  U                              
           Y      soc                      +             simple-bus           <   clock-controller@10000000             mediatek,mt8173-topckgen            Q                      Ž           $         clock-controller@10001000              mediatek,mt8173-infracfg syscon         Q                     Ž           p           $         clock-controller@10003000             mediatek,mt8173-pericfg syscon          Q     0                Ž           p           $         syscon@10005000       %    mediatek,mt8173-pctl-a-syscfg syscon            Q     P                $         pinctrl@1000b000              mediatek,mt8173-pinctrl         Q     °                }            ’        ¢            ®        Ã         $  U       ‘          ’          “        %  ÔEC_INT_1V8 SD_CD_L ALC5514_IRQ ALC5650_IRQ AP_FLASH_WP_L SFIN SFCS0 SFHOLD SFOUT SFCK WRAP_EVENT_S_EINT10 PMU_INT I2S2_WS_ALC5650 I2S2_BCK_ALC5650 PWR_BTN_1V8 DA9212_IRQ IDDIG WATCHDOG CEC HDMISCK HDMISD HTPLG MSDC3_DAT0 MSDC3_DAT1 MSDC3_DAT2 MSDC3_DAT3 MSDC3_CLK MSDC3_CMD USB_C0_OC_FLAGB USBA_OC1_L PS8640_1V2_ENABLE THERM_ALERT_N PANEL_LCD_POWER_EN ANX7688_CHIP_PD_C EC_IN_RW_1V8 ANX7688_1V_EN_C USB_DP_HPD_C TPM_DAVINT_N MARVELL8897_IRQ EN_USB_A0_PWR USBA_A0_OC_L EN_PP3300_DX_EDP  SOC_I2C2_1V8_SDA_400K SOC_I2C2_1V8_SCL_400K SOC_I2C0_1V8_SDA_400K SOC_I2C0_1V8_SCL_400K EMMC_ID1 EMMC_ID0 MEM_CONFIG3 EMMC_ID2 MEM_CONFIG1 MEM_CONFIG2 BRD_ID2 MEM_CONFIG0 BRD_ID0 BRD_ID1 EMMC_DAT0 EMMC_DAT1 EMMC_DAT2 EMMC_DAT3 EMMC_DAT4 EMMC_DAT5 EMMC_DAT6 EMMC_DAT7 EMMC_CLK EMMC_CMD EMMC_RCLK PLT_RST_L LID_OPEN_1V8_L AUDIO_SPI_MISO_R  AC_OK_1V8 SD_DATA0 SD_DATA1 SD_DATA2 SD_DATA3 SD_CLK SD_CMD PWRAP_SPI0_MI PWRAP_SPI0_MO PWRAP_SPI0_CK PWRAP_SPI0_CSN   WIFI_PDN RTC32K_1V8 DISP_PWM0 TOUCHSCREEN_INT_L  SRCLKENA0 SRCLKENA1 PS8640_MODE_CONF TOUCHSCREEN_RESET_R PLATFORM_PROCHOT_L PANEL_POWER_EN REC_MODE_L EC_FW_UPDATE_L ACCEL2_INT_L HDMI_DP_INT ACCELGYRO3_INT_L ACCELGYRO4_INT_L SPI_EC_CLK SPI_EC_MI SPI_EC_MO SPI_EC_CSN SOC_I2C3_1V8_SDA_400K SOC_I2C3_1V8_SCL_400K        PS8640_SYSRSTN_1V8 APIN_MAX98090_DOUT2 TP_INT_1V8_L_R RST_USB_HUB_R BT_WAKE_L ACCEL1_INT_L TABLET_MODE_L  V_UP_IN_L_R V_DOWN_IN_L_R SOC_I2C1_1V8_SDA_1M SOC_I2C1_1V8_SCL_1M PS8640_PDN_1V8 MAX98090_LRCLK MAX98090_BCLK MAX98090_MCLK APOUT_MAX98090_DIN APIN_MAX98090_DOUT SOC_I2C4_1V8_SDA_400K SOC_I2C4_1V8_SCL_400K            $      xxx         $   R   pins1           ä           ë         ø         i2c0            $      pins1           ä  -  .                  i2c1            $   *   pins1           ä  }  ~               da9211_pins         ä                     i2c2            $   +   pins1           ä  +  ,                  i2c3            $   0   pins1           ä  j  k                  i2c4            $   1   pins1           ä  …  †                  i2c6            $   4   pins1           ä  d  e                  aud_i2s2            $   e   pins1           ä  €  �  ‚  ƒ      „         ø         bl_fixed_pins           $   ]   pins1           ä             !         bt_wake_pins       pins1           ä  w                   disp_pwm0_pins          $   P   pins1           ä  W         !         gpio_keys_pins          $   ^   volume_pins         ä  {   |                tablet_mode_pins            ä  y                   hdmi_mux_pins      pins1           ä  $       pins2           ä  b                   ,         mmc0default         $   7   pins_cmd_dat          $  ä  9  :  ;  <  =  >  ?  @  B               pins_clk            ä  A         ø      pins_rst            ä  D                  mmc1default         $   ;   pins_cmd_dat            ä  I  J  K  L  N         ë        8              f      pins_clk            ä  M         ø        8         pins_insert         ä                  pins_wp         ä  *          ë                  mmc3default         $   ?   pins_dat            ä                 ë        8              f      pins_cmd            ä           ë        8              f      pins_clk            ä           ø        8            mmc0            $   8   pins_cmd_dat          $  ä  9  :  ;  <  =  >  ?  @  B         ë        8              e      pins_clk            ä  A        8           ø   e      pins_ds         ä  C        8   
        ø   e      pins_rst            ä  D                  mmc1            $   <   pins_cmd_dat            ä  I  J  K  L  N         ë        8              f      pins_clk            ä  M        8           ø   f         mmc3            $   @   pins_dat            ä                 ë        8              f      pins_cmd            ä           ë        8              f      pins_clk            ä          8           ø   f         nor         $   /   pins1           ä               ë        8                  pins2           ä          8                  pins_clk            ä  	         ë        8                     panel_backlight_en_pins         $   \   pins1           ä  _          panel_fixed_pins            $   _   pins1           ä  )          ps8640_pins         $   "   pins1           ä  \   s             ps8640_fixed_pins           $   `   pins1           ä            rt5650_irq          $   !   pins1           ä            ø         sdio_fixed_3v3_pins         $   a   pins1           ä  U          !         spi1            $   ,   pins1           ä                   pins_spi            ä  f  g  h  i                  trackpad_irq            $   2   pins1           ä  u          ë                  usb         $   G   pins1           ä  e          ,                  wifi_wake_pins     pins1           ä  &                      syscon@10006000       )    mediatek,mt8173-scpsys syscon simple-mfd            Q     `           power-controller          !    mediatek,mt8173-power-controller                         +            G           $   5   power-domain@0          Q            œ      U        £mm          G          power-domain@1          Q           œ      U      X        £mm venc         G          power-domain@2          Q           œ      U        £mm          G          power-domain@3          Q           œ      U        £mm          G            [         power-domain@4          Q           œ      U      i      
  £mm venclt           G          power-domain@5          Q           G          power-domain@6          Q           G          power-domain@7          Q           œ           £mfg                      +            G           m      power-domain@8          Q                        +            G      power-domain@9          Q   	        G            [                     watchdog@10007000         (    mediatek,mt8173-wdt mediatek,mt6589-wdt         Q     p              	  {disabled          timer@10008000        ,    mediatek,mt8173-timer mediatek,mt6577-timer         Q     €                U       �           œ            x      pwrap@1000d000            mediatek,mt8173-pwrap           Q     Ð                ‚pwrap           U       ™           Œ              “pwrap           œ      
            	  £spi wrap       pmic              mediatek,mt6397         Ÿ                  ®        Ã      clocks            mediatek,mt6397-clk         Ž         pinctrl           mediatek,mt6397-pinctrl          ’        ¢         regulators            mediatek,mt6397-regulator      buck_vpca15         ³vpca15          Â 
®`        Ú ™p        ò  0Ô                                $   
      buck_vpca7          ³vpca7           Â 
®`        Ú ™p        ò  0Ô        3   s               buck_vsramca15        
  ³vsramca15           Â 
®`        Ú ™p        ò  0Ô               buck_vsramca7         	  ³vsramca7            Â 
®`        Ú ™p        ò  0Ô                 $         buck_vcore          ³vcore           Â 
®`        Ú ™p        ò  0Ô               buck_vgpu           ³vgpu            Â 
®`        Ú ™p        ò  0Ô        3   s      buck_vdrm           ³vdrm            Â O€        Ú \À        ò  0Ô               buck_vio18          ³vio18           Â ¸         Ú 6`        ò  0Ô                 $   :      ldo_vtcxo           ³vtcxo                  ldo_va28            ³va28          ldo_vcama           ³vcama           Â w@        Ú w@        3   Ú        $          ldo_vio28           ³vio28                  ldo_vusb            ³vusb            $   F      ldo_vmc         ³vmc         Â w@        Ú 2Z         3   Ú        $   >      ldo_vmch            ³vmch            Â -ÆÀ        Ú 2Z         3   Ú        $   =      ldo_vemc3v3       	  ³vemc_3v3            Â -ÆÀ        Ú 2Z         3   Ú        $   9      ldo_vgp1            ³vcamd           Â w@        Ú w@        3   ð        $         ldo_vgp2            ³vcamio          Â 2Z         Ú 2Z         3   Ú        $   $      ldo_vgp3            ³vcamaf          Â w@        Ú w@        3   Ú        $   B      ldo_vgp4            ³vgp4            Â O€        Ú 2Z         3   Ú      ldo_vgp5            ³vgp5            Â O€        Ú -ÆÀ        3   Ú      ldo_vgp6            ³vgp6            Â 2Z         Ú 2Z         3   Ú                 $   3      ldo_vibr            ³vibr            Â Ö         Ú 2Z         3   Ú         rtc           mediatek,mt6397-rtc             cec@10013000              mediatek,mt8173-cec         Q    0        ¼        U       §           œ      	        {okay          vpu@10020000              mediatek,mt8173-vpu          Q                                  ‚tcm cfg_reg         U       ¦           œ      g        £main            O           $   K      interrupt-controller@10200620         .    mediatek,mt8173-sysirq mediatek,mt6577-sysirq            ®        Ã                       Q                      $         iommu@10205000            mediatek,mt8173-m4u         Q     P                U       ‹           œ              £bclk            [           ]                          l           $   J      efuse@10206000            mediatek,mt8173-efuse           Q     `                             +      socinfo-data1@40            Q   @         socinfo-data2@44            Q   D         calib@528           Q  (           $   .         clock-controller@10209000             mediatek,mt8173-apmixedsys          Q     �                Ž           $         hdmi-phy@10209100             mediatek,mt8173-hdmi-phy            Q     ‘        $        œ              £pll_ref         «hdmitx_dig_cts          y           ˆ           Ž            š            {okay            $   S      mailbox@10212000              mediatek,mt8173-gce         Q    !                 U       ‡           œ              £gce         ¥           $   H      dsi-phy@10215000              mediatek,mt8173-mipi-tx         Q    !P                œ           «mipi_tx0_pll            Ž            š            {okay            $   L      dsi-phy@10216000              mediatek,mt8173-mipi-tx         Q    !`                œ           «mipi_tx1_pll            Ž            š          	  {disabled            $   N      interrupt-controller@10221000             arm,gic-400         Ã                        ®      @  Q    "            "              "@             "`                 U      	          $         auxadc@11001000           mediatek,mt8173-auxadc          Q                     œ              £main            ±           $   -      serial@11002000       *    mediatek,mt8173-uart mediatek,mt6577-uart           Q                      U       S           œ      $            	  £baud bus            {okay          serial@11003000       *    mediatek,mt8173-uart mediatek,mt6577-uart           Q     0                U       T           œ      %            	  £baud bus          	  {disabled          serial@11004000       *    mediatek,mt8173-uart mediatek,mt6577-uart           Q     @                U       U           œ      &            	  £baud bus          	  {disabled          serial@11005000       *    mediatek,mt8173-uart mediatek,mt6577-uart           Q     P                U       V           œ      '            	  £baud bus          	  {disabled          i2c@11007000              mediatek,mt8173-i2c          Q     p        p             €        U       L           Ã           œ                  	  £main dma            Ídefault         Û                        +            {okay            › @   audio-codec@1a            realtek,rt5650          Q           å           ñ            Ÿ                 Ídefault         Û   !        þ                      &           $   b      edp-bridge@8              parade,ps8640           Q           6                 F      s           Ídefault         Û   "        R   #        _   $   ports                        +       port@0          Q       endpoint            l   %        $   M         port@1          Q      endpoint            l   &        $   )            aux-bus    panel         
    edp-panel           |   '        ‰   (   port       endpoint            l   )        $   &                     i2c@11008000              mediatek,mt8173-i2c          Q     €        p     €       €        U       M           Ã           œ                  	  £main dma            Ídefault         Û   *                     +            {okay            › ã`   da9211@68             dlg,da9211          Q   h        Ÿ            regulators     BUCKA           ³VBUCKA          Â 
®`        Ú ý0        “ „€        ª C#€        ò  '                               $         BUCKB           ³VBUCKB          Â 
®`        Ú ý0        “ „€        ª -ÆÀ        ò  '        $                  i2c@11009000              mediatek,mt8173-i2c          Q     �        p             €        U       N           Ã           œ                  	  £main dma            Ídefault         Û   +                     +            {okay       tpm@20            infineon,slb9645tt          Q             Á         spi@1100a000              mediatek,mt8173-spi                      +            Q                      U       n           œ      4      \              £parent-clk sel-clk spi-clk          {okay            Ídefault         Û   ,        Ù      ec@0              google,cros-ec-spi          Q            í ·         Ÿ                  ÿ  ô            i2c-tunnel0           google,cros-ec-i2c-tunnel           *                         +       sbs-battery@b             sbs,sbs-battery         Q           <           P            keyboard-controller           google,cros-ec-keyb         e           u            ˆ     D  ¢  ; < = > ? @ A	 B	 C  D  }  0  Y  1   
 d  " # (  \       V 
 |  } )   	 Ž + ^  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i            thermal@1100b000            ¯              mediatek,mt8173-thermal         Q     °                U       F           œ                    £therm auxadc            Œ              Å   -        Õ           é   .        õcalibration-data               
                   $         spi@1100d000              mediatek,mt8173-nor         Q     Ð        à               \        0           œ      !      r              £spi sf axi                       +            {okay            Ídefault         Û   /   flash@0           jedec,spi-nor           Q            íúð€         i2c@11010000              mediatek,mt8173-i2c          Q             p     €       €        U       O           Ã           œ                  	  £main dma            Ídefault         Û   0                     +            {okay            › €   touchscreen@10            elan,ekth3500           Q           Ÿ      X           {fail-needs-probe          touchscreen@34            melfas,mip4_ts          Q   4        Ÿ      X           {fail-needs-probe          touchscreen@20            hid-over-i2c            Q            G            Ÿ      X           {fail-needs-probe          touchscreen@40            hid-over-i2c            Q   @        G                       U   X           {fail-needs-probe             i2c@11011000              mediatek,mt8173-i2c          Q            p             €        U       P           Ã           œ                  	  £main dma            Ídefault         Û   1                     +            {okay            › €   trackpad@15           elan,ekth3000           Ÿ      u           Ídefault         Û   2        Q           V   3                 {fail-needs-probe          trackpad@2c           hid-over-i2c            Ÿ      u           Ídefault         Û   2        Q   ,        G            æ   3                 {fail-needs-probe             i2c@11012000              mediatek,mt8173-hdmi-ddc            U       Q           Q                     œ              £ddc-i2c         $   f      i2c@11013000              mediatek,mt8173-i2c          Q    0        p      €       €        U       R           Ã           œ      #            	  £main dma            Ídefault         Û   4                     +          	  {disabled          audio-controller@11220000             mediatek,mt8173-afe-pcm         Q    "                 U       †           a   5         P  œ            d      e      y            …      †      ‡      ˆ      ‰      b  £infra_sys_audio_clk top_pdn_audio top_pdn_aud_intbus bck0 bck1 i2s0_m i2s1_m i2s2_m i2s3_m i2s3_b                  m      n        0                    O   6        $   d      mmc@11230000              mediatek,mt8173-mmc         Q    #                 U       G           œ            _        £source hclk         {okay            Ídefault state_uhs           Û   7        o   8        y           ñëÂ          ƒ         •         ¤         ³        Ä @        Ó           ð            	        	0   9        	<   :               `        0      &         	I      mmc@11240000              mediatek,mt8173-mmc         Q    $                 U       H           œ            R        £source hclk         {okay            Ídefault state_uhs           Û   ;        o   <        y           ñëÂ          	W         	h         	u        	ƒ                 	0   =        	<   >        	Œ      *          mmc@11250000              mediatek,mt8173-mmc         Q    %                 U       I           œ            R        £source hclk       	  {disabled          mmc@11260000              mediatek,mt8173-mmc         Q    &                 U       J           œ            u        £source hclk         {okay            Ídefault state_uhs           Û   ?        o   @        y           ñëÂ          	W         	h         	u         	•                  	«        	0   A        	<   B         	I         	¸                     +       btmrvl@2              marvell,sd8897-bt           Q           Ÿ      w           	Ë           	Þ d        mwifiex@1             marvell,sd8897          Q           Ÿ      &           	Ë            usb@11271000          #    mediatek,mt8173-mtu3 mediatek,mtu3           Q    '       0     (              	  ‚mac ippc            U       @           	ô   C      D      E           a   5           œ      ^           £sys_ck ref_ck           	ù                              +            <        {okay            
host                     
   F   usb@11270000          '    mediatek,mt8173-xhci mediatek,mtk-xhci          Q    '                 ‚mac         U       s           a   5           œ      ^           £sys_ck ref_ck           {okay            Ídefault         Û   G        
   F         t-phy@11290000            mediatek,mt8173-u3phy           Q    )                              +            <        {okay       usb-phy@11290800            Q    )                œ              £ref         š           {okay            $   C      usb-phy@11290900            Q    )	                œ           £ref         š           {okay            $   D      usb-phy@11291000            Q    )                œ              £ref         š           {okay            $   E         syscon@14000000           mediatek,mt8173-mmsys syscon            Q                      a   5                  U        
&×„         Ž           p           
;   H          H              
B   H                  $   I      rdma@14001000         -    mediatek,mt8173-mdp-rdma mediatek,mt8173-mdp            Q                     œ   I      I           a   5           
Z   J           
a   K      rdma@14002000             mediatek,mt8173-mdp-rdma            Q                      œ   I      I           a   5           
Z   J   „      rsz@14003000              mediatek,mt8173-mdp-rsz         Q     0                œ   I           a   5         rsz@14004000              mediatek,mt8173-mdp-rsz         Q     @                œ   I           a   5         rsz@14005000              mediatek,mt8173-mdp-rsz         Q     P                œ   I           a   5         wdma@14006000             mediatek,mt8173-mdp-wdma            Q     `                œ   I           a   5           
Z   J         wrot@14007000             mediatek,mt8173-mdp-wrot            Q     p                œ   I           a   5           
Z   J         wrot@14008000             mediatek,mt8173-mdp-wrot            Q     €                œ   I           a   5           
Z   J   …      ovl@1400c000              mediatek,mt8173-disp-ovl            Q     À                U       ´           a   5           œ   I           
Z   J            
B   H     À          ovl@1400d000              mediatek,mt8173-disp-ovl            Q     Ð                U       µ           a   5           œ   I           
Z   J   €        
B   H     Ð          rdma@1400e000             mediatek,mt8173-disp-rdma           Q     à                U       ¶           a   5           œ   I           
Z   J           
B   H     à          rdma@1400f000             mediatek,mt8173-disp-rdma           Q     ð                U       ·           a   5           œ   I           
Z   J   �        
B   H     ð          rdma@14010000             mediatek,mt8173-disp-rdma           Q                     U       ¸           a   5           œ   I           
Z   J   ‚        
B   H                wdma@14011000             mediatek,mt8173-disp-wdma           Q                    U       ¹           a   5           œ   I           
Z   J           
B   H               wdma@14012000             mediatek,mt8173-disp-wdma           Q                     U       º           a   5           œ   I           
Z   J   ƒ        
B   H                color@14013000            mediatek,mt8173-disp-color          Q    0                U       »           a   5           œ   I           
B   H     0          color@14014000            mediatek,mt8173-disp-color          Q    @                U       ¼           a   5           œ   I           
B   H     @          aal@14015000              mediatek,mt8173-disp-aal            Q    P                U       ½           a   5           œ   I           
B   H     P          gamma@14016000            mediatek,mt8173-disp-gamma          Q    `                U       ¾           a   5           œ   I           
B   H     `          merge@14017000            mediatek,mt8173-disp-merge          Q    p                a   5           œ   I         split@14018000            mediatek,mt8173-disp-split          Q    €                a   5           œ   I         split@14019000            mediatek,mt8173-disp-split          Q    �                a   5           œ   I         ufoe@1401a000             mediatek,mt8173-disp-ufoe           Q                     U       ¿           a   5           œ   I           
B   H                dsi@1401b000              mediatek,mt8173-dsi         Q    °                U       À           a   5           œ   I   $   I   %   L        £engine digital hs           Œ   I           	ô   L        
ndphy            {okay       ports      port       endpoint            l   M        $   %               dsi@1401c000              mediatek,mt8173-dsi         Q    À                U       Á           a   5           œ   I   &   I   '   N        £engine digital hs           	ô   N        
ndphy          	  {disabled          dpi@1401d000              mediatek,mt8173-dpi         Q    Ð                U       Â           a   5           œ   I   (   I   )              £pixel engine pll            {okay       port       endpoint            l   O        $   T            pwm@1401e000              mediatek,mt8173-disp-pwm            Q    à                
x           œ   I   !   I            £main mm         {okay            Ídefault         Û   P        $   Z      pwm@1401f000              mediatek,mt8173-disp-pwm            Q    ð                
x           œ   I   #   I   "        £main mm       	  {disabled          mutex@14020000            mediatek,mt8173-disp-mutex          Q                     U       ©           a   5           œ   I           
B   H                  
ƒ   5   6      larb@14021000             mediatek,mt8173-smi-larb            Q                    
—   Q        a   5           œ   I      I           £apb smi         $         smi@14022000              mediatek,mt8173-smi-common          Q                     a   5           œ   I      I           £apb smi         $   Q      od@14023000           mediatek,mt8173-disp-od         Q    0                œ   I           
B   H     0          hdmi@14025000             mediatek,mt8173-hdmi            Q    P                U       Î            œ   I   ,   I   -   I   .   I   /        £pixel pll bclk spdif            Ídefault         Û   R        	ô   S        
nhdmi            
¤   I  	                s        0   S        {okay            $   c   ports                        +       port@0          Q       endpoint            l   T        $   O         port@1          Q      endpoint            l   U        $   g               larb@14027000             mediatek,mt8173-smi-larb            Q    p                
—   Q        a   5           œ   I   2   I   2        £apb smi         $         clock-controller@15000000             mediatek,mt8173-imgsys syscon           Q                      Ž           $   V      larb@15001000             mediatek,mt8173-smi-larb            Q                     
—   Q        a   5           œ   V      V           £apb smi         $         clock-controller@16000000             mediatek,mt8173-vdecsys syscon          Q                      Ž           $   W      vcodec@16020000           mediatek,mt8173-vcodec-dec        °  Q                                                      0            @            P            h            p            x            „              (  ‚misc ld top cm ad av pp hwd hwq hwb hwg         U       Ì         @  
Z   J       J   !   J   %   J   &   J   '   J   "   J   #   J   $        
a   K        
¹   W        a   5          @  œ      
      >      l      W      M            i      N      Z  £vcodecpll univpll_d2 clk_cci400_sel vdec_sel vdecpll vencpll venc_lt_sel vdec_bus_clk_src         (         i      l      W      
              0      N      >      M        
&            XU†€/¯       larb@16010000             mediatek,mt8173-smi-larb            Q                     
—   Q        a   5            œ   W      W           £apb smi         $         clock-controller@18000000             mediatek,mt8173-vencsys syscon          Q                      Ž           $   X      larb@18001000             mediatek,mt8173-smi-larb            Q                     
—   Q        a   5           œ   X      X           £apb smi         $         vcodec@18002000           mediatek,mt8173-vcodec-enc          Q                      U       Æ         X  
Z   J   `   J   a   J   b   J   c   J   d   J   i   J   j   J   k   J   l   J   m   J   n        
a   K        œ      X      	  £venc_sel                   X        0      M        a   5         jpegdec@18004000              mediatek,mt8173-jpgdec          Q     @                U       Ë           œ   X      X           £jpgdec-smi jpgdec           a   5           
Z   J   g   J   h      clock-controller@19000000         !    mediatek,mt8173-vencltsys syscon            Q                      Ž           $   Y      larb@19001000             mediatek,mt8173-smi-larb            Q                     
—   Q        a   5           œ   Y      Y           £apb smi         $         vcodec@19002000           mediatek,mt8173-vcodec-enc-vp8          Q                      U       Ê         H  
Z   J       J   ¡   J   ¤   J   ¨   J   §   J   ¥   J   ¦   J   ¢   J   £        
a   K        œ      i        £venc_lt_sel                i        0      N        a   5            memory@40000000         Ememory          Q    @       €         backlight             pwm-backlight           
Ê   Z     B@        |   [        
Ï      _            Ídefault         Û   \        {okay            $   (      fixedregulator2           regulator-fixed       	  ³bl_fixed            Â w@        Ú w@        
Ü  è         
í                            Ídefault         Û   ]        $   [      chosen          serial0:115200n8          gpio-keys         
    gpio-keys           Ídefault         Û   ^   switch-lid          Lid         @      E                       "                  switch-power            Power           @                     t        3                  switch-tablet-mode          Tablet_mode         @      y                       "                  switch-volume-down          Volume_down         @      {              r      switch-volume-up          
  Volume_up           @      |              s         regulator1            regulator-fixed       
  ³PANEL_3V3           Â 2Z         Ú 2Z          
í         E        W ¡                )            Ídefault         Û   _        $   '      regulator2            regulator-fixed         ³PS8640_1V2          Â O€        Ú O€        3  Ð         
í         E                           Ídefault         Û   `        $   #      fixedregulator0           regulator-fixed         ³3V3         Â 2Z         Ú 2Z                U            Ídefault         Û   a        $   A      sound             mediatek,mt8173-rt5650          g   b   c        |   d        Ídefault         Û   e        Ž      codec-capture           œ   b            connector             hdmi-connector          hdmi             Ea           ¦   f   port       endpoint            l   g        $   U            watchdog              arm,smc-wdt          	compatible interrupt-parent #address-cells #size-cells model chassis-type ovl0 ovl1 rdma0 rdma1 rdma2 wdma0 wdma1 color0 color1 split0 split1 dpi0 dsi0 dsi1 mdp-rdma0 mdp-rdma1 mdp-rsz0 mdp-rsz1 mdp-rsz2 mdp-wdma0 mdp-wrot0 mdp-wrot1 serial0 serial1 serial2 serial3 mmc0 mmc1 mmc2 opp-shared phandle opp-hz opp-microvolt cpu device_type reg enable-method cpu-idle-states #cooling-cells dynamic-power-coefficient clocks clock-names operating-points-v2 capacity-dmips-mhz proc-supply sram-supply entry-method local-timer-stop entry-latency-us exit-latency-us min-residency-us arm,psci-suspend-param interrupts interrupt-affinity cpu_suspend cpu_off cpu_on #clock-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors sustainable-power temperature hysteresis trip cooling-device contribution ranges size alignment no-map arm,no-tick-in-suspend #reset-cells mediatek,pctl-regmap gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-line-names pinmux input-enable bias-pull-down bias-disable bias-pull-up output-low output-high drive-strength #power-domain-cells mediatek,infracfg domain-supply status reg-names resets reset-names interrupts-extended regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-allowed-modes regulator-enable-ramp-delay memory-region mediatek,larbs #iommu-cells mediatek,ibias mediatek,ibias_up #phy-cells #mbox-cells #io-channel-cells clock-div pinctrl-names pinctrl-0 avdd-supply cpvdd-supply #sound-dai-cells realtek,dmic1-data-pin realtek,jd-mode powerdown-gpios reset-gpios vdd12-supply vdd33-supply remote-endpoint power-supply backlight regulator-min-microamp regulator-max-microamp powered-while-suspended mediatek,pad-select spi-max-frequency google,cros-ec-spi-msg-delay wakeup-source google,remote-bus sbs,i2c-retry-count sbs,poll-retry-count keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys nvmem-cells nvmem-cell-names bank0-supply bank1-supply assigned-clocks assigned-clock-parents hid-descr-addr vcc-supply power-domains pinctrl-1 bus-width cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v cap-mmc-hw-reset hs400-ds-delay mediatek,hs200-cmd-int-delay mediatek,hs400-cmd-int-delay mediatek,hs400-cmd-resp-sel-rising vmmc-supply vqmmc-supply non-removable cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 cd-gpios wp-gpios keep-power-in-suspend cap-sdio-irq cap-power-off-card marvell,wakeup-pin marvell,wakeup-gap-ms phys mediatek,syscon-wakeup dr_mode vusb33-supply assigned-clock-rates mboxes mediatek,gce-client-reg iommus mediatek,vpu phy-names #pwm-cells mediatek,gce-events mediatek,smi mediatek,syscon-hdmi mediatek,vdecsys pwms enable-gpios startup-delay-us enable-active-high gpio stdout-path label linux,code linux,input-type debounce-interval regulator-boot-on off-on-delay-us mediatek,audio-codec mediatek,platform mediatek,mclk sound-dai ddc-i2c-bus 