Ðþí Å   8 x   (            
M @                             $    mediatek,mt8188-evb mediatek,mt8188                                  +         !   7MediaTek MT8188 evaluation board       aliases          =/soc/dp-intf@1c015000            F/soc/dp-intf@1c113000            O/soc/dsc@1c009000            T/soc/ethdr@1c114000          [/soc/mailbox@10320000            `/soc/mailbox@10330000            e/soc/merge0@1c014000             l/soc/merge@1c10c000          s/soc/merge@1c10d000          z/soc/merge@1c10e000          �/soc/merge@1c10f000          ˆ/soc/merge@1c110000          �/soc/mutex@1c016000          –/soc/mutex@1c101000          �/soc/padding@1c11d000            ¦/soc/padding@1c11e000            ¯/soc/padding@1c11f000            ¸/soc/padding@1c120000            Á/soc/padding@1c121000            Ê/soc/padding@1c122000            Ó/soc/padding@1c123000            Ü/soc/padding@1c124000            å/soc/rdma@1c104000           ð/soc/rdma@1c105000           û/soc/rdma@1c106000          /soc/rdma@1c107000          /soc/rdma@1c108000          /soc/rdma@1c109000          '/soc/rdma@1c10a000          2/soc/rdma@1c10b000          =/soc/serial@11001100            E/soc/i2c@11280000           J/soc/i2c@11e00000           O/soc/i2c@11281000           T/soc/i2c@11282000           Y/soc/i2c@11e01000           ^/soc/i2c@11ec0000           c/soc/i2c@11ec1000           h/soc/mmc@11230000         cpus                         +       cpu@0           mcpu           arm,cortex-a55          y            }psci            ‹w5”         ›          ®              ¾  €         Ë   @        Ý   €        ê  €         ÷   @        	   €                   '               ;           J   	      cpu@100         mcpu           arm,cortex-a55          y           }psci            ‹w5”         ›          ®              ¾  €         Ë   @        Ý   €        ê  €         ÷   @        	   €                   '               ;           J   
      cpu@200         mcpu           arm,cortex-a55          y           }psci            ‹w5”         ›          ®              ¾  €         Ë   @        Ý   €        ê  €         ÷   @        	   €                   '               ;           J         cpu@300         mcpu           arm,cortex-a55          y           }psci            ‹w5”         ›          ®              ¾  €         Ë   @        Ý   €        ê  €         ÷   @        	   €                   '               ;           J         cpu@400         mcpu           arm,cortex-a55          y           }psci            ‹w5”         ›          ®              ¾  €         Ë   @        Ý   €        ê  €         ÷   @        	   €                   '               ;           J         cpu@500         mcpu           arm,cortex-a55          y           }psci            ‹w5”         ›          ®              ¾  €         Ë   @        Ý   €        ê  €         ÷   @        	   €                   '               ;           J         cpu@600         mcpu           arm,cortex-a78          y           }psci            ‹šøÚ         ›           ®              ¾           Ë   @        Ý           ê           ÷   @        	                      '              ;           J         cpu@700         mcpu           arm,cortex-a78          y           }psci            ‹šøÚ         ›           ®              ¾           Ë   @        Ý           ê           ÷   @        	                      '              ;           J         cpu-map    cluster0       core0           R   	      core1           R   
      core2           R         core3           R         core4           R         core5           R         core6           R         core7           R               idle-states         Vpsci       cpu-off-l             arm,idle-state          c            z        ‹   2        œ   _        ¬  D        J         cpu-off-b             arm,idle-state          c            z        ‹   -        œ   Œ        ¬  ä        J         cluster-off-l             arm,idle-state          c          z        ‹   7        œ   ›        ¬  H        J         cluster-off-b             arm,idle-state          c          z        ‹   2        œ   È        ¬  è        J            l2-cache0             cache           ½           À           Í   @        ß                       É        J         l2-cache1             cache           ½           À           Í   @        ß                       É        J         l3-cache              cache           ½           À            Í   @        ß            É        J            oscillator-13m            fixed-clock         ×            ‹ Æ]@        äclk13m          J   3      oscillator-26m            fixed-clock         ×            ‹Œº€        äclk26m          J   5      oscillator-32k            fixed-clock         ×            ‹  €         äclk32k        opp-table-gpu             operating-points-v2          ÷        J   [   opp-390000000               >í€        	 Æ           ÿ      opp-431000000               °‰À        	 öì           ÿ      opp-473000000               1h@        	 	'À           ÿ      opp-515000000               ²FÀ        	 	X”           ÿ      opp-556000000               !#ã         	 	‰h           ÿ      opp-598000000               #¤Á€        	 	º<           ÿ      opp-640000000               &%          	 	ë           ÿ      opp-670000000               'ïc€        	 
ä           ÿ      opp-700000000               )¹'         	 
L¸           ÿ      opp-730000000               +‚ê€        	 
}Œ           ÿ      opp-760000000               -L®         	 
®`           ÿ      opp-790000000               /q€        	 
ß4           ÿ      opp-835000000               1ÅÀ        	 (r           ÿ      opp-880000000               4s¼         	 q°           ÿ      opp-915000000               6‰ÊÀ        	 ÓX           �      opp-915000000-5             6‰ÊÀ        	 ¢„           0      opp-915000000-6             6‰ÊÀ        	 q°           p      opp-950000000               8ŸÙ€        	 5            �      opp-950000000-5             8ŸÙ€        	 ÓX           0      opp-950000000-6             8ŸÙ€        	 q°           p         pmu-a55           arm,cortex-a55-pmu                      (                  pmu-a78           arm,cortex-a78-pmu                      (                  psci              arm,psci-1.0            „smc       sound           3         	  Edisabled          thermal-zones      cpu-little0-thermal         L  è        Z   –        p          trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —         H  œ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         L  è        Z   –        p         trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —         H  œ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         L  è        Z   –        p         trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —         H  œ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little3-thermal         L  è        Z   –        p         trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —         H  œ   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big0-thermal            L  è        Z   d        p         trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —           œ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            L  è        Z   d        p         trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —           œ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            apu-thermal         L  è        Z   ú        p          trips      trip-alert0         € L        Œ  Ð        tpassive       trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical                gpu-thermal         L  è        Z   ú        p         trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —           œ   ÿÿÿÿÿÿÿÿ            gpu1-thermal            L  è        Z   ú        p         trips      trip-alert0         € L        Œ  Ð        tpassive         J         trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical             cooling-maps       map0            —           œ   ÿÿÿÿÿÿÿÿ            adsp-thermal            L  è        Z   ú        p         trips      trip-alert0         € L        Œ  Ð        tpassive       trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical                vdo-thermal         L  è        Z   ú        p         trips      trip-alert0         € L        Œ  Ð        tpassive       trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical                infra-thermal           L  è        Z   ú        p         trips      trip-alert0         € L        Œ  Ð        tpassive       trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical                cam1-thermal            L  è        Z   ú        p         trips      trip-alert0         € L        Œ  Ð        tpassive       trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical                cam2-thermal            L  è        Z   ú        p         trips      trip-alert0         € L        Œ  Ð        tpassive       trip-alert1         € s        Œ  Ð        thot       trip-crit           € †         Œ          	  tcritical                   timer             arm,armv8-timer                   @  (                                             
               ‹ Æ]@      soc                      +             simple-bus          «                                ¯   performance-controller@11bc10             mediatek,cpufreq-hw          y     ¼            ½0               ¶           J         interrupt-controller@c000000              arm,gic-v3          Ð           á                        ø         y                                    (      	               J      ppi-partitions     interrupt-partition-0              	   
                    J         interrupt-partition-1                         J               syscon@10000000            mediatek,mt8188-topckgen syscon         y                      ×           J   "      syscon@10001000       #    mediatek,mt8188-infracfg-ao syscon          y                     ×                      J   #      syscon@10003000           mediatek,mt8188-pericfg syscon          y     0                ×           J   A      pinctrl@10005000              mediatek,mt8188-pinctrl       `  y     P            À             á             â             ê              °              0  #iocfg0 iocfg_rm iocfg_lt iocfg_lm iocfg_rt eint          -        =           I               °         ø        (       ë               Ð           J       adsp-uart-pins     pins-tx-rx          U  #  $         i2c0-pins           J   J   pins-bus            U  8  7        \   Ë         i2c1-pins           J   T   pins-bus            U  :  9        \   Ë         i2c2-pins           J   K   pins-bus            U  <  ;        \   Ë         i2c3-pins           J   L   pins-bus            U  >  =        \   Ë         i2c4-pins           J   U   pins-bus            U  @  ?        \   Ë         i2c5-pins           J   W   pins-bus            U  B  A        \   Ë         i2c6-pins           J   X   pins-bus            U  D  C        \   Ë         mmc0-default-pins           J   G   pins-cmd-dat          $  U  ¡     Ÿ  ž  š  ™  ˜  —  œ         i        v           \   e      pins-clk            U  �        v           …   f      pins-rst            U  ›        v           \   e         mmc0-uhs-pins           J   H   pins-cmd-dat          $  U  ¡     Ÿ  ž  š  ™  ˜  —  œ         i        v           \   e      pins-clk-ds         U  �  ¢        v           …   f      pins-rst            U  ›        v           \   e         nor-pins            J   R   pins-io-ck          U    }  €         …      pins-io-cs          U  ~  �  ‚         \         spi0-pins           J   ;   pins-spi            U  E  F  G  H         ”         spi1-pins           J   =   pins-spi            U  K  L  M  N         ”         spi2-pins           J   >   pins-spi            U  O  P  Q  R         ”         uart0-pins          J   :   pins-rx-tx          U              \            syscon@10006000       )    mediatek,mt8188-scpsys syscon simple-mfd            y     `           power-controller          !    mediatek,mt8188-power-controller                         +            ¡           J   6   power-domain@0          y                         +            ¡      power-domain@1          y           µ   !      "           ¼mfg alt         È   #                     +            ¡      power-domain@2          y           ¡          power-domain@3          y           ¡          power-domain@4          y           ¡                power-domain@15         y         à  µ   "      "      "      "   
   "   3   "   4   "   =   "   ¹   "   ¾   $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $          û  ¼top cam ccu img venc vdec wpe cfgck cfgxo ss-sram-cmn ss-sram-v0l0 ss-sram-v0l1 ss-sram-ve0 ss-sram-ve1 ss-sram-ifa ss-sram-cam ss-sram-v1l5 ss-sram-v1l6 ss-sram-rdr ss-iommu ss-imgcam ss-emi ss-subcmn-rdr ss-rsi ss-cmn-l4 ss-vdec1 ss-wpe ss-cvdo-ve1          È   #                     +            ¡      power-domain@16         y         H  µ   "   »   "   À   %      %      %      %      %      %      %         A  ¼cfgck cfgxo ss-gals ss-cmn ss-emi ss-iommu ss-larb ss-rsi ss-bus            È   #                     +            ¡      power-domain@20         y         0  µ   "   º   "   ¿   &      &      &      &         8  ¼cfgck cfgxo ss-vpp1-g5 ss-vpp1-g6 ss-vpp1-l5 ss-vpp1-l6         È   #        ¡          power-domain@22         y           µ   '            ¼ss-vdec1-soc-l1         È   #                     +            ¡      power-domain@23         y           µ   (            ¼ss-vdec2-l1         È   #        ¡             power-domain@29         y            µ   "      "      "   	   "   ½        ¼cam ccu bus cfgck           È   #                     +            ¡      power-domain@30         y         (  µ   )       )      )      )      )         6  ¼ss-cam-l13 ss-cam-l14 ss-cam-mm0 ss-cam-mm1 ss-camsys           È   #                     +            ¡      power-domain@32         y            µ   )      *       +          $  ¼ss-camb-sub ss-camb-raw ss-camb-yuv         ¡          power-domain@31         y           µ   )      ,       -          $  ¼ss-cama-sub ss-cama-raw ss-cama-yuv         ¡                power-domain@17         y         (  µ   "   ¼   "   Á   .       .      .         &  ¼cfgck cfgxo ss-larb2 ss-larb3 ss-gals           È   #                     +            ¡      power-domain@9          y   	        µ   "   @   "   ?      	  ¼bus hdcp            È   #        ¡          power-domain@18         y           È   #        ¡          power-domain@19         y           È   #        ¡             power-domain@24         y            µ   /       /      /      /         0  ¼ss-ve1-larb ss-ve1-core ss-ve1-gals ss-ve1-sram         È   #        ¡          power-domain@21         y           µ   0      0           ¼ss-wpe-l7 ss-wpe-l7pce          È   #        ¡                power-domain@5          y           È   #        µ   1           ¼ss-pextp-fmem           ¡          power-domain@7          y           µ   "   0   "   1        ¼seninf0 seninf1         ¡          power-domain@6          y           ¡          power-domain@10         y   
        µ   "   E   "   D      	  ¼bus main            È   #                     +            ¡      power-domain@11         y           È   #                     +            ¡      power-domain@14         y           µ   "   F        ¼asm         È   #        ¡          power-domain@13         y           µ   "   S   "      2            ¼a1sys intbus adspck         È   #        ¡          power-domain@12         y           È   #        ¡                power-domain@8          y           µ   1         	  ¼ethermac            È   #        ¡                watchdog@10007000             mediatek,mt8188-wdt         y     p                 Ú                   J   7      syscon@1000c000       "    mediatek,mt8188-apmixedsys syscon           y     À                ×           J   !      timer@10017000        ,    mediatek,mt8188-timer mediatek,mt6765-timer         y    p                (      	               µ   3      pwrap@10024000        3    mediatek,mt8188-pwrap mediatek,mt8195-pwrap syscon          y    @                #pwrap           (       ó               µ   #      #          	  ¼spi wrap       pmic              mediatek,mt6359          ø        Ð           ò                  Þ      adc           mediatek,mt6359-auxadc                   audio-codec           mediatek,mt6359-codec         regulators            mediatek,mt6359-regulator      buck_vs1            )vs1         8 5         P !‘À        h             „      buck_vgpu11         )vgpu11          8 €        P 7        ˜  ˆ        h   È        ­                   „      buck_vmodem         )vmodem          8 €        P Èà        ˜  *        h   È      buck_vpu            )vpu         8 €        P 7        ˜  ˆ        h   È        ­                   „      buck_vcore          )vcore           8 €        P Ö         ˜  ˆ        h   È        ­                   „      buck_vs2            )vs2         8 5         P j         h             „      buck_vpa            )vpa         8 ¡         P 7±Ð        h  ,      buck_vproc2         )vproc2          8 €        P 7        ˜  L        h   È        ­                buck_vproc1         )vproc1          8 €        P 7        ˜  L        h   È        ­                buck_vcore_sshub            )vcore_sshub         8 €        P 7      buck_vgpu11_sshub           )vgpu11_sshub            8 €        P 7      ldo_vaud18          )vaud18          8 w@        P w@        h   ð      ldo_vsim1           )vsim1           8 ð         P /M`      ldo_vibr            )vibr            8 O€        P 2Z       ldo_vrf12           )vrf12           8 Èà        P Ö          „      ldo_vusb            )vusb            8 -ÆÀ        P -ÆÀ        h  À         „      ldo_vsram_proc2         )vsram_proc2         8 ¡         P ½¶        ˜  L        h   ð         „      ldo_vio18           )vio18           8 ð         P ýà        h  À         „      ldo_vcamio          )vcamio          8 ð         P ýà      ldo_vcn18           )vcn18           8 w@        P w@        h   ð      ldo_vfe28           )vfe28           8 *¹€        P *¹€        h   x      ldo_vcn13           )vcn13           8 »         P Ö       ldo_vcn33_1_bt          )vcn33_1_bt          8 *¹€        P 5gà      ldo_vcn33_1_wifi            )vcn33_1_wifi            8 *¹€        P 5gà      ldo_vaux18          )vaux18          8 w@        P w@        h   ð         „      ldo_vsram_others            )vsram_others            8 ¡         P ½¶        ˜  ˆ        h   ð      ldo_vefuse          )vefuse          8 ð         P „€      ldo_vxo22           )vxo22           8 w@        P !‘À         „      ldo_vrfck           )vrfck           8 ã`        P ð       ldo_vrfck_1         )vrfck           8 ëÀ        P j       ldo_vbif28          )vbif28          8 *¹€        P *¹€        h   ð      ldo_vio28           )vio28           8 *¹€        P 2Z          „      ldo_vemc            )vemc            8 ,@         P 2Z       ldo_vemc_1          )vemc            8 &%         P 2Z         J   E      ldo_vcn33_2_bt          )vcn33_2_bt          8 *¹€        P 5gà      ldo_vcn33_2_wifi            )vcn33_2_wifi            8 *¹€        P 5gà      ldo_va12            )va12            8 O€        P Ö          „      ldo_va09            )va09            8 5         P O€      ldo_vrf18           )vrf18           8 ð         P žP      ldo_vsram_md          	  )vsram_md            8 ¡         P ½¶        ˜  *        h   ð      ldo_vufs            )vufs            8 ð         P ýà        J   F      ldo_vm18            )vm18            8 ð         P ýà         „      ldo_vbbck           )vbbck           8 Èà        P O€      ldo_vsram_proc1         )vsram_proc1         8 ¡         P ½¶        ˜  L        h   ð         „      ldo_vsim2           )vsim2           8 ð         P /M`      ldo_vsram_others_sshub          )vsram_others_sshub          8 ¡         P ½¶         rtc           mediatek,mt6358-rtc             spmi@10027000         *    mediatek,mt8188-spmi mediatek,mt8195-spmi            y    p            �                #pmif spmimst            Å   "   8        Õ   "   ¬        µ   #      #       "   8      (  ¼pmif_sys_ck pmif_tmr_ck spmimst_clk_mux       iommu@10315000            mediatek,mt8188-iommu-infra         y    1P                (                     ì           J   P      mailbox@10320000              mediatek,mt8188-gce         y    2        @         (       â               ù           µ   #           J   \      mailbox@10330000              mediatek,mt8188-gce         y    3        @         (       ä               ù           µ   #           J   ^      scp@10720000              mediatek,mt8188-scp-dual            y    r                 #cfg                      +           ¯        P             Eokay       scp@0             mediatek,scp-core           y               #sram            (      Î               Eokay               4        J   _      scp@d0000             mediatek,scp-core           y    ð         #sram            (      Ï             	  Edisabled             audio-controller@10b10000             mediatek,mt8188-afe         y    ±                 Å   "   S        Õ   "   „      ´  µ   5   !   	   !   
   "   ³   "   ´   "   µ   "   ¶   "   ¸   "   S   "      "       "   E   "   Q   "   M   "   N   "   O   "   P   2       "   „   "   †   "   ·   "   T   "   R      ÿ  ¼clk26m apll1 apll2 apll12_div0 apll12_div1 apll12_div2 apll12_div3 apll12_div9 top_a1sys_hp top_aud_intbus top_audio_h top_audio_local_bus top_dptx top_i2so1 top_i2so2 top_i2si1 top_i2si2 adsp_audio_26m apll1_d4 apll2_d4 apll12_div4 top_a2sys top_aud_iec          (      6                  6           !   7         	  (audiosys            È   #        4   "      	  Edisabled            J         adsp@10b80000             mediatek,mt8188-dsp       @  y    ¸              Ð             ¸°            ¸ð                #cfg sram sec bus            Å   "   D        µ   "   D   "   E        ¼audiodsp adsp_bus           F   8   9        Mrx tx              6         	  Edisabled          mailbox@10b86100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         y    ¸a                (      Þ               ù            J   8      mailbox@10b87100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         y    ¸q                (      ß               ù            J   9      clock-controller@10b91100             mediatek,mt8188-adsp-audio26m           y    ¹                ×           J   2      serial@11001100       *    mediatek,mt8188-uart mediatek,mt6577-uart           y                     (       �               µ   5   #         	  ¼baud bus            Eokay            Xdefault         f   :      serial@11001200       *    mediatek,mt8188-uart mediatek,mt6577-uart           y                     (       Ž               µ   5   #         	  ¼baud bus          	  Edisabled          serial@11001300       *    mediatek,mt8188-uart mediatek,mt6577-uart           y                     (       �               µ   5   #         	  ¼baud bus          	  Edisabled          serial@11001400       *    mediatek,mt8188-uart mediatek,mt6577-uart           y                     (      Ó               µ   5   #         	  ¼baud bus          	  Edisabled          adc@11002000          .    mediatek,mt8188-auxadc mediatek,mt8173-auxadc           y                      µ   #           ¼main                       Eokay          syscon@11003000       "    mediatek,mt8188-pericfg-ao syscon           y     0                ×           J   1      spi@1100a000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            y                      (       ¿               µ   "   y   "      #           ¼parent-clk sel-clk spi-clk          Eokay            Xdefault         f   ;      thermal-sensor@1100b000           mediatek,mt8188-lvts-ap         y     °                (       È               µ   #           !   #           p   <        |lvts-calib-data-1           �           J         pwm@1100e000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           y     à                µ   "   '   #   /        ¼main mm         (       Ë               £         	  Edisabled          pwm@1100f000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           y     ð                µ   "   (   #   F        ¼main mm         (                     £         	  Edisabled          spi@11010000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            y                     (       À               µ   "   y   "      #   2        ¼parent-clk sel-clk spi-clk          Eokay            Xdefault         f   =      spi@11012000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            y                     (       Á               µ   "   y   "      #   3        ¼parent-clk sel-clk spi-clk          Eokay            Xdefault         f   >      spi@11013000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            y    0                (       Â               µ   "   y   "      #   4        ¼parent-clk sel-clk spi-clk        	  Edisabled          spi@11018000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            y    €                (       Ã               µ   "   y   "      #   8        ¼parent-clk sel-clk spi-clk        	  Edisabled          spi@11019000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            y    �                (       Ä               µ   "   y   "      #   9        ¼parent-clk sel-clk spi-clk        	  Edisabled          usb@11201000          #    mediatek,mt8188-mtu3 mediatek,mtu3           y            -ÿ     >              	  #mac ippc            ¯                     ?                      +           (       €               Å   "   )        Õ   "   v        µ   1   	   "   Å   1   
        ¼sys_ck ref_ck mcu_ck            ®   ?      @            ³        Á   A  h         	  Edisabled       usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          y                       #mac         (       �               Å   "   *        Õ   "   v        µ   1   
        ¼sys_ck          Eokay             ethernet@11021000         ;    mediatek,mt8188-gmac mediatek,mt8195-gmac snps,dwmac-5.10a          y           @         (      Ì               Ømacirq        0  µ   1       1      "   A   "   B   "   C   1         .  ¼axi apb mac_main ptp_ref rmii_internal mac_cg           Å   "   A   "   B   "   C        Õ   "       "   ¢   "   £           6           è   #        ù   B        	   C           D        /           :           E          	  Edisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           R                                 \           l           J   B      rx-queues-config            |            ’        J   C   queue0           £        ¶          queue1           £        ¶          queue2           £        ¶          queue3           £        ¶             tx-queues-config            Î            ä        J   D   queue0           £        ö                     queue1           £        ö                    queue2           £        ö                    queue3           £        ö                          mmc@11230000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          y    #             õ                 (       ƒ                µ   "      #      #      #   M      !  ¼source hclk source_cg crypto_clk            Eokay                        H        )ëÂ          7         I         X         g         t         …         �         “        ¡   E        ­   F        Xdefault state_uhs           f   G        º   H      mmc@11240000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          y    $             ë                 (       ‡               µ   "      #      #   $        ¼source hclk source_cg           Å   "           Õ   "   �      	  Edisabled          mmc@11250000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          y    %             æ                 (       ˆ               µ   "      #      #   A        ¼source hclk source_cg           Å   "           Õ   "   �      	  Edisabled          thermal-sensor@11278000           mediatek,mt8188-lvts-mcu            y    '€                (       Ê               µ   #           !   #            p   <        |lvts-calib-data-1           �           J         i2c@11280000              mediatek,mt8188-i2c          y    (             " €       €        (       —               Ä           µ   I       #   7      	  ¼main dma                         +            Eokay            Xdefault         f   J        ‹ €      i2c@11281000              mediatek,mt8188-i2c          y    (            "€       €        (       ’               Ä           µ   I      #   7      	  ¼main dma                         +            Eokay            Xdefault         f   K        ‹ €      i2c@11282000              mediatek,mt8188-i2c          y    (             "€       €        (       “               Ä           µ   I      #   7      	  ¼main dma                         +            Eokay            Xdefault         f   L        ‹ €      clock-controller@11283000             mediatek,mt8188-imp-iic-wrap-c          y    (0                ×           J   I      usb@112a1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           y    *       -ÿ    *>              	  #mac ippc            ¯            *        ?                      +           (                     Å   "   -        Õ   "   v        µ   1      "   Ë   1           ¼sys_ck ref_ck mcu_ck            ®   M            ³        Á   A  p         	  Edisabled       usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          y                       #mac         (                     Å   "   .        Õ   "   v        µ   1           ¼sys_ck          Eokay             usb@112b1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           y    +       -ÿ    +>              	  #mac ippc            ¯            +        ?                      +           (                     Å   "   ,        Õ   "   v        µ   1      "   É   1           ¼sys_ck ref_ck mcu_ck            ®   N            ³        Á   A  `         	  Edisabled       usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          y                       #mac         (                     Å   "   +        Õ   "   v        µ   1           ¼sys_ck          Eokay             pcie@112f0000         *    mediatek,mt8188-pcie mediatek,mt8192-pcie           y    /                	  #pcie-mac            ¯‚                                  Î       ÿ        mpci         Ø                         +         0  µ   #   L   #   #   #   &   #   +   #   C   1         /  ¼pl_250m tl_26m tl_96m tl_32k peri_26m peri_mem          Ð           (                   `  é                  O                      O                     O                     O           ÷                       	
       P      ÿÿ        	            ®   Q         	  	#pcie-phy               6           !   7           (mac       	  Edisabled       interrupt-controller                         Ð            ø        J   O         spi@1132c000          (    mediatek,mt8188-nor mediatek,mt8186-nor         y    2À                µ   "   X   1      1           ¼spi sf axi          Å   "   X        (      9                            +            Eokay            Xdefault         f   R   flash@0           jedec,spi-nor           y            	-u          t-phy@11c20700        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3           ¯        Â                         +              6         	  Edisabled       pcie-phy@0          y               µ   "   Ä        ¼ref         	?           J   Q         dsi-phy@11c80000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         y    È                 µ   5        ämipi_tx0_pll            ×            	?          	  Edisabled            J   s      dsi-phy@11c90000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         y    É                 µ   5        ämipi_tx0_pll            ×            	?          	  Edisabled            J   t      i2c@11e00000              mediatek,mt8188-i2c          y    à             "        €        (       ˜               Ä           µ   S       #   7      	  ¼main dma                         +            Eokay            Xdefault         f   T        ‹ €      i2c@11e01000              mediatek,mt8188-i2c          y    à            "€       €        (       ”               Ä           µ   S      #   7      	  ¼main dma                         +            Eokay            Xdefault         f   U        ‹ €      clock-controller@11e02000             mediatek,mt8188-imp-iic-wrap-w          y    à                 ×           J   S      t-phy@11e30000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           ¯        ã             Eokay       usb-phy@0           y               µ   "   Ê   !           ¼ref da_ref          	?           J   N         t-phy@11e40000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           ¯        ä             Eokay       usb-phy@0           y               µ   "   Æ   !           ¼ref da_ref          	?           J   ?      usb-phy@700         y              µ   !      5        ¼ref da_ref          	?           J   @         t-phy@11e80000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           ¯        è             Eokay       usb-phy@0           y               µ   "   Ì   !           ¼ref da_ref          	?           J   M         i2c@11ec0000              mediatek,mt8188-i2c          y    ì             "€       €        (       •               Ä           µ   V       #   7      	  ¼main dma                         +            Eokay            Xdefault         f   W        ‹ €      i2c@11ec1000              mediatek,mt8188-i2c          y    ì            "        €        (       –               Ä           µ   V      #   7      	  ¼main dma                         +            Eokay            Xdefault         f   X        ‹ €      clock-controller@11ec2000              mediatek,mt8188-imp-iic-wrap-en         y    ì                 ×           J   V      efuse@11f20000        ,    mediatek,mt8188-efuse mediatek,mt8186-efuse         y    ò                              +      dp-calib@1a0            y              J   z      lvts1-calib@1ac         y  ¬   @        J   <      gpu-speedbin@581            y  �           	J               J   Z      socinfo-data1@7a0           y            socinfo-data2@7e0           y  à            gpu@13000000          )    mediatek,mt8188-mali arm,mali-valhall-jm            y             @         µ   Y          0  (                   ~             }               Øjob mmu gpu         p   Z      
  |speed-bin           	O   [           6      6      6           	ccore0 core1 core2           ;         	  Edisabled            J         clock-controller@13fbf000             mediatek,mt8188-mfgcfg          y    ûð                ×           J   Y      syscon@14000000           mediatek,mt8188-vppsys0 syscon          y                      ×           J   $      dma-controller@14001000           mediatek,mt8188-mdp3-rdma           y                     	v           µ   $         <  F   \         \         \         \         \              	�   ]   €           6           	ˆ   ^                  	               	´   _      display@14002000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         y                      µ   $            	ˆ   ^                 display@14004000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           y     @                µ   $   "        	ˆ   ^      @          display@14005000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           y     P                (      F               µ   $   
           6           	ˆ   ^      P          display@14006000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           y     `                µ   $           	ˆ   ^      `            	     %      display@14007000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           y     p                µ   $   #        	ˆ   ^      p          display@14008000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           y     €                (      I               µ   $   $           6           	ˆ   ^      €          display@14009000          2    mediatek,mt8188-mdp3-ovl mediatek,mt8195-mdp3-ovl           y     �                (      J               µ   $   %           6           	ˆ   ^      �            	�   ]   ‚      display@1400a000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           y                      µ   $              6           	ˆ   ^                 display@1400b000          2    mediatek,mt8188-mdp3-tcc mediatek,mt8195-mdp3-tcc           y     °                µ   $           	ˆ   ^      °          display@1400c000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         y     À                	v           µ   $           	�   ]   ƒ           6           	ˆ   ^      À            	     +      mutex@1400f000            mediatek,mt8188-vpp-mutex           y     ð                (      P               µ   $              6           	ˆ   ^      ð          smi@14012000              mediatek,mt8188-smi-common-vpp          y                     µ   $      $           ¼apb smi            6           J   `      smi@14013000              mediatek,mt8188-smi-larb            y    0                µ   $      $           ¼apb smi            6           	Á           	Ò   `        J   c      iommu@14018000            mediatek,mt8188-iommu-vpp           y    €       P         µ   $           ¼bclk            (      R                  6           ì           	ß   a   b   c   d   e   f        J   ]      dma-controller@14f09000           mediatek,mt8188-mdp3-rdma           y    ð�                	v           µ   &   
        	�   g   ¤           6           	ˆ   ^   	  �            	   …  ©      dma-controller@14f0a000           mediatek,mt8188-mdp3-rdma           y    ð                 	v           µ   &           	�   ]   À           6           	ˆ   ^   	               	   †  ª      display@14f0c000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         y    ðÀ                µ   &           	ˆ   ^   	  À          display@14f0d000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         y    ðÐ                µ   &           	ˆ   ^   	  Ð          display@14f0f000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           y    ðð                µ   &   "        	ˆ   ^   	  ð          display@14f10000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           y    ñ                 µ   &   $        	ˆ   ^   
             display@14f12000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           y    ñ                 (      j               µ   &   #           6           	ˆ   ^   
             display@14f13000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           y    ñ0                (      k               µ   &   %           6           	ˆ   ^   
  0          display@14f15000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           y    ñP                µ   &           	ˆ   ^   
  P            	   ‘  °      display@14f16000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           y    ñ`                µ   &           	ˆ   ^   
  `            	   ’  ±      display@14f18000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           y    ñ€                µ   &           	ˆ   ^   
  €          display@14f19000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           y    ñ�                µ   &           	ˆ   ^   
  �          display@14f1a000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           y    ñ                 µ   &              6           	ˆ   ^   
             display@14f1b000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           y    ñ°                µ   &              6           	ˆ   ^   
  °          display@14f1d000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           y    ñÐ                (      u               µ   &              6           	ˆ   ^   
  Ð          display@14f1e000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           y    ñà                (      v               µ   &              6           	ˆ   ^   
  à          display@14f21000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           y    ò                µ   &              6           	ˆ   ^               display@14f22000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           y    ò                 µ   &              6           	ˆ   ^                display@14f24000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         y    ò@                	v           µ   &           	�   g   ¦           6           	ˆ   ^     @            	      ¬      display@14f25000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         y    òP                	v           µ   &           	�   ]   Â           6           	ˆ   ^     P            	   ¡  ­      clock-controller@14e00000             mediatek,mt8188-wpesys          y    à                 ×           J   0      clock-controller@14e02000             mediatek,mt8188-wpesys-vpp0         y    à                 ×         smi@14e04000              mediatek,mt8188-smi-larb            y    à@                µ   0      0           ¼apb smi            6           	Á           	Ò   `        J   e      syscon@14f00000           mediatek,mt8188-vppsys1 syscon          y    ð                 ×           J   &      mutex@14f01000            mediatek,mt8188-vpp-mutex           y    ð                (      {               µ   &   &           6           	ˆ   ^   	            smi@14f02000              mediatek,mt8188-smi-larb            y    ð                 µ   &      &           ¼apb smi            6           	Á           	Ò   h        J   w      smi@14f03000              mediatek,mt8188-smi-larb            y    ð0                µ   &      &           ¼apb smi            6           	Á           	Ò   `        J   d      clock-controller@15000000             mediatek,mt8188-imgsys          y                      ×         clock-controller@15110000              mediatek,mt8188-imgsys1-dip-top         y                     ×                    clock-controller@15130000             mediatek,mt8188-imgsys1-dip-nr          y                     ×                    clock-controller@15220000             mediatek,mt8188-imgsys-wpe1         y    "                 ×                    clock-controller@15330000             mediatek,mt8188-ipesys          y    3                 ×                    clock-controller@15520000             mediatek,mt8188-imgsys-wpe2         y    R                 ×                    clock-controller@15620000             mediatek,mt8188-imgsys-wpe3         y    b                 ×                    clock-controller@16000000             mediatek,mt8188-camsys          y                      ×           J   )      clock-controller@1604f000             mediatek,mt8188-camsys-rawa         y    ð                ×                      J   ,      clock-controller@1606f000             mediatek,mt8188-camsys-yuva         y    ð                ×                      J   -      clock-controller@1608f000             mediatek,mt8188-camsys-rawb         y    ð                ×                      J   *      clock-controller@160af000             mediatek,mt8188-camsys-yuvb         y    
ð                ×                      J   +      clock-controller@17200000             mediatek,mt8188-ccusys          y                      ×         video-decoder@18000000            mediatek,mt8188-vcodec-dec           y                   @                ¯                    `         	�   ]  æ                     +           	´   _   video-codec@10000             mediatek,mtk-vcodec-lat         y                      Å   "   4        Õ   "   x         µ   "   4   '      '      "   x        ¼sel vdec lat top            (      Ä             H  	�   ]  à   ]  á   ]  â   ]  ã   ]  ä   ]  å   ]  æ   ]  ç   ]  è           6         video-codec@25000             mediatek,mtk-vcodec-core            y     P                Å   "   4        Õ   "   x         µ   "   4   (      (      "   x        ¼sel vdec lat top            (      Ã             X  	�   g  À   g  Á   g  Â   g  Ã   g  Ä   g  Å   g  Æ   g  Ç   g  È   g  É   g  Ê           6            smi@1800d000              mediatek,mt8188-smi-larb            y     Ð                µ   '       '            ¼apb smi            6           	Á           	Ò   `        J   f      clock-controller@1800f000             mediatek,mt8188-vdecsys-soc         y     ð                ×           J   '      smi@1802e000              mediatek,mt8188-smi-larb            y    à                µ   (       (            ¼apb smi            6           	Á           	Ò   h        J   y      clock-controller@1802f000             mediatek,mt8188-vdecsys         y    ð                ×           J   (      clock-controller@1a000000             mediatek,mt8188-vencsys         y                      ×           J   /      smi@1a010000              mediatek,mt8188-smi-larb            y                     µ   /      /           ¼apb smi            6           	Á           	Ò   h        J   x      video-encoder@1a020000            mediatek,mt8188-vcodec-enc          y                                  +           Å   "   3        Õ   "   p        µ   /         	  ¼venc_sel            (      a             X  	�   g      g  ¡   g  ¢   g  £   g  ¤   g  ¶   g  ·   g  ¸   g  ¹   g  ª   g  º           6           	´   _      jpeg-encoder@1a030000         +    mediatek,mt8188-jpgenc mediatek,mtk-jpgenc          y                     µ   /           ¼jpgenc          (      b                	�   g  §   g  ¨   g  ©   g  ¬           6         jpeg-decoder@1a040000         .    mediatek,mt8188-jpgdec mediatek,mt2701-jpgdec           y                     µ   /       /           ¼jpgdec-smi jpgdec           (      c             0  	�   g  ­   g  ®   g  ²   g  ³   g  ´   g  µ           6         ovl@1c000000          2    mediatek,mt8188-disp-ovl mediatek,mt8195-disp-ovl           y                      µ   %            (      |               	�   g              6           	ˆ   \             ports                        +       port@0          y       endpoint             port@1          y      endpoint            	î   i        J   j               rdma@1c002000         4    mediatek,mt8188-disp-rdma mediatek,mt8195-disp-rdma         y                      µ   %           (      ~               	�   ]               6           	ˆ   \             ports                        +       port@0          y       endpoint            	î   j        J   i         port@1          y      endpoint            	î   k        J   l               color@1c003000        6    mediatek,mt8188-disp-color mediatek,mt8173-disp-color           y     0                µ   %           (                        6           	ˆ   \     0       ports                        +       port@0          y       endpoint            	î   l        J   k         port@1          y      endpoint            	î   m        J   n               ccorr@1c004000        6    mediatek,mt8188-disp-ccorr mediatek,mt8192-disp-ccorr           y     @                µ   %           (      €                  6           	ˆ   \     @       ports                        +       port@0          y       endpoint            	î   n        J   m         port@1          y      endpoint            	î   o        J   p               aal@1c005000          2    mediatek,mt8188-disp-aal mediatek,mt8183-disp-aal           y     P                µ   %           (      �                  6           	ˆ   \     P       ports                        +       port@0          y       endpoint            	î   p        J   o         port@1          y      endpoint            	î   q        J   r               gamma@1c006000        6    mediatek,mt8188-disp-gamma mediatek,mt8195-disp-gamma           y     `                µ   %           (      ‚                  6           	ˆ   \     `       ports                        +       port@0          y       endpoint            	î   r        J   q         port@1          y      endpoint                   dither@1c007000       8    mediatek,mt8188-disp-dither mediatek,mt8183-disp-dither         y     p                µ   %           (      ƒ                  6           	ˆ   \     p       ports                        +       port@0          y       endpoint             port@1          y      endpoint                   dsi@1c008000              mediatek,mt8188-dsi         y     €                µ   %      %      s        ¼engine digital hs           (      „               ®   s        	#dphy               6           !   %         	  Edisabled          dsc@1c009000          2    mediatek,mt8188-disp-dsc mediatek,mt8195-disp-dsc           y     �                µ   %   
        (      …                  6           	ˆ   \     �          dsi@1c012000              mediatek,mt8188-dsi         y                     µ   %   	   %      t        ¼engine digital hs           (      Ž               ®   t        	#dphy               6           !   %   	      	  Edisabled          merge0@1c014000       6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           y    @                µ   %      .           ¼merge merge_async           (      �                  6           	ˆ   \     @          dp-intf@1c015000              mediatek,mt8188-dp-intf         y    P                µ   %       %      !           ¼pixel engine pll            (      ‘                  6         	  Edisabled          mutex@1c016000            mediatek,mt8188-disp-mutex          y    `                µ   %           (      ’                  6           	ˆ   \     `            	   >      postmask@1c01a000         <    mediatek,mt8188-disp-postmask mediatek,mt8192-disp-postmask         y                     µ   %           (      •                  6           	ˆ   \             ports                        +       port@0          y       endpoint             port@1          y      endpoint                   syscon@1c01d000           mediatek,mt8188-vdosys0 syscon          y    Ð                ×                      F   \               	ˆ   \     Ð            J   %      smi@1c022000              mediatek,mt8188-smi-larb            y                     µ   %      %           ¼apb smi            6           	Á            	Ò   h        J   u      smi@1c023000              mediatek,mt8188-smi-larb            y    0                µ   %      %           ¼apb smi            6           	Á           	Ò   `        J   a      smi@1c024000              mediatek,mt8188-smi-common-vdo          y    @                µ   %      %           ¼apb smi            6           J   h      iommu@1c028000            mediatek,mt8188-iommu-vdo           y    €       P         µ   %           ¼bclk            (      ¡                  6           ì           	ß   u   v   w   x   y        J   g      syscon@1c100000           mediatek,mt8188-vdosys1 syscon          y                     ×                      F   \              	ˆ   \                  J   .      mutex@1c101000            mediatek,mt8188-disp-mutex          y                    µ   .           (      î                  6           	ˆ   \                 	   Å      smi@1c102000              mediatek,mt8188-smi-larb            y                     µ   .       .            ¼apb smi            6           	Á           	Ò   h        J   v      smi@1c103000              mediatek,mt8188-smi-larb            y    0                µ   .      .           ¼apb smi            6           	Á           	Ò   `        J   b      rdma@1c104000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y    @                µ   .           (      ï               	�   g   @           6           	v           	ˆ   \     @          rdma@1c105000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y    P                µ   .           (      ð               	�   ]   `           6           	v           	ˆ   \     P          rdma@1c106000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y    `                µ   .           (      ñ               	�   g   A           6           	v           	ˆ   \     `          rdma@1c107000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y    p                µ   .           (      ò               	�   ]   a           6           	v           	ˆ   \     p          rdma@1c108000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y    €                µ   .           (      ó               	�   g   B           6           	v           	ˆ   \     €          rdma@1c109000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y    �                µ   .           (      ô               	�   ]   b           6           	v           	ˆ   \     �          rdma@1c10a000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y                     µ   .           (      õ               	�   g   C           6           	v           	ˆ   \                rdma@1c10b000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         y    °                µ   .           (      ö               	�   ]   c           6           	v           	ˆ   \     °          merge@1c10c000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           y    À                µ   .   	   .           ¼merge merge_async           (      ÷                  6           !   .           	ˆ   \     À             	þ      merge@1c10d000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           y    Ð                µ   .   
   .           ¼merge merge_async           (      ø                  6           !   .           	ˆ   \     Ð             	þ      merge@1c10e000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           y    à                µ   .      .           ¼merge merge_async           (      ù                  6           !   .           	ˆ   \     à             	þ      merge@1c10f000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           y    ð                µ   .      .           ¼merge merge_async           (      ú                  6           !   .           	ˆ   \     ð             	þ      merge@1c110000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           y                     µ   .      .           ¼merge merge_async           (      û                  6           !   .           	ˆ   \                   
      dp-intf@1c113000              mediatek,mt8188-dp-intf         y    0                µ   .   :   .      !           ¼pixel engine pll            (                        6         	  Edisabled          ethdr@1c114000        6    mediatek,mt8188-disp-ethdr mediatek,mt8195-disp-ethdr         p  y    @            P            p            �                         °            À              4  #mixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds       h  µ   .   0   .   +   .   .   .   ,   .   /   .   -   .   <   .   1   .   2   .   3   .   4   .   5   "         ƒ  ¼mixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds vdo_fe0_async vdo_fe1_async gfx_fe0_async gfx_fe1_async vdo_be_async ethdr_top          (      6               	�   ]   d   ]   e           6         (  !   .   1   .   2   .   3   .   4   .   5      p  	ˆ   \     @       \     P       \     p       \     �       \             \     °       \     À          padding@1c11d000              mediatek,mt8188-disp-padding            y    Ð                µ   .              6           	ˆ   \     Ð          padding@1c11e000              mediatek,mt8188-disp-padding            y    à                µ   .               6           	ˆ   \     à          padding@1c11f000              mediatek,mt8188-disp-padding            y    ð                µ   .   !           6           	ˆ   \     ð          padding@1c120000              mediatek,mt8188-disp-padding            y                     µ   .   "           6           	ˆ   \                padding@1c121000              mediatek,mt8188-disp-padding            y                    µ   .   #           6           	ˆ   \               padding@1c122000              mediatek,mt8188-disp-padding            y                     µ   .   $           6           	ˆ   \                padding@1c123000              mediatek,mt8188-disp-padding            y    0                µ   .   %           6           	ˆ   \     0          padding@1c124000              mediatek,mt8188-disp-padding            y    @                µ   .   &           6           	ˆ   \     @          edp-tx@1c500000           mediatek,mt8188-edp-tx          y    P        €         (      ¤               p   z        |dp_calibration_data            6           
)  ¤      	  Edisabled          dp-tx@1c600000            mediatek,mt8188-dp-tx           y    `        €         (      Ê               p   z        |dp_calibration_data            6           
)        	  Edisabled             chosen          
:serial0:115200n8          memory@40000000         mmemory          y    @       €         reserved-memory                      +            ¯   memory@50000000           shared-dma-pool         y    P       �           
F        J   4            	compatible interrupt-parent #address-cells #size-cells model dp-intf0 dp-intf1 dsc0 ethdr0 gce0 gce1 merge0 merge1 merge2 merge3 merge4 merge5 mutex0 mutex1 padding0 padding1 padding2 padding3 padding4 padding5 padding6 padding7 vdo1-rdma0 vdo1-rdma1 vdo1-rdma2 vdo1-rdma3 vdo1-rdma4 vdo1-rdma5 vdo1-rdma6 vdo1-rdma7 serial0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 mmc0 device_type reg enable-method clock-frequency capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache performance-domains #cooling-cells phandle cpu entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-output-names opp-shared opp-hz opp-microvolt opp-supported-hw interrupts mediatek,platform status polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device dma-ranges #performance-domain-cells #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-up input-enable drive-strength bias-pull-down bias-disable #power-domain-cells clocks clock-names mediatek,infracfg mediatek,disable-extrst #sound-dai-cells interrupts-extended #io-channel-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-always-on regulator-ramp-delay regulator-allowed-modes assigned-clocks assigned-clock-parents #iommu-cells #mbox-cells memory-region power-domains resets reset-names mediatek,topckgen mboxes mbox-names pinctrl-names pinctrl-0 nvmem-cells nvmem-cell-names #thermal-sensor-cells #pwm-cells phys wakeup-source mediatek,syscon-wakeup interrupt-names mediatek,pericfg snps,axi-config snps,mtl-rx-config snps,mtl-tx-config snps,txpbl snps,rxpbl snps,clk-csr snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,rx-sched-sp snps,dcb-algorithm snps,map-to-dma-channel snps,tx-queues-to-use snps,tx-sched-wrr snps,priority snps,weight bus-width hs400-ds-delay max-frequency cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe cap-mmc-hw-reset no-sdio no-sd non-removable vmmc-supply vqmmc-supply pinctrl-1 clock-div bus-range linux,pci-domain interrupt-map interrupt-map-mask iommu-map iommu-map-mask phy-names spi-max-frequency #phy-cells bits operating-points-v2 power-domain-names #dma-cells iommus mediatek,gce-client-reg mediatek,gce-events mediatek,scp mediatek,larb-id mediatek,smi mediatek,larbs remote-endpoint mediatek,merge-mute mediatek,merge-fifo-en max-linkrate-mhz stdout-path no-map 