Ðþí  ‡î   8  ´   (            :  |                             $    mediatek,mt8365-evk mediatek,mt8365                                  +         "   7MediaTek MT8365 Open Platform EVK      aliases          =/soc/aal@14011000            B/soc/ccorr@14010000          I/soc/color@1400f000          P/soc/dither@14013000             X/soc/dpi@14018000            ]/soc/dsi@14014000            b/soc/gamma@14012000          i/soc/ovl@1400b000            n/soc/rdma@1400d000           t/soc/rdma@14016000           z/soc/serial@11002000             ‚/soc/ethernet@112a0000        cpus                         +       opp-table-0           operating-points-v2           ‹         –      opp-850000000            ž    2©ø€         ¥ 	ë      opp-918000000            ž    6·‘€         ¥ 
4N      opp-987000000            ž    :ÔlÀ         ¥ 
}Œ      opp-1056000000           ž    >ñH          ¥ 
ÆÊ      opp-1125000000           ž    C#@         ¥       opp-1216000000           ž    Hz°          ¥ q°      opp-1308000000           ž    Mö          ¥ ÓX      opp-1400000000           ž    SrN          ¥ 5       opp-1466000000           ž    Wab€         ¥ –¨      opp-1533000000           ž    [_¹@         ¥ øP      opp-1633000000           ž    aUš@         ¥ ŠÌ      opp-1700000000           ž    eSñ          ¥ ìt      opp-1767000000           ž    iRGÀ         ¥ N      opp-1834000000           ž    mPž€         ¥ ¯Ä      opp-1917000000           ž    rC@         ¥ )Ö      opp-2001000000           ž    wDÖ@         ¥ £è         cpu-map    cluster0       core0            ³         core1            ³         core2            ³         core3            ³               cpu@0            ·cpu           arm,cortex-a53           Ã             Ç            Öpsci             ä                  ô  €            @                      €         -   @        ?           L   	        ]   
                  dcpu intermediate            p           „           �            –         cpu@1            ·cpu           arm,cortex-a53           Ã            Ç            Öpsci             ä                  ô  €            @                      €         -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p           „           �            –         cpu@2            ·cpu           arm,cortex-a53           Ã            Ç            Öpsci             ä                  ô  €            @                      €         -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p           „           �            –         cpu@3            ·cpu           arm,cortex-a53           Ã            Ç            Öpsci             ä                  ô  €            @                      €         -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p           „           �            –         idle-states         œpsci       cpu-mcdi              arm,idle-state           ©        º          Ñ  ,        â   È        ò  è         –         cluster-mcdi              arm,idle-state           ©        º         Ñ  ^        â   ú        ò  °         –         cluster-dpidle            arm,idle-state           ©        º         Ñ  ,        â           ò  ä         –            l2-cache              cache                       ö              @                             –   	         oscillator            fixed-clock                     *Œº€        :clk26m           –         opp-table-gpu             operating-points-v2           ‹         –      opp-450000000            ž    Òt€         ¥ 	ë      opp-560000000            ž    !`ì          ¥ 
®`      opp-800000000            ž    /¯          ¥ 5          psci              arm,psci-1.0             Ýsmc       soc                      +             simple-bus           M   interrupt-controller@c000000              arm,gic-v3          T                        e      P   Ã                               @              A             B                  z      	            –         syscon@13000000           mediatek,mt8365-mfgcfg syscon            Ã                                  –         gpu@13040000          &    mediatek,mt8365-mali arm,mali-bifrost            Ã            @         ]             0  z       Ë          Ê          É          Ì           …job mmu gpu event           p           •              £okay            ª         syscon@10000000            mediatek,mt8365-topckgen syscon          Ã                                  –         syscon@10001000            mediatek,mt8365-infracfg syscon          Ã                                 –         syscon@10003000           mediatek,mt8365-pericfg syscon           Ã     0                         syscfg-pctl@10005000              mediatek,mt8365-syscfg syscon            Ã     P                 –         syscon@10006000       )    mediatek,mt8365-scpsys syscon simple-mfd             Ã     `           power-controller          !    mediatek,mt8365-power-controller                         +            ¶            –      power-domain@0           Ã          (  ]      ?                                dmm mm-0 mm-1 mm-2 mm-3          ¶            Ê           Ü                        +       power-domain@4           Ã         0  ]                                           $  dcam-0 cam-1 cam-2 cam-3 cam-4 cam-5         ¶            Ê           ò         power-domain@6           Ã           ¶            ò         power-domain@7           Ã           ¶            ò         power-domain@8           Ã         8  ]      :                                           (  dapu apu-0 apu-1 apu-2 apu-3 apu-4 apu-5         ¶            Ê           ò            power-domain@1           Ã           ]      ˆ      ‰        dconn conn1          ¶            Ê         power-domain@2           Ã           ]      A        dmfg         ¶            Ê           ÿ         power-domain@3           Ã           ]      M      !      $        daudio audio1 audio2         ¶            Ê         power-domain@5           Ã           ]      _      ‹      	  ddsp dsp1            ¶            Ê               watchdog@10007000         (    mediatek,mt8365-wdt mediatek,mt6589-wdt          Ã     p                         pinctrl@1000b000              mediatek,mt8365-pinctrl          Ã     °                            /        ?            e        T           z       s            –      audiodefault-pins            –   d   clk-dat-pins            K  H  I  J  K         audiodmic-pins           –   e   clk-dat-pins            K  u  v  w         misooff-pins             –   f   clk-dat-pins            K  5   6   7   8          R         _        n            misoon-pins          –   g   clk-dat-pins            K  5  6  7  8        n            mosioff-pins             –   h   clk-dat-pins            K  1   2   3   4          R         _        n            mosion-pins          –   i   clk-dat-pins            K  1  2  3  4        n            dpi-default-pins             –   Z   pins          @  K                     	  
                  n            dpi-idle-pins            –   [   pins          @  K                              	   
                         ethernet-pins            –   ?   phy_reset_pins          K  …       rmii_pins         @  K                     	  
                   gpio-keys-pins           –   b   pins            K           }         R         i2c0-pins            –   (   pins            K  9  :         }         i2c1-pins            –   )   pins            K  ;  <         }         ite-pins             –   *   irq_ite_pins            K  D          R         }      pwr_pins            K  F   G          Š      rst_ite_pins            K  E          Š         mmc0-default-pins            –   7   clk-pins            K  c         _      cmd-dat-pins          $  K  g  f  e  d  `  _  ^  ]  b         R         }      rst-pins            K  a         }         mmc0-uhs-pins            –   8   clk-pins            K  c        n   
        _   f      cmd-dat-pins          $  K  g  f  e  d  `  _  ^  ]  b         R        n   
        }   e      ds-pins         K  h        n   
        _   f      rst-pins            K  a        n   
         }         mmc1-default-pins            –   ;   cd-pins         K  L          }      clk-pins            K  X        _   f      cmd-dat-pins            K  Y  Z  [  \  W         R        }   e         mmc1-uhs-pins            –   <   clk-pins            K  X        n           _   f      cmd-dat-pins            K  Y  Z  [  \  W         R        n           }   e         touch-pins           –   0   ctp-int1-pins           K  N          R         –      rst-pins            K  O          £         uart0-pins           –   $   pins            K  #  $         uart1-pins           –   %   pins            K  %  &         uart2-pins           –   &   pins            K  '  (         usb-pins             –   4   id-pins         K            R         }      usb0-vbus-pins          K           Š      usb1-vbus-pins          K            Š         pwm-pins             –   '   pins            K    t            syscon@1000c000       "    mediatek,mt8365-apmixedsys syscon            Ã     À                            –         pwrap@1000d000            mediatek,mt8365-pwrap            Ã     Ð                ®pwrap           z       {            ]      /            0      .        dspi wrap sys tmr       pmic              mediatek,mt6357         ¸      ‘            e        T           Ì ýà        è ð    adc           mediatek,mt6357-auxadc                   regulators     buck-vproc          vproc           % ê^        = ô        U  j        j   Ü         †         –         buck-vcore          vcore           % ê^        = ô        U  j        j   Ü         †         –         buck-vmodem         vmodem          % ¡         = 7        U  j        j   Ü      buck-vs1            vs1         % O€        = !‘À        U  0Ô        j   Ü         †      buck-vpa            vpa         % ¡         = 7±Ð        U  ÃP        j   Ü      ldo-vfe28           vfe28           % *¹€        = *¹€        j        ldo-vxo22           vxo22           % !‘À        = $Ÿ         j   n      ldo-vrf18           vrf18           % w@        = w@        j   n      ldo-vrf12           vrf12           % O€        = O€        j   n         –   -      ldo-vefuse          vefuse          % O€        = 2Z         j        ldo-vcn33-bt          	  vcn33-bt            % 2Z         = 5gà        j        ldo-vcn33-wifi          vcn33-wifi          % 2Z         = 5gà        j        ldo-vcn28           vcn28           % *¹€        = *¹€        j        ldo-vcn18           vcn18           % w@        = w@        j        ldo-vcama           vcama           % &%         = *¹€        j        ldo-vcamd           vcamd           % B@        = w@        j        ldo-vcamio18            vcamio          % w@        = w@        j        ldo-vldo28          vldo28          % *¹€        = -ÆÀ        j        ldo-vsram-others            vsram-others            % ê^        = ô        U  j        j   n         †         –         ldo-vsram-proc          vsram-proc          % ê^        = ô        U  j        j   n         †         –         ldo-vaux18          vaux18          % w@        = w@        j        ldo-vaud28          vaud28          % *¹€        = *¹€        j        ldo-vio28           vio28           % *¹€        = *¹€        j        ldo-vio18           vio18           % w@        = w@        j           †         –   :      ldo-vdram           vdram           % Èà        = O€        j  ä      ldo-vmc         vmc         % w@        = 2Z         j   ,         –   >      ldo-vmch            vmch            % ,@         = 2Z         j   ,         –   =      ldo-vemc            vemc            % ,@         = 2Z         j   ,         †         –   9      ldo-vsim1           vsim1           % w@        = w@        j           –   S      ldo-vsim2           vsim2           % ð         = /M`        j           –   +      ldo-vibr            vibr            % O€        = 2Z         j   ,         –   ,      ldo-vusb33          vusb33          % -ÆÀ        = /M`        j           –   5         rtc           mediatek,mt6357-rtc       keys              mediatek,mt6357-keys       key-power           š   t         ©      key-home            š   f         ©               keypad@10010000       .    mediatek,mt8365-keypad mediatek,mt6779-keypad            Ã                      ©        z       |           ]           dkpd       	  £disabled          syscon@10200000           mediatek,mt8365-mcucfg syscon            Ã                                   –   
      interrupt-controller@10200a80         .    mediatek,mt8365-sysirq mediatek,mt6577-sysirq            e        T                        Ã     
€                 –         iommu@10205000            mediatek,mt8365-m4u          Ã     P                z       f           ·          !   "        Æ            –   C      infracfg@1020e000              mediatek,mt8365-infracfg syscon          Ã     à                            –         rng@1020f000          (    mediatek,mt8365-rng mediatek,mt7623-rng          Ã     ð                ]              drng       dma-controller@11000280       2    mediatek,mt8365-uart-dma mediatek,mt6577-uart-dma         `   Ã     €       €             €     €       €             €     €       €             €      H  z       -          .          /          0          3          4           Ó           ]              dapdma           à            –   #      serial@11002000       *    mediatek,mt8365-uart mediatek,mt6577-uart            Ã                      z       #           ]               	  dbaud bus            ë   #       #           ðtx rx           £okay            ú   $        default       serial@11003000       *    mediatek,mt8365-uart mediatek,mt6577-uart            Ã     0                z       $           ]               	  dbaud bus            ë   #      #           ðtx rx           £okay            ú   %        default       serial@11004000       *    mediatek,mt8365-uart mediatek,mt6577-uart            Ã     @                z       %           ]               	  dbaud bus            ë   #      #           ðtx rx           £okay            ú   &        default       pwm@11006000              mediatek,mt8365-pwm          Ã     `                           z       L         (  ]                        	      
        dtop main pwm1 pwm2 pwm3         ú   '        default         £okay          i2c@11007000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           Ã     p               €       €        z                             ]      4            	  dmain dma                         +            £okay            * †         ú   (        default       i2c@11008000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           Ã     €                      €        z                             ]      5            	  dmain dma                         +            £okay            * †         ú   )        default    hdmi@4c           ite,it66121          Ã   L        '                        z   D           ú   *        default         8      E           D   +        Q   ,        ^   -   ports                        +       port@0                       +             Ã       endpoint@0           Ã            k           u   .         –   ]         port@1                       +             Ã      endpoint@0           Ã            u   /         –   a               touchscreen@5d            goodix,gt9271            Ã   ]        ¸      N           default         ú   0        …      N            8      O           �   1        �   -         i2c@11009000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           Ã     �              €       €        z                             ]      6            	  dmain dma                         +          	  £disabled          spi@1100a000          (    mediatek,mt8365-spi mediatek,mt7622-spi          Ã                                   +            z       >           ]            F              dparent-clk sel-clk spi-clk        	  £disabled          pwm@1100e000          2    mediatek,mt8365-disp-pwm mediatek,mt8183-disp-pwm            Ã     à                dmain mm         ]      S      #        •                        i2c@1100f000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           Ã     ð                      €        z                             ]      7            	  dmain dma                         +          	  £disabled          usb@11201000          #    mediatek,mt8365-mtu3 mediatek,mtu3            Ã            .      >              	  ®mac ippc            z                  ª   2      3            ]      †      E      D              dsys_ck ref_ck mcu_ck dma_ck                      +            M        £okay            ¯otg         ·high-speed          ú   4        default          Å        Õ   5   usb@11200000          '    mediatek,mt8365-xhci mediatek,mtk-xhci           Ã                      ®mac         z       C         (  ]      †      E      D            F      $  dsys_ck ref_ck mcu_ck dma_ck xhci_ck         £okay            Õ   5      connector         %    gpio-usb-b-connector usb-b-connector            ã                   ¾micro           ì   6         mmc@11230000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc           Ã    #             Í                 z                  ]      I            +        dsource hclk source_cg           £okay            ø      5              I        k                     1        B          QëÂ          _         n         }         ƒ         ‹        ú   7        ™   8        default state_uhs           £   9        ¯   :      mmc@11240000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc           Ã    $             É                 z                  ]      K            ,        dsource hclk source_cg           £okay            k            ¼        Í      L           QëÂ         ú   ;        ™   <        default state_uhs            Ö         ä        £   =        ¯   >      mmc@11250000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc           Ã    %             Æ                 z       D         (  ]      J            -      A      )      %  dsource hclk source_cg bus_clk sys_cg          	  £disabled          ethernet@112a0000             mediatek,mt8365-eth          Ã    *                 ñ           z                  ]      c      8      9        dcore reg trans        	  £disabled            ú   ?        default            @        rmii       mdio                         +       ethernet-phy@0           Ã             –   @            dsi-phy@11c00000          0    mediatek,mt8365-mipi-tx mediatek,mt8183-mipi-tx          Ã    À                 :mipi_tx0_pll            ]                                    –   R      t-phy@11cc0000        .    mediatek,mt8365-tphy mediatek,generic-tphy-v2                        +           M        Ì    �    usb-phy@0            Ã               ]      ‡      ‚        dref da_ref                      –   2      usb-phy@1000             Ã              ]      ‡      ‚        dref da_ref                      –   3         syscon@14000000           mediatek,mt8365-mmsys syscon             Ã                                  –      port                         +       endpoint@0           Ã            u   A         –   D      endpoint@1           Ã           u   B         –   X            mutex@14001000            mediatek,mt8365-disp-mutex           Ã                     z       š           •             smi@14002000              mediatek,mt8365-smi-common           Ã                       ]                                dapb smi gals0 gals1         •                –         larb@14003000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            Ã     0                ò           ]                    dapb smi         •               !             –         ovl@1400b000          2    mediatek,mt8365-disp-ovl mediatek,mt8192-disp-ovl            Ã     °                ]              z       ¡           2   C            •          ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   D         –   A         port@1                       +             Ã      endpoint@0           Ã            u   E         –   F               rdma@1400d000         4    mediatek,mt8365-disp-rdma mediatek,mt8183-disp-rdma          Ã     Ð                ]      
        z       ¢           2   C           9           •          ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   F         –   E         port@1                       +             Ã      endpoint@0           Ã            u   G         –   H               color@1400f000        6    mediatek,mt8365-disp-color mediatek,mt8173-disp-color            Ã     ð                ]              z       ¤           •          ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   H         –   G         port@1                       +             Ã      endpoint@0           Ã            u   I         –   J               ccorr@14010000        6    mediatek,mt8365-disp-ccorr mediatek,mt8183-disp-ccorr            Ã                     ]              z       ¥           •          ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   J         –   I         port@1                       +             Ã      endpoint@0           Ã            u   K         –   L               aal@14011000          2    mediatek,mt8365-disp-aal mediatek,mt8183-disp-aal            Ã                    ]              z       ¦           •          ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   L         –   K         port@1                       +             Ã      endpoint@0           Ã            u   M         –   N               gamma@14012000        6    mediatek,mt8365-disp-gamma mediatek,mt8183-disp-gamma            Ã                     ]              z       §           •          ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   N         –   M         port@1                       +             Ã      endpoint@0           Ã            u   O         –   P               dither@14013000       8    mediatek,mt8365-disp-dither mediatek,mt8183-disp-dither          Ã    0                ]              z       ¨           •          ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   P         –   O         port@1                       +             Ã      endpoint@0           Ã            u   Q         –   V               dsi@14014000          (    mediatek,mt8365-dsi mediatek,mt8183-dsi          Ã    @                dengine digital hs           ]               R        z       ©           Qdphy            ª   R        •                            +            £okay       panel@0           startek,kd070fhfid015            Ã            [      C            8                  h   S        u   T   port                         +       endpoint@0           Ã            u   U         –   W            ports                        +       port@0                       +             Ã       endpoint@0           Ã            u   V         –   Q         port@1                       +             Ã      endpoint@0           Ã            u   W         –   U               rdma@14016000         4    mediatek,mt8365-disp-rdma mediatek,mt8183-disp-rdma          Ã    `                ]              z       Ã           2   C           9           •          ports                        +       port@0                       +             Ã       endpoint@1           Ã           u   X         –   B         port@1                       +             Ã      endpoint@1           Ã           u   Y         –   \               dpi@14018000          (    mediatek,mt8365-dpi mediatek,mt8192-dpi          Ã    €                ]            !              dpixel engine pll            z       Å           •             	  £disabled            ú   Z        ™   [        default sleep      ports                        +       port@0                       +             Ã       endpoint@1           Ã           u   \         –   Y         port@1                       +             Ã      endpoint@1           Ã           u   ]         –   .               syscon@15000000           mediatek,mt8365-imgsys syscon            Ã                                  –         larb@15001000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            Ã                     ò           ]                     dapb smi         •              !            –   !      syscon@16000000           mediatek,mt8365-vdecsys syscon           Ã                                  –   ^      larb@16010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            Ã                     ò           ]   ^      ^           dapb smi         •              !            –   "      syscon@17000000           mediatek,mt8365-vencsys syscon           Ã                                  –   _      larb@17010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            Ã                     ò           ]   _       _            dapb smi         •              !            –          syscon@19020000           mediatek,mt8365-apu syscon           Ã                                 –         audio-controller@11220000             mediatek,mt8365-afe-pcm          Ã    "                 '          l  ]         L      y      z      {      |      P      Q      N      O      i      j      k      l      •  dtop_clk26m_clk top_audio_sel audio_i2s0_m audio_i2s1_m audio_i2s2_m audio_i2s3_m engen1 engen2 aud1 aud2 i2s0_m_sel i2s1_m_sel i2s2_m_sel i2s3_m_sel            z       a           •              £okay            ‚            –   j         timer             arm,armv8-timer                   0  z                                 
         dummy13m              fixed-clock         * Æ]@                     –   `      timer@10017000        /    mediatek,mt8365-systimer mediatek,mt6765-timer           Ã    p                z       Š           ]   `        dclk13m        chosen          •serial0:921600n8          connector             hdmi-connector          ¡hdmi             ¾d      port                         +       endpoint@0           Ã            u   a         –   /            firmware       optee             linaro,optee-tz          Ýsmc          gpio-keys         
    gpio-keys           default         ú   b   key-volume-up           >               
  ¡volume_up           §   s         ©        ²            memory@40000000          ·memory           Ã    @       À         regulator-0           regulator-fixed       	  otg_vbus            % LK@        = LK@        Ä                   É         –   6      regulator-vsys            regulator-fixed         vsys             †         Ü         –   c      regulator-vio33tp             regulator-fixed       	  vio33_tp            % 2Z         = 2Z         î   c         –   1      reserved-memory                      +            M   secmon@43000000          ù         Ã    C                optee@43200000           ù         Ã    C        À           sound             mediatek,mt8365-mt6357        /  default dmic miso_off miso_on mosi_off mosi_on          ú   d        ™   e            f        
   g           h           i        (   j      regulator-vsys-lcm            regulator-fixed          É        Ä      �            = LK@        % LK@      	  vsys_lcm             –   T         	compatible interrupt-parent #address-cells #size-cells model aal0 ccorr0 color0 dither0 dpi0 dsi0 gamma0 ovl0 rdma0 rdma1 serial0 ethernet opp-shared phandle opp-hz opp-microvolt cpu device_type reg #cooling-cells enable-method cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks clock-names operating-points-v2 proc-supply sram-supply entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-frequency clock-output-names ranges #interrupt-cells interrupt-controller interrupts interrupt-names power-domains status mali-supply #power-domain-cells mediatek,infracfg mediatek,infracfg-nao mediatek,smi domain-supply #reset-cells mediatek,pctl-regmap gpio-controller #gpio-cells pinmux input-enable bias-pull-down drive-strength bias-pull-up output-high bias-disable output-low reg-names interrupts-extended mediatek,micbias0-microvolt mediatek,micbias1-microvolt #io-channel-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-always-on linux,keycodes wakeup-source mediatek,larbs #iommu-cells dma-requests #dma-cells dmas dma-names pinctrl-0 pinctrl-names #pwm-cells clock-div #sound-dai-cells reset-gpios vcn18-supply vcn33-supply vrf12-supply bus-width remote-endpoint irq-gpios AVDD28-supply VDDIO-supply phys dr_mode maximum-speed usb-role-switch vusb33-supply id-gpios vbus-supply assigned-clock-parents assigned-clocks cap-mmc-highspeed cap-mmc-hw-reset hs400-ds-delay max-frequency mmc-hs200-1_8v mmc-hs400-1_8v no-sd no-sdio non-removable pinctrl-1 vmmc-supply vqmmc-supply cap-sd-highspeed cd-gpios sd-uhs-sdr104 sd-uhs-sdr50 mediatek,pericfg phy-handle phy-mode #phy-cells mediatek,larb-id iommus mediatek,rdma-fifo-size phy-names enable-gpios iovcc-supply power-supply mediatek,dmic-mode stdout-path label linux,code debounce-interval gpio enable-active-high regulator-boot-on vin-supply no-map pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 mediatek,platform 