Ðþí G   8 8ð   (             8¸                             4    mediatek,mt8370-evk mediatek,mt8370 mediatek,mt8188                                  +            7MediaTek Genio-510 EVK     aliases          =/soc/dp-intf@1c015000            F/soc/dp-intf@1c113000            O/soc/dsc@1c009000            T/soc/ethdr@1c114000          [/soc/mailbox@10320000            `/soc/mailbox@10330000            e/soc/merge0@1c014000             l/soc/merge@1c10c000          s/soc/merge@1c10d000          z/soc/merge@1c10e000          �/soc/merge@1c10f000          ˆ/soc/merge@1c110000          �/soc/mutex@1c016000          –/soc/mutex@1c101000          �/soc/padding@1c11d000            ¦/soc/padding@1c11e000            ¯/soc/padding@1c11f000            ¸/soc/padding@1c120000            Á/soc/padding@1c121000            Ê/soc/padding@1c122000            Ó/soc/padding@1c123000            Ü/soc/padding@1c124000            å/soc/rdma@1c104000           ð/soc/rdma@1c105000           û/soc/rdma@1c106000          /soc/rdma@1c107000          /soc/rdma@1c108000          /soc/rdma@1c109000          '/soc/rdma@1c10a000          2/soc/rdma@1c10b000          =/soc/dsi@1c008000           B/soc/ethernet@11021000          L/soc/i2c@11280000           Q/soc/i2c@11e00000           V/soc/i2c@11281000           [/soc/i2c@11282000           `/soc/i2c@11e01000           e/soc/i2c@11ec0000           j/soc/i2c@11ec1000           o/soc/mmc@11230000           t/soc/mmc@11240000           y/soc/serial@11001100          cpus                         +       cpu@0           �cpu           arm,cortex-a55          �            ‘psci            Ÿw5”         ¯          Â              Ò  €         ß   @        ñ   €        þ  €            @           €        *           ;               O           ^   	      cpu@100         �cpu           arm,cortex-a55          �           ‘psci            Ÿw5”         ¯          Â              Ò  €         ß   @        ñ   €        þ  €            @           €        *           ;               O           ^   
      cpu@200         �cpu           arm,cortex-a55          �           ‘psci            Ÿw5”         ¯          Â              Ò  €         ß   @        ñ   €        þ  €            @           €        *           ;               O           ^         cpu@300         �cpu           arm,cortex-a55          �           ‘psci            Ÿw5”         ¯          Â              Ò  €         ß   @        ñ   €        þ  €            @           €        *           ;               O           ^         cpu@600         �cpu           arm,cortex-a78          �           ‘psci            Ÿƒ!V         ¯           Â              Ò           ß   @        ñ           þ              @                   *           ;              O           ^         cpu@700         �cpu           arm,cortex-a78          �           ‘psci            Ÿƒ!V         ¯           Â              Ò           ß   @        ñ           þ              @                   *           ;              O           ^         cpu-map    cluster0       core0           f   	      core1           f   
      core2           f         core3           f         core6           f         core7           f               idle-states         jpsci       cpu-off-l             arm,idle-state          w            Ž        Ÿ   2        °   _        À  D        ^         cpu-off-b             arm,idle-state          w            Ž        Ÿ   -        °   Œ        À  ä        ^         cluster-off-l             arm,idle-state          w          Ž        Ÿ   7        °   ›        À  H        ^         cluster-off-b             arm,idle-state          w          Ž        Ÿ   2        °   È        À  è        ^            l2-cache0             cache           Ñ           Ô           á   @        ó           *            Ý        ^         l2-cache1             cache           Ñ           Ô           á   @        ó           *            Ý        ^         l3-cache              cache           Ñ           Ô            á   @        ó            Ý        ^            oscillator-13m            fixed-clock         ë            Ÿ Æ]@        øclk13m          ^   7      oscillator-26m            fixed-clock         ë            ŸŒº€        øclk26m          ^   9      oscillator-32k            fixed-clock         ë            Ÿ  €         øclk32k        opp-table-gpu             operating-points-v2                  ^   €   opp-390000000               >í€         Æ        +   ÿ      opp-431000000               °‰À         öì        +   ÿ      opp-473000000               1h@         	'À        +   ÿ      opp-515000000               ²FÀ         	X”        +   ÿ      opp-556000000               !#ã          	‰h        +   ÿ      opp-598000000               #¤Á€         	º<        +   ÿ      opp-640000000               &%           	ë        +   ÿ      opp-670000000               'ïc€         
ä        +   ÿ      opp-700000000               )¹'          
L¸        +   ÿ      opp-730000000               +‚ê€         
}Œ        +   ÿ      opp-760000000               -L®          
®`        +   ÿ      opp-790000000               /q€         
ß4        +   ÿ      opp-835000000               1ÅÀ         (r        +   ÿ      opp-880000000               4s¼          q°        +   ÿ      opp-915000000               6‰ÊÀ         ÓX        +   �      opp-915000000-5             6‰ÊÀ         ¢„        +   0      opp-915000000-6             6‰ÊÀ         q°        +   p      opp-950000000               8ŸÙ€         5         +   �      opp-950000000-5             8ŸÙ€         ÓX        +   0      opp-950000000-6             8ŸÙ€         q°        +   p         pmu-a55           arm,cortex-a55-pmu                      <                  pmu-a78           arm,cortex-a78-pmu                      <                  psci              arm,psci-1.0            ˜smc       sound           G           Yokay          6    mediatek,mt8390-mt6359-evk mediatek,mt8188-mt6359-evb            7mt8390-evk          `default         n         t  xHeadphone Headphone L Headphone Headphone R DMIC_INPUT AP DMIC AP DMIC AUDGLB AP DMIC MIC_BIAS_0 AP DMIC MIC_BIAS_2         †      dai-link-0        
  ”DL_SRC_BE      codec           ž                dai-link-1          ”DMIC_BE    codec           ž               thermal-zones      cpu-little0-thermal         ¨  è        ¶   –        Ì          trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^         trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó         0  ø   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         ¨  è        ¶   –        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^         trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó         0  ø   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         ¨  è        ¶   –        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^         trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó         0  ø   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little3-thermal         ¨  è        ¶   –        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^         trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó         0  ø   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big0-thermal            ¨  è        ¶   d        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^         trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó           ø   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            ¨  è        ¶   d        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^         trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó           ø   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            apu-thermal         ¨  è        ¶   ú        Ì          trips      trip-alert0         Ü L        è  Ð        ˆpassive       trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical                gpu-thermal         ¨  è        ¶   ú        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^         trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó           ø    ÿÿÿÿÿÿÿÿ            gpu1-thermal            ¨  è        ¶   ú        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive         ^   !      trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical             cooling-maps       map0            ó   !        ø    ÿÿÿÿÿÿÿÿ            adsp-thermal            ¨  è        ¶   ú        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive       trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical                vdo-thermal         ¨  è        ¶   ú        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive       trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical                infra-thermal           ¨  è        ¶   ú        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive       trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical                cam1-thermal            ¨  è        ¶   ú        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive       trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical                cam2-thermal            ¨  è        ¶   ú        Ì         trips      trip-alert0         Ü L        è  Ð        ˆpassive       trip-alert1         Ü s        è  Ð        ˆhot       trip-crit           Ü †         è          	  ˆcritical                   timer             arm,armv8-timer                   @  <                                             
               Ÿ Æ]@      soc                      +             simple-bus                                             performance-controller@11bc10             mediatek,cpufreq-hw          �     ¼            ½0                          ^         interrupt-controller@c000000              arm,gic-v3          ,           =                        T         �                                    <      	               ^      ppi-partitions     interrupt-partition-0           i   	   
              ^         interrupt-partition-1           i              ^               syscon@10000000            mediatek,mt8188-topckgen syscon         �                      ë           ^   %      syscon@10001000       #    mediatek,mt8188-infracfg-ao syscon          �                     ë           r           ^   &      syscon@10003000           mediatek,mt8188-pericfg syscon          �     0                ë           ^   I      pinctrl@10005000              mediatek,mt8188-pinctrl       `  �     P            À             á             â             ê              °              0  iocfg0 iocfg_rm iocfg_lt iocfg_lm iocfg_rt eint          ‰        ™           ¥   "           °         T        <       ë               ,           ^   "   audio-default-pins          ^      pins-cmd-dat          X  ±  e  f  g  h  i  j  k  l  m  n  r  s  t  u  v  y  z  |  }  ~  €  �         disp-pwm1-pins          ^   E   pins-pwm            ±           dptx-pins      pins-cmd-dat            ±  .         ¸         edp-panel-3v3-en-pins           ^   °   pins1           ±            Å         eth-default-pins            ^   U   pins-cc         ±  ‹  Œ  �  Ž        Ñ         pins-mdio           ±  �  �        Ñ            à      pins-power          ±  ‘   ’          Å      pins-rxd            ±  ‡  ˆ  ‰  Š        Ñ         pins-txd            ±  ƒ  „  …  †        Ñ            eth-sleep-pins          ^   V   pins-cc         ±  ‹   Œ   �   Ž       pins-mdio           ±  �   �          í         û      pins-rxd            ±  ‡   ˆ   ‰   Š       pins-txd            ±  ƒ   „   …   †          i2c0-pins           ^   `   pins            ±  8  7        ¸   Ë          è         i2c1-pins           ^   r   pins            ±  :  9        ¸   Ë          è         i2c2-pins           ^   d   pins            ±  <  ;        ¸   Ë          è         i2c3-pins           ^   e   pins            ±  >  =        ¸   Ë          è         i2c4-pins           ^   u   pins            ±  @  ?        ¸   Ë          è         i2c5-pins           ^   |   pins            ±  B  A        ¸   Ë          è         i2c6-pins           ^   }   pins            ±  D  C        ¸   Ë          è         gpio-key-pins      pins            ±  *  +  ,         mmc0-default-pins           ^   W   pins-clk            ±  �        Ñ               f      pins-cmd-dat          $  ±  ¡     Ÿ  ž  š  ™  ˜  —  œ         à        Ñ           ¸   e      pins-rst            ±  ›        Ñ           ¸   e         mmc0-uhs-pins           ^   X   pins-clk            ±  �        Ñ               f      pins-cmd-dat          $  ±  ¡     Ÿ  ž  š  ™  ˜  —  œ         à        Ñ           ¸   e      pins-ds         ±  ¢        Ñ               f      pins-rst            ±  ›        Ñ           ¸   e         mmc1-default-pins           ^   [   pins-clk            ±  ¤        Ñ               f      pins-cmd-dat            ±  £  ¥  ¦  §  ¨         à        Ñ           ¸   e      pins-insert         ±            ¸         mmc1-uhs-pins           ^   \   pins-clk            ±  ¤        Ñ               f      pins-cmd-dat            ±  £  ¥  ¦  §  ¨         à        Ñ           ¸   e         mmc2-default-pins      pins-clk            ±  ª        Ñ               f      pins-cmd-dat            ±  ©  «  ¬  ­  ®         à        Ñ           ¸   e      pins-pcm            ±  {         mmc2-uhs-pins      pins-clk            ±  ª        Ñ               f      pins-cmd-dat            ±  ©  «  ¬  ­  ®         à        Ñ           ¸   e         mmc2-eint-pins     pins-dat1           ±  ¬          à        ¸   e         mmc2-dat1-pins     pins-dat1           ±  ¬         à        Ñ           ¸   e         dsi0-vreg-en-pins           ^   ²   pins-pwr-en         ±  o          /         panel-default-pins          ^       pins-rst            ±            /      pins-en         ±  -          /         pcie-default-pins           ^   p   pins            ±  /  0  1         ¸         rt1715-int-pins    pins_cmd0_dat           ±            ¸         à         spi0-pins      pins-spi            ±  E  F  G  H         û         spi1-pins      pins-spi            ±  K  L  M  N         û         spi2-pins           ^   F   pins-spi            ±  O  P  Q  R         û         touch-avdd-pins         ^   ±   pins-power          ±  x          Å         touch-pins          ^   c   pins-irq            ±            à         û      pins-reset          ±            Å         tcpci-int-pins          ^   v   pins-int-n          ±            ¸         à         uart0-pins          ^   A   pins            ±              ¸         uart1-pins          ^   B   pins            ±  !  "         ¸         uart2-pins          ^   C   pins            ±  #  $         ¸         usb-default-pins            ^   k   pins-iddig          ±  S          à         ¸      pins-valid          ±  U         à      pins-vbus           ±  T         Å         usb1-default-pins           ^   K   pins-valid          ±  X         à      pins-usb-hub-3v3-en         ±  p          Å         usb2-default-pins           ^   g   pins-iddig          ±  Y          à         ¸         wifi-pwrseq-pins       pins-wifi-enable            ±            /            syscon@10006000       )    mediatek,mt8188-scpsys syscon simple-mfd            �     `           power-controller          !    mediatek,mt8188-power-controller                         +            :           ^   :   power-domain@0          �                         +            :           N   #   power-domain@1          �           \   $      %           cmfg alt         o   &                     +            :           N   '   power-domain@2          �           :          power-domain@3          �           :          power-domain@4          �           :                power-domain@15         �         à  \   %      %      %      %   
   %   3   %   4   %   =   %   ¹   %   ¾   (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (      (          û  ctop cam ccu img venc vdec wpe cfgck cfgxo ss-sram-cmn ss-sram-v0l0 ss-sram-v0l1 ss-sram-ve0 ss-sram-ve1 ss-sram-ifa ss-sram-cam ss-sram-v1l5 ss-sram-v1l6 ss-sram-rdr ss-iommu ss-imgcam ss-emi ss-subcmn-rdr ss-rsi ss-cmn-l4 ss-vdec1 ss-wpe ss-cvdo-ve1          o   &                     +            :      power-domain@16         �         H  \   %   »   %   À   )      )      )      )      )      )      )         A  ccfgck cfgxo ss-gals ss-cmn ss-emi ss-iommu ss-larb ss-rsi ss-bus            o   &                     +            :      power-domain@20         �         0  \   %   º   %   ¿   *      *      *      *         8  ccfgck cfgxo ss-vpp1-g5 ss-vpp1-g6 ss-vpp1-l5 ss-vpp1-l6         o   &        :          power-domain@22         �           \   +            css-vdec1-soc-l1         o   &                     +            :      power-domain@23         �           \   ,            css-vdec2-l1         o   &        :             power-domain@29         �            \   %      %      %   	   %   ½        ccam ccu bus cfgck           o   &                     +            :      power-domain@30         �         (  \   -       -      -      -      -         6  css-cam-l13 ss-cam-l14 ss-cam-mm0 ss-cam-mm1 ss-camsys           o   &                     +            :      power-domain@32         �            \   -      .       /          $  css-camb-sub ss-camb-raw ss-camb-yuv         :          power-domain@31         �           \   -      0       1          $  css-cama-sub ss-cama-raw ss-cama-yuv         :                power-domain@17         �         (  \   %   ¼   %   Á   2       2      2         &  ccfgck cfgxo ss-larb2 ss-larb3 ss-gals           o   &                     +            :      power-domain@9          �   	        \   %   @   %   ?      	  cbus hdcp            o   &        :          power-domain@18         �           o   &        :          power-domain@19         �           o   &        :             power-domain@24         �            \   3       3      3      3         0  css-ve1-larb ss-ve1-core ss-ve1-gals ss-ve1-sram         o   &        :          power-domain@21         �           \   4      4           css-wpe-l7 ss-wpe-l7pce          o   &        :                power-domain@5          �           o   &        \   5           css-pextp-fmem           :          power-domain@7          �           \   %   0   %   1        cseninf0 seninf1         :          power-domain@6          �           :          power-domain@10         �   
        \   %   E   %   D      	  cbus main            o   &                     +            :      power-domain@11         �           o   &                     +            :      power-domain@14         �           \   %   F        casm         o   &        :          power-domain@13         �           \   %   S   %      6            ca1sys intbus adspck         o   &        :          power-domain@12         �           o   &        :                power-domain@8          �           \   5         	  cethermac            o   &        :                watchdog@10007000             mediatek,mt8188-wdt         �     p                 �        r           ^   ;      syscon@1000c000       "    mediatek,mt8188-apmixedsys syscon           �     À                ë           ^   $      timer@10017000        ,    mediatek,mt8188-timer mediatek,mt6765-timer         �    p                <      	               \   7      pwrap@10024000        3    mediatek,mt8188-pwrap mediatek,mt8195-pwrap syscon          �    @                pwrap           <       ó               \   &      &          	  cspi wrap       pmic              mediatek,mt6359          T        ,           ™               "        <   Þ           ^      adc           mediatek,mt6359-auxadc          ª         audio-codec           mediatek,mt6359-codec           ¼           Ð         regulators            mediatek,mt6359-regulator      buck_vs1            ävs1         ó 5          !‘À        #             ?      buck_vgpu11       
  ädvdd_core           ó €         7        S  ˆ        #   È        h                   ?      buck_vmodem         ävmodem          ó €         Èà        S  *        #   È      buck_vpu          
  ädvdd_adsp           ó €         7        S  ˆ        #   È        h                   ?      buck_vcore          ädvdd_proc_l         ó €         Ö         S  ˆ        #   È        h                   ?      buck_vs2            ävs2         ó 5          j         #             ?      buck_vpa            ävpa_pmu         ó ¡          /M`        #  ,        ^   ]      buck_vproc2         ävgpu            ó dp         5         S  L        #   È        h                  €   '        —  j        ^   #      buck_vproc1         ävproc1          ó €         7        S  L        #   È        h                buck_vcore_sshub            ävcore_sshub         ó €         7      buck_vgpu11_sshub           ävgpu11_sshub            ó €         7      ldo_vaud18          ävaud18          ó w@         w@        #   ð      ldo_vsim1         
  ävsim1_pmu           ó ð          /M`        #  à        ^   ^      ldo_vibr            ävibr            ó O€         2Z       ldo_vrf12           äva12_abb2_pmu           ó Èà         Ö          ?      ldo_vusb            ävusb            ó -ÆÀ         -ÆÀ        #  À         ?        ^   J      ldo_vsram_proc2         ävsram_proc2         ó ¡          ½¶        S  L        #   ð         ?      ldo_vio18           ävio18           ó ð          ýà        #  À         ?        ^   b      ldo_vcamio          ävcamio          ó ð          ýà      ldo_vcn18         
  ävcn18_pmu           ó w@         w@        #   ð         ?      ldo_vfe28           ävfe28           ó *¹€         *¹€        #   x      ldo_vcn13           ävcn13           ó »          Ö       ldo_vcn33_1_bt          ävcn33_1_bt          ó *¹€         5gà        ^   s      ldo_vcn33_1_wifi            ävcn33_1_wifi            ó *¹€         5gà      ldo_vaux18          ävaux18          ó w@         w@        #   ð         ?      ldo_vsram_others          
  ävsram_gpu           ó q°         5         S  ˆ        #   ð        €   #        —  j        ^   '      ldo_vefuse          ävefuse          ó ð          „€      ldo_vxo22           ävxo22           ó w@         !‘À         ?      ldo_vrfck           ävrfck           ó ã`         ð       ldo_vrfck_1         ävrfck           ó ëÀ         j       ldo_vbif28          ävbif28          ó *¹€         *¹€        #   ð      ldo_vio28           ävio28           ó *¹€         2Z          ?      ldo_vemc            ävemc            ó ,@          2Z       ldo_vemc_1          ävemc            ó &%          2Z         ^   Y      ldo_vcn33_2_bt          ävcn33_2_pmu         ó *¹€         5gà         ?      ldo_vcn33_2_wifi            ävcn33_2_wifi            ó *¹€         5gà      ldo_va12            äva12            ó O€         Ö          ?      ldo_va09            äva09            ó 5          O€      ldo_vrf18           ävrf18           ó ð          žP      ldo_vsram_md          	  ävsram_md            ó ¡          ½¶        S  *        #   ð      ldo_vufs            ävufs18_pmu          ó ð          ýà         ?        ^   Z      ldo_vm18            ävm18            ó ð          ýà         ?      ldo_vbbck           ävbbck           ó Èà         O€         ?      ldo_vsram_proc1         ävsram_proc1         ó ¡          ½¶        S  L        #   ð         ?      ldo_vsim2           ävsim2           ó ð          /M`      ldo_vsram_others_sshub          ävsram_others_sshub          ó ¡          ½¶         rtc           mediatek,mt6358-rtc       keys              mediatek,mt6359-keys            ´           Í       power-key           à   t         ï      home            à   f               spmi@10027000         *    mediatek,mt8188-spmi mediatek,mt8195-spmi            �    p            �                pmif spmimst            ý   %   8           %   ¬        \   &      &       %   8      (  cpmif_sys_ck pmif_tmr_ck spmimst_clk_mux       iommu@10315000            mediatek,mt8188-iommu-infra         �    1P                <                     $           ^   n      mailbox@10320000              mediatek,mt8188-gce         �    2        @         <       â               1           \   &           ^   �      mailbox@10330000              mediatek,mt8188-gce         �    3        @         <       ä               1           \   &           ^   ƒ      scp@10720000              mediatek,mt8188-scp-dual            �    r                 cfg                      +                   P             Yokay       scp@0             mediatek,scp-core           �               sram            <      Î               Yokay            =   8        ^   „      scp@d0000             mediatek,scp-core           �    ð         sram            <      Ï             	  Ydisabled             audio-controller@10b10000             mediatek,mt8188-afe         �    ±                 ý   %   S           %   „      ´  \   9   $   	   $   
   %   ³   %   ´   %   µ   %   ¶   %   ¸   %   S   %      %       %   E   %   Q   %   M   %   N   %   O   %   P   6       %   „   %   †   %   ·   %   T   %   R      ÿ  cclk26m apll1 apll2 apll12_div0 apll12_div1 apll12_div2 apll12_div3 apll12_div9 top_a1sys_hp top_aud_intbus top_audio_h top_audio_local_bus top_dptx top_i2so1 top_i2so2 top_i2si1 top_i2si2 adsp_audio_26m apll1_d4 apll2_d4 apll12_div4 top_a2sys top_aud_iec          <      6               K   :           Y   ;         	  `audiosys            o   &        l   %        Yokay            =   <        ^         adsp@10b80000             mediatek,mt8188-dsp       @  �    ¸              Ð             ¸°            ¸ð                cfg sram sec bus            ý   %   D        \   %   D   %   E        caudiodsp adsp_bus           ~   =   >        …rx tx           K   :           Yokay            =   ?   @        ^         mailbox@10b86100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         �    ¸a                <      Þ               1            ^   =      mailbox@10b87100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         �    ¸q                <      ß               1            ^   >      clock-controller@10b91100             mediatek,mt8188-adsp-audio26m           �    ¹                ë           ^   6      serial@11001100       *    mediatek,mt8188-uart mediatek,mt6577-uart           �                     <       �               \   9   &         	  cbaud bus            Yokay            n   A        `default       serial@11001200       *    mediatek,mt8188-uart mediatek,mt6577-uart           �                     <       Ž               \   9   &         	  cbaud bus            Yokay            n   B        `default       serial@11001300       *    mediatek,mt8188-uart mediatek,mt6577-uart           �                     <       �               \   9   &         	  cbaud bus            Yokay            n   C        `default       serial@11001400       *    mediatek,mt8188-uart mediatek,mt6577-uart           �                     <      Ó               \   9   &         	  cbaud bus          	  Ydisabled          adc@11002000          .    mediatek,mt8188-auxadc mediatek,mt8173-auxadc           �                      \   &           cmain            ª         	  Ydisabled          syscon@11003000       "    mediatek,mt8188-pericfg-ao syscon           �     0                ë           ^   5      spi@1100a000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            �                      <       ¿               \   %   y   %      &           cparent-clk sel-clk spi-clk        	  Ydisabled          thermal-sensor@1100b000           mediatek,mt8188-lvts-ap         �     °                <       È               \   &           Y   &           �   D        œlvts-calib-data-1           ­           ^         pwm@1100e000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           �     à                \   %   '   &   /        cmain mm         <       Ë               Ã         	  Ydisabled          pwm@1100f000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           �     ð                \   %   (   &   F        cmain mm         <                     Ã           Yokay            `default         n   E        ^   ¯      spi@11010000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            �                     <       À               \   %   y   %      &   2        cparent-clk sel-clk spi-clk        	  Ydisabled          spi@11012000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            �                     <       Á               \   %   y   %      &   3        cparent-clk sel-clk spi-clk          Yokay            n   F        `default         Î          spi@11013000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            �    0                <       Â               \   %   y   %      &   4        cparent-clk sel-clk spi-clk        	  Ydisabled          spi@11018000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            �    €                <       Ã               \   %   y   %      &   8        cparent-clk sel-clk spi-clk        	  Ydisabled          spi@11019000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            �    �                <       Ä               \   %   y   %      &   9        cparent-clk sel-clk spi-clk        	  Ydisabled          usb@11201000          #    mediatek,mt8188-mtu3 mediatek,mtu3           �            -ÿ     >              	  mac ippc                                 ?                      +           <       €               ý   %   )           %   v        \   5   	   %   Å   5   
        csys_ck ref_ck mcu_ck            â   G      H            ï        ç   I  h           Yokay            þotg                     J        n   K        `default    usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          �                       mac         <       �               ý   %   *           %   v        \   5   
        csys_ck          Yokay               J                     +       hub@1             usb451,8025         �           $   L        -   "               9   M        ^   N      hub@2             usb451,8027         �           $   N        -   "               9   M        ^   L      port       endpoint            D   O        ^   y            port       endpoint            D   P        ^   x            ethernet@11021000         ;    mediatek,mt8188-gmac mediatek,mt8195-gmac snps,dwmac-5.10a          �           @         <      Ì               Tmacirq        0  \   5       5      %   A   %   B   %   C   5         .  caxi apb mac_main ptp_ref rmii_internal mac_cg           ý   %   A   %   B   %   C           %       %   ¢   %   £        K   :           d   &        u   Q        …   R        ˜   S        «           ¶           Á            Yokay          	  Îrgmii-id            ×   T        `default sleep           n   U        â   V         ì        ý   "   “            	      '  '   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-id001c.c916            �           ^   T         stmmac-axi-config           	"                                 	,           	<           ^   Q      rx-queues-config            	L            	b        ^   R   queue0           	s        	†          queue1           	s        	†          queue2           	s        	†          queue3           	s        	†             tx-queues-config            	ž            	´        ^   S   queue0           	s        	Æ            	Ô         queue1           	s        	Æ           	Ô         queue2           	s        	Æ           	Ô         queue3           	s        	Æ           	Ô               mmc@11230000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          �    #             õ                 <       ƒ                \   %      &      &      &   M      !  csource hclk source_cg crypto_clk            Yokay            `default state_uhs           n   W        â   X        	à           	êëÂ          	ø         

         
         
(         
5         
F         
N        
T H        
c   Y        
o   Z         
|      mmc@11240000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          �    $             ë                 <       ‡               \   %      &      &   $        csource hclk source_cg           ý   %              %   �        Yokay            `default state_uhs           n   [        â   \        	à           	êëÂ          
Š         
›         
¨         
¶         
F        
½   "              
c   ]        
o   ^      mmc@11250000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          �    %             æ                 <       ˆ               \   %      &      &   A        csource hclk source_cg           ý   %              %   �      	  Ydisabled          thermal-sensor@11278000           mediatek,mt8188-lvts-mcu            �    '€                <       Ê               \   &           Y   &            �   D        œlvts-calib-data-1           ­           ^         i2c@11280000              mediatek,mt8188-i2c          �    (             " €       €        <       —               
Æ           \   _       &   7      	  cmain dma                         +            Yokay            `default         n   `        Ÿ €   touchscreen@5d            goodix,gt9271           �   ]            "        
Ð   "              
ä   "               -   "               
î   a        
ü   b        `default         n   c         i2c@11281000              mediatek,mt8188-i2c          �    (            "€       €        <       ’               
Æ           \   _      &   7      	  cmain dma                         +            Yokay            `default         n   d        Ÿ €      i2c@11282000              mediatek,mt8188-i2c          �    (             "€       €        <       “               
Æ           \   _      &   7      	  cmain dma                         +            Yokay            `default         n   e        Ÿ €      clock-controller@11283000             mediatek,mt8188-imp-iic-wrap-c          �    (0                ë           ^   _      usb@112a1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           �    *       -ÿ    *>              	  mac ippc                        *        ?                      +           <                     ý   %   -           %   v        \   5      %   Ë   5           csys_ck ref_ck mcu_ck            â   f            ï        ç   I  p           Yokay            þotg         	high-speed          host                        J        `default         n   g   usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          �                       mac         <                     ý   %   .           %   v        \   5           csys_ck          Yokay               J        0   h      connector         %    gpio-usb-b-connector usb-b-connector            ˆmicro           <   "   Y           0   i         usb@112b1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           �    +       -ÿ    +>              	  mac ippc                        +        ?                      +           <                     ý   %   ,           %   v        \   5      %   É   5           csys_ck ref_ck mcu_ck            â   j            ï        ç   I  `           Yokay            þotg         	high-speed                      J        n   k        `default    usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          �                       mac         <                     ý   %   +           %   v        \   5           csys_ck          Yokay          connector         %    gpio-usb-b-connector usb-b-connector            ˆmicro           <   "   S            0   l         pcie@112f0000         *    mediatek,mt8188-pcie mediatek,mt8192-pcie           �    /                	  pcie-mac            ‚                                  E       ÿ        �pci         O                         +         0  \   &   L   &   #   &   &   &   +   &   C   5         /  cpl_250m tl_26m tl_96m tl_32k peri_26m peri_mem          ,           <                   `  `                  m                      m                     m                     m           n                       �       n      ÿÿ        ‹            â   o         	  špcie-phy            K   :           Y   ;           `mac         Yokay            `default         n   p   interrupt-controller                         ,            T        ^   m         spi@1132c000          (    mediatek,mt8188-nor mediatek,mt8186-nor         �    2À                \   %   X   5      5           cspi sf axi          ý   %   X        <      9                            +          	  Ydisabled          t-phy@11c20700        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                   Â                         +           K   :           Yokay       pcie-phy@0          �               \   %   Ä        cref         ¤           ^   o         dsi-phy@11c80000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         �    È                 \   9        ømipi_tx0_pll            ë            ¤            Yokay            ^   œ      dsi-phy@11c90000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         �    É                 \   9        ømipi_tx0_pll            ë            ¤          	  Ydisabled            ^   ¤      i2c@11e00000              mediatek,mt8188-i2c          �    à             "        €        <       ˜               
Æ           \   q       &   7      	  cmain dma                         +            Yokay            `default         n   r        Ÿ €   typec-mux@48              ite,it5205          �   H         ¯         »        Î   s   port       endpoint            D   t        ^   z               i2c@11e01000              mediatek,mt8188-i2c          �    à            "€       €        <       ”               
Æ           \   q      &   7      	  cmain dma                         +            Yokay            `default         n   u        Ÿ B@   rt1715@4e             richtek,rt1715          �   N        
Ð   "              `default         n   v        0   w   connector             usb-c-connector         ÙUSB-C           ßdual            é ˜–€        ûdual            sink                     !"�È        +"�È   altmodes       displayport         7ÿ          < G         ports                        +       port@0          �       endpoint            D   x        ^   P         port@1          �      endpoint            D   y        ^   O         port@2          �      endpoint            D   z        ^   t                     clock-controller@11e02000             mediatek,mt8188-imp-iic-wrap-w          �    à                 ë           ^   q      t-phy@11e30000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +                   ã             Yokay       usb-phy@0           �               \   %   Ê   $           cref da_ref          ¤           ^   j         t-phy@11e40000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +                   ä             Yokay       usb-phy@0           �               \   %   Æ   $           cref da_ref          ¤           ^   G      usb-phy@700         �              \   $      9        cref da_ref          ¤           ^   H         t-phy@11e80000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +                   è             Yokay       usb-phy@0           �               \   %   Ì   $           cref da_ref          ¤           ^   f         i2c@11ec0000              mediatek,mt8188-i2c          �    ì             "€       €        <       •               
Æ           \   {       &   7      	  cmain dma                         +            Yokay            `default         n   |        Ÿ €      i2c@11ec1000              mediatek,mt8188-i2c          �    ì            "        €        <       –               
Æ           \   {      &   7      	  cmain dma                         +            Yokay            `default         n   }        Ÿ €      clock-controller@11ec2000              mediatek,mt8188-imp-iic-wrap-en         �    ì                 ë           ^   {      efuse@11f20000        ,    mediatek,mt8188-efuse mediatek,mt8186-efuse         �    ò                              +      dp-calib@1a0            �              ^   ­      lvts1-calib@1ac         �  ¬   @        ^   D      gpu-speedbin@581            �  �           @               ^         socinfo-data1@7a0           �            socinfo-data2@7e0           �  à            gpu@13000000          )    mediatek,mt8370-mali arm,mali-valhall-jm            �             @         \   ~          0  <                   ~             }               Tjob mmu gpu         �         
  œspeed-bin           E   €        K   :      :           Ycore0 core1         O           Yokay            l   #        ^          clock-controller@13fbf000             mediatek,mt8188-mfgcfg          �    ûð                ë           ^   ~      syscon@14000000           mediatek,mt8188-vppsys0 syscon          �                      ë           ^   (      dma-controller@14001000           mediatek,mt8188-mdp3-rdma           �                     x           \   (         <  ~   �         �         �         �         �              ƒ   ‚   €        K   :           Š   ƒ                  ¢              ¶   „      display@14002000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         �                      \   (            Š   ƒ                 display@14004000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           �     @                \   (   "        Š   ƒ      @          display@14005000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           �     P                <      F               \   (   
        K   :           Š   ƒ      P          display@14006000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           �     `                \   (           Š   ƒ      `            ¢    %      display@14007000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           �     p                \   (   #        Š   ƒ      p          display@14008000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           �     €                <      I               \   (   $        K   :           Š   ƒ      €          display@14009000          2    mediatek,mt8188-mdp3-ovl mediatek,mt8195-mdp3-ovl           �     �                <      J               \   (   %        K   :           Š   ƒ      �            ƒ   ‚   ‚      display@1400a000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           �                      \   (           K   :           Š   ƒ                 display@1400b000          2    mediatek,mt8188-mdp3-tcc mediatek,mt8195-mdp3-tcc           �     °                \   (           Š   ƒ      °          display@1400c000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         �     À                x           \   (           ƒ   ‚   ƒ        K   :           Š   ƒ      À            ¢    +      mutex@1400f000            mediatek,mt8188-vpp-mutex           �     ð                <      P               \   (           K   :           Š   ƒ      ð          smi@14012000              mediatek,mt8188-smi-common-vpp          �                     \   (      (           capb smi         K   :           ^   …      smi@14013000              mediatek,mt8188-smi-larb            �    0                \   (      (           capb smi         K   :           Ã           Ô   …        ^   ˆ      iommu@14018000            mediatek,mt8188-iommu-vpp           �    €       P         \   (           cbclk            <      R               K   :           $           á   †   ‡   ˆ   ‰   Š   ‹        ^   ‚      dma-controller@14f09000           mediatek,mt8188-mdp3-rdma           �    ð�                x           \   *   
        ƒ   Œ   ¤        K   :           Š   ƒ   	  �            ¢  …  ©      dma-controller@14f0a000           mediatek,mt8188-mdp3-rdma           �    ð                 x           \   *           ƒ   ‚   À        K   :           Š   ƒ   	               ¢  †  ª      display@14f0c000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         �    ðÀ                \   *           Š   ƒ   	  À          display@14f0d000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         �    ðÐ                \   *           Š   ƒ   	  Ð          display@14f0f000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           �    ðð                \   *   "        Š   ƒ   	  ð          display@14f10000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           �    ñ                 \   *   $        Š   ƒ   
             display@14f12000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           �    ñ                 <      j               \   *   #        K   :           Š   ƒ   
             display@14f13000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           �    ñ0                <      k               \   *   %        K   :           Š   ƒ   
  0          display@14f15000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           �    ñP                \   *           Š   ƒ   
  P            ¢  ‘  °      display@14f16000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           �    ñ`                \   *           Š   ƒ   
  `            ¢  ’  ±      display@14f18000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           �    ñ€                \   *           Š   ƒ   
  €          display@14f19000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           �    ñ�                \   *           Š   ƒ   
  �          display@14f1a000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           �    ñ                 \   *           K   :           Š   ƒ   
             display@14f1b000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           �    ñ°                \   *           K   :           Š   ƒ   
  °          display@14f1d000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           �    ñÐ                <      u               \   *           K   :           Š   ƒ   
  Ð          display@14f1e000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           �    ñà                <      v               \   *           K   :           Š   ƒ   
  à          display@14f21000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           �    ò                \   *           K   :           Š   ƒ               display@14f22000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           �    ò                 \   *           K   :           Š   ƒ                display@14f24000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         �    ò@                x           \   *           ƒ   Œ   ¦        K   :           Š   ƒ     @            ¢     ¬      display@14f25000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         �    òP                x           \   *           ƒ   ‚   Â        K   :           Š   ƒ     P            ¢  ¡  ­      clock-controller@14e00000             mediatek,mt8188-wpesys          �    à                 ë           ^   4      clock-controller@14e02000             mediatek,mt8188-wpesys-vpp0         �    à                 ë         smi@14e04000              mediatek,mt8188-smi-larb            �    à@                \   4      4           capb smi         K   :           Ã           Ô   …        ^   Š      syscon@14f00000           mediatek,mt8188-vppsys1 syscon          �    ð                 ë           ^   *      mutex@14f01000            mediatek,mt8188-vpp-mutex           �    ð                <      {               \   *   &        K   :           Š   ƒ   	            smi@14f02000              mediatek,mt8188-smi-larb            �    ð                 \   *      *           capb smi         K   :           Ã           Ô   �        ^   ª      smi@14f03000              mediatek,mt8188-smi-larb            �    ð0                \   *      *           capb smi         K   :           Ã           Ô   …        ^   ‰      clock-controller@15000000             mediatek,mt8188-imgsys          �                      ë         clock-controller@15110000              mediatek,mt8188-imgsys1-dip-top         �                     ë           r         clock-controller@15130000             mediatek,mt8188-imgsys1-dip-nr          �                     ë           r         clock-controller@15220000             mediatek,mt8188-imgsys-wpe1         �    "                 ë           r         clock-controller@15330000             mediatek,mt8188-ipesys          �    3                 ë           r         clock-controller@15520000             mediatek,mt8188-imgsys-wpe2         �    R                 ë           r         clock-controller@15620000             mediatek,mt8188-imgsys-wpe3         �    b                 ë           r         clock-controller@16000000             mediatek,mt8188-camsys          �                      ë           ^   -      clock-controller@1604f000             mediatek,mt8188-camsys-rawa         �    ð                ë           r           ^   0      clock-controller@1606f000             mediatek,mt8188-camsys-yuva         �    ð                ë           r           ^   1      clock-controller@1608f000             mediatek,mt8188-camsys-rawb         �    ð                ë           r           ^   .      clock-controller@160af000             mediatek,mt8188-camsys-yuvb         �    
ð                ë           r           ^   /      clock-controller@17200000             mediatek,mt8188-ccusys          �                      ë         video-decoder@18000000            mediatek,mt8188-vcodec-dec           �                   @                                    `         ƒ   ‚  æ                     +           ¶   „   video-codec@10000             mediatek,mtk-vcodec-lat         �                      ý   %   4           %   x         \   %   4   +      +      %   x        csel vdec lat top            <      Ä             H  ƒ   ‚  à   ‚  á   ‚  â   ‚  ã   ‚  ä   ‚  å   ‚  æ   ‚  ç   ‚  è        K   :         video-codec@25000             mediatek,mtk-vcodec-core            �     P                ý   %   4           %   x         \   %   4   ,      ,      %   x        csel vdec lat top            <      Ã             X  ƒ   Œ  À   Œ  Á   Œ  Â   Œ  Ã   Œ  Ä   Œ  Å   Œ  Æ   Œ  Ç   Œ  È   Œ  É   Œ  Ê        K   :            smi@1800d000              mediatek,mt8188-smi-larb            �     Ð                \   +       +            capb smi         K   :           Ã           Ô   …        ^   ‹      clock-controller@1800f000             mediatek,mt8188-vdecsys-soc         �     ð                ë           ^   +      smi@1802e000              mediatek,mt8188-smi-larb            �    à                \   ,       ,            capb smi         K   :           Ã           Ô   �        ^   ¬      clock-controller@1802f000             mediatek,mt8188-vdecsys         �    ð                ë           ^   ,      clock-controller@1a000000             mediatek,mt8188-vencsys         �                      ë           ^   3      smi@1a010000              mediatek,mt8188-smi-larb            �                     \   3      3           capb smi         K   :           Ã           Ô   �        ^   «      video-encoder@1a020000            mediatek,mt8188-vcodec-enc          �                                  +           ý   %   3           %   p        \   3         	  cvenc_sel            <      a             X  ƒ   Œ      Œ  ¡   Œ  ¢   Œ  £   Œ  ¤   Œ  ¶   Œ  ·   Œ  ¸   Œ  ¹   Œ  ª   Œ  º        K   :           ¶   „      jpeg-encoder@1a030000         +    mediatek,mt8188-jpgenc mediatek,mtk-jpgenc          �                     \   3           cjpgenc          <      b                ƒ   Œ  §   Œ  ¨   Œ  ©   Œ  ¬        K   :         jpeg-decoder@1a040000         .    mediatek,mt8188-jpgdec mediatek,mt2701-jpgdec           �                     \   3       3           cjpgdec-smi jpgdec           <      c             0  ƒ   Œ  ­   Œ  ®   Œ  ²   Œ  ³   Œ  ´   Œ  µ        K   :         ovl@1c000000          2    mediatek,mt8188-disp-ovl mediatek,mt8195-disp-ovl           �                      \   )            <      |               ƒ   Œ           K   :           Š   �             ports                        +       port@0          �       endpoint            D   Ž        ^   §         port@1          �      endpoint            D   �        ^   �               rdma@1c002000         4    mediatek,mt8188-disp-rdma mediatek,mt8195-disp-rdma         �                      \   )           <      ~               ƒ   ‚            K   :           Š   �             ports                        +       port@0          �       endpoint            D   �        ^   �         port@1          �      endpoint            D   ‘        ^   ’               color@1c003000        6    mediatek,mt8188-disp-color mediatek,mt8173-disp-color           �     0                \   )           <                     K   :           Š   �     0       ports                        +       port@0          �       endpoint            D   ’        ^   ‘         port@1          �      endpoint            D   “        ^   ”               ccorr@1c004000        6    mediatek,mt8188-disp-ccorr mediatek,mt8192-disp-ccorr           �     @                \   )           <      €               K   :           Š   �     @       ports                        +       port@0          �       endpoint            D   ”        ^   “         port@1          �      endpoint            D   •        ^   –               aal@1c005000          2    mediatek,mt8188-disp-aal mediatek,mt8183-disp-aal           �     P                \   )           <      �               K   :           Š   �     P       ports                        +       port@0          �       endpoint            D   –        ^   •         port@1          �      endpoint            D   —        ^   ˜               gamma@1c006000        6    mediatek,mt8188-disp-gamma mediatek,mt8195-disp-gamma           �     `                \   )           <      ‚               K   :           Š   �     `       ports                        +       port@0          �       endpoint            D   ˜        ^   —         port@1          �      endpoint            D   ™        ^   ¥               dither@1c007000       8    mediatek,mt8188-disp-dither mediatek,mt8183-disp-dither         �     p                \   )           <      ƒ               K   :           Š   �     p       ports                        +       port@0          �       endpoint            D   š        ^   ¦         port@1          �      endpoint            D   ›        ^   ¢               dsi@1c008000              mediatek,mt8188-dsi         �     €                \   )      )      œ        cengine digital hs           <      „               â   œ        šdphy            K   :           Y   )           Yokay                         +       panel@0       #    startek,kd070fhfid078 himax,hx8279          �            ð   �        ú   "   -            -   "                  ž        9   Ÿ        `default         n       port       endpoint            D   ¡        ^   £            ports                        +       port@0          �       endpoint            D   ¢        ^   ›         port@1          �      endpoint            D   £        ^   ¡               dsc@1c009000          2    mediatek,mt8188-disp-dsc mediatek,mt8195-disp-dsc           �     �                \   )   
        <      …               K   :           Š   �     �          dsi@1c012000              mediatek,mt8188-dsi         �                     \   )   	   )      ¤        cengine digital hs           <      Ž               â   ¤        šdphy            K   :           Y   )   	      	  Ydisabled          merge0@1c014000       6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           �    @                \   )      2           cmerge merge_async           <      �               K   :           Š   �     @          dp-intf@1c015000              mediatek,mt8188-dp-intf         �    P                \   )       )      $           cpixel engine pll            <      ‘               K   :         	  Ydisabled          mutex@1c016000            mediatek,mt8188-disp-mutex          �    `                \   )           <      ’               K   :           Š   �     `            ¢  >      postmask@1c01a000         <    mediatek,mt8188-disp-postmask mediatek,mt8192-disp-postmask         �                     \   )           <      •               K   :           Š   �             ports                        +       port@0          �       endpoint            D   ¥        ^   ™         port@1          �      endpoint            D   ¦        ^   š               syscon@1c01d000           mediatek,mt8188-vdosys0 syscon          �    Ð                ë           r           ~   �               Š   �     Ð            ^   )   port                         +       endpoint@0          �            D   §        ^   Ž            smi@1c022000              mediatek,mt8188-smi-larb            �                     \   )      )           capb smi         K   :           Ã            Ô   �        ^   ¨      smi@1c023000              mediatek,mt8188-smi-larb            �    0                \   )      )           capb smi         K   :           Ã           Ô   …        ^   †      smi@1c024000              mediatek,mt8188-smi-common-vdo          �    @                \   )      )           capb smi         K   :           ^   �      iommu@1c028000            mediatek,mt8188-iommu-vdo           �    €       P         \   )           cbclk            <      ¡               K   :           $           á   ¨   ©   ª   «   ¬        ^   Œ      syscon@1c100000           mediatek,mt8188-vdosys1 syscon          �                     ë           r           ~   �              Š   �                  ^   2      mutex@1c101000            mediatek,mt8188-disp-mutex          �                    \   2           <      î               K   :           Š   �                 ¢  Å      smi@1c102000              mediatek,mt8188-smi-larb            �                     \   2       2            capb smi         K   :           Ã           Ô   �        ^   ©      smi@1c103000              mediatek,mt8188-smi-larb            �    0                \   2      2           capb smi         K   :           Ã           Ô   …        ^   ‡      rdma@1c104000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �    @                \   2           <      ï               ƒ   Œ   @        K   :           x           Š   �     @          rdma@1c105000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �    P                \   2           <      ð               ƒ   ‚   `        K   :           x           Š   �     P          rdma@1c106000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �    `                \   2           <      ñ               ƒ   Œ   A        K   :           x           Š   �     `          rdma@1c107000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �    p                \   2           <      ò               ƒ   ‚   a        K   :           x           Š   �     p          rdma@1c108000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �    €                \   2           <      ó               ƒ   Œ   B        K   :           x           Š   �     €          rdma@1c109000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �    �                \   2           <      ô               ƒ   ‚   b        K   :           x           Š   �     �          rdma@1c10a000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �                     \   2           <      õ               ƒ   Œ   C        K   :           x           Š   �                rdma@1c10b000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         �    °                \   2           <      ö               ƒ   ‚   c        K   :           x           Š   �     °          merge@1c10c000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           �    À                \   2   	   2           cmerge merge_async           <      ÷               K   :           Y   2           Š   �     À                   merge@1c10d000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           �    Ð                \   2   
   2           cmerge merge_async           <      ø               K   :           Y   2           Š   �     Ð                   merge@1c10e000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           �    à                \   2      2           cmerge merge_async           <      ù               K   :           Y   2           Š   �     à                   merge@1c10f000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           �    ð                \   2      2           cmerge merge_async           <      ú               K   :           Y   2           Š   �     ð                   merge@1c110000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           �                     \   2      2           cmerge merge_async           <      û               K   :           Y   2           Š   �                   (      dp-intf@1c113000              mediatek,mt8188-dp-intf         �    0                \   2   :   2      $           cpixel engine pll            <                     K   :         	  Ydisabled          ethdr@1c114000        6    mediatek,mt8188-disp-ethdr mediatek,mt8195-disp-ethdr         p  �    @            P            p            �                         °            À              4  mixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds       h  \   2   0   2   +   2   .   2   ,   2   /   2   -   2   <   2   1   2   2   2   3   2   4   2   5   %         ƒ  cmixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds vdo_fe0_async vdo_fe1_async gfx_fe0_async gfx_fe1_async vdo_be_async ethdr_top          <      6               ƒ   ‚   d   ‚   e        K   :         (  Y   2   1   2   2   2   3   2   4   2   5      p  Š   �     @       �     P       �     p       �     �       �             �     °       �     À          padding@1c11d000              mediatek,mt8188-disp-padding            �    Ð                \   2           K   :           Š   �     Ð          padding@1c11e000              mediatek,mt8188-disp-padding            �    à                \   2            K   :           Š   �     à          padding@1c11f000              mediatek,mt8188-disp-padding            �    ð                \   2   !        K   :           Š   �     ð          padding@1c120000              mediatek,mt8188-disp-padding            �                     \   2   "        K   :           Š   �                padding@1c121000              mediatek,mt8188-disp-padding            �                    \   2   #        K   :           Š   �               padding@1c122000              mediatek,mt8188-disp-padding            �                     \   2   $        K   :           Š   �                padding@1c123000              mediatek,mt8188-disp-padding            �    0                \   2   %        K   :           Š   �     0          padding@1c124000              mediatek,mt8188-disp-padding            �    @                \   2   &        K   :           Š   �     @          edp-tx@1c500000           mediatek,mt8188-edp-tx          �    P        €         <      ¤               �   ­        œdp_calibration_data         K   :           ?  ¤      	  Ydisabled          dp-tx@1c600000            mediatek,mt8188-dp-tx           �    `        €         <      Ê               �   ­        œdp_calibration_data         K   :           ?        	  Ydisabled             backlight-lcm1            pwm-backlight           P      ÿ        b  @        {  ÿ        ’   ®        Ÿ   ¯     ¡         ^   �      chosen          ¤serial0:921600n8          dmic-codec          ™              dmic-codec          °           ½           ^         firmware       optee             linaro,optee-tz         ˜smc          reserved-memory                      +               optee@43200000           Í        �    C        À        memory@50000000           shared-dma-pool         �    P       �           Í        ^   8      memory@54600000          Í        �    T`                memory@55000000           shared-dma-pool         �    U       @        memory@57000000           shared-dma-pool         �    W       @        memory@60000000           shared-dma-pool         �    `        ð           Í        ^   @      memory@60f00000           shared-dma-pool         �    `ð                  Í        ^   <      memory@61000000           shared-dma-pool         �    a                   Í        ^   ?         regulator-0           regulator-fixed         ävdd_5v          ó LK@         LK@        	   "   
             Ô         ?        ç   ®      regulator-1           regulator-fixed       	  ävedp_3v3            ó 2Z          2Z          Ô        	   "               `default         n   °        ç   ®      regulator-2           regulator-fixed         äext_3v3         ó 2Z          2Z         	   "   	             Ô         ?        ç   ®      regulator-vsys            regulator-fixed         ävsys             ?         ò        ^   ®      regulator-3           regulator-fixed         ävio18_conn          ó w@         w@         Ô         ?      regulator-4           regulator-fixed       	  äwifi_3v3            ó 2Z          2Z         	   "   J             Ô         ?        ç   ®        ^   h      regulator-5           regulator-fixed       
  ävio33_tp1           ó 2Z          2Z         	   "   w             Ô        ç   ®        `default         n   ±        ^   a      regulator-6           regulator-fixed       	  ävhub_3v3            ó 2Z          2Z         	   "   p              '         Ô        ç   ®        ^   M      regulator-7           regulator-fixed         ävbus_p0         ó LK@         LK@        	   "   T             Ô        ç   ®        ^   l      regulator-8           regulator-fixed         ävbus_p1         ó LK@         LK@        	   "   W             Ô        ç   ®        ^   w      regulator-9           regulator-fixed         ävbus_p2         ó LK@         LK@         Ô        ^   i      regulator-vio18-lcm1              regulator-fixed         ävio18_lcm1          ó w@         w@         Ô        	   "   o            `default         n   ²        ç   ®        ^   ž      regulator-vsys-lcm1           regulator-fixed       
  ävsys_lcm1           ó @@         @@         ?         ò        ç   ®        ^   Ÿ      memory@40000000         �memory          �    @                   	compatible interrupt-parent #address-cells #size-cells model dp-intf0 dp-intf1 dsc0 ethdr0 gce0 gce1 merge0 merge1 merge2 merge3 merge4 merge5 mutex0 mutex1 padding0 padding1 padding2 padding3 padding4 padding5 padding6 padding7 vdo1-rdma0 vdo1-rdma1 vdo1-rdma2 vdo1-rdma3 vdo1-rdma4 vdo1-rdma5 vdo1-rdma6 vdo1-rdma7 dsi0 ethernet0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 mmc0 mmc1 serial0 device_type reg enable-method clock-frequency capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache performance-domains #cooling-cells phandle cpu entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-output-names opp-shared opp-hz opp-microvolt opp-supported-hw interrupts mediatek,platform status pinctrl-names pinctrl-0 audio-routing mediatek,adsp link-name sound-dai polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device dma-ranges #performance-domain-cells #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-up output-high drive-strength input-enable input-disable bias-disable drive-strength-microamp bias-pull-down output-low #power-domain-cells domain-supply clocks clock-names mediatek,infracfg mediatek,disable-extrst #sound-dai-cells #io-channel-cells mediatek,mic-type-0 mediatek,mic-type-1 regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-always-on regulator-ramp-delay regulator-allowed-modes regulator-coupled-with regulator-coupled-max-spread mediatek,long-press-mode power-off-time-sec linux,keycodes wakeup-source assigned-clocks assigned-clock-parents #iommu-cells #mbox-cells memory-region power-domains resets reset-names mediatek,topckgen mboxes mbox-names nvmem-cells nvmem-cell-names #thermal-sensor-cells #pwm-cells mediatek,pad-select phys mediatek,syscon-wakeup dr_mode usb-role-switch vusb33-supply peer-hub reset-gpios vdd-supply remote-endpoint interrupt-names mediatek,pericfg snps,axi-config snps,mtl-rx-config snps,mtl-tx-config snps,txpbl snps,rxpbl snps,clk-csr phy-mode phy-handle pinctrl-1 mediatek,mac-wol snps,reset-gpio snps,reset-delays-us snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,rx-sched-sp snps,dcb-algorithm snps,map-to-dma-channel snps,tx-queues-to-use snps,tx-sched-wrr snps,priority snps,weight bus-width max-frequency cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe cap-mmc-hw-reset no-sdio no-sd hs400-ds-delay vmmc-supply vqmmc-supply non-removable cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 no-mmc cd-gpios clock-div interrupts-extended irq-gpios AVDD28-supply VDDIO-supply maximum-speed role-switch-default-mode vbus-supply id-gpios bus-range linux,pci-domain interrupt-map interrupt-map-mask iommu-map iommu-map-mask phy-names #phy-cells mode-switch orientation-switch vcc-supply label data-role op-sink-microwatt power-role try-power-role pd-revision sink-pdos source-pdos svid vdo bits operating-points-v2 power-domain-names mali-supply #dma-cells iommus mediatek,gce-client-reg mediatek,gce-events mediatek,scp mediatek,larb-id mediatek,smi mediatek,larbs backlight enable-gpios iovcc-supply mediatek,merge-mute mediatek,merge-fifo-en max-linkrate-mhz brightness-levels default-brightness-level num-interpolated-steps power-supply pwms stdout-path num-channels wakeup-delay-ms no-map enable-active-high vin-supply regulator-boot-on startup-delay-us 