Ðþí  ‚×   8  |h   (            o  |0                             &    firefly,roc-rk3308-cc rockchip,rk3308                                    +            7Firefly ROC-RK3308-CC board    aliases          =/pinctrl/gpio@ff220000           C/pinctrl/gpio@ff230000           I/pinctrl/gpio@ff240000           O/pinctrl/gpio@ff250000           U/pinctrl/gpio@ff260000           [/i2c@ff040000            `/i2c@ff050000            e/i2c@ff060000            j/i2c@ff070000            o/serial@ff0a0000             w/serial@ff0b0000             /serial@ff0c0000             ‡/serial@ff0d0000             �/serial@ff0e0000             —/spi@ff120000            œ/spi@ff130000            ¡/spi@ff140000            ¦/mmc@ff480000            «/mmc@ff490000         cpus                         +       cpu@0            °cpu           arm,cortex-a35           ¼                 Àpsci             Î               Õ            ä   Z         þ                      "           3           >         cpu@1            °cpu           arm,cortex-a35           ¼                Àpsci             þ                      "           >         cpu@2            °cpu           arm,cortex-a35           ¼                Àpsci             þ                      "           >   	      cpu@3            °cpu           arm,cortex-a35           ¼                Àpsci             þ                      "           >   
      idle-states         Fpsci       cpu-sleep             arm,idle-state           S        d           {   x        Œ   ú        œ  „        >            l2-cache              cache           ­            ¹        >            opp-table-0           operating-points-v2          Ç        >      opp-408000000           Ò    Q–         Ù ~ð ~ð r`        ç  œ@         ø      opp-600000000           Ò    #ÃF         Ù ~ð ~ð r`        ç  œ@      opp-816000000           Ò    0£,         Ù £è £è r`        ç  œ@      opp-1008000000          Ò    <Ü         Ù *ˆ *ˆ r`        ç  œ@         arm-pmu           arm,cortex-a35-pmu        0         S          T          U          V                    	   
      external-mac-clock            fixed-clock         "úð€      
  2mac_clkin           E          psci              arm,psci-1.0             Çsmc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock         E            "n6         2xin24m          >   R      grf@ff000000          &    rockchip,rk3308-grf syscon simple-mfd            ¼    ÿ         €         >   5   io-domains        "    rockchip,rk3308-io-voltage-domain         	  Rdisabled          reboot-mode           syscon-reboot-mode          Y           `RBÃ        pRBÃ        |RBÃ         ˆRBÃ        –RBÃ	         syscon@ff008000       .    rockchip,rk3308-usb2phy-grf syscon simple-mfd            ¼    ÿ €       @                      +      usb2phy@100           rockchip,rk3308-usb2phy          ¼              ¤              ´            Î      H        Ëphyclk          2usb480m_phy         E          	  Rdisabled            >      otg-port          $         C          D          E           ×otg-bvalid otg-id linestate         ç          	  Rdisabled            >   ;      host-port                  J         
  ×linestate           ç          	  Rdisabled            >   <            syscon@ff00b000       -    rockchip,rk3308-detect-grf syscon simple-mfd             ¼    ÿ °                             +         syscon@ff00c000       +    rockchip,rk3308-core-grf syscon simple-mfd           ¼    ÿ À                             +         i2c@ff040000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c          ¼    ÿ                  Î            Ê      	  Ëi2c pclk                              òdefault                                  +          	  Rdisabled          i2c@ff050000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c          ¼    ÿ                  Î            Ë      	  Ëi2c pclk                              òdefault                                  +            Rokay            " €   rtc@51            nxp,pcf8563          ¼   Q        E             i2c@ff060000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c          ¼    ÿ                  Î            Ì      	  Ëi2c pclk                              òdefault                                  +          	  Rdisabled          i2c@ff070000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c          ¼    ÿ                  Î            Í      	  Ëi2c pclk                              òdefault                                  +          	  Rdisabled          watchdog@ff080000              rockchip,rk3308-wdt snps,dw-wdt          ¼    ÿ                  Î      Ö               
         	  Rdisabled          serial@ff0a0000       &    rockchip,rk3308-uart snps,dw-apb-uart            ¼    ÿ
                                    Î            Å        Ëbaudclk apb_pclk            
                      òdefault                         	  Rdisabled          serial@ff0b0000       &    rockchip,rk3308-uart snps,dw-apb-uart            ¼    ÿ                                    Î            Æ        Ëbaudclk apb_pclk            
                      òdefault                         	  Rdisabled          serial@ff0c0000       &    rockchip,rk3308-uart snps,dw-apb-uart            ¼    ÿ                                    Î            Ç        Ëbaudclk apb_pclk            
                      òdefault                     Rokay          serial@ff0d0000       &    rockchip,rk3308-uart snps,dw-apb-uart            ¼    ÿ                                    Î            È        Ëbaudclk apb_pclk            
                      òdefault                   	  Rdisabled          serial@ff0e0000       &    rockchip,rk3308-uart snps,dw-apb-uart            ¼    ÿ                                    Î            É        Ëbaudclk apb_pclk            
                      òdefault                         	  Rdisabled          spi@ff120000          (    rockchip,rk3308-spi rockchip,rk3066-spi          ¼    ÿ                                                +             Î            Ï        Ëspiclk apb_pclk         !                     &tx rx           òdefault                            	  Rdisabled          spi@ff130000          (    rockchip,rk3308-spi rockchip,rk3066-spi          ¼    ÿ                                                +             Î            Ð        Ëspiclk apb_pclk         !                    &tx rx           òdefault                 !   "   #      	  Rdisabled          spi@ff140000          (    rockchip,rk3308-spi rockchip,rk3066-spi          ¼    ÿ                                                +             Î            Ñ        Ëspiclk apb_pclk         !   $      $           &tx rx           òdefault             %   &   '   (      	  Rdisabled          pwm@ff160000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                  Î      y      è      	  Ëpwm pclk            òdefault             )        0         	  Rdisabled          pwm@ff160010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                 Î      y      è      	  Ëpwm pclk            òdefault             *        0         	  Rdisabled          pwm@ff160020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                  Î      y      è      	  Ëpwm pclk            òdefault             +        0         	  Rdisabled          pwm@ff160030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ 0                Î      y      è      	  Ëpwm pclk            òdefault             ,        0         	  Rdisabled          pwm@ff170000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                  Î      x      ç      	  Ëpwm pclk            òdefault             -        0         	  Rdisabled          pwm@ff170010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                 Î      x      ç      	  Ëpwm pclk            òdefault             .        0           Rokay            >   `      pwm@ff170020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                  Î      x      ç      	  Ëpwm pclk            òdefault             /        0         	  Rdisabled          pwm@ff170030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ 0                Î      x      ç      	  Ëpwm pclk            òdefault             0        0         	  Rdisabled          pwm@ff180000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                  Î            Î      	  Ëpwm pclk            òdefault             1        0           Rokay            >   e      pwm@ff180010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                 Î            Î      	  Ëpwm pclk            òdefault             2        0         	  Rdisabled          pwm@ff180020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ                  Î            Î      	  Ëpwm pclk            òdefault             3        0         	  Rdisabled          pwm@ff180030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm          ¼    ÿ 0                Î            Î      	  Ëpwm pclk            òdefault             4        0         	  Rdisabled          rktimer@ff1a0000              rockchip,rk3288-timer            ¼    ÿ                                     Î      Ô              Ëpclk timer        saradc@ff1e0000       .    rockchip,rk3308-saradc rockchip,rk3399-saradc            ¼    ÿ                        %            Î      %      Ò        Ësaradc apb_pclk         ;           M      F        Tsaradc-apb        	  Rdisabled          efuse@ff210000            rockchip,rk3308-otp          ¼    ÿ!        @                      +            Î      '      Õ      å        Ëotp apb_pclk phy            M      T        Tphy    id@7             ¼            cpu-leakage@17           ¼            logic-leakage@18             ¼               dma-controller@ff2c0000           arm,pl330 arm,primecell          ¼    ÿ,        @                                       `         Î      Š      	  Ëapb_pclk            w           >         dma-controller@ff2d0000           arm,pl330 arm,primecell          ¼    ÿ-        @                                      `         Î      ‹      	  Ëapb_pclk            w           >   $      i2s@ff320000              rockchip,rk3308-i2s-tdm          ¼    ÿ2                        2           Ëmclk_tx mclk_rx hclk             Î      T      V      ¦        !   $      $           &rx tx           M      �      �      
  Ttx-m rx-m           ‚   5      	  Rdisabled          i2s@ff330000              rockchip,rk3308-i2s-tdm          ¼    ÿ3                        3           Ëmclk_tx mclk_rx hclk             Î      X      Z      §        !   $           &rx          M      ’      “      
  Ttx-m rx-m           ‚   5      	  Rdisabled          i2s@ff350000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s          ¼    ÿ5                        4            Î      \      ¨        Ëi2s_clk i2s_hclk            !   $      $   	        &tx rx           M      •      ”        Treset-m reset-h         òdefault             6   7   8   9      	  Rdisabled          i2s@ff360000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s          ¼    ÿ6                        5            Î      ^      ©        Ëi2s_clk i2s_hclk            !   $           &rx          M      —      –        Treset-m reset-h       	  Rdisabled          spdif-tx@ff3a0000         ,    rockchip,rk3308-spdif rockchip,rk3066-spdif          ¼    ÿ:                        7            Î      b      ¢      
  Ëmclk hclk           !   $           &tx          òdefault             :      	  Rdisabled          usb@ff400000          2    rockchip,rk3308-usb rockchip,rk3066-usb snps,dwc2            ¼    ÿ@                        B            Î      ž        Ëotg         �otg         —           ©          ¸      €   €   @               Ç   ;      	  Ìusb2-phy          	  Rdisabled          usb@ff440000              generic-ehci             ¼    ÿD                        G            Î      Ÿ                  Ç   <        Ìusb       	  Rdisabled          usb@ff450000              generic-ohci             ¼    ÿE                        H            Î      Ÿ                  Ç   <        Ìusb       	  Rdisabled          mmc@ff480000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc          ¼    ÿH        @                L           Ö             Î      š      0      1      2        Ëbiu ciu ciu-drive ciu-sample            à           ëðÑ€        òdefault             =   >   ?   @        Rokay             ù                   ,         .         ;         H        V   A        b   B      mmc@ff490000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc          ¼    ÿI        @                M           Ö             Î      œ      :      ;      <        Ëbiu ciu ciu-drive ciu-sample            à           ëðÑ€        Rokay             ù         o         ~      mmc@ff4a0000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc          ¼    ÿJ        @                N           Ö             Î      ›      5      6      7        Ëbiu ciu ciu-drive ciu-sample            à           ëðÑ€        òdefault             C   D   E      	  Rdisabled          nand-controller@ff4b0000          (    rockchip,rk3308-nfc rockchip,rv1108-nfc          ¼    ÿK        @                Q            Î      ™      -        Ëahb nfc         ¤      -        ŒðÑ€            F   G   H   I   J   K   L        òdefault       	  Rdisabled          ethernet@ff4e0000             rockchip,rk3308-gmac             ¼    ÿN                        @           ×macirq        @   Î      @      B      B      A      @      †      Ã      C      [  Ëstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed          ¡rmii            òdefault             M   N        M      }      
  Tstmmaceth           ‚   5      	  Rdisabled          spi@ff4c0000              rockchip,sfc             ¼    ÿL        @                R            Î      =      �        Ëclk_sfc hclk_sfc                O   P   Q        òdefault       	  Rdisabled          clock-controller@ff500000             rockchip,rk3308-cru          ¼    ÿP                  Î   R        Ëxin24m          ‚   5        E           ª           ¤              Œ  €         >         codec@ff560000            rockchip,rk3308-codec            ¼    ÿV                 ‚   5        Ëmclk_tx mclk_rx hclk             Î      U      W      Ä        Tcodec           M      ™        ·          	  Rdisabled          interrupt-controller@ff580000             arm,gic-400       @   ¼    ÿX            ÿX              ÿX@             ÿX`                       	           È            Ù                     >         sram@fff80000         
    mmio-sram            ¼    ÿø                 î        ÿø                          +      ddr-sram@0           ¼      €       vad-sram@8000            ¼  €  €          pinctrl           rockchip,rk3308-pinctrl         ‚   5                     +            î        òdefault             S   gpio@ff220000             rockchip,gpio-bank           ¼    ÿ"                        (            Î      ×         õ                    Ù        È           >   ^      gpio@ff230000             rockchip,gpio-bank           ¼    ÿ#                        )            Î      Ø         õ                    Ù        È         gpio@ff240000             rockchip,gpio-bank           ¼    ÿ$                        *            Î      Ù         õ                    Ù        È         gpio@ff250000             rockchip,gpio-bank           ¼    ÿ%                        +            Î      Ú         õ                    Ù        È         gpio@ff260000             rockchip,gpio-bank           ¼    ÿ&                        ,            Î      Û         õ                    Ù        È           >   c      pcfg-pull-up                     >   ]      pcfg-pull-down                   >   Z      pcfg-pull-none           -        >   V      pcfg-pull-none-2ma           -        :         pcfg-pull-up-2ma                     :         pcfg-pull-up-4ma                     :           >   \      pcfg-pull-none-4ma           -        :           >   [      pcfg-pull-down-4ma                   :         pcfg-pull-none-8ma           -        :           >   T      pcfg-pull-up-8ma                     :           >   U      pcfg-pull-none-12ma          -        :           >   X      pcfg-pull-up-12ma                    :           >   W      pcfg-pull-none-smt           -         I        >   Y      pcfg-output-high             ^      pcfg-output-low          j      pcfg-input-high                   u      pcfg-input           u      emmc       emmc-clk            ‚      	      T      emmc-cmd            ‚            U      emmc-pwren          ‚            V      emmc-rstn           ‚      
      V      emmc-bus1           ‚             U      emmc-bus4         @  ‚             U            U            U            U      emmc-bus8         €  ‚             U            U            U            U            U            U            U            U         flash      flash-csn0          ‚            V        >   I      flash-rdy           ‚            V        >   K      flash-ale           ‚            V        >   F      flash-cle           ‚      	      V        >   H      flash-wrn           ‚            V        >   L      flash-rdn           ‚      
      V        >   J      flash-bus8        €  ‚             W            W            W            W            W            W            W            W        >   G         sfc    sfc-bus4          @  ‚             V            V            V            V        >   Q      sfc-bus2             ‚             V            V      sfc-cs0         ‚            V        >   P      sfc-clk         ‚            V        >   O         gmac       rmii-pins         �  ‚            X            X            X            V            V            V            V            V            V        >   M      mac-refclk-12ma         ‚            X        >   N      mac-refclk          ‚            V         gmac-m1    rmiim1-pins       �  ‚            X            X            X            V            V             V            V            V            V      macm1-refclk-12ma           ‚            X      macm1-refclk            ‚            V         i2c0       i2c0-xfer            ‚            Y            Y        >            i2c1       i2c1-xfer            ‚             Y             Y        >            i2c2       i2c2-xfer            ‚            Y            Y        >            i2c3-m0    i2c3m0-xfer          ‚             Y             Y        >            i2c3-m1    i2c3m1-xfer          ‚            Y            Y         i2c3-m2    i2c3m2-xfer          ‚            Y             Y         i2s_2ch_0      i2s-2ch-0-mclk          ‚            V      i2s-2ch-0-sclk          ‚            V        >   6      i2s-2ch-0-lrck          ‚            V        >   7      i2s-2ch-0-sdo           ‚            V        >   9      i2s-2ch-0-sdi           ‚            V        >   8         i2s_8ch_0      i2s-8ch-0-mclk          ‚            V      i2s-8ch-0-sclktx            ‚            V      i2s-8ch-0-sclkrx            ‚            V      i2s-8ch-0-lrcktx            ‚            V      i2s-8ch-0-lrckrx            ‚            V      i2s-8ch-0-sdo0          ‚      	      V      i2s-8ch-0-sdo1          ‚      
      V      i2s-8ch-0-sdo2          ‚            V      i2s-8ch-0-sdo3          ‚            V      i2s-8ch-0-sdi0          ‚            V      i2s-8ch-0-sdi1          ‚            V      i2s-8ch-0-sdi2          ‚            V      i2s-8ch-0-sdi3          ‚            V         i2s_8ch_1_m0       i2s-8ch-1-m0-mclk           ‚            V      i2s-8ch-1-m0-sclktx         ‚            V      i2s-8ch-1-m0-sclkrx         ‚            V      i2s-8ch-1-m0-lrcktx         ‚            V      i2s-8ch-1-m0-lrckrx         ‚            V      i2s-8ch-1-m0-sdo0           ‚            V      i2s-8ch-1-m0-sdo1-sdi3          ‚            V      i2s-8ch-1-m0-sdo2-sdi2          ‚      	      V      i2s-8ch-1-m0-sdo3_sdi1          ‚      
      V      i2s-8ch-1-m0-sdi0           ‚            V         i2s_8ch_1_m1       i2s-8ch-1-m1-mclk           ‚            V      i2s-8ch-1-m1-sclktx         ‚            V      i2s-8ch-1-m1-sclkrx         ‚            V      i2s-8ch-1-m1-lrcktx         ‚            V      i2s-8ch-1-m1-lrckrx         ‚            V      i2s-8ch-1-m1-sdo0           ‚            V      i2s-8ch-1-m1-sdo1-sdi3          ‚            V      i2s-8ch-1-m1-sdo2-sdi2          ‚            V      i2s-8ch-1-m1-sdo3_sdi1          ‚            V      i2s-8ch-1-m1-sdi0           ‚            V         pdm_m0     pdm-m0-clk          ‚            V      pdm-m0-sdi0         ‚            V      pdm-m0-sdi1         ‚      
      V      pdm-m0-sdi2         ‚      	      V      pdm-m0-sdi3         ‚            V         pdm_m1     pdm-m1-clk          ‚            V      pdm-m1-sdi0         ‚            V      pdm-m1-sdi1         ‚            V      pdm-m1-sdi2         ‚            V      pdm-m1-sdi3         ‚            V         pdm_m2     pdm-m2-clkm         ‚            V      pdm-m2-clk          ‚            V      pdm-m2-sdi0         ‚            V      pdm-m2-sdi1         ‚            V      pdm-m2-sdi2         ‚            V      pdm-m2-sdi3         ‚            V         pwm0       pwm0-pin            ‚             V      pwm0-pin-pull-down          ‚             Z        >   1         pwm1       pwm1-pin            ‚             V        >   2      pwm1-pin-pull-down          ‚             Z         pwm2       pwm2-pin            ‚             V        >   3      pwm2-pin-pull-down          ‚             Z         pwm3       pwm3-pin            ‚             V        >   4      pwm3-pin-pull-down          ‚             Z         pwm4       pwm4-pin            ‚             V        >   -      pwm4-pin-pull-down          ‚             Z         pwm5       pwm5-pin            ‚             V      pwm5-pin-pull-down          ‚             Z        >   .         pwm6       pwm6-pin            ‚             V        >   /      pwm6-pin-pull-down          ‚             Z         pwm7       pwm7-pin            ‚            V        >   0      pwm7-pin-pull-down          ‚            Z         pwm8       pwm8-pin            ‚      
      V        >   )      pwm8-pin-pull-down          ‚      
      Z         pwm9       pwm9-pin            ‚            V        >   *      pwm9-pin-pull-down          ‚            Z         pwm10      pwm10-pin           ‚            V        >   +      pwm10-pin-pull-down         ‚            Z         pwm11      pwm11-pin           ‚            V        >   ,      pwm11-pin-pull-down         ‚            Z         rtc    rtc-32k         ‚             V        >   S         sdmmc      sdmmc-clk           ‚            [        >   =      sdmmc-cmd           ‚            \        >   >      sdmmc-det           ‚             \        >   ?      sdmmc-pwren         ‚            [      sdmmc-bus1          ‚            \      sdmmc-bus4        @  ‚            \            \            \            \        >   @         sdio       sdio-clk            ‚            T        >   E      sdio-cmd            ‚            U        >   D      sdio-pwren          ‚             T      sdio-wrpt           ‚             T      sdio-intn           ‚              T      sdio-bus1           ‚             U      sdio-bus4         @  ‚             U            U            U            U        >   C         spdif_in       spdif-in            ‚             V         spdif_out      spdif-out           ‚             V        >   :         spi0       spi0-clk            ‚            \        >         spi0-csn0           ‚            \        >         spi0-miso           ‚             \        >         spi0-mosi           ‚            \        >            spi1       spi1-clk            ‚            \        >          spi1-csn0           ‚            \        >   !      spi1-miso           ‚      
      \        >   "      spi1-mosi           ‚            \        >   #         spi1-m1    spi1m1-miso         ‚            \      spi1m1-mosi         ‚            \      spi1m1-clk          ‚            \      spi1m1-csn0         ‚      	      \         spi2       spi2-clk            ‚            \        >   %      spi2-csn0           ‚            \        >   &      spi2-miso           ‚            \        >   '      spi2-mosi           ‚            \        >   (         tsadc      tsadc-otp-pin           ‚       
       V      tsadc-otp-out           ‚       
      V         uart0      uart0-xfer           ‚            ]             ]        >         uart0-cts           ‚            V        >         uart0-rts           ‚            V        >         uart0-rts-pin           ‚             V         uart1      uart1-xfer           ‚            ]            ]        >         uart1-cts           ‚            V        >         uart1-rts           ‚            V        >            uart2-m0       uart2m0-xfer             ‚            ]            ]        >            uart2-m1       uart2m1-xfer             ‚            ]            ]         uart3      uart3-xfer           ‚            ]            ]        >            uart3-m1       uart3m1-xfer             ‚             ]             ]         uart4      uart4-xfer           ‚      	      ]            ]        >         uart4-cts           ‚            V        >         uart4-rts           ‚            V        >         uart4-rts-pin           ‚             V         ir-receiver    ir-recv-pin         ‚              V        >   _         buttons    pwr-key         ‚              ]            chosen          �serial2:1500000n8         ir-receiver           gpio-ir-receiver            œ   ^               òdefault             _      ir_tx         
    pwm-ir-tx           ¢   `      a¨          leds          
    gpio-leds      led-0           §firefly:red:power           ­default-on          Ãon          œ   ^             led-1           §firefly:blue:user           ­rc-feedback         Ãoff         œ   ^   
             regulator-typec-vcc5v             regulator-fixed         Ñtypec_vcc5v         à LK@        ø LK@                  $        >   a      regulator-vcc5v0-sys              regulator-fixed         Ñvcc5v0_sys          à LK@        ø LK@                  $        6   a        >   b      regulator-vcc-io              regulator-fixed         Ñvcc_io          à 2Z         ø 2Z                   $        6   b        >   d      vcc-sdmmc             regulator-gpio        
  Ñvcc_sdmmc           à w@        ø 2Z         œ   ^                w@     2Z            6   b        >   B      regulator-vcc-sd              regulator-fixed         A   c              Ñvcc_sd          à 2Z         ø 2Z                   $        6   d        >   A      regulator-vdd-core            pwm-regulator           ¢   e      ˆ         	  Ñvdd_core            à žx        ø r`        F   ú                  $        d   b        >         regulator-vdd-log             regulator-fixed         Ñvdd_log         à �        ø �                  $        6   b         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 mmc1 device_type reg enable-method clocks #cooling-cells dynamic-power-coefficient operating-points-v2 cpu-idle-states next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells status offset mode-bootloader mode-loader mode-normal mode-recovery mode-fastboot assigned-clocks assigned-clock-parents clock-names interrupt-names #phy-cells pinctrl-names pinctrl-0 reg-shift reg-io-width dmas dma-names #pwm-cells #io-channel-cells resets reset-names arm,pl330-periph-burst #dma-cells rockchip,grf dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names bus-width fifo-depth max-frequency cap-mmc-highspeed cap-sd-highspeed card-detect-delay sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-hs200-1_8v non-removable assigned-clock-rates phy-mode #reset-cells #sound-dai-cells #interrupt-cells interrupt-controller ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins stdout-path gpios pwms label linux,default-trigger default-state regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on vin-supply gpio regulator-settling-time-up-us pwm-supply 