L8<(&friendlyarm,nanopc-t6rockchip,rk3588 +7FriendlyElec NanoPC-T6aliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55 psci0 7 GT@fs@  cpu@100cpuarm,cortex-a55 psci0 7 GT@fs@ cpu@200cpuarm,cortex-a55 psci0 7 GT@fs@ cpu@300cpuarm,cortex-a55 psci0 7 GT@fs@ cpu@400cpuarm,cortex-a76 psci0 7 GT@fs@cpu@500cpuarm,cortex-a76 psci0 7 GT@fs@cpu@600cpuarm,cortex-a76 psci0 7 GT@fs@cpu@700cpuarm,cortex-a76 psci0 7 GT@fs@ idle-statespscicpu-sleeparm,idle-state 5dFxV l2-cache-l0cacheIV@hgs l2-cache-l1cacheIV@hgsl2-cache-l2cacheIV@hgsl2-cache-l3cacheIV@hgsl2-cache-b0cacheIV@hgsl2-cache-b1cacheIV@hgsl2-cache-b2cacheIV@hgsl2-cache-b3cacheIV@hgsl3-cachecacheI0V@hgsdisplay-subsystemrockchip,display-subsystemfirmwarescmi arm,scmi-smc+protocol@14  protocol@16 hdmi0-soundsimple-audio-cardi2shdmi0okaysimple-audio-card,codecsimple-audio-card,cpupmu-a55arm,cortex-a55-pmu pmu-a76arm,cortex-a76-pmu  psci arm,psci-1.0smcclock-0 fixed-clock)׫(splltimerarm,armv8-timerP     %;sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6(xin24mclock-2 fixed-clock(xin32kreserved-memory+Kshmem@10f000arm,scmi-shmem Rhdmi-receiver-cmashared-dma-poolYO fRokaygpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf p  0!!!corecoregroupstacks 0 \]^ ;jobmmugpu" okay#$usb@fc000000rockchip,rk3588-dwc3snps,dwc3 @ 0!!!ref_clksuspend_clkbus_clkotg %&usb2-phyusb3-phy utmi_wide"!R*Klokayportendpoint'usb@fc800000"rockchip,rk3588-ehcigeneric-ehci  0!!!()usb"okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci  0!!!()usb"okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci  0!!!*+usb"okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci  0!!!*+usb"okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 @ (0!j!i!h!k!r&ref_clksuspend_clkbus_clkutmipipehost, usb3-phy utmi_wide!4*Kl disablediommu@fc900000 arm,smmu-v3 @ qsvo;eventqgerrorpriqcmdq-synciommu@fcb00000 arm,smmu-v3 @ }{;eventqgerrorpriqcmdq-sync disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd Xsyscon@fd58c000rockchip,rk3588-sys-grfsyscon Xqsyscon@fd5e8000!rockchip,rk3588-dcphy-grfsyscon ^@syscon@fd5ec000!rockchip,rk3588-dcphy-grfsyscon ^@syscon@fd5a4000rockchip,rk3588-vop-grfsyscon Z@ rsyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon Z` 0!syscon@fd5a8000rockchip,rk3588-vo1-grfsyscon Z@0!ssyscon@fd5ac000rockchip,rk3588-usb-grfsyscon Z@syscon@fd5b0000rockchip,rk3588-php-grfsyscon [.syscon@fd5b4000#rockchip,rk3588-csidphy-grfsyscon [@syscon@fd5b5000#rockchip,rk3588-csidphy-grfsyscon [Psyscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon [syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon \@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon \@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@0rockchip,rk3588-usb2phy 0!phyclk (usb480m_phy0 !m!phyapbokayotg-portokay%syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@8000rockchip,rk3588-usb2phy 0!phyclk (usb480m_phy2 !o!phyapbokay(host-portokay-)syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@c000rockchip,rk3588-usb2phy 0!phyclk (usb480m_phy3 !p! phyapbokay*host-portokay+syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ^syscon@fd5f0000rockchip,rk3588-iocsyscon _sram@fd600000 mmio-sram `K`+clock-controller@fd7c0000rockchip,rk3588-cru |p!!!!!!!!!!!!!]!q!!@A.2Fq)׫ׄe/ׄ eZ р .!i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c  =0!t!s i2cpclk/default+okayregulator@42rockchip,rk8602 B9vdd_cpu_big0_s0H\ndp0regulator-state-memregulator@43 rockchip,rk8603rockchip,rk8602 C9vdd_cpu_big1_s0H\ndp0regulator-state-memserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart  K0!!baudclkapb_pclk11txrx2default disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!! pwmpclk3default disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!! pwmpclk4defaultokaypwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!! pwmpclk5default disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!! pwmpclk6default disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd tpower-controller!rockchip,rk3588-power-controller+okay"power-domain@8 +power-domain@9  0!!!#!"! 789+power-domain@10 0!!!#!":power-domain@11 0!!!#!";power-domain@12 0!!!<=>?#$power-domain@13 +power-domain@14 (0!!!!!@power-domain@15  0!!!!Apower-domain@16 0!! BCD+power-domain@17  0!!!! EFGpower-domain@21 0!!!!!!!!!!!!!!!!!! HIJKLMNO+power-domain@23 0!C!A!Ppower-domain@14  0!!!!@power-domain@15 0!!!Apower-domain@22 0!!Qpower-domain@24 0![!Z!]RS+power-domain@25 80!!!!!!!ZTpower-domain@26 80!!!!!!!QUVpower-domain@27 00!!!!!!WXYZ+power-domain@28  0!!!![\power-domain@29 (0!!!!!]^power-domain@30 0!z!{_power-domain@31 @0!W!!!!!!!`abcpower-domain@33 !0!W!Z![power-domain@34 "0!W!Z![power-domain@37 %0!!2dpower-domain@38 &0!4!5power-domain@40 (enpu@fdab0000rockchip,rk3588-rknn-core0 0 1pccnacore n 0!! !#aclkhclknpupclkp  !!srst_asrst_h" ;f disablediommu@fdab9000,rockchip,rk3588-iommurockchip,rk3568-iommu   n0!!  aclkiface"  disabledfnpu@fdac0000rockchip,rk3588-rknn-core0 0 1pccnacore o 0!! !#aclkhclknpupclkp  !!srst_asrst_h" ;g disablediommu@fdaca000,rockchip,rk3588-iommurockchip,rk3568-iommu  o0!! aclkiface"  disabledgnpu@fdad0000rockchip,rk3588-rknn-core0 0 1pccnacore p 0!! !#aclkhclknpupclkp  !!srst_asrst_h" ;h disablediommu@fdada000,rockchip,rk3588-iommurockchip,rk3568-iommu  p0!! aclkiface"  disabledhvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu  w;vdpu0!! aclkhclk;i"iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu @ v aclkiface0!!"irga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga  t0!!!aclkhclksclk!r!q!p coreaxiahb"video-codec@fdba0000rockchip,rk3588-vepu121  z0!! aclkhclk;j"iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu @ y0!! aclkiface"jvideo-codec@fdba4000rockchip,rk3588-vepu121 @ |0!! aclkhclk;k"iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu H@ {0!! aclkiface"kvideo-codec@fdba8000rockchip,rk3588-vepu121  ~0!! aclkhclk;l"iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu @ }0!! aclkiface"lvideo-codec@fdbac000rockchip,rk3588-vepu121  0!! aclkhclk;m"iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu @ 0!! aclkiface"mvideo-codec@fdc70000rockchip,rk3588-av1-vpu  l;vdpup!A!Cׄׄ0!A!C aclkhclk" !!!!vop@fdd90000rockchip,rk3588-vop  BP1vopgamma-lut @0!]!\!a!b!c!d![noQaclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voppll_hdmiphy0pll_hdmiphy1;p"qBrSsdtokayports+port@0+ endpoint@2 uport@1+ endpoint@8 vport@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ~ 0!]!\ aclkiface"okaypspdif-tx@fddb0000,rockchip,rk3588-spdifrockchip,rk3568-spdif q!p! mclkhclk0!!txw " disabledi2s@fddc0000rockchip,rk3588-i2s-tdm  0!!!mclk_txmclk_rxhclkp!q!xtx"!tx-m disabledspdif-tx@fdde0000,rockchip,rk3588-spdifrockchip,rk3568-spdif q!p!A mclkhclk0!D!@txw " disabledi2s@fddf0000rockchip,rk3588-i2s-tdm  0!4!4!5mclk_txmclk_rxhclkp!1q!xtx"!tx-mokayi2s@fddfc000rockchip,rk3588-i2s-tdm  0!0!0!,mclk_txmclk_rxhclkp!-q!xrx"!rx-m disableddsi@fde20000rockchip,rk3588-mipi-dsi2  0!e!g pclksys!apb"y dcphyr disabledports+port@0 port@1 dsi@fde30000rockchip,rk3588-mipi-dsi2  0!f!h pclksys!apb"z dcphyr disabledports+port@0 port@1 dp@fde50000rockchip,rk3588-dp @ p!$(0!!!!!apbauxhdcpi2sspdif&"! disabledports+port@0 port@1 hdmi@fde80000rockchip,rk3588-dw-hdmi-qp 00!!!!4!R!pclkearcrefaudhdphclk_vo1P h;avpcecearcmainhpdndefault{|}~"!!0refhdpqsokayports+port@0 endpointuport@1 endpoint8edp@fdec0000rockchip,rk3588-edp 0!!dppclk ndp"!!dpapbs disabledports+port@0 port@1 qos@fdf35000rockchip,rk3588-qossyscon P <qos@fdf35200rockchip,rk3588-qossyscon R =qos@fdf35400rockchip,rk3588-qossyscon T >qos@fdf35600rockchip,rk3588-qossyscon V ?qos@fdf36000rockchip,rk3588-qossyscon ` _qos@fdf39000rockchip,rk3588-qossyscon dqos@fdf3d800rockchip,rk3588-qossyscon eqos@fdf3e000rockchip,rk3588-qossyscon aqos@fdf3e200rockchip,rk3588-qossyscon `qos@fdf3e400rockchip,rk3588-qossyscon bqos@fdf3e600rockchip,rk3588-qossyscon cqos@fdf40000rockchip,rk3588-qossyscon ]qos@fdf40200rockchip,rk3588-qossyscon  ^qos@fdf40400rockchip,rk3588-qossyscon  Wqos@fdf40500rockchip,rk3588-qossyscon  Xqos@fdf40600rockchip,rk3588-qossyscon  Yqos@fdf40800rockchip,rk3588-qossyscon  Zqos@fdf41000rockchip,rk3588-qossyscon  [qos@fdf41100rockchip,rk3588-qossyscon  \qos@fdf60000rockchip,rk3588-qossyscon Bqos@fdf60200rockchip,rk3588-qossyscon  Cqos@fdf60400rockchip,rk3588-qossyscon  Dqos@fdf61000rockchip,rk3588-qossyscon  Eqos@fdf61200rockchip,rk3588-qossyscon  Fqos@fdf61400rockchip,rk3588-qossyscon  Gqos@fdf62000rockchip,rk3588-qossyscon @qos@fdf63000rockchip,rk3588-qossyscon 0 Aqos@fdf64000rockchip,rk3588-qossyscon @ Pqos@fdf66000rockchip,rk3588-qossyscon ` Hqos@fdf66200rockchip,rk3588-qossyscon b Iqos@fdf66400rockchip,rk3588-qossyscon d Jqos@fdf66600rockchip,rk3588-qossyscon f Kqos@fdf66800rockchip,rk3588-qossyscon h Lqos@fdf66a00rockchip,rk3588-qossyscon j Mqos@fdf66c00rockchip,rk3588-qossyscon l Nqos@fdf66e00rockchip,rk3588-qossyscon n Oqos@fdf67000rockchip,rk3588-qossyscon p Qqos@fdf67200rockchip,rk3588-qossyscon r qos@fdf70000rockchip,rk3588-qossyscon :qos@fdf71000rockchip,rk3588-qossyscon  ;qos@fdf72000rockchip,rk3588-qossyscon 7qos@fdf72200rockchip,rk3588-qossyscon " 8qos@fdf72400rockchip,rk3588-qossyscon $ 9qos@fdf80000rockchip,rk3588-qossyscon Tqos@fdf81000rockchip,rk3588-qossyscon  Uqos@fdf81200rockchip,rk3588-qossyscon  Vqos@fdf82000rockchip,rk3588-qossyscon Rqos@fdf82200rockchip,rk3588-qossyscon " Sdfi@fe060000 rockchip,rk3588-dfi@ &0:dpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?00!C!H!>!M!R!)aclk_mstaclk_slvaclk_dbipclkauxpipepciP ;syspmcmsglegacyerr`00 00, pcie-phy""TK  @0 @@1dbiapbconfig!)!. pwrpipe+okay !-defaultlegacy-interrupt-controller=  pcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O00!D!I!?!N!S!s)aclk_mstaclk_slvaclk_dbipclkauxpipepciP ;syspmcmsglegacyerr`@@ @@ pcie-phy""TK  @0 A@1dbiapbconfig!*!/ pwrpipe+okay !-defaultlegacy-interrupt-controller=  ethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a   ;macirqeth_wake_irq(0!6!7!Y!^!50stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!$ stmmacethqR.cs disabledmdiosnps,dwmac-mdio+stmmac-axi-configrx-queues-configqueue0queue1tx-queues-configqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci ! (0!b!_!e!T!osatapmaliverxoobrefasic + disabledsata-port@0 @ sata-phy( 7 sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci # (0!d!a!g!V!qsatapmaliverxoobrefasic + disabledsata-port@0 @, sata-phy( 7 spi@fe2b0000 rockchip,sfc +@ 0!/!0clk_sfchclk_sfc+okaydefaultflash@0jedec,spi-nor F2Xizmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc ,@  0  !!biuciuciu-driveciu-sampleJ default"(okay_ mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc -@  0!!!!biuciuciu-driveciu-sampleJ default"% disabledmmc@fe2e0000rockchip,rk3588-dwcmshc . p!-!.!,  n6 (0!,!*!+!-!.corebusaxiblocktimerJ default(!!!!!corebusaxiblocktimerokay_    -rng@fe378000rockchip,rk3588-rng 7 0 0i2s@fe470000rockchip,rk3588-i2s-tdm G 0!+!/!(mclk_txmclk_rxhclkp!)!-q!!11txrx"&!*!+ tx-mrx-m Gdefaultokay?portendpoint bi2si2s@fe480000rockchip,rk3588-i2s-tdm H 0!y!}!umclk_txmclk_rxhclk11txrx!^!_ tx-mrx-m Gdefault( disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s I 0!!i2s_clki2s_hclkp!q!wwtxrx"&default disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s J 0!%!i2s_clki2s_hclkp!"q!wwtxrx"&default disabledspdif-tx@fe4e0000,rockchip,rk3588-spdifrockchip,rk3568-spdif Nq!p!7 mclkhclk0!9!6tx1 default"& disabledspdif-tx@fe4f0000,rockchip,rk3588-spdifrockchip,rk3568-spdif Oq!p!= mclkhclk0!?!<txw default"& disabledinterrupt-controller@fe600000 arm,gic-v3  `h  = m }a 8 K+msi-controller@fe640000arm,gic-v3-its d m  msi-controller@fe660000arm,gic-v3-its f m  &ppi-partitionsinterrupt-partition-0 interrupt-partition-1   dma-controller@fea10000arm,pl330arm,primecell @  VW 0!n apb_pclk 1dma-controller@fea30000arm,pl330arm,primecell @  XY 0!o apb_pclk wi2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!{ i2cpclk >default+ disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!| i2cpclk ?default+okayregulator@42rockchip,rk8602 B 9vdd_npu_s0H\ndp~0regulator-state-memi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!} i2cpclk @default+ disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!!~ i2cpclk Adefault+ disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! i2cpclk Bdefault+ disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer  !0!T!W pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt 0!d!c tclkpclk ;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi  F0!!spiclkapb_pclk11txrx  default+ disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi  G0!!spiclkapb_pclk11txrx  default+ disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi  H0!!spiclkapb_pclkwwtxrx default+okayp! pmic@0rockchip,rk806FB@   default  0 0 0 0 &0 20 >0 J0 V0 b0 o |0   0  dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1\ndp~0 9vdd_gpu_s0 $regulator-state-memdcdc-reg2H\ndp~09vdd_cpu_lit_s0regulator-state-memdcdc-reg3H\n L q0 9vdd_log_s0regulator-state-mem qdcdc-reg4H\ndp~0 9vdd_vdenc_s0regulator-state-memdcdc-reg5H\n L 0 9vdd_ddr_s0regulator-state-mem Pdcdc-reg6H\ 9vdd2_ddr_s3regulator-state-mem dcdc-reg7H\n09vdd_2v0_pldo_s3regulator-state-mem  dcdc-reg8H\n2Z2Z 9vcc_3v3_s3Bregulator-state-mem  2Zdcdc-reg9H\ 9vddq_ddr_s0regulator-state-memdcdc-reg10H\nw@w@ 9vcc_1v8_s3regulator-state-mem  w@pldo-reg1H\nw@w@ 9avcc_1v8_s0regulator-state-mempldo-reg2H\nw@w@ 9vcc_1v8_s0regulator-state-mem w@pldo-reg3H\nOO 9avdd_1v2_s0regulator-state-mempldo-reg4H\n2Z2Z0 9vcc_3v3_s0regulator-state-mempldo-reg5H\nw@2Z0 9vccio_sd_s0regulator-state-mempldo-reg6H\nw@w@ 9pldo6_s3regulator-state-mem  w@nldo-reg1H\n q q 9vdd_0v75_s3regulator-state-mem  qnldo-reg2H\n P P9vdd_ddr_pll_s0regulator-state-mem Pnldo-reg3H\n q q 9avdd_0v75_s0regulator-state-memnldo-reg4H\n P P 9vdd_0v85_s0regulator-state-memnldo-reg5H\n q q 9vdd_0v75_s0regulator-state-memspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi  I0!!spiclkapb_pclkwwtxrx  default+ disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart  L0!!baudclkapb_pclk11 txrxdefault disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart  M0!!baudclkapb_pclk1 1 txrxdefaultokayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart  N0!!baudclkapb_pclk1 1 txrxdefault disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart  O0!!baudclkapb_pclkw w txrxdefault disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart  P0!!baudclkapb_pclkw w txrxdefault disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart  Q0!!baudclkapb_pclkw wtxrxdefault disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart  R0!!baudclkapb_pclkxxtxrxdefault disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart  S0!!baudclkapb_pclkx x txrxdefault disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart  T0!!baudclkapb_pclkx x txrxdefault disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!L!K pwmpclkdefault disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!L!K pwmpclkdefault disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!L!K pwmpclkdefault disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!L!K pwmpclkdefault disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!O!N pwmpclkdefault disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!O!N pwmpclkdefault disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!O!N pwmpclkdefault disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!O!N pwmpclkdefault disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!R!Q pwmpclkdefault disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!R!Q pwmpclkdefault disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0!R!Q pwmpclkdefault disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00!R!Q pwmpclkdefault disabledthermal-zonespackage-thermal ) ? Mtripspackage-crit ]8 i criticalbigcore0-thermal )d ? Mtripsbigcore0-alert ]L ipassivebigcore0-crit ]8 i criticalcooling-mapsmap0 t ybigcore2-thermal )d ? Mtripsbigcore2-alert ]L ipassivebigcore2-crit ]8 i criticalcooling-mapsmap0 t y littlecore-thermal )d ? Mtripslittlecore-alert ]L ipassivelittlecore-crit ]8 i criticalcooling-mapsmap0 t0 ycenter-thermal ) ? Mtripscenter-crit ]8 i criticalgpu-thermal )d ? Mtripsgpu-alert ]L ipassivegpu-crit ]8 i criticalcooling-mapsmap0 t ynpu-thermal ) ? Mtripsnpu-crit ]8 i criticaltsadc@fec00000rockchip,rk3588-tsadc  0!!tsadcapb_pclkp!!V!Wtsadc-apbtsadc    defaultsleep okayadc@fec10000rockchip,rk3588-saradc   0!!saradcapb_pclk!U saradc-apbokay 7i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! i2cpclk Cdefault+okayusb-typec@22 fcs,fusb302 "  default okayconnectorusb-c-connector dual %USB-C +B@ = Idual T, ^ jsource y1.5Aports+port@0 endpoint'port@1 endpointport@2 endpointrtc@51haoyu,hym8563 Q(hym8563default   i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! i2cpclk Ddefault+okay @codec@1brealtek,rt5616 0!1mclkp!1@portendpointi2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0!! i2cpclk Edefault+ disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi  J0!!spiclkapb_pclkx xtxrx  default+ disabledefuse@fecc0000rockchip,rk3588-otp  0!!!!otpapb_pclkphyarb!!! otpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell @  Z[ 0!p apb_pclk xphy@fed60000rockchip,rk3588-hdptx-phy 0!!Trefapb8!#!!c!d!e!!!""phyapbinitcmnlaneroplllcpllokaynphy@fed80000rockchip,rk3588-usbdp-phy 0!!l!Vrefclkimmortalpclkutmi(! ! ! !!initcmnlanepcs_apbpma_apb   okay    &port+endpoint@0 endpoint@1 phy@feda0000rockchip,rk3588-mipi-dcphy 0!! pclkref !i!!!jm_phyapbgrfs_phy disabledyphy@fedb0000rockchip,rk3588-mipi-dcphy 0!! pclkref !k!!!lm_phyapbgrfs_phy disabledzphy@fedc0000rockchip,rk3588-csi-dphy 0!pclk!!apbphy disabledphy@fedc8000rockchip,rk3588-csi-dphy ܀0!pclk!!apbphy disabledphy@fee00000rockchip,rk3588-naneng-combphy 0!!v!W refapbpipep!!<!Cphyapb . &okayphy@fee20000rockchip,rk3588-naneng-combphy 0!!x!W refapbpipep!!>!Ephyapb . &okay,sram@ff001000 mmio-sram K+pinctrlrockchip,rk3588-pinctrlK+ gpio@fd8a0000rockchip,gpio-bank  0!q!r  < = S HHEADER_10HEADER_08HEADER_32IR receiver [PWM3_IR_M0]gpio@fec20000rockchip,gpio-bank  0!s!t  < =  HHEADER_27HEADER_28HEADER_15HEADER_26HEADER_21HEADER_19HEADER_23HEADER_24HEADER_22HEADER_05HEADER_03gpio@fec30000rockchip,gpio-bank  0!u!v  < @ = . HCSI1_11CSI1_12;gpio@fec40000rockchip,gpio-bank  0!w!x  < ` =  HHEADER_35HEADER_38HEADER_40HEADER_36HEADER_37DSI0_12HEADER_33DSI0_10HEADER_07HEADER_16HEADER_18HEADER_29HEADER_31HEADER_12DSI0_08DSI0_14HEADER_11HEADER_13DSI1_10gpio@fec50000rockchip,gpio-bank  0!y!z  < = C HDSI1_08DSI1_14DSI1_12CSI0_11CSI0_12pcfg-pull-up Xpcfg-pull-down e pcfg-pull-none t pcfg-pull-none-drv-level-2 t pcfg-pull-up-drv-level-1 X pcfg-pull-up-drv-level-2 X  pcfg-pull-none-smt t pcfg-pull-none-drv-level-1-smt t  pcfg-pull-none-drv-level-3-smt t  pcfg-pull-none-drv-level-5-smt t   auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout  emmc-bus8         emmc-clk  emmc-cmd  emmc-data-strobe  eth1fspifspim1-pins`          gmac1gpuhdmihdmim0-tx0-cec  {hdmim0-tx0-hpd  |hdmim0-tx0-scl  }hdmim0-tx0-sda ~hdmim0-tx1-hpd  hdmim1-rx-cec   hdmim1-rx-hpdin  !hdmim1-rx-scl  "hdmim1-rx-sda  #hdmim1-tx1-scl  hdmim1-tx1-sda hdmim2-tx1-cec  i2c0i2c0m2-xfer /i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m2-xfer   i2s0i2s0-lrck  i2s0-mclk  i2s0-sclk  i2s0-sdi0  i2s0-sdo0  i2s1i2s1m0-lrck  i2s1m0-sclk  i2s1m0-sdi0  i2s1m0-sdi1  i2s1m0-sdi2  i2s1m0-sdi3  i2s1m0-sdo0   i2s1m0-sdo1   i2s1m0-sdo2   i2s1m0-sdo3   i2s2i2s2m1-lrck  i2s2m1-sclk   i2s2m1-sdi   i2s2m1-sdo   i2s3i2s3-lrck  i2s3-sclk  i2s3-sdi  i2s3-sdo  jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp       pmupwm0pwm0m0-pins  3pwm1pwm1m1-pins   4pwm2pwm2m0-pins  5pwm3pwm3m0-pins  6pwm4pwm4m0-pins   pwm5pwm5m0-pins  pwm6pwm6m0-pins   pwm7pwm7m0-pins   pwm8pwm8m0-pins   pwm9pwm9m0-pins   pwm10pwm10m0-pins   pwm11pwm11m0-pins   pwm12pwm12m0-pins   pwm13pwm13m0-pins   pwm14pwm14m0-pins   pwm15pwm15m0-pins   refclksatasata0sata1sata2sdiosdiom1-pins`  sdmmcsdmmc-bus4@     sdmmc-clk  sdmmc-cmd  sdmmc-det spdif0spdif0m0-tx  spdif1spdif1m0-tx  spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m0-pins0 spi4m0-cs0 spi4m0-cs1 tsadctsadc-shut-org  uart0uart0m1-xfer  2uart1uart1m1-xfer   uart2uart2m0-xfer   uart3uart3m1-xfer   uart4uart4m1-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m1-xfer   uart8uart8m1-xfer   uart9uart9m1-xfer   vopbt656gpio-functsadc-gpio-func  eth0gmac0gpio-ledssys-led-pin  <usr-led-pin  =hdmirxhdmirx-5v-detection  $headphonehp-det  >hym8563hym8563-int ir-receiverir-receiver-pin  :pciepcie2-0-rst   ,pcie2-1-rst  pcie2-2-rst  pcie-m20-pwren  Gpcie-m21-pwren  Fusbtypec5v-pwren  Cusb5v_pwren  Eusbc0-int 4g-lte-pwren  Hhdmi1-soundsimple-audio-cardi2shdmi1okaysimple-audio-card,codecsimple-audio-card,cpuusb@fc400000rockchip,rk3588-dwc3snps,dwc3 @@ 0!!!ref_clksuspend_clkbus_clkhost usb2-phyusb3-phy utmi_wide"!S*Klokaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon [6syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon \5syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon \@3syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@@+2usb2phy@4000rockchip,rk3588-usb2phy @0!phyclk (usb480m_phy1 !n!phyapbokay1otg-portokaysyscon@fd5e4000$rockchip,rk3588-hdptxphy-grfsyscon ^@0spdif-tx@fddb8000,rockchip,rk3588-spdifrockchip,rk3568-spdif ۀq!p! mclkhclk0!!txw " disabledi2s@fddc8000rockchip,rk3588-i2s-tdm ܀ 0!!!mclk_txmclk_rxhclkp!q!xtx"!tx-m disabledspdif-tx@fdde8000,rockchip,rk3588-spdifrockchip,rk3568-spdif ހq!p!F mclkhclk0!I!Etxw " disabledi2s@fddf4000rockchip,rk3588-i2s-tdm @ 0!9!9!?mclk_txmclk_rxhclkp!6q!xtx"!tx-mokayi2s@fddf8000rockchip,rk3588-i2s-tdm ߀ 0!+!+!'mclk_txmclk_rxhclkp!(q!xrx"!rx-m disabledi2s@fde00000rockchip,rk3588-i2s-tdm  0!&!&!"mclk_txmclk_rxhclkp!#q!xrx"!rx-m disableddp@fde60000rockchip,rk3588-dp @ p!$(0!!!!!apbauxhdcpi2sspdif"! disabledports+port@0 port@1 hdmi@fdea0000rockchip,rk3588-dw-hdmi-qp 00!!!!9!S!pclkearcrefaudhdphclk_vo1P i;avpcecearcmainhpdodefault"!!1refhdpqsokayports+port@0 endpointvport@1 endpoint9edp@fded0000rockchip,rk3588-edp 0!!dppclk odp"!!dpapbs disabledports+port@0 port@1 hdmi_receiver@fdee0000.rockchip,rk3588-hdmirx-ctrlersnps,dw-hdmi-rx `0  ;cechdmidma80! !!! ! !!!3aclkaudiocr_parapclkrefhclk_s_hdmirxhclk_vo1 " !!!!axiapbrefbiuqSsokay  !"#$defaultpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+00!@!E!;!J!O!t)aclk_mstaclk_slvaclk_dbipclkauxpipepciP ;syspmcmsglegacyerr`%%%%& ' pcie-phy""TK  @0 @@1dbiapbconfig!&!+ pwrpipeokay !-(legacy-interrupt-controller=  %pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @01dbidbi2apbaddr_spaceatu00!@!E!;!J!O!t)aclk_mstaclk_slvaclk_dbipclkauxpipe  +;syspmcmsglegacyerrdma0dma1dma2dma3' pcie-phy""!&!+ pwrpipe disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+00!A!F!<!K!P!u)aclk_mstaclk_slvaclk_dbipclkauxpipepciP ;syspmcmsglegacyerr`))))& ' pcie-phy""TK  @ @@0 @@@1dbiapbconfig!'!, pwrpipe disabledlegacy-interrupt-controller=  )pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /00!B!G!=!L!Q!)aclk_mstaclk_slvaclk_dbipclkauxpipepciP ;syspmcmsglegacyerr`****  + pcie-phy""TK  @0 @@1dbiapbconfig!(!- pwrpipe+okay ! -default,legacy-interrupt-controller=  *ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a   ;macirqeth_wake_irq(0!6!7!X!]!40stmmacethclk_mac_refpclk_macaclk_macptp_ref"!!# stmmacethqR.c-s./ disabledmdiosnps,dwmac-mdio+stmmac-axi-config-rx-queues-config.queue0queue1tx-queues-config/queue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci " (0!c!`!f!U!psatapmaliverxoobrefasic + disabledsata-port@0 @+ sata-phy( 7 phy@fed70000rockchip,rk3588-hdptx-phy 0!!Urefapb8!&!!f!g!h!$!%"phyapbinitcmnlaneroplllcpll0okayophy@fed90000rockchip,rk3588-usbdp-phy 0!!m!W1refclkimmortalpclkutmi(!!!!!initcmnlanepcs_apbpma_apb 2  3okay4phy@fee10000rockchip,rk3588-naneng-combphy 0!!w!W refapbpipep!!=!Dphyapb . &5okay+phy@fee80000rockchip,rk3588-pcie3-phy 0!ypclk!Hphy . 6okay'opp-table-cluster0operating-points-v2  opp-1008000000 < L L~ @opp-1200000000 G 4 4~ @opp-1416000000 Tfr ~ @ opp-1608000000 _" P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-gpuoperating-points-v2#opp-300000000  L L Popp-400000000 ׄ L L Popp-500000000 e L L Popp-600000000 #F L L Popp-700000000 )' ` ` Popp-800000000 / q q Popp-900000000 5 5 5 Popp-1000000000 ; P P Padc-keys-0 adc-keys7%buttons6w@Pdbutton-maskrom %Mask Rom^ichosenserial2:1500000n8hdmi0-conhdmi-connectoraportendpoint8hdmi1-conhdmi-connectoraportendpoint9ir-receivergpio-ir-receiver 'default:leds gpio-ledsled-0 '; %system-led heartbeatdefault<led-1 '; %user-leddefault=soundsimple-audio-carddefault>realtek,rt5616-codeci2s 0HeadphoneHeadphonesMicrophoneMicrophone JackNHeadphonesHPOLHeadphonesHPORMIC1Microphone JackMicrophone Jackmicbias1simple-audio-card,cpu?simple-audio-card,codec@regulator-vcc12v-dcinregulator-fixed 9vcc12v_dcinH\nAregulator-vcc5v0-sysregulator-fixed 9vcc5v0_sysH\nLK@LK@ADregulator-vcc4v0-sysregulator-fixed 9vcc4v0_sysH\n= = A0regulator-vcc-1v1-nldo-s3regulator-fixed9vcc-1v1-nldo-s3H\n0regulator-vcc3v3-pcie20regulator-fixed9vcc_3v3_pcie20H\n2Z2ZBregulator-vbus5v0-typecregulator-fixed  defaultC9vbus5v0_typecnLK@LK@Dregulator-vbus5v0-usbregulator-fixed  defaultE 9vbus5v0_usbnLK@LK@D4regulator-vcc3v3-pcie2x1l0regulator-fixed  defaultF9vcc3v3_pcie2x1l0n2Z2ZDregulator-vcc3v3-pcie30regulator-fixed ';defaultG9vcc3v3_pcie30n2Z2ZD(regulator-vcc3v3-sd-s0regulator-fixed  \2Zn2Z 9vcc3v3_sd_s0Bregulator-vdd-4g-3v3regulator-fixed  defaultH 9vdd_4g_3v3n2Z2ZD- compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclockscpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellssimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesno-mapalloc-rangesalignmentassigned-clocksassigned-clock-ratesclock-namespower-domainsmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosdomain-supplyreg-namesiommusrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsrockchip,vo-grfbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapiommu-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthvcc-supplyfifo-depthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplysupports-cqeno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlydai-formatdma-noncoherentmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelop-sink-microwattpd-revisionpower-rolesink-pdossource-pdostry-power-roletypec-power-opmodewakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsmemory-regionhpd-gpiosrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltstdout-pathlinux,default-triggersimple-audio-card,hp-det-gpiossimple-audio-card,widgetssimple-audio-card,routingenable-active-highgpio