Ðþí  ÇÊ   8  ¾è   (            â  ¾°                             $    mediatek,mt8183-evb mediatek,mt8183                                  +         !   7MediaTek MT8183 evaluation board          	   =embedded       aliases          J/soc/i2c@11007000            O/soc/i2c@11011000            T/soc/i2c@11009000            Y/soc/i2c@1100f000            ^/soc/i2c@11008000            c/soc/i2c@11016000            h/soc/i2c@11005000            m/soc/i2c@1101a000            r/soc/i2c@1101b000            w/soc/i2c@11014000            |/soc/i2c@11015000            ‚/soc/i2c@11017000            ˆ/soc/ovl@14008000            �/soc/ovl@14009000            •/soc/ovl@1400a000            �/soc/rdma@1400b000           £/soc/rdma@1400c000           ©/soc/serial@11002000          opp-table-cluster0            operating-points-v2           ±         ¼       opp0-793000000           Ä    /D8@         Ë 	ë         Ù         opp0-910000000           Ä    6=€         Ë 
}Œ         Ù         opp0-1014000000          Ä    <pi€         Ë 
÷ž         Ù         opp0-1131000000          Ä    Ci°À         Ë Š         Ù         opp0-1248000000          Ä    Jbø          Ë 5          Ù         opp0-1326000000          Ä    O	'€         Ë ~>         Ù         opp0-1417000000          Ä    Tu´@         Ë øP         Ù         opp0-1508000000          Ä    YâA          Ë AŽ         Ù   	      opp0-1586000000          Ä    ^ˆp€         Ë £6         Ù   
      opp0-1625000000          Ä    `Ûˆ@         Ë Ô
         Ù         opp0-1677000000          Ä    côý@         Ë 5²         Ù         opp0-1716000000          Ä    fH          Ë f†         Ù         opp0-1781000000          Ä    j'ç@         Ë à˜         Ù         opp0-1846000000          Ä    n¹€         Ë B@         Ù         opp0-1924000000          Ä    r­é          Ë £è         Ù         opp0-1989000000          Ä    v�»@         Ë �         Ù            opp-table-cluster1            operating-points-v2           ±         ¼   $   opp1-793000000           Ä    /D8@         Ë 
®`         Ù         opp1-910000000           Ä    6=€         Ë          Ù         opp1-1014000000          Ä    <pi€         Ë q°         Ù         opp1-1131000000          Ä    Ci°À         Ë ÓX         Ù         opp1-1248000000          Ä    Jbø          Ë 5          Ù         opp1-1326000000          Ä    O	'€         Ë –¨         Ù         opp1-1417000000          Ä    Tu´@         Ë øP         Ù         opp1-1508000000          Ä    YâA          Ë Yø         Ù   	      opp1-1586000000          Ä    ^ˆp€         Ë »          Ù   
      opp1-1625000000          Ä    `Ûˆ@         Ë ìt         Ù         opp1-1677000000          Ä    côý@         Ë 5²         Ù         opp1-1716000000          Ä    fH          Ë ~ð         Ù         opp1-1781000000          Ä    j'ç@         Ë à˜         Ù         opp1-1846000000          Ä    n¹€         Ë B@         Ù         opp1-1924000000          Ä    r­é          Ë £è         Ù         opp1-1989000000          Ä    v�»@         Ë �         Ù            opp-table-cci             operating-points-v2           ±         ¼      opp-273000000            Ä    E¦@         Ë 	ë         ¼         opp-338000000            Ä    %x€         Ë 
}Œ         ¼         opp-403000000            Ä    JÀ         Ë 
÷ž         ¼         opp-463000000            Ä    ˜ÑÀ         Ë Š         ¼         opp-546000000            Ä     ‹L€         Ë 5          ¼         opp-624000000            Ä    %1|          Ë ~>         ¼         opp-689000000            Ä    )N@         Ë øP         ¼         opp-767000000            Ä    -·}À         Ë AŽ         ¼   	      opp-845000000            Ä    2]­@         Ë £6         ¼   
      opp-871000000            Ä    3êgÀ         Ë Ô
         ¼         opp-923000000            Ä    7ÜÀ         Ë 5²         ¼         opp-962000000            Ä    9Vô€         Ë f†         ¼         opp-1027000000           Ä    =6ÆÀ         Ë à˜         ¼         opp-1092000000           Ä    A™          Ë B@         ¼         opp-1144000000           Ä    D0          Ë £è         ¼         opp-1196000000           Ä    GIƒ          Ë �         ¼            cci           mediatek,mt8183-cci          ç            �         îcci intermediate             ú                       ¼   "      cpus                         +       cpu-map    cluster0       core0                    core1                    core2                    core3                       cluster1       core0                    core1                    core2                    core3                          cpu@0           cpu           arm,cortex-a53          *            .psci            <  å        O               ç             �         îcpu intermediate             ú            _   T        y  €         †   @        ˜           ¥  €         ²   @        Ä   €        Ñ   !        â           ñ   "                    ¼         cpu@1           cpu           arm,cortex-a53          *           .psci            <  å        O               ç             �         îcpu intermediate             ú            _   T        y  €         †   @        ˜           ¥  €         ²   @        Ä   €        Ñ   !        â           ñ   "                    ¼         cpu@2           cpu           arm,cortex-a53          *           .psci            <  å        O               ç             �         îcpu intermediate             ú            _   T        y  €         †   @        ˜           ¥  €         ²   @        Ä   €        Ñ   !        â           ñ   "                    ¼         cpu@3           cpu           arm,cortex-a53          *           .psci            <  å        O               ç             �         îcpu intermediate             ú            _   T        y  €         †   @        ˜           ¥  €         ²   @        Ä   €        Ñ   !        â           ñ   "                    ¼         cpu@100         cpu           arm,cortex-a73          *           .psci            <           O      #         ç            �         îcpu intermediate             ú   $        _   Ó        y           †   @        ˜           ¥           ²   @        Ä           Ñ   %        â           ñ   "           &         ¼         cpu@101         cpu           arm,cortex-a73          *          .psci            <           O      #         ç            �         îcpu intermediate             ú   $        _   Ó        y           †   @        ˜           ¥           ²   @        Ä           Ñ   %        â           ñ   "           &         ¼         cpu@102         cpu           arm,cortex-a73          *          .psci            <           O      #         ç            �         îcpu intermediate             ú   $        _   Ó        y           †   @        ˜           ¥           ²   @        Ä           Ñ   %        â           ñ   "           &         ¼         cpu@103         cpu           arm,cortex-a73          *          .psci            <           O      #         ç            �         îcpu intermediate             ú   $        _   Ó        y           †   @        ˜           ¥           ²   @        Ä           Ñ   %        â           ñ   "           &         ¼         idle-states         þpsci       cpu-sleep             arm,idle-state                             3   È        D   È        T            ¼         cluster-sleep-0           arm,idle-state                            3   ú        D  �        T  è         ¼         cluster-sleep-1           arm,idle-state                            3   ú        D  �        T           ¼   #         l2-cache0             cache           e           {           ˆ   @        š            q         ¼   !      l2-cache1             cache           e           {           ˆ   @        š            q         ¼   %         opp-table-0           operating-points-v2           ±         ¼   ^   opp-300000000            Ä    á£          Ë 	‰h      opp-320000000            Ä    Ð          Ë 	¡Ò      opp-340000000            Ä    Cý          Ë 	º<      opp-360000000            Ä    u*          Ë 	Ò¦      opp-380000000            Ä    ¦W          Ë 	ë      opp-400000000            Ä    ×„          Ë 
z      opp-420000000            Ä    ±          Ë 
ä      opp-460000000            Ä    k          Ë 
L¸      opp-500000000            Ä    Íe          Ë 
}Œ      opp-540000000            Ä     /¿          Ë 
®`      opp-580000000            Ä    "’          Ë 
ß4      opp-620000000            Ä    $ôs          Ë       opp-653000000            Ä    &ëý@         Ë YF      opp-698000000            Ä    )š¢€         Ë ºî      opp-743000000            Ä    ,IGÀ         Ë –      opp-800000000            Ä    /¯          Ë –¨         pmu-a53           arm,cortex-a53-pmu              '                    (      pmu-a73           arm,cortex-a73-pmu              '                    )      psci              arm,psci-1.0            5smc       fixed-factor-clock-13m            fixed-factor-clock          Š             ç   *        —           ¡           ¬clk13m           ¼   5      oscillator            fixed-clock         Š            ¿Œº€        ¬clk26m           ¼   *      timer             arm,armv8-timer             '      @                                               
             soc                      +             simple-bus           Ï   efuse@8000000         %    mediatek,mt8183-efuse mediatek,efuse            *                                   +         	  Ödisabled          interrupt-controller@c000000              arm,gic-v3          Ý               '         î      P  *                                @              A             B                        	                ¼   '   ppi-partitions     interrupt-partition-0                                ¼   (      interrupt-partition-1                                ¼   )            syscon@c530000            mediatek,mt8183-mcucfg syscon           *    S                 Š            ¼         interrupt-controller@c530a80          .    mediatek,mt8183-sysirq mediatek,mt6577-sysirq            î        Ý               '        *    S
€       P         ¼         cpu-debug@d410000         &    arm,coresight-cpu-debug arm,primecell           *    A                  ç   +   .      	   îapb_pclk                     cpu-debug@d510000         &    arm,coresight-cpu-debug arm,primecell           *    Q                  ç   +   .      	   îapb_pclk                     cpu-debug@d610000         &    arm,coresight-cpu-debug arm,primecell           *    a                  ç   +   .      	   îapb_pclk                     cpu-debug@d710000         &    arm,coresight-cpu-debug arm,primecell           *    q                  ç   +   .      	   îapb_pclk                     cpu-debug@d810000         &    arm,coresight-cpu-debug arm,primecell           *    �                  ç   +   .      	   îapb_pclk                     cpu-debug@d910000         &    arm,coresight-cpu-debug arm,primecell           *    ‘                  ç   +   .      	   îapb_pclk                     cpu-debug@da10000         &    arm,coresight-cpu-debug arm,primecell           *    ¡                  ç   +   .      	   îapb_pclk                     cpu-debug@db10000         &    arm,coresight-cpu-debug arm,primecell           *    ±                  ç   +   .      	   îapb_pclk                     syscon@10000000            mediatek,mt8183-topckgen syscon         *                      Š            ¼         syscon@10001000            mediatek,mt8183-infracfg syscon         *                     Š                       ¼   +      syscon@10003000           mediatek,mt8183-pericfg syscon          *     0                Š            ¼   Q      pinctrl@10005000              mediatek,mt8183-pinctrl          *     P            ò             è             ç             é             Ó             Ò             Å             ó              °              D  iocfg0 iocfg1 iocfg2 iocfg3 iocfg4 iocfg5 iocfg6 iocfg7 iocfg8 eint          #        3           ?   ,           À         î               ±           Ý            ¼   ,   i2c0-pins            ¼   =   pins_i2c            K  R  S        R            i2c1-pins            ¼   I   pins_i2c            K  Q  T        R            i2c2-pins            ¼   ?   pins_i2c            K  g  h        R            i2c3-pins            ¼   G   pins_i2c            K  2  3        R            i2c4-pins            ¼   >   pins_i2c            K  i  j        R            i2c5-pins            ¼   L   pins_i2c            K  0  1        R            spi0-pins            ¼   @   pins_spi            K  U  V  W  X         g         mmc0-default-pins            ¼   T   pins_cmd_dat          $  K  {  €  }  „  ~  �    ‚  z         t         �      pins_clk            K  |         Ž      pins_rst            K  …         �         mmc0-uhs-pins            ¼   U   pins_cmd_dat          $  K  {  €  }  „  ~  �    ‚  z         t        �   
        �   e      pins_clk            K  |        �   
        Ž   f      pins_ds         K  ƒ        �   
        Ž   f      pins_rst            K  …        �   
         �         mmc1-default-pins            ¼   X   pins_cmd_dat            K       "  !           t         �      pins_clk            K           t         Ž      pins_pmu            K  ²   ¦          ¬         mmc1-pins            ¼   Y   pins_cmd_dat            K       "  !          �            t        �   e      pins_clk            K          �           Ž   f         t         spi1-pins            ¼   H   pins_spi            K  ¡  ¢  £  ¤         g         spi2-pins            ¼   J   pins_spi            K         ^         g         spi3-pins            ¼   K   pins_spi            K                 g         spi4-pins            ¼   M   pins_spi            K                 g         spi5-pins            ¼   N   pins_spi            K                 g         pwm1-pins            ¼   F   pins_pwm            K  Z            syscon@10006000       )    mediatek,mt8183-scpsys syscon simple-mfd            *     `           power-controller          !    mediatek,mt8183-power-controller                         +            ¸            ¼   E   power-domain@0          *             ç         +   /   +   7         îaudio audio1 audio2         ¸          power-domain@1          *           Ì   +        ¸          power-domain@2          *                        +            ¸      power-domain@3          *                        +            ¸           Þ   -   power-domain@4          *           ¸          power-domain@5          *           ¸          power-domain@6          *           Ì   +        ¸                power-domain@7          *         X   ç         .       .      .      .      .      .      .      .      .      .   	      5   îmm mm-0 mm-1 mm-2 mm-3 mm-4 mm-5 mm-6 mm-7 mm-8 mm-9            Ì   +        ì   /                     +            ¸      power-domain@8          *         @   ç         0       0   	   0      0      0      0      0         .   îcam cam-0 cam-1 cam-2 cam-3 cam-4 cam-5 cam-6           Ì   +        ì   /        ¸          power-domain@9          *   	         ç      "   1   	   1            îisp isp-0 isp-1         Ì   +        ì   /        ¸          power-domain@10         *   
        ì   /        ¸          power-domain@11         *           ì   /        ¸          power-domain@12         *         @   ç      &      #   2       2      2      2      2      2         -   îvpu vpu1 vpu-0 vpu-1 vpu-2 vpu-3 vpu-4 vpu-5            Ì   +        ì   /                     +            ¸      power-domain@13         *            ç      $         îvpu2            Ì   +        ¸          power-domain@14         *            ç      %         îvpu3            Ì   +        ¸                      watchdog@10007000             mediatek,mt8183-wdt         *     p                            ¼   R      syscon@1000c000       "    mediatek,mt8183-apmixedsys syscon           *     À                Š            ¼   B      pwrap@1000d000            mediatek,mt8183-pwrap           *     Ð                pwrap                  ¹            ç      )   +         	   îspi wrap       pmic              mediatek,mt6358          î        Ý           ù   ,   ¶      adc           mediatek,mt6358-auxadc                   audio-codec           mediatek,mt6358-sound                     regulators            mediatek,mt6358-regulator      buck_vdram1         2vdram1          A ¡         Y ÚL        q  0Ô        †             ¢        ¶             buck_vcore          2vcore           A ¡         Y ½¶        q  j        †   È         ¢        ¶             buck_vpa            2vpa         A ¡         Y 7±Ð        q  ÃP        †   ú        ¶             buck_vproc11            2vproc11         A ¡         Y ½¶        q  j        †   È         ¢        ¶                ¼   &      buck_vproc12            2vproc12         A ¡         Y ½¶        q  j        †   È         ¢        ¶                ¼         buck_vgpu           2vgpu            A 	‰h        Y »         q  j        †   È        ¶               Î   3        å †          ¼   -      buck_vs2            2vs2         A ¡         Y ÚL        q  0Ô        †             ¢      buck_vmodem         2vmodem          A ¡         Y ½¶        q  j        †  „         ¢        ¶             buck_vs1            2vs1         A B@        Y '{l        q  0Ô        †             ¢      ldo_vdram2          2vdram2          A 	'À        Y w@        †  ä      ldo_vsim1           2vsim1           A ð         Y /M`        †        ldo_vibr            2vibr            A O€        Y 2Z         †   <      ldo_vrf12           2vrf12           A O€        Y O€        †   x      ldo_vio18           2vio18           A w@        Y w@        †  
Œ         ¢         ¼   W      ldo_vusb            2vusb            A -ÆÀ        Y /M`        †           ¢      ldo_vcamio          2vcamio          A w@        Y w@        †  E      ldo_vcamd           2vcamd           A »         Y w@        †  E      ldo_vcn18           2vcn18           A w@        Y w@        †        ldo_vfe28           2vfe28           A *¹€        Y *¹€        †        ldo_vsram_proc11            2vsram_proc11            A ¡         Y ½¶        q  j        †   ð         ¢      ldo_vcn28           2vcn28           A *¹€        Y *¹€        †        ldo_vsram_others            2vsram_others            A ¡         Y ½¶        q  j        †   ð         ¢      ldo_vsram_gpu         
  2vsram_gpu           A øP        Y B@        q  j        †   ð        Î   -        å †          ¼   3      ldo_vxo22           2vxo22           A !‘À        Y !‘À        †   x         ¢      ldo_vefuse          2vefuse          A ð         Y ýà        †        ldo_vaux18          2vaux18          A w@        Y w@        †        ldo_vmch            2vmch            A ,@         Y 2Z         †   <         ¼   Z      ldo_vbif28          2vbif28          A *¹€        Y *¹€        †        ldo_vsram_proc12            2vsram_proc12            A ¡         Y ½¶        q  j        †   ð         ¢      ldo_vcama1          2vcama1          A w@        Y -ÆÀ        †  E      ldo_vemc            2vemc            A ,@         Y 2Z         †   <         ¼   V      ldo_vio28           2vio28           A *¹€        Y *¹€        †        ldo_va12            2va12            A O€        Y O€        †           ¢      ldo_vrf18           2vrf18           A w@        Y w@        †   x      ldo_vcn33           2vcn33           A 2Z         Y 5gà        †        ldo_vcama2          2vcama2          A w@        Y -ÆÀ        †  E      ldo_vmc         2vmc         A w@        Y 2Z         †   <         ¼   [      ldo_vldo28          2vldo28          A *¹€        Y -ÆÀ        †        ldo_vaud28          2vaud28          A *¹€        Y *¹€        †        ldo_vsim2           2vsim2           A ð         Y /M`        †           rtc           mediatek,mt6358-rtc       keys              mediatek,mt6358-keys       power              t               home               f               keyboard@10010000         .    mediatek,mt8183-keypad mediatek,mt6779-keypad           *                            º            ç   *         îkpd       	  Ödisabled          scp@10500000              mediatek,mt8183-scp          *    P             \       �€      	  sram cfg                   ®            ç   +            îmain               4      	  Ödisabled             ¼   z      timer@10017000        ,    mediatek,mt8183-timer mediatek,mt6765-timer         *    p                       È            ç   5      iommu@10205000            mediatek,mt8183-m4u         *     P                       ¦           -   6   7   8   9   :   ;   <        <            ¼   b      mailbox@10238000              mediatek,mt8183-gce         *    #€       @                ¢           I            ç   +            îgce          ¼   _      auxadc@11001000       .    mediatek,mt8183-auxadc mediatek,mt8173-auxadc           *                      ç   +   #         îmain                       Öokay             ¼   A      serial@11002000       *    mediatek,mt8183-uart mediatek,mt6577-uart           *                             [            ç   *   +         	   îbaud bus            Öokay          serial@11003000       *    mediatek,mt8183-uart mediatek,mt6577-uart           *     0                       \            ç   *   +         	   îbaud bus          	  Ödisabled          serial@11004000       *    mediatek,mt8183-uart mediatek,mt6577-uart           *     @                       ]            ç   *   +         	   îbaud bus          	  Ödisabled          i2c@11005000              mediatek,mt8183-i2c          *     P                     €               W            ç   +   W   +   *      	   îmain dma            —                        +          	  Ödisabled          i2c@11007000              mediatek,mt8183-i2c          *     p              €       €               Q            ç   +   
   +   *      	   îmain dma            —                        +            Öokay            Udefault         c   =        ¿ †       i2c@11008000              mediatek,mt8183-i2c          *     €                     €               R            ç   +      +   *   +   G         îmain dma arb            —                        +            Öokay            Udefault         c   >        ¿ B@      i2c@11009000              mediatek,mt8183-i2c          *     �             €       €               S            ç   +      +   *   +   I         îmain dma arb            —                        +            Öokay            Udefault         c   ?        ¿ †       spi@1100a000              mediatek,mt8183-spi                      +            *                             x            ç      6         +            îparent-clk sel-clk spi-clk          Öokay            Udefault         c   @        m          thermal-sensor@1100b000         �             mediatek,mt8183-thermal         *     °                 ç   +   	   +   #         îtherm auxadc            —   +                   L           ž   A        ®   B        Â   C        Îcalibration-data             ¼   }      svs@1100bc00              mediatek,mt8183-svs         *     ¼                                   ç   +   	         îmain            Â   D   C      (  Îsvs-calibration-data t-calibration-data       pwm@1100e000              mediatek,mt8183-disp-pwm            *     à                       €           ß   E           í            ç         +   5         îmain mm       pwm@11006000              mediatek,mt8183-pwm         *     `                í         0   ç   +      +      +      +      +      +            îtop main pwm1 pwm2 pwm3 pwm4            Öokay            c   F        Udefault       i2c@1100f000              mediatek,mt8183-i2c          *     ð                     €               T            ç   +      +   *      	   îmain dma            —                        +            Öokay            Udefault         c   G        ¿ †       spi@11010000              mediatek,mt8183-spi                      +            *                            |            ç      6         +   8         îparent-clk sel-clk spi-clk          Öokay            Udefault         c   H        m          i2c@11011000              mediatek,mt8183-i2c          *                 €       €               U            ç   +   9   +   *      	   îmain dma            —                        +            Öokay            Udefault         c   I        ¿ †       spi@11012000              mediatek,mt8183-spi                      +            *                            �            ç      6         +   ;         îparent-clk sel-clk spi-clk          Öokay            Udefault         c   J        m          spi@11013000              mediatek,mt8183-spi                      +            *    0                       ‚            ç      6         +   <         îparent-clk sel-clk spi-clk          Öokay            Udefault         c   K        m          i2c@11014000              mediatek,mt8183-i2c          *    @             €       €               ƒ            ç   +   H   +   *   +   G         îmain dma arb            —                        +          	  Ödisabled          i2c@11015000              mediatek,mt8183-i2c          *    P                     €               „            ç   +   J   +   *   +   I         îmain dma arb            —                        +          	  Ödisabled          i2c@11016000              mediatek,mt8183-i2c          *    `                     €               V            ç   +   D   +   *   +   E         îmain dma arb            —                        +            Öokay            Udefault         c   L        ¿ B@      i2c@11017000              mediatek,mt8183-i2c          *    p             €       €               …            ç   +   F   +   *   +   E         îmain dma arb            —                        +          	  Ödisabled          spi@11018000              mediatek,mt8183-spi                      +            *    €                       †            ç      6         +   K         îparent-clk sel-clk spi-clk          Öokay            Udefault         c   M        m          spi@11019000              mediatek,mt8183-spi                      +            *    �                       ‡            ç      6         +   L         îparent-clk sel-clk spi-clk          Öokay            Udefault         c   N        m          i2c@1101a000              mediatek,mt8183-i2c          *                  €       €               X            ç   +   b   +   *      	   îmain dma            —                        +          	  Ödisabled          i2c@1101b000              mediatek,mt8183-i2c          *    °                     €               Y            ç   +   c   +   *      	   îmain dma            —                        +          	  Ödisabled          usb@11201000          #    mediatek,mt8183-mtu3 mediatek,mtu3           *            .      >              	  mac ippc                   H           ø   O      P            ç   +   =   +   Z         îsys_ck ref_ck           ý   Q      e                     +            Ï      	  Ödisabled       usb@11200000          '    mediatek,mt8183-xhci mediatek,mtk-xhci          *                      mac                I            ç   +   =   +   Z         îsys_ck ref_ck         	  Ödisabled             clock-controller@11220000              mediatek,mt8183-audiosys syscon         *    "                 Š            ¼   S   audio-controller              mediatek,mt8183-audio                  ¡           —   R         	  audiosys            ß   E         D   ç   S      S      S      S      S      S      S      S      S      S      S      S   
   S   	   S      S       +   /   +   7                  0            H            L            K            O      t      u      v      w      x      y      z      {      |      }      ~         *     w   îaud_afe_clk aud_dac_clk aud_dac_predis_clk aud_adc_clk aud_adc_adda6_clk aud_apll22m_clk aud_apll24m_clk aud_apll1_tuner_clk aud_apll2_tuner_clk aud_i2s1_bclk_sw aud_i2s2_bclk_sw aud_i2s3_bclk_sw aud_i2s4_bclk_sw aud_tdm_clk aud_tml_clk aud_infra_clk mtkaif_26m_clk top_mux_audio top_mux_aud_intbus top_syspll_d2_d4 top_mux_aud_1 top_apll1_ck top_mux_aud_2 top_apll2_ck top_mux_aud_eng1 top_apll1_d8 top_mux_aud_eng2 top_apll2_d8 top_i2s0_m_sel top_i2s1_m_sel top_i2s2_m_sel top_i2s3_m_sel top_i2s4_m_sel top_i2s5_m_sel top_apll12_div0 top_apll12_div1 top_apll12_div2 top_apll12_div3 top_apll12_div4 top_apll12_divb top_clk26m_clk           mmc@11230000              mediatek,mt8183-mmc          *    #             õ                        M            ç         +      +            îsource hclk source_cg           Öokay            Udefault state_uhs           c   T            U        *           4ëÂ          B         T         c         r         ƒ         ‹        ‘ (            V        ¬   W        ¹              É      U         à      mmc@11240000              mediatek,mt8183-mmc          *    $             á                        N            ç      	   +      +   (         îsource hclk source_cg           Öokay            Udefault state_uhs           c   X            Y        *           4ëÂ          î         ÿ                           '         ‹            Z        ¬   [         .                  à      dsi-phy@11e50000              mediatek,mt8183-mipi-tx         *    å                  ç   B           Š            D            ¬mipi_tx0_pll            Â   \        Îcalibration-data             ¼   w      efuse@11f10000        %    mediatek,mt8183-efuse mediatek,efuse            *    ñ                              +      socinfo-data1@4c            *   L         socinfo-data2@60            *   `         calib@180           *  €            ¼   C      calib@190           *  �            ¼   \      calib@580           *  €   d         ¼   D         t-phy@11f40000        .    mediatek,mt8183-tphy mediatek,generic-tphy-v2                        +           Ï        ô             Öokay       usb-phy@0           *                ç   *         îref         D           O           Öokay             ¼   O      usb-phy@700         *     	          ç   *         îref         D           Öokay             ¼   P         syscon@13000000           mediatek,mt8183-mfgcfg syscon           *                      Š           ß   E            ¼   ]      gpu@13040000          '    mediatek,mt8183b-mali arm,mali-bifrost          *            @       $                                     _job mmu gpu          ç   ]            ß   E      E      E           ocore0 core1 core2            ú   ^        ‚   -      syscon@14000000           mediatek,mt8183-mmsys syscon            *                      Š                      Ž   _          _              •   _                   ¼   .   port                         +       endpoint@0          *            ­   `         ¼   c      endpoint@1          *           ­   a         ¼   g            dma-controller0@14001000              mediatek,mt8183-mdp3-rdma           *                     •   _                 ½              ß   E            ç   .      .           Ñ   b            Ž   _              _                   Ø         mdp3-rsz0@14003000            mediatek,mt8183-mdp3-rsz            *     0                •   _     0            ½               ç   .         mdp3-rsz1@14004000            mediatek,mt8183-mdp3-rsz            *     @                •   _     @            ½               ç   .         dma-controller@14005000           mediatek,mt8183-mdp3-wrot           *     P                •   _     P            ½      !        ß   E            ç   .           Ñ   b           Ø         mdp3-wdma@14006000            mediatek,mt8183-mdp3-wdma           *     `                •   _     `            ½      "        ß   E            ç   .   )        Ñ   b         ovl@14008000              mediatek,mt8183-disp-ovl            *     €                       á           ß   E            ç   .           Ñ   b            •   _     €       ports                        +       port@0          *       endpoint            ­   c         ¼   `         port@1          *      endpoint            ­   d         ¼   e               ovl@14009000              mediatek,mt8183-disp-ovl-2l         *     �                       â           ß   E            ç   .           Ñ   b           •   _     �       ports                        +       port@0          *       endpoint            ­   e         ¼   d         port@1          *      endpoint            ­   f         ¼   i               ovl@1400a000              mediatek,mt8183-disp-ovl-2l         *                             ã           ß   E            ç   .           Ñ   b           •   _             ports                        +       port@0                       +            *       endpoint@1          *           ­   g         ¼   a         port@1                       +            *      endpoint@1          *           ­   h         ¼   k               rdma@1400b000             mediatek,mt8183-disp-rdma           *     °                       ä           ß   E            ç   .           Ñ   b           ã           •   _     °       ports                        +       port@0          *       endpoint            ­   i         ¼   f         port@1          *      endpoint            ­   j         ¼   m               rdma@1400c000             mediatek,mt8183-disp-rdma           *     À                       å           ß   E            ç   .           Ñ   b           ã           •   _     À       ports                        +       port@0                       +            *       endpoint@1          *           ­   k         ¼   h         port@1                       +            *      endpoint@1          *           ­   l         ¼   y               color@1400e000        6    mediatek,mt8183-disp-color mediatek,mt8173-disp-color           *     à                       ç           ß   E            ç   .           •   _     à       ports                        +       port@0          *       endpoint            ­   m         ¼   j         port@1          *      endpoint            ­   n         ¼   o               ccorr@1400f000            mediatek,mt8183-disp-ccorr          *     ð                       è           ß   E            ç   .           •   _     ð       ports                        +       port@0          *       endpoint            ­   o         ¼   n         port@1          *      endpoint            ­   p         ¼   q               aal@14010000              mediatek,mt8183-disp-aal            *                            é           ß   E            ç   .           •   _             ports                        +       port@0          *       endpoint            ­   q         ¼   p         port@1          *      endpoint            ­   r         ¼   s               gamma@14011000            mediatek,mt8183-disp-gamma          *                           ê           ß   E            ç   .           •   _            ports                        +       port@0          *       endpoint            ­   s         ¼   r         port@1          *      endpoint            ­   t         ¼   u               dither@14012000           mediatek,mt8183-disp-dither         *                            ë           ß   E            ç   .           •   _             ports                        +       port@0          *       endpoint            ­   u         ¼   t         port@1          *      endpoint            ­   v         ¼   x               dsi@14014000              mediatek,mt8183-dsi         *    @                       ì           ß   E            ç   .      .       w         îengine digital hs           —   .           ø   w        ûdphy          	  Ödisabled       ports                        +       port@0          *       endpoint            ­   x         ¼   v         port@1          *      endpoint                   dpi@14015000              mediatek,mt8183-dpi         *    P                       í           ß   E            ç   .   "   .   !   B            îpixel engine pll          	  Ödisabled       ports                        +       port@0                       +            *       endpoint@1          *           ­   y         ¼   l         port@1                       +            *      endpoint@1          *                  mutex@14016000            mediatek,mt8183-disp-mutex          *    `                       Ù           ß   E           ½   ‚   ƒ        •   _     `          larb@14017000             mediatek,mt8183-smi-larb            *    p                ì   /         ç   .      .           ß   E            îapb smi          ¼   6      smi@14019000              mediatek,mt8183-smi-common          *    �                  ç   .       .       .      .            îapb smi gals0 gals1         ß   E            ¼   /      mdp3-ccorr@1401c000           mediatek,mt8183-mdp3-ccorr          *    À                •   _     À            ½      1         ç   .   +      syscon@15020000           mediatek,mt8183-imgsys syscon           *                     Š            ¼   1      larb@15021000             mediatek,mt8183-smi-larb            *                    ì   /         ç   1   	   1   	   .            îapb smi gals            ß   E   	         ¼   ;      larb@1502f000             mediatek,mt8183-smi-larb            *    ð                ì   /         ç   1      1      .   	         îapb smi gals            ß   E   	         ¼   8      syscon@16000000           mediatek,mt8183-vdecsys syscon          *                      Š            ¼   {      video-codec@16020000              mediatek,mt8183-vcodec-dec        °  *                                                      0            @            P            h            p            x            „              (  misc ld top cm ad av pp hwd hwq hwb hwg                ú         8  Ñ   b       b   !   b   "   b   #   b   $   b   %   b   &           z           {        ß   E   
         ç   {             îvdec          larb@16010000             mediatek,mt8183-smi-larb            *                     ì   /         ç   {       {            îapb smi         ß   E   
         ¼   7      syscon@17000000           mediatek,mt8183-vencsys syscon          *                      Š            ¼   |      larb@17010000             mediatek,mt8183-smi-larb            *                     ì   /         ç   |       |             îapb smi         ß   E            ¼   :      vcodec@17020000           mediatek,mt8183-vcodec-enc          *                            ÷         8  Ñ   b   �   b   ‚   b   „   b   ‡   b   ˆ   b   ‰   b   Š           z        ß   E            ç   |         	   îvenc_sel          jpeg-encoder@17030000         +    mediatek,mt8183-jpgenc mediatek,mtk-jpgenc          *                            ù           Ñ   b   …   b   †        ß   E            ç   |            îjpgenc        syscon@19000000            mediatek,mt8183-ipu_conn syscon         *                      Š            ¼   2      syscon@19010000           mediatek,mt8183-ipu_adl syscon          *                     Š         syscon@19180000       !    mediatek,mt8183-ipu_core0 syscon            *                     Š         syscon@19280000       !    mediatek,mt8183-ipu_core1 syscon            *    (                 Š         syscon@1a000000           mediatek,mt8183-camsys syscon           *                      Š            ¼   0      larb@1a001000             mediatek,mt8183-smi-larb            *                     ì   /         ç   0       0       .            îapb smi gals            ß   E            ¼   <      larb@1a002000             mediatek,mt8183-smi-larb            *                      ì   /         ç   0   	   0   	   .            îapb smi gals            ß   E            ¼   9         thermal-zones      cpu-thermal         #   d        9  ô        G   }            W  ˆ   trips      trip-point0         i 	         u  Ð         Epassive       trip-point1         i 8€        u  Ð         Epassive          ¼   ~      cpu-crit            i Á8        u  Ð      	   Ecritical             cooling-maps       map0            €   ~      0  …   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        ”         map1            €   ~      0  …   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        ”               soc-thermal         9  è        #   ú        G   }           W  ˆ   trips      trip-alert          i L        u  Ð         Epassive       trip-crit           i †         u  Ð      	   Ecritical                gpu-thermal         9  è        #   ú        G   }           W  ˆ   trips      trip-alert          i L        u  Ð         Epassive       trip-crit           i †         u  Ð      	   Ecritical                md1-thermal         9  è        #   ú        G   }           W  ˆ   trips      trip-alert          i L        u  Ð         Epassive       trip-crit           i †         u  Ð      	   Ecritical                cpu-little-thermal          9  è        #   ú        G   }           W  ˆ   trips      trip-alert          i L        u  Ð         Epassive       trip-crit           i †         u  Ð      	   Ecritical                cpu-big-thermal         9  è        #   ú        G   }           W  ˆ   trips      trip-alert          i L        u  Ð         Epassive       trip-crit           i †         u  Ð      	   Ecritical                tsabb-thermal           9  è        #   ú        G   }           W  ˆ   trips      trip-alert          i L        u  Ð         Epassive       trip-crit           i †         u  Ð      	   Ecritical                   memory@40000000         memory          *    @       €         chosen          ¡serial0:921600n8          reserved-memory                      +            Ï   memory@50000000           shared-dma-pool         *    P       �           ­         ¼   4         thermistor            murata,ncp03wf104           ´ w@        ¾ óp        É            Ö   A             	compatible interrupt-parent #address-cells #size-cells model chassis-type i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 i2c9 i2c10 i2c11 ovl0 ovl-2l0 ovl-2l1 rdma0 rdma1 serial0 opp-shared phandle opp-hz opp-microvolt required-opps clocks clock-names operating-points-v2 proc-supply cpu device_type reg enable-method capacity-dmips-mhz cpu-idle-states dynamic-power-coefficient i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache #cooling-cells mediatek,cci entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified interrupts #clock-cells clock-div clock-mult clock-output-names clock-frequency ranges status #interrupt-cells interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux mediatek,pull-up-adv bias-disable input-enable bias-pull-up bias-pull-down drive-strength output-high #power-domain-cells mediatek,infracfg domain-supply mediatek,smi interrupts-extended #io-channel-cells mediatek,dmic-mode regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-always-on regulator-allowed-modes regulator-coupled-with regulator-coupled-max-spread linux,keycodes wakeup-source memory-region mediatek,larbs #iommu-cells #mbox-cells pinctrl-names pinctrl-0 mediatek,pad-select #thermal-sensor-cells resets mediatek,auxadc mediatek,apmixedsys nvmem-cells nvmem-cell-names power-domains #pwm-cells phys mediatek,syscon-wakeup reset-names pinctrl-1 bus-width max-frequency cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v cap-mmc-hw-reset no-sdio no-sd hs400-ds-delay vmmc-supply vqmmc-supply assigned-clocks assigned-clock-parents non-removable cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 cap-sdio-irq no-mmc keep-power-in-suspend #phy-cells mediatek,discth interrupt-names power-domain-names mali-supply mboxes mediatek,gce-client-reg remote-endpoint mediatek,gce-events iommus #dma-cells mediatek,rdma-fifo-size phy-names mediatek,scp mediatek,vdecsys polling-delay-passive polling-delay thermal-sensors sustainable-power temperature hysteresis trip cooling-device contribution stdout-path no-map pullup-uv pullup-ohm pulldown-ohm io-channels 