Ðþí     8 ¨   (            
s p                             $    mediatek,mt8188-evb mediatek,mt8188                                  +         !   7MediaTek MT8188 evaluation board       aliases          =/soc/dp-intf@1c015000            F/soc/dp-intf@1c113000            O/soc/dpi@1c112000            T/soc/dsc@1c009000            Y/soc/ethdr@1c114000          `/soc/mailbox@10320000            e/soc/mailbox@10330000            j/soc/merge0@1c014000             q/soc/merge@1c10c000          x/soc/merge@1c10d000          /soc/merge@1c10e000          †/soc/merge@1c10f000          �/soc/merge@1c110000          ”/soc/mutex@1c016000          ›/soc/mutex@1c101000          ¢/soc/padding@1c11d000            «/soc/padding@1c11e000            ´/soc/padding@1c11f000            ½/soc/padding@1c120000            Æ/soc/padding@1c121000            Ï/soc/padding@1c122000            Ø/soc/padding@1c123000            á/soc/padding@1c124000            ê/soc/rdma@1c104000           õ/soc/rdma@1c105000           /soc/rdma@1c106000          /soc/rdma@1c107000          /soc/rdma@1c108000          !/soc/rdma@1c109000          ,/soc/rdma@1c10a000          7/soc/rdma@1c10b000          B/soc/serial@11001100            J/soc/i2c@11280000           O/soc/i2c@11e00000           T/soc/i2c@11281000           Y/soc/i2c@11282000           ^/soc/i2c@11e01000           c/soc/i2c@11ec0000           h/soc/i2c@11ec1000           m/soc/mmc@11230000         cpus                         +       cpu@0           rcpu           arm,cortex-a55          ~            ‚psci            �w5”                    ³              Ã  €         Ð   @        â   €        ï  €         ü   @           €                   ,               @           O   	      cpu@100         rcpu           arm,cortex-a55          ~           ‚psci            �w5”                    ³              Ã  €         Ð   @        â   €        ï  €         ü   @           €                   ,               @           O   
      cpu@200         rcpu           arm,cortex-a55          ~           ‚psci            �w5”                    ³              Ã  €         Ð   @        â   €        ï  €         ü   @           €                   ,               @           O         cpu@300         rcpu           arm,cortex-a55          ~           ‚psci            �w5”                    ³              Ã  €         Ð   @        â   €        ï  €         ü   @           €                   ,               @           O         cpu@400         rcpu           arm,cortex-a55          ~           ‚psci            �w5”                    ³              Ã  €         Ð   @        â   €        ï  €         ü   @           €                   ,               @           O         cpu@500         rcpu           arm,cortex-a55          ~           ‚psci            �w5”                    ³              Ã  €         Ð   @        â   €        ï  €         ü   @           €                   ,               @           O         cpu@600         rcpu           arm,cortex-a78          ~           ‚psci            �šøÚ                     ³              Ã           Ð   @        â           ï           ü   @                              ,              @           O         cpu@700         rcpu           arm,cortex-a78          ~           ‚psci            �šøÚ                     ³              Ã           Ð   @        â           ï           ü   @                              ,              @           O         cpu-map    cluster0       core0           W   	      core1           W   
      core2           W         core3           W         core4           W         core5           W         core6           W         core7           W               idle-states         [psci       cpu-off-l             arm,idle-state          h                    �   2        ¡   _        ±  D        O         cpu-off-b             arm,idle-state          h                    �   -        ¡   Œ        ±  ä        O         cluster-off-l             arm,idle-state          h                  �   7        ¡   ›        ±  H        O         cluster-off-b             arm,idle-state          h                  �   2        ¡   È        ±  è        O            l2-cache0             cache           Â           Å           Ò   @        ä                       Î        O         l2-cache1             cache           Â           Å           Ò   @        ä                       Î        O         l3-cache              cache           Â           Å            Ò   @        ä            Î        O            oscillator-13m            fixed-clock         Ü            � Æ]@        éclk13m          O   3      oscillator-26m            fixed-clock         Ü            �Œº€        éclk26m          O   5      oscillator-32k            fixed-clock         Ü            �  €         éclk32k        opp-table-gpu             operating-points-v2          ü        O   [   opp-390000000               >í€         Æ           ÿ      opp-431000000               °‰À         öì           ÿ      opp-473000000               1h@         	'À           ÿ      opp-515000000               ²FÀ         	X”           ÿ      opp-556000000               !#ã          	‰h           ÿ      opp-598000000               #¤Á€         	º<           ÿ      opp-640000000               &%           	ë           ÿ      opp-670000000               'ïc€         
ä           ÿ      opp-700000000               )¹'          
L¸           ÿ      opp-730000000               +‚ê€         
}Œ           ÿ      opp-760000000               -L®          
®`           ÿ      opp-790000000               /q€         
ß4           ÿ      opp-835000000               1ÅÀ         (r           ÿ      opp-880000000               4s¼          q°           ÿ      opp-915000000               6‰ÊÀ         ÓX           �      opp-915000000-5             6‰ÊÀ         ¢„           0      opp-915000000-6             6‰ÊÀ         q°           p      opp-950000000               8ŸÙ€         5            �      opp-950000000-5             8ŸÙ€         ÓX           0      opp-950000000-6             8ŸÙ€         q°           p         pmu-a55           arm,cortex-a55-pmu                      -                  pmu-a78           arm,cortex-a78-pmu                      -                  psci              arm,psci-1.0            ‰smc       sound           8         	  Jdisabled          thermal-zones      cpu-little0-thermal         Q  è        _   –        u          trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ         H  ¡   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little1-thermal         Q  è        _   –        u         trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ         H  ¡   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little2-thermal         Q  è        _   –        u         trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ         H  ¡   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-little3-thermal         Q  è        _   –        u         trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ         H  ¡   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big0-thermal            Q  è        _   d        u         trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ           ¡   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            cpu-big1-thermal            Q  è        _   d        u         trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ           ¡   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ            apu-thermal         Q  è        _   ú        u          trips      trip-alert0         … L        ‘  Ð        ypassive       trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical                gpu-thermal         Q  è        _   ú        u         trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ           ¡   ÿÿÿÿÿÿÿÿ            gpu1-thermal            Q  è        _   ú        u         trips      trip-alert0         … L        ‘  Ð        ypassive         O         trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical             cooling-maps       map0            œ           ¡   ÿÿÿÿÿÿÿÿ            adsp-thermal            Q  è        _   ú        u         trips      trip-alert0         … L        ‘  Ð        ypassive       trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical                vdo-thermal         Q  è        _   ú        u         trips      trip-alert0         … L        ‘  Ð        ypassive       trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical                infra-thermal           Q  è        _   ú        u         trips      trip-alert0         … L        ‘  Ð        ypassive       trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical                cam1-thermal            Q  è        _   ú        u         trips      trip-alert0         … L        ‘  Ð        ypassive       trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical                cam2-thermal            Q  è        _   ú        u         trips      trip-alert0         … L        ‘  Ð        ypassive       trip-alert1         … s        ‘  Ð        yhot       trip-crit           … †         ‘          	  ycritical                   timer             arm,armv8-timer                   @  -                                             
               � Æ]@      soc                      +             simple-bus          °                                ´   performance-controller@11bc10             mediatek,cpufreq-hw          ~     ¼            ½0               »           O         interrupt-controller@c000000              arm,gic-v3          Õ           æ                        ý         ~                                    -      	               O      ppi-partitions     interrupt-partition-0              	   
                    O         interrupt-partition-1                         O               syscon@10000000            mediatek,mt8188-topckgen syscon         ~                      Ü           O   "      syscon@10001000       #    mediatek,mt8188-infracfg-ao syscon          ~                     Ü                      O   #      syscon@10003000           mediatek,mt8188-pericfg syscon          ~     0                Ü           O   A      pinctrl@10005000              mediatek,mt8188-pinctrl       `  ~     P            À             á             â             ê              °              0  (iocfg0 iocfg_rm iocfg_lt iocfg_lm iocfg_rt eint          2        B           N               °         ý        -       ë               Õ           O       adsp-uart-pins     pins-tx-rx          Z  #  $         i2c0-pins           O   J   pins-bus            Z  8  7        a   Ë         i2c1-pins           O   T   pins-bus            Z  :  9        a   Ë         i2c2-pins           O   K   pins-bus            Z  <  ;        a   Ë         i2c3-pins           O   L   pins-bus            Z  >  =        a   Ë         i2c4-pins           O   U   pins-bus            Z  @  ?        a   Ë         i2c5-pins           O   W   pins-bus            Z  B  A        a   Ë         i2c6-pins           O   X   pins-bus            Z  D  C        a   Ë         mmc0-default-pins           O   G   pins-cmd-dat          $  Z  ¡     Ÿ  ž  š  ™  ˜  —  œ         n        {           a   e      pins-clk            Z  �        {           Š   f      pins-rst            Z  ›        {           a   e         mmc0-uhs-pins           O   H   pins-cmd-dat          $  Z  ¡     Ÿ  ž  š  ™  ˜  —  œ         n        {           a   e      pins-clk-ds         Z  �  ¢        {           Š   f      pins-rst            Z  ›        {           a   e         nor-pins            O   R   pins-io-ck          Z    }  €         Š      pins-io-cs          Z  ~  �  ‚         a         spi0-pins           O   ;   pins-spi            Z  E  F  G  H         ™         spi1-pins           O   =   pins-spi            Z  K  L  M  N         ™         spi2-pins           O   >   pins-spi            Z  O  P  Q  R         ™         uart0-pins          O   :   pins-rx-tx          Z              a            syscon@10006000       )    mediatek,mt8188-scpsys syscon simple-mfd            ~     `           power-controller          !    mediatek,mt8188-power-controller                         +            ¦           O   6   power-domain@0          ~                         +            ¦      power-domain@1          ~           º   !      "           Ámfg alt         Í   #                     +            ¦      power-domain@2          ~           ¦          power-domain@3          ~           ¦          power-domain@4          ~           ¦                power-domain@15         ~         à  º   "      "      "      "   
   "   3   "   4   "   =   "   ¹   "   ¾   $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $      $          û  Átop cam ccu img venc vdec wpe cfgck cfgxo ss-sram-cmn ss-sram-v0l0 ss-sram-v0l1 ss-sram-ve0 ss-sram-ve1 ss-sram-ifa ss-sram-cam ss-sram-v1l5 ss-sram-v1l6 ss-sram-rdr ss-iommu ss-imgcam ss-emi ss-subcmn-rdr ss-rsi ss-cmn-l4 ss-vdec1 ss-wpe ss-cvdo-ve1          Í   #                     +            ¦      power-domain@16         ~         H  º   "   »   "   À   %      %      %      %      %      %      %         A  Ácfgck cfgxo ss-gals ss-cmn ss-emi ss-iommu ss-larb ss-rsi ss-bus            Í   #                     +            ¦      power-domain@20         ~         0  º   "   º   "   ¿   &      &      &      &         8  Ácfgck cfgxo ss-vpp1-g5 ss-vpp1-g6 ss-vpp1-l5 ss-vpp1-l6         Í   #        ¦          power-domain@22         ~           º   '            Áss-vdec1-soc-l1         Í   #                     +            ¦      power-domain@23         ~           º   (            Áss-vdec2-l1         Í   #        ¦             power-domain@29         ~            º   "      "      "   	   "   ½        Ácam ccu bus cfgck           Í   #                     +            ¦      power-domain@30         ~         (  º   )       )      )      )      )         6  Áss-cam-l13 ss-cam-l14 ss-cam-mm0 ss-cam-mm1 ss-camsys           Í   #                     +            ¦      power-domain@32         ~            º   )      *       +          $  Áss-camb-sub ss-camb-raw ss-camb-yuv         ¦          power-domain@31         ~           º   )      ,       -          $  Áss-cama-sub ss-cama-raw ss-cama-yuv         ¦                power-domain@17         ~         (  º   "   ¼   "   Á   .       .      .         &  Ácfgck cfgxo ss-larb2 ss-larb3 ss-gals           Í   #                     +            ¦      power-domain@9          ~   	        º   "   @   "   ?      	  Ábus hdcp            Í   #        ¦          power-domain@18         ~           Í   #        ¦          power-domain@19         ~           Í   #        ¦             power-domain@24         ~            º   /       /      /      /         0  Áss-ve1-larb ss-ve1-core ss-ve1-gals ss-ve1-sram         Í   #        ¦          power-domain@21         ~           º   0      0           Áss-wpe-l7 ss-wpe-l7pce          Í   #        ¦                power-domain@5          ~           Í   #        º   1           Áss-pextp-fmem           ¦          power-domain@7          ~           º   "   0   "   1        Áseninf0 seninf1         ¦          power-domain@6          ~           ¦          power-domain@10         ~   
        º   "   E   "   D      	  Ábus main            Í   #                     +            ¦      power-domain@11         ~           Í   #                     +            ¦      power-domain@14         ~           º   "   F        Áasm         Í   #        ¦          power-domain@13         ~           º   "   S   "      2            Áa1sys intbus adspck         Í   #        ¦          power-domain@12         ~           Í   #        ¦                power-domain@8          ~           º   1         	  Áethermac            Í   #        ¦                watchdog@10007000             mediatek,mt8188-wdt         ~     p                 ß                   O   7      syscon@1000c000       "    mediatek,mt8188-apmixedsys syscon           ~     À                Ü           O   !      timer@10017000        ,    mediatek,mt8188-timer mediatek,mt6765-timer         ~    p                -      	               º   3      pwrap@10024000        3    mediatek,mt8188-pwrap mediatek,mt8195-pwrap syscon          ~    @                (pwrap           -       ó               º   #      #          	  Áspi wrap       pmic              mediatek,mt6359          ý        Õ           ÷                  Þ      adc           mediatek,mt6359-auxadc                   audio-codec           mediatek,mt6359-codec         regulators            mediatek,mt6359-regulator      buck_vs1            .vs1         = 5         U !‘À        m             ‰      buck_vgpu11         .vgpu11          = €        U 7        �  ˆ        m   È        ²                   ‰      buck_vmodem         .vmodem          = €        U Èà        �  *        m   È      buck_vpu            .vpu         = €        U 7        �  ˆ        m   È        ²                   ‰      buck_vcore          .vcore           = €        U Ö         �  ˆ        m   È        ²                   ‰      buck_vs2            .vs2         = 5         U j         m             ‰      buck_vpa            .vpa         = ¡         U 7±Ð        m  ,      buck_vproc2         .vproc2          = €        U 7        �  L        m   È        ²                buck_vproc1         .vproc1          = €        U 7        �  L        m   È        ²                buck_vcore_sshub            .vcore_sshub         = €        U 7      buck_vgpu11_sshub           .vgpu11_sshub            = €        U 7      ldo_vaud18          .vaud18          = w@        U w@        m   ð      ldo_vsim1           .vsim1           = ð         U /M`      ldo_vibr            .vibr            = O€        U 2Z       ldo_vrf12           .vrf12           = Èà        U Ö          ‰      ldo_vusb            .vusb            = -ÆÀ        U -ÆÀ        m  À         ‰      ldo_vsram_proc2         .vsram_proc2         = ¡         U ½¶        �  L        m   ð         ‰      ldo_vio18           .vio18           = ð         U ýà        m  À         ‰      ldo_vcamio          .vcamio          = ð         U ýà      ldo_vcn18           .vcn18           = w@        U w@        m   ð      ldo_vfe28           .vfe28           = *¹€        U *¹€        m   x      ldo_vcn13           .vcn13           = »         U Ö       ldo_vcn33_1_bt          .vcn33_1_bt          = *¹€        U 5gà      ldo_vcn33_1_wifi            .vcn33_1_wifi            = *¹€        U 5gà      ldo_vaux18          .vaux18          = w@        U w@        m   ð         ‰      ldo_vsram_others            .vsram_others            = ¡         U ½¶        �  ˆ        m   ð      ldo_vefuse          .vefuse          = ð         U „€      ldo_vxo22           .vxo22           = w@        U !‘À         ‰      ldo_vrfck           .vrfck           = ã`        U ð       ldo_vrfck_1         .vrfck_1         = ëÀ        U j       ldo_vbif28          .vbif28          = *¹€        U *¹€        m   ð      ldo_vio28           .vio28           = *¹€        U 2Z          ‰      ldo_vemc            .vemc            = ,@         U 2Z       ldo_vemc_1          .vemc_1          = &%         U 2Z         O   E      ldo_vcn33_2_bt          .vcn33_2_bt          = *¹€        U 5gà      ldo_vcn33_2_wifi            .vcn33_2_wifi            = *¹€        U 5gà      ldo_va12            .va12            = O€        U Ö          ‰      ldo_va09            .va09            = 5         U O€      ldo_vrf18           .vrf18           = ð         U žP      ldo_vsram_md          	  .vsram_md            = ¡         U ½¶        �  *        m   ð      ldo_vufs            .vufs            = ð         U ýà        O   F      ldo_vm18            .vm18            = ð         U ýà         ‰      ldo_vbbck           .vbbck           = Èà        U O€      ldo_vsram_proc1         .vsram_proc1         = ¡         U ½¶        �  L        m   ð         ‰      ldo_vsim2           .vsim2           = ð         U /M`      ldo_vsram_others_sshub          .vsram_others_sshub          = ¡         U ½¶         rtc           mediatek,mt6358-rtc             spmi@10027000         *    mediatek,mt8188-spmi mediatek,mt8195-spmi            ~    p            �                (pmif spmimst            Ê   "   8        Ú   "   ¬        º   #      #       "   8      (  Ápmif_sys_ck pmif_tmr_ck spmimst_clk_mux       iommu@10315000            mediatek,mt8188-iommu-infra         ~    1P                -                     ñ           O   P      mailbox@10320000              mediatek,mt8188-gce         ~    2        @         -       â               þ           º   #           O   \      mailbox@10330000              mediatek,mt8188-gce         ~    3        @         -       ä               þ           º   #           O   ^      scp@10720000              mediatek,mt8188-scp-dual            ~    r                 (cfg                      +           ´        P             Jokay       scp@0             mediatek,scp-core           ~               (sram            -      Î               Jokay            
   4        O   _      scp@d0000             mediatek,scp-core           ~    ð         (sram            -      Ï             	  Jdisabled             audio-controller@10b10000             mediatek,mt8188-afe         ~    ±                 Ê   "   S        Ú   "   „      ´  º   5   !   	   !   
   "   ³   "   ´   "   µ   "   ¶   "   ¸   "   S   "      "       "   E   "   Q   "   M   "   N   "   O   "   P   2       "   „   "   †   "   ·   "   T   "   R      ÿ  Áclk26m apll1 apll2 apll12_div0 apll12_div1 apll12_div2 apll12_div3 apll12_div9 top_a1sys_hp top_aud_intbus top_audio_h top_audio_local_bus top_dptx top_i2so1 top_i2so2 top_i2si1 top_i2si2 adsp_audio_26m apll1_d4 apll2_d4 apll12_div4 top_a2sys top_aud_iec          -      6                  6           &   7         	  -audiosys            Í   #        9   "      	  Jdisabled            O         adsp@10b80000             mediatek,mt8188-dsp       @  ~    ¸              Ð             ¸°            ¸ð                (cfg sram sec bus            Ê   "   D        º   "   D   "   E        Áaudiodsp adsp_bus           K   8   9        Rrx tx              6         	  Jdisabled          mailbox@10b86100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         ~    ¸a                -      Þ               þ            O   8      mailbox@10b87100          4    mediatek,mt8188-adsp-mbox mediatek,mt8186-adsp-mbox         ~    ¸q                -      ß               þ            O   9      clock-controller@10b91100             mediatek,mt8188-adsp-audio26m           ~    ¹                Ü           O   2      serial@11001100       *    mediatek,mt8188-uart mediatek,mt6577-uart           ~                     -       �               º   5   #         	  Ábaud bus            Jokay            ]default         k   :      serial@11001200       *    mediatek,mt8188-uart mediatek,mt6577-uart           ~                     -       Ž               º   5   #         	  Ábaud bus          	  Jdisabled          serial@11001300       *    mediatek,mt8188-uart mediatek,mt6577-uart           ~                     -       �               º   5   #         	  Ábaud bus          	  Jdisabled          serial@11001400       *    mediatek,mt8188-uart mediatek,mt6577-uart           ~                     -      Ó               º   5   #         	  Ábaud bus          	  Jdisabled          adc@11002000          .    mediatek,mt8188-auxadc mediatek,mt8173-auxadc           ~                      º   #           Ámain                       Jokay          syscon@11003000       "    mediatek,mt8188-pericfg-ao syscon           ~     0                Ü           O   1      spi@1100a000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ~                      -       ¿               º   "   y   "      #           Áparent-clk sel-clk spi-clk          Jokay            ]default         k   ;      thermal-sensor@1100b000           mediatek,mt8188-lvts-ap         ~     °                -       È               º   #           &   #           u   <        �lvts-calib-data-1           ’           O         pwm@1100e000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           ~     à                º   "   '   #   /        Ámain mm         -       Ë               ¨         	  Jdisabled          pwm@1100f000          2    mediatek,mt8188-disp-pwm mediatek,mt8183-disp-pwm           ~     ð                º   "   (   #   F        Ámain mm         -                     ¨         	  Jdisabled          spi@11010000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ~                     -       À               º   "   y   "      #   2        Áparent-clk sel-clk spi-clk          Jokay            ]default         k   =      spi@11012000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ~                     -       Á               º   "   y   "      #   3        Áparent-clk sel-clk spi-clk          Jokay            ]default         k   >      spi@11013000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ~    0                -       Â               º   "   y   "      #   4        Áparent-clk sel-clk spi-clk        	  Jdisabled          spi@11018000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ~    €                -       Ã               º   "   y   "      #   8        Áparent-clk sel-clk spi-clk        	  Jdisabled          spi@11019000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +            ~    �                -       Ä               º   "   y   "      #   9        Áparent-clk sel-clk spi-clk        	  Jdisabled          usb@11201000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ~            -ÿ     >              	  (mac ippc            ´                     ?                      +           -       €               Ê   "   )        Ú   "   v        º   1   	   "   Å   1   
        Ásys_ck ref_ck mcu_ck            ³   ?      @            ¸        Æ   A  h         	  Jdisabled       usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ~                       (mac         -       �               Ê   "   *        Ú   "   v        º   1   
        Ásys_ck          Jokay             ethernet@11021000         ;    mediatek,mt8188-gmac mediatek,mt8195-gmac snps,dwmac-5.10a          ~           @         -      Ì               Ýmacirq        0  º   1       1      "   A   "   B   "   C   1         .  Áaxi apb mac_main ptp_ref rmii_internal mac_cg           Ê   "   A   "   B   "   C        Ú   "       "   ¢   "   £           6           í   #        þ   B           C        !   D        4           ?           J          	  Jdisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           W                                 a           q           O   B      rx-queues-config            �            —        O   C   queue0           ¨        »          queue1           ¨        »          queue2           ¨        »          queue3           ¨        »             tx-queues-config            Ó            é        O   D   queue0           ¨        û            	         queue1           ¨        û           	         queue2           ¨        û           	         queue3           ¨        û           	               mmc@11230000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ~    #             õ                           ƒ                º   "      #      #      #   M      !  Ásource hclk source_cg crypto_clk            Jokay                        H        .ëÂ          <         N         ]         l         y         Š         ’         ˜        ¦   E        ²   F        ]default state_uhs           k   G        ¿   H      mmc@11240000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ~    $             ë                           ‡               º   "      #      #   $        Ásource hclk source_cg           Ê   "           Ú   "   �      	  Jdisabled          mmc@11250000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc          ~    %             æ                           ˆ               º   "      #      #   A        Ásource hclk source_cg           Ê   "           Ú   "   �      	  Jdisabled          thermal-sensor@11278000           mediatek,mt8188-lvts-mcu            ~    '€                -       Ê               º   #           &   #            u   <        �lvts-calib-data-1           ’           O         i2c@11280000              mediatek,mt8188-i2c          ~    (             " €       €        -       —               É           º   I       #   7      	  Ámain dma                         +            Jokay            ]default         k   J        � €      i2c@11281000              mediatek,mt8188-i2c          ~    (            "€       €        -       ’               É           º   I      #   7      	  Ámain dma                         +            Jokay            ]default         k   K        � €      i2c@11282000              mediatek,mt8188-i2c          ~    (             "€       €        -       “               É           º   I      #   7      	  Ámain dma                         +            Jokay            ]default         k   L        � €      clock-controller@11283000             mediatek,mt8188-imp-iic-wrap-c          ~    (0                Ü           O   I      usb@112a1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ~    *       -ÿ    *>              	  (mac ippc            ´            *        ?                      +           -                     Ê   "   -        Ú   "   v        º   1      "   Ë   1           Ásys_ck ref_ck mcu_ck            ³   M            ¸        Æ   A  p         	  Jdisabled       usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ~                       (mac         -                     Ê   "   .        Ú   "   v        º   1           Ásys_ck          Jokay             usb@112b1000          #    mediatek,mt8188-mtu3 mediatek,mtu3           ~    +       -ÿ    +>              	  (mac ippc            ´            +        ?                      +           -                     Ê   "   ,        Ú   "   v        º   1      "   É   1           Ásys_ck ref_ck mcu_ck            ³   N            ¸        Æ   A  `         	  Jdisabled       usb@0         '    mediatek,mt8188-xhci mediatek,mtk-xhci          ~                       (mac         -                     Ê   "   +        Ú   "   v        º   1           Ásys_ck          Jokay             pcie@112f0000         *    mediatek,mt8188-pcie mediatek,mt8192-pcie           ~    /                	  (pcie-mac            ´‚                                  Ó       ÿ        rpci         Ý                         +         0  º   #   L   #   #   #   &   #   +   #   C   1         /  Ápl_250m tl_26m tl_96m tl_32k peri_26m peri_mem          Õ           -                   `  î                  O                      O                     O                     O           ü                       	       P      ÿÿ        	            ³   Q         	  	(pcie-phy               6           &   7           -mac       	  Jdisabled       interrupt-controller                         Õ            ý        O   O         spi@1132c000          (    mediatek,mt8188-nor mediatek,mt8186-nor         ~    2À                º   "   X   1      1           Áspi sf axi          Ê   "   X        -      9                            +            Jokay            ]default         k   R   flash@0           jedec,spi-nor           ~            	2u          t-phy@11c20700        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3           ´        Â                         +              6         	  Jdisabled       pcie-phy@0          ~               º   "   Ä        Áref         	D           O   Q         hdmi-phy@11d5f000         2    mediatek,mt8188-hdmi-phy mediatek,mt8195-hdmi-phy           ~    Õð                º   #           Ápll_ref         éhdmi_txpll          Ü            	D            	O   
        	^         	  Jdisabled            O   z      dsi-phy@11c80000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         ~    È                 º   5        émipi_tx0_pll            Ü            	D          	  Jdisabled            O   s      dsi-phy@11c90000          0    mediatek,mt8188-mipi-tx mediatek,mt8183-mipi-tx         ~    É                 º   5        émipi_tx0_pll            Ü            	D          	  Jdisabled            O   t      i2c@11e00000              mediatek,mt8188-i2c          ~    à             "        €        -       ˜               É           º   S       #   7      	  Ámain dma                         +            Jokay            ]default         k   T        � €      i2c@11e01000              mediatek,mt8188-i2c          ~    à            "€       €        -       ”               É           º   S      #   7      	  Ámain dma                         +            Jokay            ]default         k   U        � €      clock-controller@11e02000             mediatek,mt8188-imp-iic-wrap-w          ~    à                 Ü           O   S      t-phy@11e30000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           ´        ã             Jokay       usb-phy@0           ~               º   "   Ê   !           Áref da_ref          	D           O   N         t-phy@11e40000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           ´        ä             Jokay       usb-phy@0           ~               º   "   Æ   !           Áref da_ref          	D           O   ?      usb-phy@700         ~              º   !      5        Áref da_ref          	D           O   @         t-phy@11e80000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           ´        è             Jokay       usb-phy@0           ~               º   "   Ì   !           Áref da_ref          	D           O   M         i2c@11ec0000              mediatek,mt8188-i2c          ~    ì             "€       €        -       •               É           º   V       #   7      	  Ámain dma                         +            Jokay            ]default         k   W        � €      i2c@11ec1000              mediatek,mt8188-i2c          ~    ì            "        €        -       –               É           º   V      #   7      	  Ámain dma                         +            Jokay            ]default         k   X        � €      clock-controller@11ec2000              mediatek,mt8188-imp-iic-wrap-en         ~    ì                 Ü           O   V      efuse@11f20000        ,    mediatek,mt8188-efuse mediatek,mt8186-efuse         ~    ò                              +      dp-calib@1a0            ~              O   {      lvts1-calib@1ac         ~  ¬   @        O   <      gpu-speedbin@581            ~  �           	p               O   Z      socinfo-data1@7a0           ~            socinfo-data2@7e0           ~  à            gpu@13000000          )    mediatek,mt8188-mali arm,mali-valhall-jm            ~             @         º   Y          0  -                   ~             }               Ýjob mmu gpu         u   Z      
  �speed-bin           	u   [           6      6      6           	‰core0 core1 core2           @         	  Jdisabled            O         clock-controller@13fbf000             mediatek,mt8188-mfgcfg          ~    ûð                Ü           O   Y      syscon@14000000           mediatek,mt8188-vppsys0 syscon          ~                      Ü           O   $      dma-controller@14001000           mediatek,mt8188-mdp3-rdma           ~                     	œ           º   $         <  K   \         \         \         \         \              	§   ]   €           6           	®   ^                  	Æ              	Ú   _      display@14002000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ~                      º   $            	®   ^                 display@14004000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ~     @                º   $   "        	®   ^      @          display@14005000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ~     P                -      F               º   $   
           6           	®   ^      P          display@14006000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ~     `                º   $           	®   ^      `            	Æ    %      display@14007000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ~     p                º   $   #        	®   ^      p          display@14008000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ~     €                -      I               º   $   $           6           	®   ^      €          display@14009000          2    mediatek,mt8188-mdp3-ovl mediatek,mt8195-mdp3-ovl           ~     �                -      J               º   $   %           6           	®   ^      �            	§   ]   ‚      display@1400a000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ~                      º   $              6           	®   ^                 display@1400b000          2    mediatek,mt8188-mdp3-tcc mediatek,mt8195-mdp3-tcc           ~     °                º   $           	®   ^      °          display@1400c000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ~     À                	œ           º   $           	§   ]   ƒ           6           	®   ^      À            	Æ    +      mutex@1400f000            mediatek,mt8188-vpp-mutex           ~     ð                -      P               º   $              6           	®   ^      ð          smi@14012000              mediatek,mt8188-smi-common-vpp          ~                     º   $      $           Áapb smi            6           O   `      smi@14013000              mediatek,mt8188-smi-larb            ~    0                º   $      $           Áapb smi            6           	ç           	ø   `        O   c      iommu@14018000            mediatek,mt8188-iommu-vpp           ~    €       P         º   $           Ábclk            -      R                  6           ñ           
   a   b   c   d   e   f        O   ]      dma-controller@14f09000           mediatek,mt8188-mdp3-rdma           ~    ð�                	œ           º   &   
        	§   g   ¤           6           	®   ^   	  �            	Æ  …  ©      dma-controller@14f0a000           mediatek,mt8188-mdp3-rdma           ~    ð                 	œ           º   &           	§   ]   À           6           	®   ^   	               	Æ  †  ª      display@14f0c000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ~    ðÀ                º   &           	®   ^   	  À          display@14f0d000          0    mediatek,mt8188-mdp3-fg mediatek,mt8195-mdp3-fg         ~    ðÐ                º   &           	®   ^   	  Ð          display@14f0f000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ~    ðð                º   &   "        	®   ^   	  ð          display@14f10000          2    mediatek,mt8188-mdp3-hdr mediatek,mt8195-mdp3-hdr           ~    ñ                 º   &   $        	®   ^   
             display@14f12000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ~    ñ                 -      j               º   &   #           6           	®   ^   
             display@14f13000          2    mediatek,mt8188-mdp3-aal mediatek,mt8195-mdp3-aal           ~    ñ0                -      k               º   &   %           6           	®   ^   
  0          display@14f15000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ~    ñP                º   &           	®   ^   
  P            	Æ  ‘  °      display@14f16000          2    mediatek,mt8188-mdp3-rsz mediatek,mt8183-mdp3-rsz           ~    ñ`                º   &           	®   ^   
  `            	Æ  ’  ±      display@14f18000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ~    ñ€                º   &           	®   ^   
  €          display@14f19000          6    mediatek,mt8188-mdp3-tdshp mediatek,mt8195-mdp3-tdshp           ~    ñ�                º   &           	®   ^   
  �          display@14f1a000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           ~    ñ                 º   &              6           	®   ^   
             display@14f1b000          6    mediatek,mt8188-mdp3-merge mediatek,mt8195-mdp3-merge           ~    ñ°                º   &              6           	®   ^   
  °          display@14f1d000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ~    ñÐ                -      u               º   &              6           	®   ^   
  Ð          display@14f1e000          6    mediatek,mt8188-mdp3-color mediatek,mt8195-mdp3-color           ~    ñà                -      v               º   &              6           	®   ^   
  à          display@14f21000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ~    ò                º   &              6           	®   ^               display@14f22000          :    mediatek,mt8188-mdp3-padding mediatek,mt8195-mdp3-padding           ~    ò                 º   &              6           	®   ^                display@14f24000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ~    ò@                	œ           º   &           	§   g   ¦           6           	®   ^     @            	Æ     ¬      display@14f25000          4    mediatek,mt8188-mdp3-wrot mediatek,mt8183-mdp3-wrot         ~    òP                	œ           º   &           	§   ]   Â           6           	®   ^     P            	Æ  ¡  ­      clock-controller@14e00000             mediatek,mt8188-wpesys          ~    à                 Ü           O   0      clock-controller@14e02000             mediatek,mt8188-wpesys-vpp0         ~    à                 Ü         smi@14e04000              mediatek,mt8188-smi-larb            ~    à@                º   0      0           Áapb smi            6           	ç           	ø   `        O   e      syscon@14f00000           mediatek,mt8188-vppsys1 syscon          ~    ð                 Ü           O   &      mutex@14f01000            mediatek,mt8188-vpp-mutex           ~    ð                -      {               º   &   &           6           	®   ^   	            smi@14f02000              mediatek,mt8188-smi-larb            ~    ð                 º   &      &           Áapb smi            6           	ç           	ø   h        O   w      smi@14f03000              mediatek,mt8188-smi-larb            ~    ð0                º   &      &           Áapb smi            6           	ç           	ø   `        O   d      clock-controller@15000000             mediatek,mt8188-imgsys          ~                      Ü         clock-controller@15110000              mediatek,mt8188-imgsys1-dip-top         ~                     Ü                    clock-controller@15130000             mediatek,mt8188-imgsys1-dip-nr          ~                     Ü                    clock-controller@15220000             mediatek,mt8188-imgsys-wpe1         ~    "                 Ü                    clock-controller@15330000             mediatek,mt8188-ipesys          ~    3                 Ü                    clock-controller@15520000             mediatek,mt8188-imgsys-wpe2         ~    R                 Ü                    clock-controller@15620000             mediatek,mt8188-imgsys-wpe3         ~    b                 Ü                    clock-controller@16000000             mediatek,mt8188-camsys          ~                      Ü           O   )      clock-controller@1604f000             mediatek,mt8188-camsys-rawa         ~    ð                Ü                      O   ,      clock-controller@1606f000             mediatek,mt8188-camsys-yuva         ~    ð                Ü                      O   -      clock-controller@1608f000             mediatek,mt8188-camsys-rawb         ~    ð                Ü                      O   *      clock-controller@160af000             mediatek,mt8188-camsys-yuvb         ~    
ð                Ü                      O   +      clock-controller@17200000             mediatek,mt8188-ccusys          ~                      Ü         video-decoder@18000000            mediatek,mt8188-vcodec-dec           ~                   @                ´                    `         	§   ]  æ                     +           	Ú   _   video-codec@10000             mediatek,mtk-vcodec-lat         ~                      Ê   "   4        Ú   "   x         º   "   4   '      '      "   x        Ásel vdec lat top            -      Ä             H  	§   ]  à   ]  á   ]  â   ]  ã   ]  ä   ]  å   ]  æ   ]  ç   ]  è           6         video-codec@25000             mediatek,mtk-vcodec-core            ~     P                Ê   "   4        Ú   "   x         º   "   4   (      (      "   x        Ásel vdec lat top            -      Ã             X  	§   g  À   g  Á   g  Â   g  Ã   g  Ä   g  Å   g  Æ   g  Ç   g  È   g  É   g  Ê           6            smi@1800d000              mediatek,mt8188-smi-larb            ~     Ð                º   '       '            Áapb smi            6           	ç           	ø   `        O   f      clock-controller@1800f000             mediatek,mt8188-vdecsys-soc         ~     ð                Ü           O   '      smi@1802e000              mediatek,mt8188-smi-larb            ~    à                º   (       (            Áapb smi            6           	ç           	ø   h        O   y      clock-controller@1802f000             mediatek,mt8188-vdecsys         ~    ð                Ü           O   (      clock-controller@1a000000             mediatek,mt8188-vencsys         ~                      Ü           O   /      smi@1a010000              mediatek,mt8188-smi-larb            ~                     º   /      /           Áapb smi            6           	ç           	ø   h        O   x      video-encoder@1a020000            mediatek,mt8188-vcodec-enc          ~                                  +           Ê   "   3        Ú   "   p        º   /         	  Ávenc_sel            -      a             X  	§   g      g  ¡   g  ¢   g  £   g  ¤   g  ¶   g  ·   g  ¸   g  ¹   g  ª   g  º           6           	Ú   _      jpeg-encoder@1a030000         +    mediatek,mt8188-jpgenc mediatek,mtk-jpgenc          ~                     º   /           Ájpgenc          -      b                	§   g  §   g  ¨   g  ©   g  ¬           6         jpeg-decoder@1a040000         .    mediatek,mt8188-jpgdec mediatek,mt2701-jpgdec           ~                     º   /       /           Ájpgdec-smi jpgdec           -      c             0  	§   g  ­   g  ®   g  ²   g  ³   g  ´   g  µ           6         ovl@1c000000          2    mediatek,mt8188-disp-ovl mediatek,mt8195-disp-ovl           ~                      º   %            -      |               	§   g              6           	®   \             ports                        +       port@0          ~       endpoint             port@1          ~      endpoint            
   i        O   j               rdma@1c002000         4    mediatek,mt8188-disp-rdma mediatek,mt8195-disp-rdma         ~                      º   %           -      ~               	§   ]               6           	®   \             ports                        +       port@0          ~       endpoint            
   j        O   i         port@1          ~      endpoint            
   k        O   l               color@1c003000        6    mediatek,mt8188-disp-color mediatek,mt8173-disp-color           ~     0                º   %           -                        6           	®   \     0       ports                        +       port@0          ~       endpoint            
   l        O   k         port@1          ~      endpoint            
   m        O   n               ccorr@1c004000        6    mediatek,mt8188-disp-ccorr mediatek,mt8192-disp-ccorr           ~     @                º   %           -      €                  6           	®   \     @       ports                        +       port@0          ~       endpoint            
   n        O   m         port@1          ~      endpoint            
   o        O   p               aal@1c005000          2    mediatek,mt8188-disp-aal mediatek,mt8183-disp-aal           ~     P                º   %           -      �                  6           	®   \     P       ports                        +       port@0          ~       endpoint            
   p        O   o         port@1          ~      endpoint            
   q        O   r               gamma@1c006000        6    mediatek,mt8188-disp-gamma mediatek,mt8195-disp-gamma           ~     `                º   %           -      ‚                  6           	®   \     `       ports                        +       port@0          ~       endpoint            
   r        O   q         port@1          ~      endpoint                   dither@1c007000       8    mediatek,mt8188-disp-dither mediatek,mt8183-disp-dither         ~     p                º   %           -      ƒ                  6           	®   \     p       ports                        +       port@0          ~       endpoint             port@1          ~      endpoint                   dsi@1c008000              mediatek,mt8188-dsi         ~     €                º   %      %      s        Áengine digital hs           -      „               ³   s        	(dphy               6           &   %         	  Jdisabled          dsc@1c009000          2    mediatek,mt8188-disp-dsc mediatek,mt8195-disp-dsc           ~     �                º   %   
        -      …                  6           	®   \     �          dsi@1c012000              mediatek,mt8188-dsi         ~                     º   %   	   %      t        Áengine digital hs           -      Ž               ³   t        	(dphy               6           &   %   	      	  Jdisabled          merge0@1c014000       6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ~    @                º   %      .           Ámerge merge_async           -      �                  6           	®   \     @          dp-intf@1c015000              mediatek,mt8188-dp-intf         ~    P                º   %       %      !           Ápixel engine pll            -      ‘                  6         	  Jdisabled          mutex@1c016000            mediatek,mt8188-disp-mutex          ~    `                º   %           -      ’                  6           	®   \     `            	Æ  >      postmask@1c01a000         <    mediatek,mt8188-disp-postmask mediatek,mt8192-disp-postmask         ~                     º   %           -      •                  6           	®   \             ports                        +       port@0          ~       endpoint             port@1          ~      endpoint                   syscon@1c01d000           mediatek,mt8188-vdosys0 syscon          ~    Ð                Ü                      K   \               	®   \     Ð            O   %      smi@1c022000              mediatek,mt8188-smi-larb            ~                     º   %      %           Áapb smi            6           	ç            	ø   h        O   u      smi@1c023000              mediatek,mt8188-smi-larb            ~    0                º   %      %           Áapb smi            6           	ç           	ø   `        O   a      smi@1c024000              mediatek,mt8188-smi-common-vdo          ~    @                º   %      %           Áapb smi            6           O   h      iommu@1c028000            mediatek,mt8188-iommu-vdo           ~    €       P         º   %           Ábclk            -      ¡                  6           ñ           
   u   v   w   x   y        O   g      syscon@1c100000           mediatek,mt8188-vdosys1 syscon          ~                     Ü                      K   \              	®   \                  O   .      mutex@1c101000            mediatek,mt8188-disp-mutex          ~                    º   .           -      î                  6           	®   \                 	Æ  Å      smi@1c102000              mediatek,mt8188-smi-larb            ~                     º   .       .            Áapb smi            6           	ç           	ø   h        O   v      smi@1c103000              mediatek,mt8188-smi-larb            ~    0                º   .      .           Áapb smi            6           	ç           	ø   `        O   b      rdma@1c104000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~    @                º   .           -      ï               	§   g   @           6           	œ           	®   \     @          rdma@1c105000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~    P                º   .           -      ð               	§   ]   `           6           	œ           	®   \     P          rdma@1c106000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~    `                º   .           -      ñ               	§   g   A           6           	œ           	®   \     `          rdma@1c107000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~    p                º   .           -      ò               	§   ]   a           6           	œ           	®   \     p          rdma@1c108000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~    €                º   .           -      ó               	§   g   B           6           	œ           	®   \     €          rdma@1c109000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~    �                º   .           -      ô               	§   ]   b           6           	œ           	®   \     �          rdma@1c10a000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~                     º   .           -      õ               	§   g   C           6           	œ           	®   \                rdma@1c10b000         4    mediatek,mt8188-vdo1-rdma mediatek,mt8195-vdo1-rdma         ~    °                º   .           -      ö               	§   ]   c           6           	œ           	®   \     °          merge@1c10c000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ~    À                º   .   	   .           Ámerge merge_async           -      ÷                  6           &   .           	®   \     À             
$      merge@1c10d000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ~    Ð                º   .   
   .           Ámerge merge_async           -      ø                  6           &   .           	®   \     Ð             
$      merge@1c10e000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ~    à                º   .      .           Ámerge merge_async           -      ù                  6           &   .           	®   \     à             
$      merge@1c10f000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ~    ð                º   .      .           Ámerge merge_async           -      ú                  6           &   .           	®   \     ð             
$      merge@1c110000        6    mediatek,mt8188-disp-merge mediatek,mt8195-disp-merge           ~                     º   .      .           Ámerge merge_async           -      û                  6           &   .           	®   \                   
8      dpi@1c112000          (    mediatek,mt8188-dpi mediatek,mt8195-dpi         ~                     º   .   8   .      .   =        Ápixel engine pll            -                        6           &   .         	  Jdisabled       ports                        +       port@0          ~       endpoint             port@1          ~      endpoint                   dp-intf@1c113000              mediatek,mt8188-dp-intf         ~    0                º   .   :   .      !           Ápixel engine pll            -                        6         	  Jdisabled          ethdr@1c114000        6    mediatek,mt8188-disp-ethdr mediatek,mt8195-disp-ethdr         p  ~    @            P            p            �                         °            À              4  (mixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds       h  º   .   0   .   +   .   .   .   ,   .   /   .   -   .   <   .   1   .   2   .   3   .   4   .   5   "         ƒ  Ámixer vdo_fe0 vdo_fe1 gfx_fe0 gfx_fe1 vdo_be adl_ds vdo_fe0_async vdo_fe1_async gfx_fe0_async gfx_fe1_async vdo_be_async ethdr_top          -      6               	§   ]   d   ]   e           6         (  &   .   1   .   2   .   3   .   4   .   5      p  	®   \     @       \     P       \     p       \     �       \             \     °       \     À          padding@1c11d000              mediatek,mt8188-disp-padding            ~    Ð                º   .              6           	®   \     Ð          padding@1c11e000              mediatek,mt8188-disp-padding            ~    à                º   .               6           	®   \     à          padding@1c11f000              mediatek,mt8188-disp-padding            ~    ð                º   .   !           6           	®   \     ð          padding@1c120000              mediatek,mt8188-disp-padding            ~                     º   .   "           6           	®   \                padding@1c121000              mediatek,mt8188-disp-padding            ~                    º   .   #           6           	®   \               padding@1c122000              mediatek,mt8188-disp-padding            ~                     º   .   $           6           	®   \                padding@1c123000              mediatek,mt8188-disp-padding            ~    0                º   .   %           6           	®   \     0          padding@1c124000              mediatek,mt8188-disp-padding            ~    @                º   .   &           6           	®   \     @          hdmi@1c300000             mediatek,mt8188-hdmi-tx         ÷           ~    0                  º   "   @   "   >   "   ?   &   .        Ábus hdcp hdcp24m hdmi-split         Ê   "   >        Ú   "   s        -      ®                  6   	        ³   z        	(hdmi          	  Jdisabled       i2c       2    mediatek,mt8188-hdmi-ddc mediatek,mt8195-hdmi-ddc           º   5      ports                        +       port@0          ~       endpoint             port@1          ~      endpoint                   edp-tx@1c500000           mediatek,mt8188-edp-tx          ~    P        €         -      ¤               u   {        �dp_calibration_data            6           
O  ¤      	  Jdisabled          dp-tx@1c600000            mediatek,mt8188-dp-tx           ~    `        €         -      Ê               u   {        �dp_calibration_data            6           
O        	  Jdisabled             chosen          
`serial0:115200n8          memory@40000000         rmemory          ~    @       €         reserved-memory                      +            ´   memory@50000000           shared-dma-pool         ~    P       �           
l        O   4            	compatible interrupt-parent #address-cells #size-cells model dp-intf0 dp-intf1 dpi1 dsc0 ethdr0 gce0 gce1 merge0 merge1 merge2 merge3 merge4 merge5 mutex0 mutex1 padding0 padding1 padding2 padding3 padding4 padding5 padding6 padding7 vdo1-rdma0 vdo1-rdma1 vdo1-rdma2 vdo1-rdma3 vdo1-rdma4 vdo1-rdma5 vdo1-rdma6 vdo1-rdma7 serial0 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 mmc0 device_type reg enable-method clock-frequency capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache performance-domains #cooling-cells phandle cpu entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-output-names opp-shared opp-hz opp-microvolt opp-supported-hw interrupts mediatek,platform status polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device dma-ranges #performance-domain-cells #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-up input-enable drive-strength bias-pull-down bias-disable #power-domain-cells clocks clock-names mediatek,infracfg mediatek,disable-extrst #sound-dai-cells interrupts-extended #io-channel-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-always-on regulator-ramp-delay regulator-allowed-modes assigned-clocks assigned-clock-parents #iommu-cells #mbox-cells memory-region power-domains resets reset-names mediatek,topckgen mboxes mbox-names pinctrl-names pinctrl-0 nvmem-cells nvmem-cell-names #thermal-sensor-cells #pwm-cells phys wakeup-source mediatek,syscon-wakeup interrupt-names mediatek,pericfg snps,axi-config snps,mtl-rx-config snps,mtl-tx-config snps,txpbl snps,rxpbl snps,clk-csr snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,rx-sched-sp snps,dcb-algorithm snps,map-to-dma-channel snps,tx-queues-to-use snps,tx-sched-wrr snps,priority snps,weight bus-width hs400-ds-delay max-frequency cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe cap-mmc-hw-reset no-sdio no-sd non-removable vmmc-supply vqmmc-supply pinctrl-1 clock-div bus-range linux,pci-domain interrupt-map interrupt-map-mask iommu-map iommu-map-mask phy-names spi-max-frequency #phy-cells mediatek,ibias mediatek,ibias_up bits operating-points-v2 power-domain-names #dma-cells iommus mediatek,gce-client-reg mediatek,gce-events mediatek,scp mediatek,larb-id mediatek,smi mediatek,larbs remote-endpoint mediatek,merge-mute mediatek,merge-fifo-en max-linkrate-mhz stdout-path no-map 