Ðþí  z   8  s   (              rÐ                                 radxa,rock-2f rockchip,rk3528                                    +            7Radxa ROCK 2F      aliases          =/pinctrl/gpio@ff610000           C/pinctrl/gpio@ffaf0000           I/pinctrl/gpio@ffb00000           O/pinctrl/gpio@ffb10000           U/pinctrl/gpio@ffb20000           [/soc/i2c@ffa58000            `/soc/mmc@ffbf0000            e/soc/mmc@ffc30000            j/soc/serial@ff9f0000          cpus                         +       cpu-map    cluster0       core0            r         core1            r         core2            r         core3            r               cpu@0             arm,cortex-a53           v             zcpu          †psci             ”               ›            ¯            º         cpu@1             arm,cortex-a53           v            zcpu          †psci             ”               ›            ¯            º         cpu@2             arm,cortex-a53           v            zcpu          †psci             ”               ›            ¯            º         cpu@3             arm,cortex-a53           v            zcpu          †psci             ”               ›            ¯            º            firmware       scmi              arm,scmi-smc             Â‚           Í   	                     +       protocol@14          v            Ó            º               opp-table-cpu             operating-points-v2           à         º      opp-1200000000           ë    G†Œ          ò Yø Yø Èà           œ@      opp-1416000000           ë    Tfr          ò H H Èà           œ@      opp-1608000000           ë    _Ø"          ò à˜ à˜ Èà           œ@      opp-1800000000           ë    kIÒ          ò Ô¼ Ô¼ Èà           œ@      opp-2016000000           ë    x)¸          ò Èà Èà Èà           œ@         opp-table-gpu             operating-points-v2          º   /   opp-300000000            ë    á£          ò Yø Yø B@               opp-500000000            ë    Íe          ò Yø Yø B@      opp-600000000            ë    #ÃF          ò Yø Yø B@      opp-700000000            ë    )¹'          ò »  »  B@      opp-800000000            ë    /¯          ò ~ð ~ð B@         pinctrl           rockchip,rk3528-pinctrl            
                     +            *         º      gpio@ff610000             rockchip,gpio-bank           v    ÿa                  ”     r     s        1       G            <        L           X                        d        y            º   \      gpio@ffaf0000             rockchip,gpio-bank           v    ÿ¯                  ”      ‘      ’        1       I            <        L           X                        d        y           Š               º   X      gpio@ffb00000             rockchip,gpio-bank           v    ÿ°                  ”     $     %        1       K            <        L           X          @             d        y           Š            gpio@ffb10000             rockchip,gpio-bank           v    ÿ±                  ”      ›      œ        1       L            <        L           X          `             d        y           Š            gpio@ffb20000             rockchip,gpio-bank           v    ÿ²                  ”      ä      å        1       N            <        L           X          €             d        y           Š               º   Z      pcfg-pull-up             ˜         º         pcfg-pull-down           ¥         º         pcfg-pull-none           ´         º         pcfg-pull-none-drv-level-0           ´        Á             º         pcfg-pull-none-drv-level-2           ´        Á            º         pcfg-pull-up-drv-level-2             ˜        Á            º         pcfg-pull-none-smt           ´         Ð         º         arm       clk       emmc       emmc-bus8         €  å                                                                                                         º   F      emmc-clk            å                     º   G      emmc-cmd            å                     º   H      emmc-strb           å                     º   I         eth       fephy      fephym0-led-link            å                     º   @      fephym0-led-spd         å                     º   A         fspi          gpu       hdmi          hsm       i2c0          i2c1       i2c1m0-xfer          å                                 º   3         i2c2       i2c2m1-xfer          å                                 º   5         i2c3          i2c4       i2c4-xfer            å                                  º   6         i2c5          i2c6          i2c7       i2c7-xfer            å                                 º   7         i2s0          i2s1          jtag          pcie          pdm       pmu       pwm0          pwm1       pwm1m0-pins         å                     º   8         pwm2       pwm2m0-pins         å                     º   9         pwm3          pwm4          pwm5          pwm6          pwm7          pwr       ref       rgmii         scr       sdio0      sdio0-bus4        @  å                                                          º   J      sdio0-clk           å                     º   K      sdio0-cmd           å                     º   L         sdio1      sdio1-bus4        @  å                                          	               º   M      sdio1-clk           å                     º   N      sdio1-cmd           å                     º   O         sdmmc      sdmmc-bus4        @  å                                                          º   P      sdmmc-clk           å                     º   Q      sdmmc-cmd           å                     º   R      sdmmc-det           å                     º   S      sdmmc-vol-ctrl-h            å                      º   ^         spdif         spi0          spi1          tsi0          tsi1          uart0      uart0m0-xfer             å                                 º   2         uart1         uart2         uart3         uart4         uart5         uart6         uart7         bluetooth      bt-wake-host-h          å                   host-wake-bt-h          å                      leds       state-led-b         å                      º   W         usb    usb-host-en         å                       º   ]         wifi       usb-wifi-pwr            å                      º   [      wifi-reg-on-h           å                      º   a      wifi-wake-host-h            å                         psci              arm,psci-1.0 arm,psci-0.2            �smc       reserved-memory                      +            *   shmem@10f000              arm,scmi-shmem           v     ð                 ó         º   	         timer             arm,armv8-timer       0  1                              
        clock-xin24m              fixed-clock         ún6         
xin24m           Ó             º         clock-gmac50m             fixed-clock         úúð€        
gmac0            Ó             º         soc           simple-bus          *    ü       ü       D                        +      pcie@fe000000         *    rockchip,rk3528-pcie rockchip,rk3568-pcie         0   v    þ        @      þO             ü                  dbi apb config          '       ÿ      (   ”      °      ±      ²      ®      ¯      $  1aclk_mst aclk_slv aclk_dbi pclk aux          zpci       H  1       œ          �          š          ›          ™          ž           =sys pmc msg legacy err msi          y           M                     `  `                                                                                             n                       Ž           ˜            	  �pcie-phy            Š            T  *       ü      ü                ü       ü       à                       @           §      d      b      	  ®pwr pipe                         +         	  ºdisabled       legacy-interrupt-controller          d                    1       ›                        y            º            interrupt-controller@fed01000             arm,gic-400       @   v    þÐ            þÐ              þÐ@             þÐ`                 1      	           d                     y            º         qos@ff200000              rockchip,rk3528-qos syscon           v    ÿ                 qos@ff200080              rockchip,rk3528-qos syscon           v    ÿ  €              qos@ff200100              rockchip,rk3528-qos syscon           v    ÿ                qos@ff200200              rockchip,rk3528-qos syscon           v    ÿ                qos@ff200280              rockchip,rk3528-qos syscon           v    ÿ €              qos@ff200300              rockchip,rk3528-qos syscon           v    ÿ                qos@ff200380              rockchip,rk3528-qos syscon           v    ÿ €              qos@ff210000              rockchip,rk3528-qos syscon           v    ÿ!                qos@ff210080              rockchip,rk3528-qos syscon           v    ÿ! €              qos@ff220000              rockchip,rk3528-qos syscon           v    ÿ"                   º         qos@ff220080              rockchip,rk3528-qos syscon           v    ÿ" €                 º         qos@ff240000              rockchip,rk3528-qos syscon           v    ÿ$                qos@ff250000              rockchip,rk3528-qos syscon           v    ÿ%                   º         qos@ff260000              rockchip,rk3528-qos syscon           v    ÿ&                   º         qos@ff270000              rockchip,rk3528-qos syscon           v    ÿ'                   º         qos@ff270080              rockchip,rk3528-qos syscon           v    ÿ' €                 º         qos@ff270100              rockchip,rk3528-qos syscon           v    ÿ'                  º         qos@ff270200              rockchip,rk3528-qos syscon           v    ÿ'                  º          qos@ff270280              rockchip,rk3528-qos syscon           v    ÿ'€                 º   !      qos@ff270300              rockchip,rk3528-qos syscon           v    ÿ'                  º   "      qos@ff270380              rockchip,rk3528-qos syscon           v    ÿ'€                 º   #      qos@ff270480              rockchip,rk3528-qos syscon           v    ÿ'€                 º   $      qos@ff270500              rockchip,rk3528-qos syscon           v    ÿ'                  º   %      qos@ff280000              rockchip,rk3528-qos syscon           v    ÿ(                   º   &      qos@ff280080              rockchip,rk3528-qos syscon           v    ÿ( €                 º   '      qos@ff280100              rockchip,rk3528-qos syscon           v    ÿ(                  º   (      qos@ff280180              rockchip,rk3528-qos syscon           v    ÿ(€                 º   )      qos@ff280200              rockchip,rk3528-qos syscon           v    ÿ(                  º   *      qos@ff280280              rockchip,rk3528-qos syscon           v    ÿ(€                 º   +      qos@ff280300              rockchip,rk3528-qos syscon           v    ÿ(                  º   ,      qos@ff280380              rockchip,rk3528-qos syscon           v    ÿ(€                 º   -      qos@ff280400              rockchip,rk3528-qos syscon           v    ÿ(                  º   .      syscon@ff340000           rockchip,rk3528-vpu-grf syscon           v    ÿ4        €          º   B      syscon@ff348000       $    rockchip,rk3528-pipe-phy-grf syscon          v    ÿ4€       €          º   U      syscon@ff360000           rockchip,rk3528-vo-grf syscon            v    ÿ6                  º   <      clock-controller@ff4a0000             rockchip,rk3528-cru          v    ÿJ               ˜  Á     t                                                      	      
                              z      y            L      L  Ñ  € FÏq ;šÊ ;]Á Q– æ²€Íe úð€õá ðÑ€ëÂ á£ Cý ×„ #ÃF úð€õá sY@Íe          ”              1xin24m gmac0             Ó           æ            º         syscon@ff540000           rockchip,rk3528-ioc-grf syscon           v    ÿT                  º   
      power-management@ff600000         &    rockchip,rk3528-pmu syscon simple-mfd            v    ÿ`             power-controller          !    rockchip,rk3528-power-controller            ó                        +             º      power-domain@4           v            ”      Ð      Ë                      ó          power-domain@5           v                      ó          	  ºdisabled          power-domain@6           v                      ó          power-domain@7           v         $                  !   "   #   $   %        ó          power-domain@8           v         $     &   '   (   )   *   +   ,   -   .        ó                gpu@ff700000          "    rockchip,rk3528-mali arm,mali-450            v    ÿp                 Á      Ð              Ñ³Ü@á£          ”      Ð            	  1bus core          T  1       X          Y          V          \          ]          Z          [         "  =gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1            ›   /        Š              §      w        ºokay               0      spi@ff9c0000          (    rockchip,rk3528-spi rockchip,rk3066-spi          v    ÿœ                  ”      â      á        1spiclk apb_pclk         1       ƒ              1      1           tx rx           Š                           +          	  ºdisabled          spi@ff9d0000          (    rockchip,rk3528-spi rockchip,rk3066-spi          v    ÿ�                  ”      ž      �        1spiclk apb_pclk         1       „              1      1           tx rx           Š                           +          	  ºdisabled          serial@ff9f0000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿŸ                  ”            k        1baudclk apb_pclk            1       (              1   	   1           )           6           ºokay            @default         N   2      serial@ff9f8000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿŸ€                 ”            ë        1baudclk apb_pclk            1       )              1      1   
        Š              )           6         	  ºdisabled          serial@ffa00000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿ                   ”                     1baudclk apb_pclk            1       *              1      1           Š              )           6         	  ºdisabled          serial@ffa08000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿ €                 ”            ì        1baudclk apb_pclk            1       +              1      1           Š              )           6         	  ºdisabled          serial@ffa10000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿ¡                  ”           1        1baudclk apb_pclk            1       ,              1      1           Š              )           6         	  ºdisabled          serial@ffa18000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿ¡€                 ”      "      ¡        1baudclk apb_pclk            1       -              1      1           Š              )           6         	  ºdisabled          serial@ffa20000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿ¢                  ”      %      ¢        1baudclk apb_pclk            1       .              1      1           Š              )           6         	  ºdisabled          serial@ffa28000       &    rockchip,rk3528-uart snps,dw-apb-uart            v    ÿ¢€                 ”      (      £        1baudclk apb_pclk            1       /              1      1           Š              )           6         	  ºdisabled          i2c@ffa50000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ¥                  ”      ß      Þ      	  1i2c pclk            1       =           Š                           +          	  ºdisabled          i2c@ffa58000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ¥€                 ”      Ý      Ü      	  1i2c pclk            1       >           Š                           +            ºokay            @default         N   3   eeprom@50             belling,bl24c16a atmel,24c16             v   P        X            a        k   4         i2c@ffa60000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ¦                  ”     j     i      	  1i2c pclk            1       ?           @default         N   5                     +          	  ºdisabled          i2c@ffa68000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ¦€                 ”      ¥      ¤      	  1i2c pclk            1       @           Š                           +          	  ºdisabled          i2c@ffa70000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ§                  ”     3     2      	  1i2c pclk            1       A           @default         N   6        Š                           +          	  ºdisabled          i2c@ffa78000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ§€                 ”      §      ¦      	  1i2c pclk            1       B           Š                           +          	  ºdisabled          i2c@ffa80000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ¨                  ”      ©      ¨      	  1i2c pclk            1       C           Š                           +          	  ºdisabled          i2c@ffa88000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c          v    ÿ¨€                 ”     5     4      	  1i2c pclk            1       D           @default         N   7        Š                           +          	  ºdisabled          pwm@ffa90000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ©                  ”      o      n      	  1pwm pclk            v         	  ºdisabled          pwm@ffa90010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ©                 ”      o      n      	  1pwm pclk            v           ºokay            @default         N   8         º   _      pwm@ffa90020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ©                  ”      o      n      	  1pwm pclk            v           ºokay            @default         N   9         º   `      pwm@ffa90030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ© 0                ”      o      n      	  1pwm pclk            v         	  ºdisabled          pwm@ffa98000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ©€                 ”      r      q      	  1pwm pclk            v         	  ºdisabled          pwm@ffa98010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ©€                ”      r      q      	  1pwm pclk            v         	  ºdisabled          pwm@ffa98020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ©€                 ”      r      q      	  1pwm pclk            v         	  ºdisabled          pwm@ffa98030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm          v    ÿ©€0                ”      r      q      	  1pwm pclk            v         	  ºdisabled          adc@ffae0000              rockchip,rk3528-saradc           v    ÿ®                  ”      Ã      Â        1saradc apb_pclk         1       Œ           Š              §      o        ®saradc-apb          �           ºokay            “   :         º   V      ethernet@ffbd0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a            v    ÿ½               0   ”                                    >  1stmmaceth clk_mac_ref mac_clk_rx mac_clk_tx pclk_mac aclk_mac           1       q          t           =macirq eth_wake_irq         Ÿ   ;        ªrmii            Š              §      ´      
  ®stmmaceth              <        ³   =         Ã        Ô   >        ç   ?         ú      	  ºdisabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@2            ethernet-phy-ieee802.3-c22           v            ”     "                 @default         N   @   A        §      ¸         º   ;         stmmac-axi-config                                                       /            º   =      rx-queues-config            ?            º   >   queue0           tx-queues-config            U            º   ?   queue0              ethernet@ffbe0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a            v    ÿ¾                   ”      ­      ¬      «      ª      (  1stmmaceth clk_mac_ref pclk_mac aclk_mac         1       y          |           =macirq eth_wake_irq         Š              §      a      
  ®stmmaceth              B        ³   C         Ã        Ô   D        ç   E         ú      	  ºdisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                       /            º   C      rx-queues-config            ?            º   D   queue0           tx-queues-config            U            º   E   queue0              mmc@ffbf0000          0    rockchip,rk3528-dwcmshc rockchip,rk3588-dwcmshc          v    ÿ¿                 Á      �      �      Œ        ÑëÂ n6 ëÂ       (   ”      Œ      �      Ž      �      �        1core bus axi block timer            1       ˆ           këÂ         @default         N   F   G   H   I        Š            (  §      A      B      C      D      E        ®core bus axi block timer            ºokay            y            ƒ         •         ¤         ª         ²        À   4        Ì   :      mmc@ffc10000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc          v    ÿÁ        @           ”      ¹      ¸     —     ˜        1biu ciu ciu-drive ciu-sample            Ù           1       ‰           këÂ         @default         N   J   K   L        Š              §      g        ®reset         	  ºdisabled          mmc@ffc20000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc          v    ÿÂ        @           ”      »      º     ™     š        1biu ciu ciu-drive ciu-sample            Ù           1       Š           këÂ         @default         N   M   N   O        Š              §      h        ®reset         	  ºdisabled          mmc@ffc30000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc          v    ÿÃ        @           ”     (     '     •     –        1biu ciu ciu-drive ciu-sample            Ù           1       …           kõá         @default         N   P   Q   R   S        Š              §      ½        ®reset           ä   Z        ºokay            y            ƒ                                   À   4        Ì   T      efuse@ffce0000            rockchip,rk3528-otp          v    ÿÎ        @          ”     +     )     *        1otp apb_pclk sbpi           §      À      ¾      ¿        ®otp apb sbpi       nvmem-layout              fixed-layout                         +      cpu-code@2           v            cpu-version@8            v              ,            id@a             v   
         cpu-leakage@1a           v            logic-leakage@1b             v            gpu-leakage@1c           v            tsadc-trim@44            v   D           ,       
            dma-controller@ffd60000           arm,pl330 arm,primecell          v    ÿÖ        @          ”      ^      	  1apb_pclk          l  1                                                                                                   1            <         º   1      phy@ffdc0000              rockchip,rk3528-naneng-combphy           v    ÿÜ                 Á      {        Ñõá          ”      {      ³      ´        1ref apb pipe            Š              §      c      e        ®phy apb         S           ^   B        p   U      	  ºdisabled             º            chosen          †serial0:1500000n8         adc-keys          	    adc-keys            ’   V            žbuttons         ¯ w@        É   d   button-maskrom          ×MASKROM         Ý   �        è             leds          
    gpio-leds           @default         N   W   led-0                      on        
  heartbeat              X             
  %heartbeat            regulator-0v9-vdd             regulator-fixed         ;vdd_0v9          J         ^        p »         ˆ »             Y      regulator-1v1-vcc-ddr             regulator-fixed         ;vcc_ddr          J         ^        p Èà        ˆ Èà            Y      regulator-1v8-vcc             regulator-fixed         ;vcc_1v8          J         ^        p w@        ˆ w@            4         º   :      regulator-3v3-vcc             regulator-fixed         ;vcc_3v3          J         ^        p 2Z         ˆ 2Z             Y         º   4      regulator-3v3-vcc-wifi            regulator-fixed          «           Z               @default         N   [      	  ;vcc_wifi            p 2Z         ˆ 2Z             4      regulator-5v0-vcc-sys             regulator-fixed         ;vcc5v0_sys           J         ^        p LK@        ˆ LK@         º   Y      regulator-5v0-vcc-usb20           regulator-fixed          «           \               @default         N   ]        ;vcc5v0_usb20            p LK@        ˆ LK@            Y      regulator-vccio-sd            regulator-gpio             X               @default         N   ^      	  ;vccio_sd            p w@        ˆ 2Z         ¾ w@     2Z                Y         º   T      regulator-vdd-arm             pwm-regulator           Å   _      ˆ           Ê   Y        ;vdd_arm          J         ^        p b        ˆ Sh        Õ   ú         º         regulator-vdd-logic           pwm-regulator           Å   `      ˆ           Ê   Y      
  ;vdd_logic            J         ^        p 
Áè        ˆ Y°        Õ   ú         º   0      rfkill            rfkill-gpio         ×rfkill-wlan         @default         N   a        ówlan            þ   X                	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c1 mmc0 mmc1 serial0 cpu reg device_type enable-method clocks operating-points-v2 cpu-supply phandle arm,smc-id shmem #clock-cells opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,grf ranges interrupts gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells power-domains bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins no-map clock-frequency clock-output-names reg-names bus-range clock-names interrupt-names interrupt-map-mask interrupt-map linux,pci-domain max-link-speed num-lanes phys phy-names resets reset-names status assigned-clocks assigned-clock-rates #reset-cells #power-domain-cells pm_qos mali-supply dmas dma-names reg-io-width reg-shift pinctrl-names pinctrl-0 pagesize read-only vcc-supply #pwm-cells #io-channel-cells vref-supply phy-handle phy-mode snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-is-integrated snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use max-frequency bus-width cap-mmc-highspeed mmc-hs200-1_8v no-sd no-sdio non-removable vmmc-supply vqmmc-supply fifo-depth rockchip,default-sample-phase cap-sd-highspeed disable-wp sd-uhs-sdr104 bits #dma-cells arm,pl330-periph-burst #phy-cells rockchip,pipe-grf rockchip,pipe-phy-grf stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt color default-state function gpios linux,default-trigger regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt vin-supply enable-active-high states pwms pwm-supply regulator-settling-time-up-us radio-type shutdown-gpios 