Ðþí  mŸ   8  fœ   (              fd                                                                   6   ,Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7 (eMMC)         *   2qcom,ipq9574-ap-al02-c7-emmc qcom,ipq9574      clocks     ref-48mhz-clk            2fixed-factor-clock           =            D             Q            [            f         sleep-clk            2fixed-clock          D             n  }          f         xo-board-clk             2fixed-factor-clock           =            D             Q            [            f         xo-clk           2fixed-clock          D             nÜl          f            cpus                                 cpu@0            ~cpu          2arm,cortex-a73           Š             Žpsci             œ            =               ­cpu          ¹            Í            Ü            f   )      cpu@1            ~cpu          2arm,cortex-a73           Š            Žpsci             œ            =               ­cpu          ¹            Í            Ü            f   *      cpu@2            ~cpu          2arm,cortex-a73           Š            Žpsci             œ            =               ­cpu          ¹            Í            Ü            f   +      cpu@3            ~cpu          2arm,cortex-a73           Š            Žpsci             œ            =               ­cpu          ¹            Í            Ü            f   ,      l2-cache             2cache            ç             ó         f            firmware       scm          2qcom,scm-ipq9574 qcom,scm                a          memory@40000000          ~memory           Š    @                 opp-table-cpu            2operating-points-v2-kryo-cpu                        	         f      opp-936000000           (    7Ê:         /         =           N @      opp-1104000000          (    AÍ´         / ,        =           N @      opp-1200000000          (    G†Œ         / )$        =           N @      opp-1416000000          (    Tfr         / )$        =           N @      opp-1488000000          (    X±         / H        =           N @      opp-1800000000          (    kIÒ         / l        =           N @      opp-2208000000          (    ƒ›h         / 6d        =           N @         pmu          2arm,cortex-a73-pmu          _              psci             2arm,psci-1.0             •smc       remoteproc        $   2qcom,ipq9574-rpm-proc qcom,rpm-proc    glink-edge           2qcom,glink-rpm          _       ¨           j   
        {          rpm-requests          $   2qcom,rpm-ipq9574 qcom,glink-smd-rpm         ‚rpm_requests       regulators           2qcom,rpm-mp5496-regulators     s1          –         ® g8         f         l2          – w@        ® w@         Æ         Ú      l5          – w@        ® w@         Æ         Ú         f                      reserved-memory                                   ì   bootloader@4a100000          Š    J       @           ó      sbl@4a500000             Š    JP                  ó      tz@4a600000          Š    J`       @           ó      smem@4aa00000         
   2qcom,smem            Š    J                  ú               ó         soc@0            2simple-bus                                   ì            ÿÿÿÿ   sram@60000           2qcom,rpm-msg-ram             Š     `          f   
      phy@84000         !   2qcom,ipq9574-qmp-gen3x1-pcie-phy             Š @             =      H      T      Ò         ­aux cfg_ahb pipe                  H        1-         '                    .phy common           D            :gcc_pcie0_pipe_clk_src          M          	  Xdisabled             f         phy@8c000         !   2qcom,ipq9574-qmp-gen3x2-pcie-phy             Š À              =      J      V      Ô         ­aux cfg_ahb pipe                  J        1-         '                    .phy common           D            :gcc_pcie2_pipe_clk_src          M            Xokay             f         rng@e3000            2qcom,ipq9574-trng qcom,trng          Š 0             =      s         ­core          mdio@90000        $   2qcom,ipq9574-mdio qcom,ipq4019-mdio          Š 	     d                                   =      r         ­gcc_mdio_ahb_clk          	  Xdisabled          phy@f4000         !   2qcom,ipq9574-qmp-gen3x2-pcie-phy             Š @              =      K      W      Õ         ­aux cfg_ahb pipe                  K        1-         '      !      "        .phy common           D            :gcc_pcie3_pipe_clk_src          M            Xokay             f         phy@fc000         !   2qcom,ipq9574-qmp-gen3x1-pcie-phy             Š À             =      I      U      Ó         ­aux cfg_ahb pipe                  I        1-         '                    .phy common           D            :gcc_pcie1_pipe_clk_src          M            Xokay             f         clock-controller@9b000           2qcom,ipq9574-cmn-pll             Š 	°             =         w      ¿         ­ref ahb sys          D                          _   ËAx          f         efuse@a4000           2qcom,ipq9574-qfprom qcom,qfprom          Š 
@   ¡                            cpu-speed-bin@15             Š              x               f   	         dma-controller@704000             2qcom,bam-v1.7.4 qcom,bam-v1.7.0          Š p@            _       Ï           }           ˆ           �           �            ª         f         crypto@73a000         +   2qcom,ipq9574-qce qcom,ipq4019-qce qcom,qce           Š s    `          =      Ï      Î      Í         ­iface bus core          Ã                    Èrx tx         thermal-sensor@4a9000         &   2qcom,ipq9574-tsens qcom,ipq8074-tsens            Š J�     J€            _       ¸         	  Òcombined            â           ð            f   '      pinctrl@1000000          2qcom,ipq9574-tlmm            Š    0          _       Ð                               "              A         .        C            f      uart2-state         Tgpio34 gpio35           Yblsp2_uart          b            q         f         spi-0-state         Tgpio11 gpio12 gpio13 gpio14       
  Yblsp0_spi           b            q         f         gpio-keys-default-state         Tgpio37          Ygpio            b            ~         f   0      gpio-leds-default-state         Tgpio64          Ygpio            b            ~         f   1      qpic-snand-default-state             f      clock-pins          Tgpio5         	  Yqspi_clk            b            q      cs-pins         Tgpio4           Yqspi_cs         b            q      data-pins           Tgpio0 gpio1 gpio2 gpio3       
  Yqspi_data           b            q         sdc-default-state            f      clk-pins            Tgpio5           Ysdc_clk         b            q      cmd-pins            Tgpio4           Ysdc_cmd         b            ~      data-pins         0  Tgpio0 gpio1 gpio2 gpio3 gpio6 gpio7 gpio8 gpio9       	  Ysdc_data            b            ~      rclk-pins           Tgpio10        	  Ysdc_rclk            b            ‹         pcie1-default-state          f   $   clkreq-n-pins           Tgpio25        
  Ypcie1_clk           b            ~      perst-n-pins            Tgpio26          Ygpio            b            ‹         š      wake-n-pins         Tgpio27          Ypcie1_wake          b            ~         pcie2-default-state          f   &   clkreq-n-pins           Tgpio28        
  Ypcie2_clk           b            ~      perst-n-pins            Tgpio29          Ygpio            b            ‹         š      wake-n-pins         Tgpio30          Ypcie2_wake          b            ~         pcie3-default-state          f   %   clkreq-n-pins           Tgpio31        
  Ypcie3_clk           b            ~      perst-n-pins            Tgpio32          Ygpio            b            ~         š      wake-n-pins         Tgpio33          Ypcie3_wake          b            ~            clock-controller@1800000             2qcom,ipq9574-gcc             Š€               =                                   D           ¥           ²            f         hwlock@1905000           2qcom,tcsr-mutex          Š�P            Æ            f         syscon@1937000           2qcom,tcsr-ipq9574 syscon             Š“p            f         mmc@7804000       %   2qcom,ipq9574-sdhci qcom,sdhci-msm-v5             Š€@    €P    €€             Ôhc cqhci ice            _       {          Š           Òhc_irq pwr_irq           =      g      d         f         ­iface core xo ice            Þ         ì        ù           default                            -         <        Vã`         d           Xokay            n           z         dma-controller@7884000           2qcom,bam-v1.7.0          Šˆ@  °         _       î            =      q         ­bam_clk         }           ˆ             f         serial@78af000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             ŠŠð            _       k            =      )      q         ­core iface        	  Xdisabled          serial@78b0000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             Š‹             _       l            =      *      q         ­core iface        	  Xdisabled          serial@78b1000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             Š‹            _      2            =      +      q         ­core iface          Xokay            ù           default       serial@78b2000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             Š‹             _      3            =      ,      q         ­core iface        	  Xdisabled          serial@78b3000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             Š‹0            _      4            =      -      q         ­core iface        	  Xdisabled          serial@78b4000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             Š‹@            _      5            =      .      q         ­core iface        	  Xdisabled          spi@78b5000          2qcom,spi-qup-v2.2.1          Š‹P                                      _       _            =            q         ­core iface          Ã                    Ètx rx           Xokay            ù           default    flash@0           2micron,n25q128a11 jedec,spi-nor          Š                                     ‡úð€         i2c@78b6000          2qcom,i2c-qup-v2.2.1          Š‹`                                      _       `            =            q         ­core iface                        úð€        Ã                    Ètx rx         	  Xdisabled          spi@78b6000          2qcom,spi-qup-v2.2.1          Š‹`                                      _       `            =             q         ­core iface          Ã                    Ètx rx         	  Xdisabled          i2c@78b7000          2qcom,i2c-qup-v2.2.1          Š‹p                                      _       a            =      !      q         ­core iface                !        úð€        Ã                    Ètx rx         	  Xdisabled          spi@78b7000          2qcom,spi-qup-v2.2.1          Š‹p                                      _       a            =      "      q         ­core iface          Ã                    Ètx rx         	  Xdisabled          i2c@78b8000          2qcom,i2c-qup-v2.2.1          Š‹€                                      _       b            =      #      q         ­core iface                #        úð€        Ã                    Ètx rx         	  Xdisabled          spi@78b8000          2qcom,spi-qup-v2.2.1          Š‹€                                      _       b           ‡úð€         =      $      q         ­core iface          Ã                    Ètx rx         	  Xdisabled          i2c@78b9000          2qcom,i2c-qup-v2.2.1          Š‹�                                      _      +            =      %      q         ­core iface                %        úð€        Ã                    Ètx rx         	  Xdisabled          spi@78b9000          2qcom,spi-qup-v2.2.1          Š‹�                                      _      +            =      &      q         ­core iface          Ã                    Ètx rx         	  Xdisabled          dma-controller@7984000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0          Š˜@  À         _       ’            =      o         ­bam_clk         }           ˆ            Xokay             f         spi@79b0000          2qcom,ipq9574-snand           Š›                                        =      p      o      ¤         ­core aon iom            Ã                         
  Ètx rx cmd         	  Xdisabled            ù           default          f      flash@0       	   2spi-nand             Š                                     ™           ©           »            phy@7b000            2qcom,ipq9574-qusb2-phy           Š °   €        M             =      b            ­cfg_ahb ref         '      $        Xokay            Î           Ù            é            f   !      phy@7d000            2qcom,ipq9574-qmp-usb3-phy            Š Ð   
         M             =      Y         b      Ð         ­aux ref cfg_ahb pipe            '      *      +        .phy phy_phy          D            :usb0_pipe_clk           Xokay            Ù            þ            f   "      usb@8af8800          2qcom,ipq9574-dwc3 qcom,dwc3          Š¯ˆ                                      ì      (   =      \      [      ]      Ñ      `      #   ­cfg_noc core iface sleep mock_utmi                [      `        ëÂ n6       @            †             ˆ             o             p         0  Òpwr_event qusb2_phy dm_hs_phy_irq dp_hs_phy_irq         '      ,        Xokay       usb@8a00000       
   2snps,dwc3            Š     Í          =      `         ­ref         _       Œ           "   !   "        'usb2-phy usb3-phy            1         @        X             l         …        žhost             interrupt-controller@b000000             2qcom,msm-qgic2            Š                   @                                       .        C           _      	          ì     À   0          f      v2m@0            2arm,gic-v2m-frame            Š      ý         ¦      v2m@1000             2arm,gic-v2m-frame            Š     ý         ¦      v2m@2000             2arm,gic-v2m-frame            Š      ý         ¦         watchdog@b017000          $   2qcom,apss-wdt-ipq9574 qcom,kpss-wdt          Šp            _                   =           µ         mailbox@b111000       <   2qcom,ipq9574-apcs-apps-global qcom,ipq6018-apcs-apps-global          Š             D            =   #                  ­pll xo gpll0            Á            f         clock@b116000            2qcom,ipq9574-a73pll          Š`    @         D             =            ­xo           f   #      timer@b120000            2arm,armv7-timer-mem          Š                                       ì   frame@b120000            Š                 Í            _                          frame@b123000            Š0            Í           _       	         	  Xdisabled          frame@b124000            Š@            Í           _       
         	  Xdisabled          frame@b125000            ŠP            Í           _                	  Xdisabled          frame@b126000            Š`            Í           _                	  Xdisabled          frame@b127000            Šp            Í           _                	  Xdisabled          frame@b128000            Š€            Í           _                	  Xdisabled             pcie@10000000            2qcom,pcie-ipq9574         0   Š          ¨      €   @       à            Ôdbi elbi atu parf config mhi             ~pci         Ú           ë       ÿ        õ                                  0  ì                            0  0      Ð        `  _                                                                              !         (  Òmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C           ÿ                     �                               #                                1                                T                                U         0   =      2      <      ;      O      U      I      %   ­axi_m axi_s axi_bridge rchng ahb aux          @  '      X      W      V      U      T      S      R      Q      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb           "           'pciephy                                           .pcie-mem cpu-pcie           Xokay            ù   $        default         A                 M               pcie@18000000            2qcom,pcie-ipq9574         0   Š          ¨          @       `            Ôdbi elbi atu parf config mhi             ~pci         Ú           ë       ÿ        õ                                  0  ì                            0  0      Ð        `  _       Ý          Þ          á         8         F         Ÿ         î         ï         (  Òmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C           ÿ                     �                               ½                                ¾                                ¿                                À         0   =      6      B      A      S      W      K      %   ­axi_m axi_s axi_bridge rchng ahb aux          @  '      h      g      f      e      d      c      b      a      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb           "           'pciephy                                           .pcie-mem cpu-pcie           Xokay            ù   %        default         A                  M      !         pcie@20000000            2qcom,pcie-ipq9574         0   Š            ¨       €   @        à            Ôdbi elbi atu parf config mhi             ~pci         Ú           ë       ÿ        õ                                  0  ì                              0   0      Ð        `  _       ~          €          �          ‚          ‰          �          Ž          �         (  Òmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C           ÿ                     �                               ¤                                ¥                                º                                »         0   =      4      ?      >      Q      V      J      %   ­axi_m axi_s axi_bridge rchng ahb aux          @  '      `      _      ^      ]      \      [      Z      Y      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb           "           'pciephy                       	      
              .pcie-mem cpu-pcie           Xokay            ù   &        default         A                 M               pcie@28000000            2qcom,pcie-ipq9574         0   Š(     (     ¨(          @ (      `            Ôdbi elbi atu parf config mhi             ~pci         Ú            ë       ÿ        õ                                  0  ì           (                 (0  (0      Ð        `  _       4          7          8          9          ;          ?          D          H         (  Òmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7         C           ÿ                     �                               K                                N                                O                                S         0   =      0      9      8      M      T      H      %   ­axi_m axi_s axi_bridge rchng ahb aux          @  '      P      O      N      M      L      K      J      I      :  .pipe sticky axi_s_sticky axi_s axi_m_sticky axi_m aux ahb           "           'pciephy                                            .pcie-mem cpu-pcie         	  Xdisabled          clock-controller@39b00000            2qcom,ipq9574-nsscc           Š9°           <   =                     Ö                              k      d   ­xo nss_1200 ppe_353 gpll0_out uniphy0_rx uniphy0_tx uniphy1_rx uniphy1_tx uniphy2_rx uniphy2_tx bus          D           ¥           ²            thermal-zones      nss-top-thermal         X   '      trips      nss-top-critical            h èH        t  è      	   …critical                ubi-0-thermal           X   '      trips      ubi_0-critical          h èH        t  è      	   …critical                ubi-1-thermal           X   '      trips      ubi_1-critical          h èH        t  è      	   …critical                ubi-2-thermal           X   '      trips      ubi_2-critical          h èH        t  è      	   …critical                ubi-3-thermal           X   '      trips      ubi_3-critical          h èH        t  è      	   …critical                cpuss0-thermal          X   '      trips      cpu-critical            h èH        t  è      	   …critical                cpuss1-thermal          X   '   	   trips      cpu-critical            h èH        t  è      	   …critical                cpu0-thermal            X   '   
   trips      cpu-critical            h ÔÀ        t  '      	   …critical          cpu-passive         h ­°        t  è         …passive          f   (         cooling-maps       map0               (      0  „   )ÿÿÿÿÿÿÿÿ   *ÿÿÿÿÿÿÿÿ   +ÿÿÿÿÿÿÿÿ   ,ÿÿÿÿÿÿÿÿ            cpu1-thermal            X   '      trips      cpu-critical            h ÔÀ        t  '      	   …critical          cpu-passive         h ­°        t  è         …passive          f   -         cooling-maps       map0               -      0  „   )ÿÿÿÿÿÿÿÿ   *ÿÿÿÿÿÿÿÿ   +ÿÿÿÿÿÿÿÿ   ,ÿÿÿÿÿÿÿÿ            cpu2-thermal            X   '      trips      cpu-critical            h ÔÀ        t  '      	   …critical          cpu-passive         h ­°        t  è         …passive          f   .         cooling-maps       map0               .      0  „   )ÿÿÿÿÿÿÿÿ   *ÿÿÿÿÿÿÿÿ   +ÿÿÿÿÿÿÿÿ   ,ÿÿÿÿÿÿÿÿ            cpu3-thermal            X   '      trips      cpu-critical            h ÔÀ        t  '      	   …critical          cpu-passive         h ­°        t  è         …passive          f   /         cooling-maps       map0               /      0  „   )ÿÿÿÿÿÿÿÿ   *ÿÿÿÿÿÿÿÿ   +ÿÿÿÿÿÿÿÿ   ,ÿÿÿÿÿÿÿÿ            wcss-phyb-thermal           X   '      trips      wcss_phyb-critical          h èH        t  è      	   …critical                top-glue-thermal            X   '      trips      top_glue-critical           h èH        t  è      	   …critical                   timer            2arm,armv8-timer       0  _                                      aliases         “/soc@0/serial@78b1000         chosen          ›serial0:115200n8          s1800            2regulator-fixed         – w@        ® w@         Ú         Æ      
  §fixed_1p8            f         s3300            2regulator-fixed         – 2Z         ® 2Z          Ú         Æ      
  §fixed_3p3            f         s0925            2regulator-fixed         – H        ® H         Ú         Æ        §fixed_0p925          f         gpio-keys         
   2gpio-keys           ù   0        default    button-wps          ¶wps         ¼          G      %           Ç   <         leds          
   2gpio-leds           ù   1        default    led-0           Ù           Ywlan            G      @           ßphy0tx          õoff             	interrupt-parent #address-cells #size-cells model compatible clocks #clock-cells clock-div clock-mult phandle clock-frequency device_type reg enable-method next-level-cache clock-names operating-points-v2 #cooling-cells cpu-supply cache-level cache-unified qcom,dload-mode opp-shared nvmem-cells opp-hz opp-microvolt opp-supported-hw clock-latency-ns interrupts qcom,rpm-msg-ram mboxes qcom,glink-channels regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on ranges no-map hwlocks assigned-clocks assigned-clock-rates resets reset-names clock-output-names #phy-cells status assigned-clock-rates-u64 bits #dma-cells qcom,ee qcom,num-ees num-channels qcom,controlled-remotely dmas dma-names interrupt-names #qcom,sensors #thermal-sensor-cells gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells pins function drive-strength bias-disable bias-pull-up bias-pull-down output-low #reset-cells #interconnect-cells #hwlock-cells reg-names non-removable supports-cqe pinctrl-0 pinctrl-names mmc-ddr-1_8v mmc-hs200-1_8v mmc-hs400-1_8v mmc-hs400-enhanced-strobe max-frequency bus-width vmmc-supply vqmmc-supply spi-max-frequency nand-ecc-engine nand-ecc-strength nand-ecc-step-size vdd-supply vdda-pll-supply vdda-phy-dpdm-supply vdda-phy-supply interrupts-extended phys phy-names tx-fifo-resize snps,is-utmi-l1-suspend snps,hird-threshold snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk dr_mode msi-controller timeout-sec #mbox-cells frame-number linux,pci-domain bus-range num-lanes interrupt-map-mask interrupt-map interconnects interconnect-names perst-gpios wake-gpios thermal-sensors temperature hysteresis trip cooling-device serial0 stdout-path regulator-name label linux,code debounce-interval color linux,default-trigger default-state 